source: FPGA/FAD/FACT_FAD_lib/hdl/fad_definitions.vhd@ 228

Last change on this file since 228 was 215, checked in by dneise, 14 years ago
initial commit (2nd part): only VHDL and UCF files were commited.
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1-- Package File Template
2--
3-- Purpose: This package defines supplemental types, subtypes,
4-- constants, and functions
5
6
7library IEEE;
8use IEEE.STD_LOGIC_1164.all;
9use IEEE.STD_LOGIC_ARITH.ALL;
10use IEEE.STD_LOGIC_UNSIGNED.ALL;
11-- use IEEE.NUMERIC_STD.ALL;
12
13package fad_definitions is
14
15
16-- Declare constants
17
18-- Network Settings
19 type mac_type is array (0 to 2) of std_logic_vector (15 downto 0);
20 constant MAC_ADDRESS : mac_type := (X"0011", X"9561", X"97B4");
21
22 type ip_type is array (0 to 3) of integer;
23 constant NETMASK : ip_type := (255, 255, 255, 0);
24 constant IP_ADDRESS : ip_type := (129, 217, 160, 119);
25 constant GATEWAY : ip_type := (129, 217, 160, 1);
26 constant FIRST_PORT : integer := 5000;
27
28 constant PACKAGE_VERSION : std_logic_vector(7 downto 0) := X"01";
29 constant PACKAGE_SUB_VERSION : std_logic_vector(7 downto 0) := X"02";
30 constant PACKAGE_HEADER_LENGTH : integer := 22;
31 constant PACKAGE_END_LENGTH : integer := 2; -- CRC and END-Flag
32
33 constant W5300_S_INC : std_logic_vector(6 downto 0) := "1000000"; -- socket address offset
34
35-- W5300 Registers
36 constant W5300_BASE_ADR : std_logic_vector (9 downto 0) := (others => '0');
37 constant W5300_MR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"0";
38 constant W5300_IR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2";
39 constant W5300_IMR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"4";
40 constant W5300_SHAR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"8";
41 constant W5300_GAR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"10";
42 constant W5300_SUBR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"14";
43 constant W5300_SIPR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"18";
44 constant W5300_TMS01R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"20";
45 constant W5300_TMS23R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"22";
46 constant W5300_TMS45R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"24";
47 constant W5300_TMS67R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"26";
48 constant W5300_RMS01R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"28";
49 constant W5300_RMS23R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2A";
50 constant W5300_RMS45R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2C";
51 constant W5300_RMS67R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2E";
52 constant W5300_MTYPER : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"30";
53
54 constant W5300_S0_MR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"0";
55 constant W5300_S0_CR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"2";
56 constant W5300_S0_IMR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"4";
57 constant W5300_S0_IR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"6";
58 constant W5300_S0_SSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"8";
59 constant W5300_S0_PORTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"A";
60 constant W5300_S0_DPORTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"12";
61 constant W5300_S0_DIPR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"14";
62 constant W5300_S0_TX_WRSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"20";
63 constant W5300_S0_TX_FSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"24";
64 constant W5300_S0_RX_RSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"28";
65 constant W5300_S0_TX_FIFOR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"2E";
66 constant W5300_S0_RX_FIFOR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"30";
67-- End W5300 registers
68
69--
70 constant W5300_TX_FIFO_SIZE : integer := (15360 / 2); -- Socket TX FIFO-Size in 16 Bit Words
71
72 constant RAM_SIZE_64B : integer := 4096;
73 constant RAM_SIZE_16B : integer := RAM_SIZE_64B * 4;
74
75-- TYPE definitions
76 type roi_max_type is array (0 to 8) of std_logic_vector (10 downto 0);
77 type roi_array_type is array (0 to 35) of integer range 0 to 1024;
78 type drs_s_cell_array_type is array (0 to 3) of std_logic_vector (9 downto 0);
79 type adc_data_array_type is array (0 to 3) of std_logic_vector (11 downto 0);
80
81 type dac_array_type is array (0 to 7) of integer range 0 to 2**16 - 1;
82 type sensor_array_type is array (0 to 3) of integer range 0 to 2**16 - 1;
83
84-- constant DEFAULT_ROI : roi_array_type := (115, 125, 100, 102, 155, 101, 0, 101, 106,
85-- 181, 121, 189, 101, 101, 187, 56, 187, 101,
86-- 2, 141, 101, 100, 10, 100, 178, 101, 174,
87-- 12, 181, 100, 102, 101, 102, 0, 101, 108);
88 constant DEFAULT_ROI : roi_array_type := (others => 100);
89
90-- constant DEFAULT_DAC : dac_array_type := (5001, 5002, 5003, 5004, 5005, 5006, 5007, 5008);
91 constant DEFAULT_DAC : dac_array_type := (others => 0);
92
93-- Commands
94 constant CMD_START : std_logic_vector := X"C0";
95 constant CMD_STOP : std_logic_vector := X"30";
96 constant CMD_TRIGGER : std_logic_vector := X"A0";
97 constant CMD_TRIGGER_C : std_logic_vector := X"B0";
98 constant CMD_TRIGGER_S : std_logic_vector := X"20";
99 constant CMD_READ : std_logic_vector := X"0A";
100 constant CMD_WRITE : std_logic_vector := X"05";
101
102-- Declare functions and procedure
103
104
105end fad_definitions;
106
107
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