source: FPGA/FAD/stable/FACT_FAD/FACT_FAD_lib/hds/.xrf@ 663

Name Size Rev Age Author Last Change
../
clock_generator_struct.xrf 1.9 KB 246   14 years dneise initial check in of 1st stable version.
control_unit_struct.xrf 5.0 KB 252   14 years dneise DRS addresses may not be set via sa 44 0 .. 31
fad_board_struct.xrf 9.2 KB 252   14 years dneise DRS addresses may not be set via sa 44 0 .. 31
fad_main_struct.xrf 24.1 KB 260   14 years dneise possible to switch off SPI SCLK now. see new revision of simple_daq in ...
spi_interface_struct.xrf 4.6 KB 246   14 years dneise initial check in of 1st stable version.
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