1 | #ifndef FACT_HeadersFAD
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2 | #define FACT_HeadersFAD
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3 |
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4 | #ifdef __cplusplus
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5 | #include <ostream>
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6 |
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7 | // For debugging
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8 | #include <iostream>
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9 |
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10 | #include "ByteOrder.h"
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11 |
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12 | // ====================================================================
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13 |
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14 | namespace FAD
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15 | {
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16 | #endif
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17 | enum Enable
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18 | {
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19 | kCmdDrsEnable = 0x0600, // CMD_DENABLE/CMD_DISABLE
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20 | kCmdDwrite = 0x0800, // CMD_DWRITE_RUN/CMD_DWRITE_STOP
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21 | kCmdSclk = 0x1000, // CMD_SCLK_ON/OFF
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22 | kCmdSrclk = 0x1500, // CMD_SRCLK_ON/OFF
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23 | kCmdTriggerLine = 0x1800, // CMD_TRIGGERS_ON/CMD_TRIGGERS_OFF
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24 | kCmdContTrigger = 0x1f00,
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25 | kCmdRun = 0x2200, // CMD_Start/Stop
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26 | kCmdBusyOff = 0x2400, //
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27 | kCmdBusyOn = 0x3200, //
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28 | kCmdResetEventCounter = 0x2A00, //
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29 | kCmdSocket = 0x3000, // CMD_mode_command/CMD_mode_all_sockets
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30 | kCmdSingleTrigger = 0xA000, // CMD_Trigger
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31 | };
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32 |
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33 | enum Commands
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34 | {
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35 | kCmdWriteExecute = 0x0400, // Configure FAD with the current config ram
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36 |
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37 | kCmdWrite = 0x0500, // write to Config-RAM
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38 | kCmdWriteRoi = kCmdWrite|0x00, // Baseaddress ROI-Values
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39 | kCmdWriteDac = kCmdWrite|0x24, // Baseaddress DAC-Values
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40 |
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41 | kCmdWriteRate = kCmdWrite|0x2c, // Continous trigger rate
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42 | kCmdWriteRunNumberMSW = kCmdWrite|0x2d, // Run Number most significant word
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43 | kCmdWriteRunNumberLSW = kCmdWrite|0x2e, // Run Number least significant word
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44 |
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45 | /*
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46 | kCmdRead = 0x0a00, // read from Config-RAM
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47 | kCmdReadRoi = kCmdRead|0x00, // Baseaddress ROI-Values
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48 | kCmdReadDac = kCmdRead|0x24, // Baseaddress DAC-Values
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49 | */
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50 |
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51 | kCmdPhaseIncrease = 0x1200, // CMD_PS_DIRINC
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52 | kCmdPhaseDecrease = 0x1300, // CMD_PS_DIRDEC
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53 | kCmdPhaseApply = 0x1400, // CMD_PS_DO
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54 | kCmdPhaseReset = 0x1700, // CMD_PS_RESET
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55 | };
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56 |
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57 | namespace State
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58 | {
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59 | enum States
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60 | {
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61 | // State Machine states
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62 | kOffline = 1, // StateMachineImp::kSM_UserMode
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63 | kDisconnected,
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64 | kConnecting,
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65 | kConnected,
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66 | kConfiguring1,
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67 | kConfiguring2,
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68 | kConfiguring3,
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69 | kConfigured,
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70 | kRunInProgress
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71 | };
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72 | }
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73 |
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74 | enum FileFormat_t
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75 | {
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76 | kNone = 0, // Nothing is written just some little output in the log-stream
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77 | kDebug, // The contents of the headers are output to the console
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78 | kFits, // FITS file written with streamer class ofits
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79 | kRaw, // Raw binary streams are written
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80 | kCalib, // DRS calibration in progress
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81 | kCfitsio, // FITS file written with cfitsio
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82 | kZFits, // Compressed FITS file written
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83 | };
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84 |
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85 | enum
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86 | {
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87 | kMaxBins = 1024,
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88 | kNumTemp = 4,
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89 | kNumDac = 8,
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90 | kNumChips = 4,
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91 | kNumChannelsPerChip = 9,
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92 | kNumChannels = kNumChips*kNumChannelsPerChip,
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93 | };
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94 |
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95 | enum
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96 | {
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97 | kMaxRegAddr = 0xff, // Highest address in config-ram
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98 | kMaxRegValue = 0xffff,
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99 | kMaxDacAddr = kNumDac-1,
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100 | kMaxDacValue = 0xffff,
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101 | kMaxRoiAddr = kNumChannels-1,
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102 | kMaxRoiValue = kMaxBins,
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103 | kMaxRunNumber = 0xffffffff,
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104 | };
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105 |
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106 | enum
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107 | {
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108 | kDelimiterStart = 0xfb01,
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109 | kDelimiterEnd = 0x04fe,
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110 | };
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111 |
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112 | // --------------------------------------------------------
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113 |
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114 | struct EventHeader
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115 | {
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116 | #ifdef __cplusplus
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117 | enum Bits
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118 | {
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119 | kDenable = 1<<11,
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120 | kDwrite = 1<<10,
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121 | //kRefClkTooHigh = 1<< 9,
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122 | kRefClkTooLow = 1<< 8,
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123 | kDcmLocked = 1<< 7,
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124 | kDcmReady = 1<< 6,
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125 | kSpiSclk = 1<< 5,
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126 | kBusyOff = 1<< 4, // Busy continously off
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127 | kTriggerLine = 1<< 3, // Trigger line enabled
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128 | kContTrigger = 1<< 2, // Cont trigger enabled
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129 | kSock17 = 1<< 1, // Socket 1-7 for data transfer
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130 | kBusyOn = 1<< 0, // Busy continously on
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131 | };
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132 |
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133 | enum TriggerType
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134 | {
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135 | kLPext = 0x0100,
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136 | kLPint = 0x0200,
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137 | kPedestal = 0x0400,
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138 | kLPset = 0x7800,
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139 | kTIM = 0x8000,
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140 |
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141 | kExt1 = 0x0001,
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142 | kExt2 = 0x0002,
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143 | kAll = kLPext|kLPint|kTIM|kPedestal|kExt1|kExt2
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144 | };
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145 | #endif
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146 | // Einmalig: (new header changes entry in array --> send only if array changed)
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147 | // ----------------------------------
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148 | // Event builder stores an array with all available values.
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149 | // Disconnected boards are removed (replaced by def values)
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150 | // Any received header information is immediately put in the array.
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151 | // The array is transmitted whenever it changes.
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152 | // This will usually happen only very rarely when a new connection
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153 | // is opened.
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154 | //
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155 | // Array[40] of BoardId
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156 | // Array[40] of Version
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157 | // Array[40] of DNA
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158 |
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159 | // Slow changes: (new header changes entry in array --> send only if arra changed)
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160 | // -------------------------------------------
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161 | // Event builder stores an array with all available values.
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162 | // Disconnected boards can be kept in the arrays.
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163 | // Any received header information is immediately put in the array.
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164 | // The array is transmitted whenever it changes.
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165 | //
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166 | // Connection status (disconnected, connecting, connected) / Array[40]
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167 | // Consistency of PLLLCK / Array[ 40] of PLLLCK
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168 | // Consistency of Trigger type / Array[ 40] of trigger type
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169 | // Consistency of ROI / Array[1440] of ROI
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170 | // Consistency of RefClock / Array[ 40] of ref clock
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171 | // Consistency of DAC values / Array[ 400] of DAC values
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172 | // Consistency of run number / Array[ 40] of Run numbers
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173 |
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174 | // Fast changes (new header changes value --> send only if something changed)
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175 | // -------------------
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176 | // Event builder stores an internal array of all boards and
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177 | // transmits the min/max values determined from the array
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178 | // only if they have changed. Disconnected boards are not considered.
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179 | //
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180 | // Maximum/minimum Event counter of all boards in memory + board id
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181 | // Maximum/minimum time stamp of all boards in memory + board id
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182 | // Maximum/minimum temp of all boards in memory + board id
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183 |
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184 | // Unknown:
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185 | // ------------------
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186 | // Trigger Id ?
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187 | // TriggerGeneratorPrescaler ?
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188 | // Number of Triggers to generate ?
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189 |
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190 |
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191 | // ------------------------------------------------------------
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192 |
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193 | uint16_t fStartDelimiter; // 0x04FE
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194 | uint16_t fPackageLength;
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195 | uint16_t fVersion;
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196 | uint16_t fStatus;
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197 | //
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198 | uint16_t fTriggerCrc; // Receiver timeout / CRC ; 1 byte each
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199 | uint16_t fTriggerType;
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200 | uint32_t fTriggerCounter;
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201 | //
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202 | uint32_t fEventCounter;
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203 | uint32_t fFreqRefClock;
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204 | //
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205 | uint16_t fBoardId;
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206 | uint16_t fAdcClockPhaseShift;
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207 | uint16_t fNumTriggersToGenerate;
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208 | uint16_t fTriggerGeneratorPrescaler;
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209 | //
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210 | uint64_t fDNA; // Xilinx DNA
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211 | //
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212 | uint32_t fTimeStamp;
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213 | uint32_t fRunNumber;
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214 | //
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215 | int16_t fTempDrs[kNumTemp]; // In units of 1/16 deg(?)
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216 | //
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217 | uint16_t fDac[kNumDac];
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218 | //
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219 | #ifdef __cplusplus
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220 | EventHeader() { init(*this); }
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221 | EventHeader(const uint16_t *ptr)
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222 | {
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223 | *this = std::vector<uint16_t>(ptr, ptr+sizeof(EventHeader)/2);
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224 | }
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225 |
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226 | void operator=(const std::vector<uint16_t> &vec)
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227 | {
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228 | ntohcpy(vec, *this);
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229 |
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230 | Reverse(&fEventCounter);
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231 | Reverse(&fTriggerCounter);
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232 | Reverse(&fFreqRefClock);
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233 | Reverse(&fTimeStamp);
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234 | Reverse(&fRunNumber);
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235 |
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236 | for (int i=0; i<8; i+=2)
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237 | std::swap(reinterpret_cast<uint8_t*>(&fDNA)[i],
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238 | reinterpret_cast<uint8_t*>(&fDNA)[i+1]);
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239 | }
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240 |
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241 | std::vector<uint16_t> HtoN() const
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242 | {
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243 | EventHeader h(*this);
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244 |
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245 | Reverse(&h.fEventCounter);
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246 | Reverse(&h.fFreqRefClock);
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247 | Reverse(&h.fTimeStamp);
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248 | Reverse(&h.fRunNumber);
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249 |
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250 | for (int i=0; i<8; i+=2)
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251 | std::swap(reinterpret_cast<uint8_t*>(&h.fDNA)[i],
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252 | reinterpret_cast<uint8_t*>(&h.fDNA)[i+1]);
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253 |
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254 | return htoncpy(h);
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255 | }
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256 |
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257 | bool operator==(const EventHeader &h) const
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258 | {
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259 | return
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260 | (fStatus&~(kSock17|kBusyOn)) == (h.fStatus&~(kSock17|kBusyOn)) &&
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261 | fRunNumber == h.fRunNumber &&
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262 | fEventCounter == h.fEventCounter &&
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263 | fAdcClockPhaseShift == h.fAdcClockPhaseShift &&
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264 | fTriggerGeneratorPrescaler == h.fTriggerGeneratorPrescaler &&
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265 | memcmp(fDac, h.fDac, sizeof(fDac))==0;
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266 | }
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267 | bool operator!=(const EventHeader &h) const { return !operator==(h); }
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268 |
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269 | float GetTemp(int i) const { return fTempDrs[i]/16.; }
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270 |
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271 | uint8_t PLLLCK() const { return fStatus>>12; }
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272 |
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273 | bool HasDenable() const { return fStatus&kDenable; }
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274 | bool HasDwrite() const { return fStatus&kDwrite; }
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275 | // bool IsRefClockTooHigh() const { return fStatus&kRefClkTooHigh; }
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276 | bool IsRefClockTooLow() const { return fStatus&kRefClkTooLow; }
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277 | bool IsDcmLocked() const { return fStatus&kDcmLocked; }
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278 | bool IsDcmReady() const { return fStatus&kDcmReady; }
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279 | bool HasSpiSclk() const { return fStatus&kSpiSclk; }
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280 | bool HasBusyOn() const { return fStatus&kBusyOn; }
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281 | bool HasBusyOff() const { return fStatus&kBusyOff; }
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282 | bool HasTriggerEnabled() const { return fStatus&kTriggerLine; }
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283 | bool HasContTriggerEnabled() const { return fStatus&kContTrigger; }
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284 | bool IsInSock17Mode() const { return fStatus&kSock17; }
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285 |
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286 | int GetTriggerLogic() const { return (fTriggerType>>2)&0x3f; }
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287 | bool HasTriggerExt1() const { return fTriggerType&kExt1; }
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288 | bool HasTriggerExt2() const { return fTriggerType&kExt2; }
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289 | bool HasTIMsource() const { return fTriggerType&kTIM; }
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290 | bool HasTriggerLPext() const { return fTriggerType&kLPext; }
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291 | bool HasTriggerLPint() const { return fTriggerType&kLPint; }
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292 | bool HasTriggerPed() const { return fTriggerType&kPedestal; }
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293 | bool IsTriggerPhys() const { return !(fTriggerType&kAll); }
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294 | int GetTriggerLPset() const { return (fTriggerType&kLPset)>>11; }
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295 |
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296 | uint16_t Crate() const { return fBoardId>>8; }
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297 | uint16_t Board() const { return fBoardId&0xff; }
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298 |
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299 | uint16_t Id() const { return Crate()*10+Board(); }
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300 |
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301 | void Enable(Bits pos, bool enable=true)
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302 | {
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303 | if (enable)
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304 | fStatus |= pos;
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305 | else
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306 | fStatus &= ~pos;
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307 | }
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308 |
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309 | void clear() { reset(*this); }
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310 | void print(std::ostream &out) const;
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311 | #endif
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312 |
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313 | } __attribute__((__packed__));
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314 |
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315 | struct ChannelHeader
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316 | {
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317 | uint16_t fId;
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318 | uint16_t fStartCell;
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319 | uint16_t fRegionOfInterest;
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320 | uint16_t fDummy;
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321 | // uint16_t fData[];
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322 |
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323 | #ifdef __cplusplus
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324 | ChannelHeader() { init(*this); }
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325 |
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326 | void operator=(const std::vector<uint16_t> &vec)
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327 | {
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328 | ntohcpy(vec, *this);
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329 | }
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330 |
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331 | std::vector<uint16_t> HtoN() const
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332 | {
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333 | ChannelHeader h(*this);
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334 | return htoncpy(h);
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335 | }
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336 |
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337 | void clear() { reset(*this); }
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338 | void print(std::ostream &out) const;
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339 |
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340 | uint16_t Chip() const { return fId>>4; }
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341 | uint16_t Channel() const { return fId&0xf; }
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342 | #endif
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343 | } __attribute__((__packed__));
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344 |
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345 | // Package ends with:
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346 | // 0x4242
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347 | // 0x04fe
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348 |
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349 | struct Configuration
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350 | {
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351 | bool fDwrite;
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352 | bool fDenable;
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353 | bool fContinousTrigger;
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354 | uint16_t fTriggerRate;
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355 | uint16_t fRoi[FAD::kNumChannelsPerChip];
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356 | uint16_t fDac[FAD::kNumDac];
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357 |
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358 | #ifdef __cplusplus
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359 | Configuration() { init(*this); }
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360 | #endif
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361 | };
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362 |
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363 | struct RunDescription
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364 | {
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365 | uint32_t maxtime;
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366 | uint32_t maxevt;
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367 | uint32_t night;
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368 |
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369 | std::string name;
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370 |
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371 | Configuration reference;
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372 | };
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373 |
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374 | // --------------------------------------------------------------------
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375 | #ifdef __cplusplus
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376 | inline std::ostream &operator<<(std::ostream &out, const EventHeader &h)
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377 | {
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378 | h.print(out);
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379 | return out;
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380 | }
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381 |
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382 | inline std::ostream &operator<<(std::ostream &out, const ChannelHeader &h)
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383 | {
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384 | h.print(out);
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385 | return out;
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386 | }
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387 | #endif
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388 |
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389 | #ifdef __cplusplus
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390 | };
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391 | #endif
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392 |
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393 | #endif
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