source: branches/testFACT++branch/src/HeadersFAD.h@ 18403

Last change on this file since 18403 was 17212, checked in by tbretz, 11 years ago
Added new file format ZFits
File size: 12.8 KB
Line 
1#ifndef FACT_HeadersFAD
2#define FACT_HeadersFAD
3
4#ifdef __cplusplus
5#include <ostream>
6
7// For debugging
8#include <iostream>
9
10#include "ByteOrder.h"
11
12// ====================================================================
13
14namespace FAD
15{
16#endif
17 enum Enable
18 {
19 kCmdDrsEnable = 0x0600, // CMD_DENABLE/CMD_DISABLE
20 kCmdDwrite = 0x0800, // CMD_DWRITE_RUN/CMD_DWRITE_STOP
21 kCmdSclk = 0x1000, // CMD_SCLK_ON/OFF
22 kCmdSrclk = 0x1500, // CMD_SRCLK_ON/OFF
23 kCmdTriggerLine = 0x1800, // CMD_TRIGGERS_ON/CMD_TRIGGERS_OFF
24 kCmdContTrigger = 0x1f00,
25 kCmdRun = 0x2200, // CMD_Start/Stop
26 kCmdBusyOff = 0x2400, //
27 kCmdBusyOn = 0x3200, //
28 kCmdResetEventCounter = 0x2A00, //
29 kCmdSocket = 0x3000, // CMD_mode_command/CMD_mode_all_sockets
30 kCmdSingleTrigger = 0xA000, // CMD_Trigger
31 };
32
33 enum Commands
34 {
35 kCmdWriteExecute = 0x0400, // Configure FAD with the current config ram
36
37 kCmdWrite = 0x0500, // write to Config-RAM
38 kCmdWriteRoi = kCmdWrite|0x00, // Baseaddress ROI-Values
39 kCmdWriteDac = kCmdWrite|0x24, // Baseaddress DAC-Values
40
41 kCmdWriteRate = kCmdWrite|0x2c, // Continous trigger rate
42 kCmdWriteRunNumberMSW = kCmdWrite|0x2d, // Run Number most significant word
43 kCmdWriteRunNumberLSW = kCmdWrite|0x2e, // Run Number least significant word
44
45 /*
46 kCmdRead = 0x0a00, // read from Config-RAM
47 kCmdReadRoi = kCmdRead|0x00, // Baseaddress ROI-Values
48 kCmdReadDac = kCmdRead|0x24, // Baseaddress DAC-Values
49 */
50
51 kCmdPhaseIncrease = 0x1200, // CMD_PS_DIRINC
52 kCmdPhaseDecrease = 0x1300, // CMD_PS_DIRDEC
53 kCmdPhaseApply = 0x1400, // CMD_PS_DO
54 kCmdPhaseReset = 0x1700, // CMD_PS_RESET
55 };
56
57 namespace State
58 {
59 enum States
60 {
61 // State Machine states
62 kOffline = 1, // StateMachineImp::kSM_UserMode
63 kDisconnected,
64 kConnecting,
65 kConnected,
66 kConfiguring1,
67 kConfiguring2,
68 kConfiguring3,
69 kConfigured,
70 kRunInProgress
71 };
72 }
73
74 enum FileFormat_t
75 {
76 kNone = 0, // Nothing is written just some little output in the log-stream
77 kDebug, // The contents of the headers are output to the console
78 kFits, // FITS file written with streamer class ofits
79 kRaw, // Raw binary streams are written
80 kCalib, // DRS calibration in progress
81 kCfitsio, // FITS file written with cfitsio
82 kZFits, // Compressed FITS file written
83 };
84
85 enum
86 {
87 kMaxBins = 1024,
88 kNumTemp = 4,
89 kNumDac = 8,
90 kNumChips = 4,
91 kNumChannelsPerChip = 9,
92 kNumChannels = kNumChips*kNumChannelsPerChip,
93 };
94
95 enum
96 {
97 kMaxRegAddr = 0xff, // Highest address in config-ram
98 kMaxRegValue = 0xffff,
99 kMaxDacAddr = kNumDac-1,
100 kMaxDacValue = 0xffff,
101 kMaxRoiAddr = kNumChannels-1,
102 kMaxRoiValue = kMaxBins,
103 kMaxRunNumber = 0xffffffff,
104 };
105
106 enum
107 {
108 kDelimiterStart = 0xfb01,
109 kDelimiterEnd = 0x04fe,
110 };
111
112 // --------------------------------------------------------
113
114 struct EventHeader
115 {
116#ifdef __cplusplus
117 enum Bits
118 {
119 kDenable = 1<<11,
120 kDwrite = 1<<10,
121 //kRefClkTooHigh = 1<< 9,
122 kRefClkTooLow = 1<< 8,
123 kDcmLocked = 1<< 7,
124 kDcmReady = 1<< 6,
125 kSpiSclk = 1<< 5,
126 kBusyOff = 1<< 4, // Busy continously off
127 kTriggerLine = 1<< 3, // Trigger line enabled
128 kContTrigger = 1<< 2, // Cont trigger enabled
129 kSock17 = 1<< 1, // Socket 1-7 for data transfer
130 kBusyOn = 1<< 0, // Busy continously on
131 };
132
133 enum TriggerType
134 {
135 kLPext = 0x0100,
136 kLPint = 0x0200,
137 kPedestal = 0x0400,
138 kLPset = 0x7800,
139 kTIM = 0x8000,
140
141 kExt1 = 0x0001,
142 kExt2 = 0x0002,
143 kAll = kLPext|kLPint|kTIM|kPedestal|kExt1|kExt2
144 };
145#endif
146 // Einmalig: (new header changes entry in array --> send only if array changed)
147 // ----------------------------------
148 // Event builder stores an array with all available values.
149 // Disconnected boards are removed (replaced by def values)
150 // Any received header information is immediately put in the array.
151 // The array is transmitted whenever it changes.
152 // This will usually happen only very rarely when a new connection
153 // is opened.
154 //
155 // Array[40] of BoardId
156 // Array[40] of Version
157 // Array[40] of DNA
158
159 // Slow changes: (new header changes entry in array --> send only if arra changed)
160 // -------------------------------------------
161 // Event builder stores an array with all available values.
162 // Disconnected boards can be kept in the arrays.
163 // Any received header information is immediately put in the array.
164 // The array is transmitted whenever it changes.
165 //
166 // Connection status (disconnected, connecting, connected) / Array[40]
167 // Consistency of PLLLCK / Array[ 40] of PLLLCK
168 // Consistency of Trigger type / Array[ 40] of trigger type
169 // Consistency of ROI / Array[1440] of ROI
170 // Consistency of RefClock / Array[ 40] of ref clock
171 // Consistency of DAC values / Array[ 400] of DAC values
172 // Consistency of run number / Array[ 40] of Run numbers
173
174 // Fast changes (new header changes value --> send only if something changed)
175 // -------------------
176 // Event builder stores an internal array of all boards and
177 // transmits the min/max values determined from the array
178 // only if they have changed. Disconnected boards are not considered.
179 //
180 // Maximum/minimum Event counter of all boards in memory + board id
181 // Maximum/minimum time stamp of all boards in memory + board id
182 // Maximum/minimum temp of all boards in memory + board id
183
184 // Unknown:
185 // ------------------
186 // Trigger Id ?
187 // TriggerGeneratorPrescaler ?
188 // Number of Triggers to generate ?
189
190
191 // ------------------------------------------------------------
192
193 uint16_t fStartDelimiter; // 0x04FE
194 uint16_t fPackageLength;
195 uint16_t fVersion;
196 uint16_t fStatus;
197 //
198 uint16_t fTriggerCrc; // Receiver timeout / CRC ; 1 byte each
199 uint16_t fTriggerType;
200 uint32_t fTriggerCounter;
201 //
202 uint32_t fEventCounter;
203 uint32_t fFreqRefClock;
204 //
205 uint16_t fBoardId;
206 uint16_t fAdcClockPhaseShift;
207 uint16_t fNumTriggersToGenerate;
208 uint16_t fTriggerGeneratorPrescaler;
209 //
210 uint64_t fDNA; // Xilinx DNA
211 //
212 uint32_t fTimeStamp;
213 uint32_t fRunNumber;
214 //
215 int16_t fTempDrs[kNumTemp]; // In units of 1/16 deg(?)
216 //
217 uint16_t fDac[kNumDac];
218 //
219#ifdef __cplusplus
220 EventHeader() { init(*this); }
221 EventHeader(const uint16_t *ptr)
222 {
223 *this = std::vector<uint16_t>(ptr, ptr+sizeof(EventHeader)/2);
224 }
225
226 void operator=(const std::vector<uint16_t> &vec)
227 {
228 ntohcpy(vec, *this);
229
230 Reverse(&fEventCounter);
231 Reverse(&fTriggerCounter);
232 Reverse(&fFreqRefClock);
233 Reverse(&fTimeStamp);
234 Reverse(&fRunNumber);
235
236 for (int i=0; i<8; i+=2)
237 std::swap(reinterpret_cast<uint8_t*>(&fDNA)[i],
238 reinterpret_cast<uint8_t*>(&fDNA)[i+1]);
239 }
240
241 std::vector<uint16_t> HtoN() const
242 {
243 EventHeader h(*this);
244
245 Reverse(&h.fEventCounter);
246 Reverse(&h.fFreqRefClock);
247 Reverse(&h.fTimeStamp);
248 Reverse(&h.fRunNumber);
249
250 for (int i=0; i<8; i+=2)
251 std::swap(reinterpret_cast<uint8_t*>(&h.fDNA)[i],
252 reinterpret_cast<uint8_t*>(&h.fDNA)[i+1]);
253
254 return htoncpy(h);
255 }
256
257 bool operator==(const EventHeader &h) const
258 {
259 return
260 (fStatus&~(kSock17|kBusyOn)) == (h.fStatus&~(kSock17|kBusyOn)) &&
261 fRunNumber == h.fRunNumber &&
262 fEventCounter == h.fEventCounter &&
263 fAdcClockPhaseShift == h.fAdcClockPhaseShift &&
264 fTriggerGeneratorPrescaler == h.fTriggerGeneratorPrescaler &&
265 memcmp(fDac, h.fDac, sizeof(fDac))==0;
266 }
267 bool operator!=(const EventHeader &h) const { return !operator==(h); }
268
269 float GetTemp(int i) const { return fTempDrs[i]/16.; }
270
271 uint8_t PLLLCK() const { return fStatus>>12; }
272
273 bool HasDenable() const { return fStatus&kDenable; }
274 bool HasDwrite() const { return fStatus&kDwrite; }
275// bool IsRefClockTooHigh() const { return fStatus&kRefClkTooHigh; }
276 bool IsRefClockTooLow() const { return fStatus&kRefClkTooLow; }
277 bool IsDcmLocked() const { return fStatus&kDcmLocked; }
278 bool IsDcmReady() const { return fStatus&kDcmReady; }
279 bool HasSpiSclk() const { return fStatus&kSpiSclk; }
280 bool HasBusyOn() const { return fStatus&kBusyOn; }
281 bool HasBusyOff() const { return fStatus&kBusyOff; }
282 bool HasTriggerEnabled() const { return fStatus&kTriggerLine; }
283 bool HasContTriggerEnabled() const { return fStatus&kContTrigger; }
284 bool IsInSock17Mode() const { return fStatus&kSock17; }
285
286 int GetTriggerLogic() const { return (fTriggerType>>2)&0x3f; }
287 bool HasTriggerExt1() const { return fTriggerType&kExt1; }
288 bool HasTriggerExt2() const { return fTriggerType&kExt2; }
289 bool HasTIMsource() const { return fTriggerType&kTIM; }
290 bool HasTriggerLPext() const { return fTriggerType&kLPext; }
291 bool HasTriggerLPint() const { return fTriggerType&kLPint; }
292 bool HasTriggerPed() const { return fTriggerType&kPedestal; }
293 bool IsTriggerPhys() const { return !(fTriggerType&kAll); }
294 int GetTriggerLPset() const { return (fTriggerType&kLPset)>>11; }
295
296 uint16_t Crate() const { return fBoardId>>8; }
297 uint16_t Board() const { return fBoardId&0xff; }
298
299 uint16_t Id() const { return Crate()*10+Board(); }
300
301 void Enable(Bits pos, bool enable=true)
302 {
303 if (enable)
304 fStatus |= pos;
305 else
306 fStatus &= ~pos;
307 }
308
309 void clear() { reset(*this); }
310 void print(std::ostream &out) const;
311#endif
312
313 } __attribute__((__packed__));
314
315 struct ChannelHeader
316 {
317 uint16_t fId;
318 uint16_t fStartCell;
319 uint16_t fRegionOfInterest;
320 uint16_t fDummy;
321 // uint16_t fData[];
322
323#ifdef __cplusplus
324 ChannelHeader() { init(*this); }
325
326 void operator=(const std::vector<uint16_t> &vec)
327 {
328 ntohcpy(vec, *this);
329 }
330
331 std::vector<uint16_t> HtoN() const
332 {
333 ChannelHeader h(*this);
334 return htoncpy(h);
335 }
336
337 void clear() { reset(*this); }
338 void print(std::ostream &out) const;
339
340 uint16_t Chip() const { return fId>>4; }
341 uint16_t Channel() const { return fId&0xf; }
342#endif
343 } __attribute__((__packed__));
344
345 // Package ends with:
346 // 0x4242
347 // 0x04fe
348
349 struct Configuration
350 {
351 bool fDwrite;
352 bool fDenable;
353 bool fContinousTrigger;
354 uint16_t fTriggerRate;
355 uint16_t fRoi[FAD::kNumChannelsPerChip];
356 uint16_t fDac[FAD::kNumDac];
357
358#ifdef __cplusplus
359 Configuration() { init(*this); }
360#endif
361 };
362
363 struct RunDescription
364 {
365 uint32_t maxtime;
366 uint32_t maxevt;
367 uint32_t night;
368
369 std::string name;
370
371 Configuration reference;
372 };
373
374 // --------------------------------------------------------------------
375#ifdef __cplusplus
376 inline std::ostream &operator<<(std::ostream &out, const EventHeader &h)
377 {
378 h.print(out);
379 return out;
380 }
381
382 inline std::ostream &operator<<(std::ostream &out, const ChannelHeader &h)
383 {
384 h.print(out);
385 return out;
386 }
387#endif
388
389#ifdef __cplusplus
390};
391#endif
392
393#endif
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