1 | /* $ZEL: plx9054reg.h,v 1.2 2004/05/27 23:10:17 wuestner Exp $ */
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2 |
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3 | /*
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4 | * Copyright (c) 2001-2004
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5 | * Matthias Drochner, Peter Wuestner. All rights reserved.
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6 | *
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7 | * Redistribution and use in source and binary forms, with or without
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8 | * modification, are permitted provided that the following conditions
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9 | * are met:
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10 | * 1. Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions, and the following disclaimer.
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12 | * 2. Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | *
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16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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17 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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20 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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21 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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22 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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23 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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24 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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26 | * SUCH DAMAGE.
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27 | */
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28 |
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29 | #ifndef _plx9054reg_h_
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30 | #define _plx9054reg_h_
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31 |
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32 | struct plx9045reg {
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33 | u_int32_t LAS0RR, LAS0BA, MARBR, BIGEND_LMISC_PROT_AREA;
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34 | u_int32_t EROMRR, EROMBA, LBRD0, DMRR;
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35 | u_int32_t DMLBAM, DMLDAI, DMPBAM, DMCFGA;
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36 | /* 30 */
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37 | u_int32_t OPQIS, OPQIM, _dummy1, _dummy2;
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38 | /* 40 */
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39 | u_int32_t IQP, OQP, MBOX2, MBOX3;
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40 | u_int32_t MBOX4, MBOX5, MBOX6, MBOX7;
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41 | u_int32_t P2LDBELL, L2PDBELL, INTCSR, CNTRL;
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42 | u_int32_t PCIHIDR, PCIHREV, MBOX0, MBOX1;
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43 | /* 80 */
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44 | u_int32_t DMAMODE0, DMAPADR0, DMALADR0, DMASIZ0;
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45 | u_int32_t DMADPR0, DMAMODE1, DMAPADR1, DMALADR1;
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46 | u_int32_t DMASIZ1, DMADPR1, DMACSR0_DMACSR1, DMAARB;
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47 | u_int32_t DMATHR, DMADAC0, DMADAC1, _dummy3;
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48 | /* c0 */
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49 | u_int32_t MQCR, QBAR, IFHPR, IFTPR;
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50 | u_int32_t IPHPR, IPTPR, OFHPR, OFTPR;
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51 | u_int32_t OPHPR, OPTPR, QSR, _dummy4;
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52 | /* f0 */
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53 | u_int32_t LAS1RR, LAS1BA, LBRD1, DMDAC;
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54 | };
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55 |
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56 | struct plx9054_dmadesc {
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57 | volatile u_int32_t pcistart, localstart, size, next;
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58 | };
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59 |
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60 | /* to clear the interrupt you must ... */
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61 | #define plxirq_mbox (1<< 3) /* read the mailbox */
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62 | #define plxirq_pci (1<< 8)
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63 | #define plxirq_doorbell (1<< 9) /* clear the doorbell bits */
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64 | #define plxirq_local (1<<11) /* clear the local irq source */
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65 | #define plxirq_dma0 (1<<18) /* clear the dma status bits */
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66 | #define plxirq_dma1 (1<<19) /* clear the dma status bits */
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67 |
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68 | #define plxirq_doorbell_active (1<<13)
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69 | #define plxirq_local_active (1<<15)
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70 | #define plxirq_dma0_active (1<<21)
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71 | #define plxirq_dma1_active (1<<22)
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72 |
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73 | #endif
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