1 | /* $ZEL: sis1100_tmp_write.c,v 1.3 2004/05/27 23:23:28 wuestner Exp $ */
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2 |
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3 | /*
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4 | * Copyright (c) 2003-2004
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5 | * Peter Wuestner. All rights reserved.
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6 | *
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7 | * Redistribution and use in source and binary forms, with or without
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8 | * modification, are permitted provided that the following conditions
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9 | * are met:
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10 | * 1. Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions, and the following disclaimer.
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12 | * 2. Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | *
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16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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17 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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20 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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21 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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22 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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23 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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24 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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26 | * SUCH DAMAGE.
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27 | */
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28 |
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29 | #include "sis1100_sc.h"
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30 |
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31 | int
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32 | sis1100_tmp_write(struct sis1100_softc* sc,
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33 | u_int32_t addr, int32_t am, int size, int space, u_int32_t data)
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34 | {
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35 | u_int32_t be;
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36 | u_int32_t error;
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37 | u_int32_t head;
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38 |
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39 | data=(data&(0xffffffffU>>((4-size)<<3)))<<((addr&3)<<3);
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40 |
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41 | be=((0x00f00000<<size)&0x0f000000)<<(addr&3);
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42 |
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43 | head=0x00000402|(space&0x3f)<<16|be;
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44 |
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45 | SEM_LOCK(sc->sem_hw);
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46 | if (am>=0) {
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47 | head|=0x800;
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48 | sis1100writereg(sc, t_am, am);
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49 | }
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50 | sis1100writereg(sc, t_hdr, head);
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51 | wmb_reg();
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52 | sis1100writereg(sc, t_dal, data);
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53 | wmb_reg();
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54 | sis1100writereg(sc, t_adl, addr);
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55 | mb_reg();
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56 | do {
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57 | error=sis1100readreg(sc, prot_error);
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58 | } while (error==0x005);
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59 | SEM_UNLOCK(sc->sem_hw);
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60 |
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61 | return error;
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62 | }
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63 |
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64 | int
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65 | sis1100_tmp_camacwrite(struct sis1100_softc* sc, u_int32_t addr, u_int32_t data)
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66 | {
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67 | u_int32_t error;
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68 | u_int32_t head;
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69 |
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70 | head=0x0f010402; /* be=0xf space=1 write=1 start_with_addr */
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71 |
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72 | SEM_LOCK(sc->sem_hw);
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73 | sis1100writereg(sc, t_hdr, head);
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74 | wmb_reg();
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75 | sis1100writereg(sc, t_dal, data);
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76 | wmb_reg();
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77 | sis1100writereg(sc, t_adl, addr);
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78 | mb_reg();
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79 | do {
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80 | error=sis1100readreg(sc, prot_error);
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81 | } while (error==0x005);
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82 | SEM_UNLOCK(sc->sem_hw);
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83 |
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84 | return error;
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85 | }
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86 |
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87 | int
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88 | sis1100_remote_reg_write(struct sis1100_softc* sc, u_int32_t offs,
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89 | u_int32_t data, int locked)
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90 | {
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91 | u_int32_t error;
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92 |
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93 | if (!locked) SEM_LOCK(sc->sem_hw);
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94 | plxwritelocal0(sc, offs+0x800, data);
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95 | mb_reg();
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96 | error=sis1100readreg(sc, prot_error);
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97 | if (!locked) SEM_UNLOCK(sc->sem_hw);
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98 |
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99 | return error;
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100 | }
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