source: drsdaq/VME/struck/sis1100/V2.02/dev/pci/sis1100_write_dma_netbsd.c@ 23

Last change on this file since 23 was 22, checked in by ogrimm, 16 years ago
First commit of drsdaq program
File size: 7.3 KB
Line 
1/* $ZEL: sis1100_write_dma_netbsd.c,v 1.3 2004/05/27 23:10:39 wuestner Exp $ */
2
3/*
4 * Copyright (c) 2001-2004
5 * Matthias Drochner, Peter Wuestner. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <dev/pci/sis1100_sc.h>
30
31ssize_t
32_sis1100_write_dma(
33 struct sis1100_softc* sc,
34 struct sis1100_fdata* fd,
35 u_int32_t addr, /* VME or SDRAM address */
36 int32_t am, /* address modifier, not used if <0 */
37 int size, /* datasize must be 4 for DMA but is not checked*/
38 int space, /* remote space (1,2: VME; 6: SDRAM) */
39 int fifo_mode,
40 size_t count, /* words to be transferred */
41 /* count==0 is illegal */
42 size_t* count_written, /* words transferred */
43 const u_int8_t* data, /* source (user virtual address) */
44 int* prot_error
45 )
46{
47 int res, i, aborted=0, s;
48 u_int32_t head, tmp;
49 u_int32_t la=addr&0x7fffffffU; /* local address */
50/*
51 sigset_t oldset;
52 int err, offs;
53*/
54 struct plx9054_dmadesc *dd;
55 u_int32_t nextptr;
56
57 count*=size;
58 if (count>MAX_DMA_LEN) count=MAX_DMA_LEN;
59
60 if ((addr^(addr+count))&0x80000000U) count=0x80000000U-addr;
61 *count_written=count/size;
62
63 res = uvm_vslock(fd->p, (u_int8_t*)data, count, VM_PROT_READ|VM_PROT_WRITE);
64 if (res)
65 return res;
66
67 res=bus_dmamap_load(sc->sc_dma.dmat, sc->sc_dma.userdma,
68 (u_int8_t*)data, count, fd->p, BUS_DMA_WAITOK);
69 if (res) {
70 uvm_vsunlock(fd->p, (u_int8_t*)data, count);
71 printf("%s: bus_dmamap_load failed\n", sc->sc_dev.dv_xname);
72 return res;
73 }
74
75 dd = sc->sc_dma.descs;
76 nextptr = 0x00000002;
77 if (!fifo_mode)
78 la += count;
79#ifdef PLXDEBUG
80 printf("dma: %d segs, size %ld\n",
81 sc->sc_dma.userdma->dm_nsegs, sc->sc_dma.userdma->dm_mapsize);
82#endif
83 for (i = sc->sc_dma.userdma->dm_nsegs - 1; i >= 0; i--) {
84 if (!fifo_mode)
85 la -= sc->sc_dma.userdma->dm_segs[i].ds_len;
86
87 dd[i].pcistart = sc->sc_dma.userdma->dm_segs[i].ds_addr;
88 dd[i].size = sc->sc_dma.userdma->dm_segs[i].ds_len;
89 dd[i].localstart = la;
90 dd[i].next = nextptr;
91#ifdef PLXDEBUG
92 printf("desc[%d]: %x/%x/%x/%x\n", i,
93 dd[i].pcistart, dd[i].size, dd[i].localstart, dd[i].next);
94#endif
95 nextptr = (sc->sc_dma.descdma->dm_segs[0].ds_addr +
96 i * sizeof(struct plx9054_dmadesc)) | 1;
97 }
98
99/* prepare PLX */
100 plxwritereg(sc, DMACSR0_DMACSR1, 1<<3); /* clear irq */
101 plxwritereg(sc, DMAMODE0,
102 0x43|(1<<7)|(1<<8)|(1<<9)|(1<<10)|(1<<14)|(1<<17)|
103 (fifo_mode?(1<<11):0));
104 plxwritereg(sc, DMADPR0, nextptr);
105
106/* prepare add on logic */
107 /* 4 Byte, local space 2, BT, EOT, start with t_adl */
108 head=0x0f80A402|(space&0x3f)<<16;
109 if (am>=0) {
110 head|=0x800;
111 sis1100writereg(sc, d_am, am);
112 }
113 if (fifo_mode) head|=0x4000;
114 sis1100writereg(sc, d_hdr, head);
115 /*wmb();*/
116 sis1100writereg(sc, d_adl, addr); /* only bit 31 is valid */
117
118 sis1100writereg(sc, d_bc, count);
119
120 sis1100writereg(sc, p_balance, 0);
121#if 0
122 spin_lock_irq(&current->sigmask_lock);
123 oldset = current->blocked;
124 sigfillset(&current->blocked);
125 sigdelset(&current->blocked, SIGKILL);
126 /* dangerous, should be removed later */
127 /*if (!sigismember(&oldset, SIGINT)) sigdelset(&current->blocked, SIGINT);*/
128 recalc_sigpending(current);
129 spin_unlock_irq(&current->sigmask_lock);
130#endif
131/* enable irq */
132 /* irq_synch_chg and irq_prot_l_err should always be enabled */
133 sc->got_irqs=0;
134 sis1100_enable_irq(sc, 0,
135 irq_prot_l_err|irq_synch_chg|irq_prot_end);
136
137/* start transfer and wait for confirmation*/
138 res=0;
139 s = splbio();
140 plxwritereg(sc, DMACSR0_DMACSR1, 3);
141 while (!res && !(sc->got_irqs & (got_end|got_sync|got_l_err))) {
142 res = tsleep(&sc->local_wait, PCATCH, "plxdma_w_1", 1*hz);
143 }
144 splx(s);
145
146 if (sc->got_irqs&got_l_err) {
147 printf("sis1100: irq_prot_l_err in write_dma, irqs=0x%04x\n",
148 sc->got_irqs);
149 }
150 if (res|(sc->got_irqs&(got_sync))) {
151 aborted=0x300;
152 if (res) {
153 if (res==EWOULDBLOCK)
154 printf( "%s: write_dma: timed out\n",
155 sc->sc_dev.dv_xname);
156 else if (res==EINTR)
157 printf( "%s: write_dma(1): interrupted; res=%d\n",
158 sc->sc_dev.dv_xname, res);
159 else if (res==ERESTART)
160 printf( "%s: write_dma(1): interrupted; restart\n",
161 sc->sc_dev.dv_xname);
162 else
163 printf( "%s: write_dma(1): res=%d\n",
164 sc->sc_dev.dv_xname, res);
165 aborted|=1;
166 }
167 if (sc->got_irqs&got_sync) {
168 printf("%s: write_dma: synchronisation lost\n",
169 sc->sc_dev.dv_xname);
170 aborted|=2;
171 }
172 }
173
174 sis1100_disable_irq(sc, 0, irq_prot_end);
175#if 0
176 spin_lock_irq(&current->sigmask_lock);
177 current->blocked = oldset;
178 recalc_sigpending(current);
179 spin_unlock_irq(&current->sigmask_lock);
180#endif
181 *prot_error=sis1100readreg(sc, prot_error);
182
183 if (aborted) {
184 *prot_error=aborted;
185 res=EIO;
186 } else if (*prot_error) {
187 if (*prot_error&0x200) {
188 u_int32_t addr;
189 head=0x0f000002;
190 addr = (int)&((struct sis3100_reg*)(0))->dma_write_counter;
191 sis1100writereg(sc, t_hdr, head);
192 sis1100writereg(sc, t_adl, addr);
193 do {
194 tmp=sis1100readreg(sc, prot_error);
195 } while (tmp==0x005);
196 if (tmp!=0) {
197 printf("%s: write_dma: "
198 "read count after error: prot_error=0x%03x\n",
199 sc->sc_dev.dv_xname, tmp);
200 res=EIO;
201 } else {
202 *count_written=sis1100readreg(sc, tc_dal)/size;
203 }
204 } else {
205 res=EIO;
206 }
207 }
208
209 /*if (aborted) dump_glink_status(sc, "after abort", 1);*/
210
211 uvm_vsunlock(fd->p, (u_int8_t*)data, count);
212
213 return res;
214}
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