1 | /* $ZEL: sis3100rem_irq.c,v 1.3 2004/05/27 23:10:45 wuestner Exp $ */
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2 |
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3 | /*
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4 | * Copyright (c) 2001-2004
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5 | * Peter Wuestner. All rights reserved.
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6 | *
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7 | * Redistribution and use in source and binary forms, with or without
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8 | * modification, are permitted provided that the following conditions
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9 | * are met:
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10 | * 1. Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions, and the following disclaimer.
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12 | * 2. Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | *
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16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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17 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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20 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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21 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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22 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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23 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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24 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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26 | * SUCH DAMAGE.
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27 | */
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28 |
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29 | #include "sis1100_sc.h"
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30 |
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31 | static int
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32 | sis3100_irq_acknowledge(struct sis1100_softc* sc, int level)
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33 | {
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34 | int vector;
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35 | u_int32_t error;
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36 |
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37 | SEM_LOCK(sc->sem_hw);
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38 | if (level&1)
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39 | sis1100writereg(sc, t_hdr, 0x0c010802);
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40 | else
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41 | sis1100writereg(sc, t_hdr, 0x03010802);
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42 | sis1100writereg(sc, t_am, (1<<14)|0x3f);
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43 | sis1100writereg(sc, t_adl, level<<1);
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44 | error=sis1100readreg(sc, prot_error);
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45 |
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46 | if (error) {
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47 | pERROR(sc, "3100: error in Iack level %d: 0x%x", level, error);
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48 | vector=-1;
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49 | } else {
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50 | vector=sis1100readreg(sc, tc_dal)&0xff;
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51 | }
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52 | SEM_UNLOCK(sc->sem_hw);
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53 | return vector;
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54 | }
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55 |
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56 | void
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57 | sis3100rem_irq_handler(struct sis1100_softc* sc)
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58 | {
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59 | DECLARE_SPINLOCKFLAGS(s)
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60 | int i;
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61 |
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62 | SPIN_LOCK_IRQSAVE(sc->lock_doorbell, s);
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63 | sc->new_irqs|=sc->doorbell&~sc->pending_irqs;
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64 | sc->doorbell=0;
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65 | SPIN_UNLOCK_IRQRESTORE(sc->lock_doorbell, s);
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66 | sc->pending_irqs|=sc->new_irqs;
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67 |
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68 | SEM_LOCK(sc->sem_fdata_list);
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69 | /* block IRQs in VME controller*/
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70 | if (sc->new_irqs & SIS3100_VME_IRQS) {
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71 | sis3100writeremreg(sc, vme_irq_sc, (sc->new_irqs&SIS3100_VME_IRQS)<<16, 1);
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72 | }
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73 | /* obtain irq vectors from VME */
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74 | for (i=7; i>0; i--) {
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75 | if (sc->new_irqs & (1<<i)) {
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76 | sc->irq_vects[i].vector=sis3100_irq_acknowledge(sc, i);
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77 | sc->irq_vects[i].valid=1;
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78 | /*printk(KERN_INFO "vme_irq_handler: level %d vector=0x%08x\n",
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79 | i, sc->irq_info[i].vector);*/
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80 | }
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81 | }
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82 | /* block and clear FRONT-IRQs in VME controller*/
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83 | if (sc->new_irqs & SIS3100_EXT_IRQS) {
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84 | sis3100writeremreg(sc, in_latch_irq, (sc->new_irqs&SIS3100_EXT_IRQS)<<8, 1);
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85 | sis3100writeremreg(sc, in_latch_irq, (sc->new_irqs&SIS3100_EXT_IRQS)<<16, 1);
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86 | }
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87 |
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88 | sis3100writeremreg(sc, vme_irq_sc, 1<<15, 1);
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89 | /*sis3100writereg(sc, in_latch_irq, 1<<15, 1);*/
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90 | SEM_UNLOCK(sc->sem_fdata_list);
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91 | }
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92 |
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93 | void
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94 | sis3100rem_enable_irqs(struct sis1100_softc* sc,
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95 | struct sis1100_fdata* fd, u_int32_t mask)
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96 | {
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97 | if (mask & SIS3100_VME_IRQS) {
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98 | mask&=SIS3100_VME_IRQS;
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99 | sis3100writeremreg(sc, vme_irq_sc, mask, 0);
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100 | }
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101 | /* enable VME-FRONT-IRQs and SIS3100_DSP_IRQ */
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102 | if (mask & SIS3100_EXT_IRQS) {
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103 | mask&=SIS3100_EXT_IRQS;
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104 | sis3100writeremreg(sc, in_latch_irq, mask<<16, 0);
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105 | sis3100writeremreg(sc, in_latch_irq, mask>>8, 0);
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106 | }
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107 | }
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108 |
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109 | void
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110 | sis3100rem_disable_irqs(struct sis1100_softc* sc,
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111 | struct sis1100_fdata* fd, u_int32_t mask)
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112 | {
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113 | if (mask & SIS3100_VME_IRQS) {
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114 | mask&=SIS3100_VME_IRQS;
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115 | mask<<=16;
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116 | sis3100writeremreg(sc, vme_irq_sc, mask, 0);
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117 | }
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118 | if (mask & SIS3100_EXT_IRQS) {
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119 | mask&=SIS3100_EXT_IRQS;
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120 | mask<<=8;
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121 | sis3100writeremreg(sc, in_latch_irq, mask, 0);
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122 | }
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123 | }
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124 |
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125 | void
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126 | sis3100rem_get_vector(struct sis1100_softc* sc, int irqs,
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127 | struct sis1100_irq_get* data)
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128 | {
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129 | if (irqs & SIS3100_VME_IRQS) {
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130 | int bit;
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131 | /* find highest bit set */
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132 | for (bit=7; bit>0; bit--) {
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133 | if (((1<<bit) & irqs) && sc->irq_vects[bit].valid) {
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134 | data->level=bit;
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135 | data->vector=sc->irq_vects[bit].vector;
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136 | sc->irq_vects[bit].valid=0;
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137 | break;
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138 | }
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139 | }
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140 | } else {
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141 | data->vector=-1;
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142 | data->level=0;
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143 | }
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144 | }
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145 |
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146 | void
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147 | sis3100rem_irq_ack(struct sis1100_softc* sc, int irqs)
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148 | {
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149 | if (irqs & SIS3100_VME_IRQS)
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150 | sis3100writeremreg(sc, vme_irq_sc, irqs & SIS3100_VME_IRQS, 0);
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151 |
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152 | if (irqs & SIS3100_EXT_IRQS)
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153 | sis3100writeremreg(sc, in_latch_irq, (irqs&SIS3100_EXT_IRQS)>>8, 0);
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154 | }
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