source: drsdaq/VME/struck/sis1100/V2.02/dev/pci/sis3100rem_irq.c@ 23

Last change on this file since 23 was 22, checked in by ogrimm, 16 years ago
First commit of drsdaq program
File size: 5.1 KB
Line 
1/* $ZEL: sis3100rem_irq.c,v 1.3 2004/05/27 23:10:45 wuestner Exp $ */
2
3/*
4 * Copyright (c) 2001-2004
5 * Peter Wuestner. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include "sis1100_sc.h"
30
31static int
32sis3100_irq_acknowledge(struct sis1100_softc* sc, int level)
33{
34 int vector;
35 u_int32_t error;
36
37 SEM_LOCK(sc->sem_hw);
38 if (level&1)
39 sis1100writereg(sc, t_hdr, 0x0c010802);
40 else
41 sis1100writereg(sc, t_hdr, 0x03010802);
42 sis1100writereg(sc, t_am, (1<<14)|0x3f);
43 sis1100writereg(sc, t_adl, level<<1);
44 error=sis1100readreg(sc, prot_error);
45
46 if (error) {
47 pERROR(sc, "3100: error in Iack level %d: 0x%x", level, error);
48 vector=-1;
49 } else {
50 vector=sis1100readreg(sc, tc_dal)&0xff;
51 }
52 SEM_UNLOCK(sc->sem_hw);
53 return vector;
54}
55
56void
57sis3100rem_irq_handler(struct sis1100_softc* sc)
58{
59 DECLARE_SPINLOCKFLAGS(s)
60 int i;
61
62 SPIN_LOCK_IRQSAVE(sc->lock_doorbell, s);
63 sc->new_irqs|=sc->doorbell&~sc->pending_irqs;
64 sc->doorbell=0;
65 SPIN_UNLOCK_IRQRESTORE(sc->lock_doorbell, s);
66 sc->pending_irqs|=sc->new_irqs;
67
68 SEM_LOCK(sc->sem_fdata_list);
69 /* block IRQs in VME controller*/
70 if (sc->new_irqs & SIS3100_VME_IRQS) {
71 sis3100writeremreg(sc, vme_irq_sc, (sc->new_irqs&SIS3100_VME_IRQS)<<16, 1);
72 }
73 /* obtain irq vectors from VME */
74 for (i=7; i>0; i--) {
75 if (sc->new_irqs & (1<<i)) {
76 sc->irq_vects[i].vector=sis3100_irq_acknowledge(sc, i);
77 sc->irq_vects[i].valid=1;
78 /*printk(KERN_INFO "vme_irq_handler: level %d vector=0x%08x\n",
79 i, sc->irq_info[i].vector);*/
80 }
81 }
82 /* block and clear FRONT-IRQs in VME controller*/
83 if (sc->new_irqs & SIS3100_EXT_IRQS) {
84 sis3100writeremreg(sc, in_latch_irq, (sc->new_irqs&SIS3100_EXT_IRQS)<<8, 1);
85 sis3100writeremreg(sc, in_latch_irq, (sc->new_irqs&SIS3100_EXT_IRQS)<<16, 1);
86 }
87
88 sis3100writeremreg(sc, vme_irq_sc, 1<<15, 1);
89 /*sis3100writereg(sc, in_latch_irq, 1<<15, 1);*/
90 SEM_UNLOCK(sc->sem_fdata_list);
91}
92
93void
94sis3100rem_enable_irqs(struct sis1100_softc* sc,
95 struct sis1100_fdata* fd, u_int32_t mask)
96{
97 if (mask & SIS3100_VME_IRQS) {
98 mask&=SIS3100_VME_IRQS;
99 sis3100writeremreg(sc, vme_irq_sc, mask, 0);
100 }
101 /* enable VME-FRONT-IRQs and SIS3100_DSP_IRQ */
102 if (mask & SIS3100_EXT_IRQS) {
103 mask&=SIS3100_EXT_IRQS;
104 sis3100writeremreg(sc, in_latch_irq, mask<<16, 0);
105 sis3100writeremreg(sc, in_latch_irq, mask>>8, 0);
106 }
107}
108
109void
110sis3100rem_disable_irqs(struct sis1100_softc* sc,
111 struct sis1100_fdata* fd, u_int32_t mask)
112{
113 if (mask & SIS3100_VME_IRQS) {
114 mask&=SIS3100_VME_IRQS;
115 mask<<=16;
116 sis3100writeremreg(sc, vme_irq_sc, mask, 0);
117 }
118 if (mask & SIS3100_EXT_IRQS) {
119 mask&=SIS3100_EXT_IRQS;
120 mask<<=8;
121 sis3100writeremreg(sc, in_latch_irq, mask, 0);
122 }
123}
124
125void
126sis3100rem_get_vector(struct sis1100_softc* sc, int irqs,
127 struct sis1100_irq_get* data)
128{
129 if (irqs & SIS3100_VME_IRQS) {
130 int bit;
131 /* find highest bit set */
132 for (bit=7; bit>0; bit--) {
133 if (((1<<bit) & irqs) && sc->irq_vects[bit].valid) {
134 data->level=bit;
135 data->vector=sc->irq_vects[bit].vector;
136 sc->irq_vects[bit].valid=0;
137 break;
138 }
139 }
140 } else {
141 data->vector=-1;
142 data->level=0;
143 }
144}
145
146void
147sis3100rem_irq_ack(struct sis1100_softc* sc, int irqs)
148{
149 if (irqs & SIS3100_VME_IRQS)
150 sis3100writeremreg(sc, vme_irq_sc, irqs & SIS3100_VME_IRQS, 0);
151
152 if (irqs & SIS3100_EXT_IRQS)
153 sis3100writeremreg(sc, in_latch_irq, (irqs&SIS3100_EXT_IRQS)>>8, 0);
154}
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