source: drsdaq/VME/struck/sis1100/V2.02/eeprom_tools/eeprom_names.c@ 23

Last change on this file since 23 was 22, checked in by ogrimm, 16 years ago
First commit of drsdaq program
File size: 2.3 KB
Line 
1/*
2 * $ZEL: eeprom_names.c,v 1.1 2003/08/21 17:30:34 wuestner Exp $
3 */
4
5#define _GNU_SOURCE
6
7#include <sys/types.h>
8#include "plx_eeprom.h"
9
10char* eeprom_names[0x2c]= {
11 "Device ID",
12 "Vendor ID",
13 "Class Code",
14 "Class Code/Revision",
15 "Maximum Latency/Minimum Grant",
16 "Interrupt Pin/Interrupt Line Routing",
17 "MSW of Mailbox 0",
18 "LSW of Mailbox 0",
19 "MSW of Mailbox 1",
20 "LSW of Mailbox 1",
21 "MSW of Range for PCI-to-Local Address Space 0",
22 "LSW of Range for PCI-to-Local Address Space 0",
23 "MSW of Local Base Address for PCI-to-Local Address Space 0",
24 "LSW of Local Base Address for PCI-to-Local Address Space 0",
25 "MSW of Mode/DMA Arbitration Register",
26 "LSW of Mode/DMA Arbitration Register",
27 "MSW of Serial EEPROM Write-Protected Address",
28 "LSW of Local Misc. Control Register/Local Big/Little Endian",
29 "MSW of Range for PCI-to-Local Expansion ROM",
30 "LSW of Range for PCI-to-Local Expansion ROM",
31 "MSW of Local Base Address for PCI-to-Local Expansion ROM",
32 "LSW of Local Base Address for PCI-to-Local Expansion ROM",
33 "MSW of Bus Region Desciptors for PCI-to-Local Accesses",
34 "LSW of Bus Region Desciptors for PCI-to-Local Accesses",
35 "MSW of Range for PCI Initiator-to-PCI",
36 "LSW of Range for PCI Initiator-to-PCI",
37 "MSW of Local Base Address for PCI Initiator-to-PCI Memory",
38 "LSW of Local Base Address for PCI Initiator-to-PCI Memory",
39 "MSW of Local Bus Address for PCI Initiator-to-PCI I/O Configuation",
40 "LSW of Local Bus Address for PCI Initiator-to-PCI I/O Configuation",
41 "MSW of PCI Base Address for PCI Initiator-to-PCI",
42 "LSW of PCI Base Address for PCI Initiator-to-PCI",
43 "MSW of PCI Config. Addr. Reg. for PCI Initiator-to-PCI I/O Config.",
44 "LSW of PCI Config. Addr. Reg. for PCI Initiator-to-PCI I/O Config.",
45 "Subsystem ID",
46 "Subsystem Vendor ID",
47 "MSW of Range for PCI-to-Local Address Space 1",
48 "LSW of Range for PCI-to-Local Address Space 1",
49 "MSW of Local Base Address for PCI-to-Local Address Space 1",
50 "LSW of Local Base Address for PCI-to-Local Address Space 1",
51 "MSW of Bus Region Desciptors (Space 1) for PCI-to-Local Accesses",
52 "LSW of Bus Region Desciptors (Space 1) for PCI-to-Local Accesses",
53 "MSW of Hot Swap Control/Status",
54 "LSW of Hot Swap Control / Hot Swap Next Capability Pointer",
55};
56
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