source: drsdaq/VME/struck/sis1100/V2.02/sis3100_calls/sis3100_vme_calls.c@ 23

Last change on this file since 23 was 22, checked in by ogrimm, 16 years ago
First commit of drsdaq program
File size: 22.1 KB
Line 
1/*===========================================================================*/
2/* */
3/* File: sis3100_vme_calls.c */
4/* */
5/* OS: LINUX (Kernel >= 2.4.18 */
6/* */
7/* Description: */
8/* */
9/* Version: 1.2 */
10/* */
11/* */
12/* Generated: 18.12.01 */
13/* Modified: 05.11.03 */
14/* Modified: 21.06.04 */
15/* */
16/* Author: TH */
17/* */
18/* Last Change: Installation */
19/*---------------------------------------------------------------------------*/
20/* SIS GmbH */
21/* Harksheider Str. 102A */
22/* 22399 Hamburg */
23/* */
24/* http://www.struck.de */
25/* */
26/*===========================================================================*/
27
28#define _GNU_SOURCE
29#include <stdio.h>
30#include <errno.h>
31#include <string.h>
32#include <sys/types.h>
33#include <unistd.h>
34#include <stdlib.h>
35#include <fcntl.h>
36#include <sys/ioctl.h>
37
38
39#include "dev/pci/sis1100_var.h" /* pfad im Makefile angeben */
40
41
42#include "sis3100_vme_calls.h"
43
44
45
46
47
48
49
50
51
52/**********************/
53/* */
54/* VME SYSReset */
55/* */
56/**********************/
57
58int vmesysreset(int p)
59{
60 if (s3100_control_write(p, 0x100 /*offset*/, 0x2 /*data*/) != 0x0) return -1 ;
61 usleep(500000); /* 500ms (min. 200ms) */
62 if (s3100_control_write(p, 0x100 /*offset*/, 0x20000 /*data*/) != 0x0) return -1 ;
63 return 0 ;
64}
65
66/********************************/
67/* */
68/* VME Read IRQ Ackn. Cycle */
69/* */
70/********************************/
71
72/* VME Read IRQ Ackn. Cycles */
73
74int vme_IACK_D8_read(int p, u_int32_t vme_irq_level, u_int8_t* vme_data )
75{
76struct sis1100_vme_req req;
77
78 req.size=1; /* driver does not change any field except data */
79 req.am=0x4000; /* */
80 req.addr= (vme_irq_level << 1) + 1;
81 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1 ;
82 if (req.error) return req.error ;
83 *vme_data = req.data;
84 return 0 ;
85
86}
87
88
89
90
91
92
93
94
95/*****************/
96/* */
97/* VME A16 */
98/* */
99/*****************/
100
101/* VME A16 Read Cycles */
102
103int vme_A16D8_read(int p, u_int32_t vme_adr, u_int8_t* vme_data )
104{
105struct sis1100_vme_req req;
106
107 req.size=1; /* driver does not change any field except data */
108 req.am=0x29; /* */
109 req.addr= vme_adr;
110 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
111 if (req.error) return req.error ;
112 *vme_data = req.data;
113 return 0 ;
114
115}
116
117
118int vme_A16D16_read(int p, u_int32_t vme_adr, u_int16_t* vme_data )
119{
120struct sis1100_vme_req req;
121
122 req.size=2; /* driver does not change any field except data */
123 req.am=0x29; /* "" */
124 req.addr= vme_adr;
125 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
126 if (req.error) return req.error ;
127 *vme_data = req.data;
128 return 0 ;
129}
130
131
132
133int vme_A16D32_read(int p, u_int32_t vme_adr, u_int32_t* vme_data )
134{
135struct sis1100_vme_req req;
136
137 req.size=4; /* driver does not change any field except data */
138 req.am=0x29; /* "" */
139 req.addr= vme_adr;
140 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
141 if (req.error) return req.error ;
142 *vme_data = req.data;
143 return 0 ;
144}
145
146
147/* VME A16 Write Cycles */
148
149int vme_A16D8_write(int p, u_int32_t vme_adr, u_int8_t vme_data )
150{
151struct sis1100_vme_req req;
152 req.size=1;
153 req.am=0x29;
154 req.addr= vme_adr;
155 req.data= (u_int32_t)vme_data;
156 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
157 if (req.error) return req.error ;
158 return 0 ;
159}
160
161int vme_A16D16_write(int p, u_int32_t vme_adr, u_int16_t vme_data )
162{
163struct sis1100_vme_req req;
164 req.size=2;
165 req.am=0x29;
166 req.addr= vme_adr;
167 req.data= (u_int32_t)vme_data;
168 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
169 if (req.error) return req.error ;
170 return 0 ;
171}
172
173
174
175int vme_A16D32_write(int p, u_int32_t vme_adr, u_int32_t vme_data )
176{
177struct sis1100_vme_req req;
178 req.size=4;
179 req.am=0x29;
180 req.addr= vme_adr;
181 req.data= vme_data;
182 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
183 if (req.error) return req.error ;
184 return 0 ;
185}
186
187
188
189
190
191
192/*****************/
193/* */
194/* VME A24 */
195/* */
196/*****************/
197
198/* VME A24 Read Cycles */
199
200int vme_A24D8_read(int p, u_int32_t vme_adr, u_int8_t* vme_data )
201{
202struct sis1100_vme_req req;
203
204 req.size=1; /* driver does not change any field except data */
205 req.am=0x39; /* */
206 req.addr= vme_adr;
207 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
208 if (req.error) return req.error ;
209 *vme_data = req.data;
210 return 0 ;
211}
212
213
214int vme_A24D16_read(int p, u_int32_t vme_adr, u_int16_t* vme_data )
215{
216struct sis1100_vme_req req;
217
218 req.size=2; /* driver does not change any field except data */
219 req.am=0x39; /* "" */
220 req.addr= vme_adr;
221 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
222 if (req.error) return req.error ;
223 *vme_data = req.data;
224 return 0 ;
225}
226
227
228
229int vme_A24D32_read(int p, u_int32_t vme_adr, u_int32_t* vme_data )
230{
231struct sis1100_vme_req req;
232
233 req.size=4; /* driver does not change any field except data */
234 req.am=0x39; /* "" */
235 req.addr= vme_adr;
236 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
237 if (req.error) return req.error ;
238 *vme_data = req.data;
239 return 0 ;
240}
241
242
243
244
245int vme_A24DMA_D32_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
246 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
247{
248struct sis1100_vme_block_req block_req;
249
250 block_req.num=req_num_of_lwords ; /* */
251 block_req.fifo=0;
252 block_req.size=4;
253 block_req.am=0x39;
254 block_req.addr=vme_adr ;
255 block_req.data = vme_data ;
256
257 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
258 *got_num_of_lwords = block_req.num;
259 return block_req.error ; /* NEW */
260}
261
262
263int vme_A24BLT32_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
264 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
265{
266struct sis1100_vme_block_req block_req;
267
268 block_req.num=req_num_of_lwords ; /* */
269 block_req.fifo=0;
270 block_req.size=4;
271 block_req.am=0x3b;
272 block_req.addr=vme_adr ;
273 block_req.data = vme_data ;
274 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
275 *got_num_of_lwords = block_req.num;
276 return block_req.error ; /* NEW */
277}
278
279
280
281int vme_A24MBLT64_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
282 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
283{
284struct sis1100_vme_block_req block_req;
285
286 block_req.num=req_num_of_lwords ; /* */
287 block_req.fifo=0;
288 block_req.size=4;
289 block_req.am=0x38;
290 block_req.addr=vme_adr ;
291 block_req.data = vme_data ;
292 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
293 *got_num_of_lwords = block_req.num;
294 return block_req.error ; /* NEW */
295}
296
297
298
299int vme_A24BLT32FIFO_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
300 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
301{
302struct sis1100_vme_block_req block_req;
303
304 block_req.num=req_num_of_lwords ; /* */
305 block_req.fifo=1;
306 block_req.size=4;
307 block_req.am=0x3b;
308 block_req.addr=vme_adr ;
309 block_req.data = vme_data ;
310 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
311 *got_num_of_lwords = block_req.num;
312 return block_req.error ; /* NEW */
313}
314
315
316
317int vme_A24MBLT64FIFO_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
318 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
319{
320struct sis1100_vme_block_req block_req;
321
322 block_req.num=req_num_of_lwords ; /* */
323 block_req.fifo=1;
324 block_req.size=4;
325 block_req.am=0x38;
326 block_req.addr=vme_adr ;
327 block_req.data = vme_data ;
328 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
329 *got_num_of_lwords = block_req.num;
330 return block_req.error ; /* NEW */
331}
332
333
334
335
336
337
338
339/* VME A24 Write Cycles */
340
341int vme_A24D8_write(int p, u_int32_t vme_adr, u_int8_t vme_data )
342{
343struct sis1100_vme_req req;
344 req.size=1;
345 req.am=0x39;
346 req.addr= vme_adr;
347 req.data= (u_int32_t)vme_data;
348 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
349 if (req.error) return req.error ;
350 return 0 ;
351}
352
353int vme_A24D16_write(int p, u_int32_t vme_adr, u_int16_t vme_data )
354{
355struct sis1100_vme_req req;
356 req.size=2;
357 req.am=0x39;
358 req.addr= vme_adr;
359 req.data= (u_int32_t)vme_data;
360 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
361 if (req.error) return req.error ;
362 return 0 ;
363}
364
365
366
367int vme_A24D32_write(int p, u_int32_t vme_adr, u_int32_t vme_data )
368{
369struct sis1100_vme_req req;
370 req.size=4;
371 req.am=0x39;
372 req.addr= vme_adr;
373 req.data= vme_data;
374 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
375 if (req.error) return req.error ;
376 return 0 ;
377}
378
379
380
381int vme_A24DMA_D32_write(int p, u_int32_t vme_adr, u_int32_t* vme_data,
382 u_int32_t req_num_of_lwords, u_int32_t* put_num_of_lwords)
383{
384struct sis1100_vme_block_req block_req;
385
386 block_req.num=req_num_of_lwords ; /* */
387 block_req.fifo=0;
388 block_req.size=4;
389 block_req.am=0x39;
390 block_req.addr=vme_adr ;
391 block_req.data = vme_data ;
392 if (ioctl(p, SIS3100_VME_BLOCK_WRITE, &block_req)<0) return -1 ; /* NEW */
393 *put_num_of_lwords = block_req.num;
394 return block_req.error ; /* NEW */
395}
396
397
398int vme_A24BLT32_write(int p, u_int32_t vme_adr, u_int32_t* vme_data,
399 u_int32_t req_num_of_lwords, u_int32_t* put_num_of_lwords)
400{
401struct sis1100_vme_block_req block_req;
402
403 block_req.num=req_num_of_lwords ; /* */
404 block_req.fifo=0;
405 block_req.size=4;
406 block_req.am=0x3b;
407 block_req.addr=vme_adr ;
408 block_req.data = vme_data ;
409 if (ioctl(p, SIS3100_VME_BLOCK_WRITE, &block_req)<0) return -1 ; /* NEW */
410 *put_num_of_lwords = block_req.num;
411 return block_req.error ; /* NEW */
412}
413
414
415int vme_A24MBLT64_write(int p, u_int32_t vme_adr, u_int32_t* vme_data,
416 u_int32_t req_num_of_lwords, u_int32_t* put_num_of_lwords)
417{
418struct sis1100_vme_block_req block_req;
419
420 block_req.num=req_num_of_lwords ; /* */
421 block_req.fifo=0;
422 block_req.size=4;
423 block_req.am=0x38;
424 block_req.addr=vme_adr ;
425 block_req.data = vme_data ;
426 if (ioctl(p, SIS3100_VME_BLOCK_WRITE, &block_req)<0) return -1 ; /* NEW */
427 *put_num_of_lwords = block_req.num;
428 return block_req.error ; /* NEW */
429}
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457/*****************/
458/* */
459/* VME A32 */
460/* */
461/*****************/
462
463
464/* VME A32 Read Cycles */
465
466int vme_A32D8_read(int p, u_int32_t vme_adr, u_int8_t* vme_data )
467{
468struct sis1100_vme_req req;
469
470 req.size=1; /* driver does not change any field except data */
471 req.am=0x9; /* */
472 req.addr= vme_adr;
473 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
474 if (req.error) return req.error ;
475 *vme_data = req.data;
476 return 0 ;
477}
478
479
480int vme_A32D16_read(int p, u_int32_t vme_adr, u_int16_t* vme_data )
481{
482struct sis1100_vme_req req;
483
484 req.size=2; /* driver does not change any field except data */
485 req.am=0x9; /* "" */
486 req.addr= vme_adr;
487 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
488 if (req.error) return req.error ;
489 *vme_data = req.data;
490 return 0 ;
491}
492
493
494
495int vme_A32D32_read(int p, u_int32_t vme_adr, u_int32_t* vme_data )
496{
497struct sis1100_vme_req req;
498
499 req.size=4; /* driver does not change any field except data */
500 req.am=0x9; /* "" */
501 req.addr= vme_adr;
502 if (ioctl(p, SIS3100_VME_READ, &req)<0) return -1; /* NEW */
503 if (req.error) return req.error ;
504 *vme_data = req.data; /* NEW */
505 return 0 ;
506}
507
508
509
510
511
512
513
514int vme_A32DMA_D32_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
515 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
516{
517struct sis1100_vme_block_req block_req;
518
519 block_req.num=req_num_of_lwords ; /* */
520 block_req.fifo=0;
521 block_req.size=4;
522 block_req.am=0x9;
523 block_req.addr=vme_adr ;
524 block_req.data = vme_data ;
525
526 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
527 *got_num_of_lwords = block_req.num;
528 return block_req.error ; /* NEW */
529}
530
531
532
533
534
535
536int vme_A32BLT32_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
537 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
538{
539struct sis1100_vme_block_req block_req;
540
541 block_req.num=req_num_of_lwords ; /* */
542 block_req.fifo=0;
543 block_req.size=4;
544 block_req.am=0xb;
545 block_req.addr=vme_adr ;
546 block_req.data = vme_data ;
547
548 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
549 *got_num_of_lwords = block_req.num;
550 return block_req.error ; /* NEW */
551}
552
553
554
555int vme_A32MBLT64_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
556 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
557{
558struct sis1100_vme_block_req block_req;
559
560 block_req.num=req_num_of_lwords ; /* */
561 block_req.fifo=0;
562 block_req.size=4;
563 block_req.am=0x8;
564 block_req.addr=vme_adr ;
565 block_req.data = vme_data ;
566 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
567 *got_num_of_lwords = block_req.num;
568 return block_req.error ; /* NEW */
569}
570
571
572
573int vme_A32_2EVME_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
574 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
575{
576struct sis1100_vme_block_req block_req;
577
578 block_req.num=req_num_of_lwords ; /* */
579 block_req.fifo=0;
580 block_req.size=4;
581 block_req.am=0x20;
582 block_req.addr=vme_adr ;
583 block_req.data = vme_data ;
584 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
585 *got_num_of_lwords = block_req.num;
586 return block_req.error ; /* NEW */
587}
588
589
590
591
592
593
594int vme_A32DMA_D32FIFO_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
595 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
596{
597struct sis1100_vme_block_req block_req;
598
599 block_req.num=req_num_of_lwords ; /* */
600 block_req.fifo=1;
601 block_req.size=4;
602 block_req.am=0x9;
603 block_req.addr=vme_adr ;
604 block_req.data = vme_data ;
605 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
606 *got_num_of_lwords = block_req.num;
607 return block_req.error ; /* NEW */
608}
609
610
611
612
613
614int vme_A32BLT32FIFO_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
615 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
616{
617struct sis1100_vme_block_req block_req;
618
619 block_req.num=req_num_of_lwords ; /* */
620 block_req.fifo=1;
621 block_req.size=4;
622 block_req.am=0xb;
623 block_req.addr=vme_adr ;
624 block_req.data = vme_data ;
625 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
626 *got_num_of_lwords = block_req.num;
627 return block_req.error ; /* NEW */
628}
629
630
631
632int vme_A32MBLT64FIFO_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
633 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
634{
635struct sis1100_vme_block_req block_req;
636
637 block_req.num=req_num_of_lwords ; /* */
638 block_req.fifo=1;
639 block_req.size=4;
640 block_req.am=0x8;
641 block_req.addr=vme_adr ;
642 block_req.data = vme_data ;
643 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
644 *got_num_of_lwords = block_req.num;
645 return block_req.error ; /* NEW */
646}
647
648
649int vme_A32_2EVMEFIFO_read(int p, u_int32_t vme_adr, u_int32_t* vme_data,
650 u_int32_t req_num_of_lwords, u_int32_t* got_num_of_lwords)
651{
652struct sis1100_vme_block_req block_req;
653
654 block_req.num=req_num_of_lwords ; /* */
655 block_req.fifo=1;
656 block_req.size=4;
657 block_req.am=0x20;
658 block_req.addr=vme_adr ;
659 block_req.data = vme_data ;
660 if (ioctl(p, SIS3100_VME_BLOCK_READ, &block_req)<0) return -1 ; /* NEW */
661 *got_num_of_lwords = block_req.num;
662 return block_req.error ; /* NEW */
663}
664
665
666
667
668
669
670
671
672
673
674
675/* VME A32 Write Cycles */
676
677int vme_A32D8_write(int p, u_int32_t vme_adr, u_int8_t vme_data )
678{
679struct sis1100_vme_req req;
680 req.size=1;
681 req.am=0x9;
682 req.addr= vme_adr;
683 req.data= (u_int32_t)vme_data;
684 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
685 if (req.error) return req.error ;
686 return 0 ;
687}
688
689int vme_A32D16_write(int p, u_int32_t vme_adr, u_int16_t vme_data )
690{
691struct sis1100_vme_req req;
692 req.size=2;
693 req.am=0x9;
694 req.addr= vme_adr;
695 req.data= (u_int32_t)vme_data;
696 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
697 if (req.error) return req.error ;
698 return 0 ;
699}
700
701
702
703int vme_A32D32_write(int p, u_int32_t vme_adr, u_int32_t vme_data )
704{
705struct sis1100_vme_req req;
706 req.size=4;
707 req.am=0x9;
708 req.addr= vme_adr;
709 req.data= vme_data;
710 if (ioctl(p, SIS3100_VME_WRITE, &req)<0) return -1; /* NEW */
711 if (req.error) return req.error ;
712 return 0 ;
713}
714
715
716
717int vme_A32DMA_D32_write(int p, u_int32_t vme_adr, u_int32_t* vme_data,
718 u_int32_t req_num_of_lwords, u_int32_t* put_num_of_lwords)
719{
720struct sis1100_vme_block_req block_req;
721
722 block_req.num=req_num_of_lwords ; /* */
723 block_req.fifo=0;
724 block_req.size=4;
725 block_req.am=0x9;
726 block_req.addr=vme_adr ;
727 block_req.data = vme_data ;
728 if (ioctl(p, SIS3100_VME_BLOCK_WRITE, &block_req)<0) return -1 ; /* NEW */
729 *put_num_of_lwords = block_req.num;
730 return block_req.error ; /* NEW */
731}
732
733int vme_A32BLT32_write(int p, u_int32_t vme_adr, u_int32_t* vme_data,
734 u_int32_t req_num_of_lwords, u_int32_t* put_num_of_lwords)
735{
736struct sis1100_vme_block_req block_req;
737
738 block_req.num=req_num_of_lwords ; /* */
739 block_req.fifo=0;
740 block_req.size=4;
741 block_req.am=0xb;
742 block_req.addr=vme_adr ;
743 block_req.data = vme_data ;
744
745 if (ioctl(p, SIS3100_VME_BLOCK_WRITE, &block_req)<0) return -1 ; /* NEW */
746 *put_num_of_lwords = block_req.num;
747 return block_req.error ; /* NEW */
748}
749
750
751int vme_A32MBLT64_write(int p, u_int32_t vme_adr, u_int32_t* vme_data,
752 u_int32_t req_num_of_lwords, u_int32_t* put_num_of_lwords)
753{
754struct sis1100_vme_block_req block_req;
755
756 block_req.num=req_num_of_lwords ; /* */
757 block_req.fifo=0;
758 block_req.size=4;
759 block_req.am=0x8;
760 block_req.addr=vme_adr ;
761 block_req.data = vme_data ;
762 if (ioctl(p, SIS3100_VME_BLOCK_WRITE, &block_req)<0) return -1 ; /* NEW */
763 *put_num_of_lwords = block_req.num;
764 return block_req.error ; /* NEW */
765}
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782/***********************/
783/* */
784/* s3100_control */
785/* */
786/***********************/
787
788
789int s3100_control_read(int p, int offset, u_int32_t* data)
790{
791struct sis1100_ctrl_reg reg;
792int error ;
793 reg.offset = offset;
794 error = (ioctl(p, SIS1100_CTRL_READ, &reg)<0) ;
795 *data = reg.val;
796 return error ;
797}
798
799
800
801int s3100_control_write(int p, int offset, u_int32_t data)
802{
803struct sis1100_ctrl_reg reg;
804int error ;
805 reg.offset = offset;
806 reg.val = data;
807 error = (ioctl(p, SIS1100_CTRL_WRITE, &reg)<0) ;
808 return error ;
809}
810
811
812
813
814
815
816
817
818
819
820/***********************/
821/* */
822/* s3100_sharc */
823/* */
824/***********************/
825
826
827int s3100_sharc_write(int p_sharc_desc, u_int32_t byte_adr, u_int32_t* ptr_data, u_int32_t num_of_lwords )
828{
829int return_code ;
830
831 lseek(p_sharc_desc, byte_adr, SEEK_SET); /* must be longword aligned */
832 return_code=write(p_sharc_desc, ptr_data, num_of_lwords*4);
833
834
835/* return_code = length ? */
836/*
837res=write(p_sharc_desc, data, 4);
838 if (res<0) {
839 printf("write(0x%08lx, 0x%x): %s\n", offset, data, strerror(errno));
840 exit(1);
841 }
842 if (res!=4) {
843 printf("write(0x%08lx, 0x%x): res=%d\n", offset, data, res);
844 exit(1);
845 }
846*/
847
848 return return_code ;
849}
850
851
852
853
854
855
856int s3100_sharc_read(int p_sharc_desc, u_int32_t byte_adr, u_int32_t* ptr_data, u_int32_t num_of_lwords )
857{
858int return_code ;
859
860
861 lseek(p_sharc_desc, byte_adr, SEEK_SET); /* must be longword aligned */
862 return_code=read(p_sharc_desc, ptr_data, num_of_lwords*4);
863
864 return return_code ;
865}
866
867
868
869
870
871/***********************/
872/* */
873/* s3100_sdram */
874/* */
875/***********************/
876
877
878int s3100_sdram_write(int p_sdram_desc, u_int32_t byte_adr, u_int32_t* ptr_data, u_int32_t num_of_lwords )
879{
880int return_code ;
881
882
883 lseek(p_sdram_desc, byte_adr, SEEK_SET); /* must be longword aligned */
884 return_code=write(p_sdram_desc, ptr_data, num_of_lwords*4);
885
886/* return_code = length ? */
887/*
888res=write(p, &data, 4);
889 if (res<0) {
890 printf("write(0x%08lx, 0x%x): %s\n", offset, data, strerror(errno));
891 exit(1);
892 }
893 if (res!=4) {
894 printf("write(0x%08lx, 0x%x): res=%d\n", offset, data, res);
895 exit(1);
896 }
897*/
898
899 return return_code ;
900}
901
902
903
904
905
906
907int s3100_sdram_read(int p_sdram_desc, u_int32_t byte_adr, u_int32_t* ptr_data, u_int32_t num_of_lwords )
908{
909int return_code ;
910
911
912 lseek(p_sdram_desc, byte_adr, SEEK_SET); /* must be longword aligned */
913 return_code=read(p_sdram_desc, ptr_data, num_of_lwords*4);
914
915
916 return return_code ;
917}
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