source: fact/FADctrl/FADFormat.h@ 10187

Last change on this file since 10187 was 10187, checked in by neise, 11 years ago
added new daqmode command
File size: 2.7 KB
Line 
1#ifndef FADFORMAT_H_SEEN
2#define FADFORMAT_H_SEEN
3
4#include "../drsdaq/RawDataCTX.h"
5
6//
7// Commands for FAD
8//
9#define CMD_Start 0x2200 // Start Run
10#define CMD_Stop 0x2300 // Stop Run
11#define CMD_mode_command 0x3000 // Set Socket mode to: command mode
12#define CMD_mode_all_sockets 0x3100// Set Socket mode to: daq mode
13
14#define CMD_Trigger 0xA000 // single trigger
15#define CMD_DENABLE 0x0600 // DENABLE line HIGH
16#define CMD_DDISABLE 0x0700 // DENABLE line LOW
17#define CMD_DWRITE_RUN 0x0800 // DWRITE possibly HIGH
18#define CMD_DWRITE_STOP 0x0900 // DWRITE always LOW
19#define CMD_SCLK_ON 0x1000
20#define CMD_SCLK_OFF 0x1100
21#define CMD_PS_DIRINC 0x1200
22#define CMD_PS_DIRDEC 0x1300
23#define CMD_PS_DO 0x1400
24#define CMD_PS_RESET 0x1700
25#define CMD_SRCLK_ON 0x1500
26#define CMD_SRCLK_OFF 0x1600
27#define CMD_Trigger_C 0xB000 // continous trigger
28#define CMD_Trigger_S 0x2000 // stop continous trigger
29#define CMD_Read 0x0A00 // read from Config-RAM
30#define CMD_Write 0x0500 // write to Config-RAM
31
32#define CMD_TRIGGERS_ON 0x1800 // enables the trigger line -- incoming triggers can now be accepted
33#define CMD_TRIGGERS_OFF 0x1900 // disables the trigger line -- no trigger will be accepted
34
35//
36// Other definitions
37//
38#define MAX_ADDR 0xFF // highest address in Config-RAM
39#define BADDR_ROI 0x00 // Baseaddress ROI-Values
40#define BADDR_DAC 0x24 // Baseaddress DAC-Values
41#define MAX_VAL 65535
42#define MAX_ROIVAL 1024
43#define MAX_DACVAL 65535
44
45const unsigned int NChannels = 9;
46const unsigned int NBins = 1024;
47const unsigned int NChips = 4;
48const unsigned int NTemp = 4;
49const unsigned int NDAC = 8;
50
51//
52// Data structures
53//
54typedef struct {
55// ------------------------------
56uint16_t start_package_flag;
57uint16_t package_length;
58uint16_t version_no;
59uint16_t PLLLCK;
60// ------------------------------
61uint16_t trigger_crc;
62uint16_t trigger_type;
63uint32_t trigger_id;
64// ------------------------------
65uint32_t fad_evt_counter;
66uint32_t REFCLK_frequency;
67// ------------------------------
68uint16_t board_id;
69uint16_t adc_clock_phase_shift;
70uint16_t number_of_triggers_to_generate;
71uint16_t trigger_generator_prescaler;
72// ------------------------------
73uint8_t DNA[8]; // Xilinx DNA
74// ------------------------------
75uint32_t time;
76uint32_t fad_status;
77// ------------------------------
78int16_t drs_temperature[NTemp];
79// ------------------------------
80uint16_t dac[NDAC];
81// ------------------------------
82} __attribute__((__packed__)) PEVNT_HEADER;
83typedef struct {
84uint16_t id;
85uint16_t start_cell;
86uint16_t roi;
87uint16_t filling;
88uint16_t adc_data[];
89} __attribute__((__packed__)) PCHANNEL;
90typedef struct {
91uint16_t package_crc;
92uint16_t end_package_flag;
93} __attribute__((__packed__)) PEVNT_FOOTER;
94
95#endif
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