source: fact/drsdaq/VME/atlas/include/vme_rcc/universe.h@ 16858

Last change on this file since 16858 was 22, checked in by ogrimm, 16 years ago
First commit of drsdaq program
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1// $Id: universe.h,v 1.3 2004/06/15 09:03:26 joos Exp $
2#ifndef __universe_h
3#define __universe_h
4
5/* Full register space of Tundra Universe ASIC */
6
7/* UCSR Registers */
8typedef struct {
9volatile unsigned int pci_id; /* 000 */
10volatile unsigned int pci_csr; /* 004 */
11volatile unsigned int pci_class; /* 008 */
12volatile unsigned int pci_misc0; /* 00C */
13volatile unsigned int pci_bs; /* 010 */
14volatile unsigned int pci_bs1; /* 014 */
15volatile unsigned int reserved1 [9]; /* 018 - 038 */
16volatile unsigned int pci_misc1; /* 03C */
17volatile unsigned int reserved2[48]; /* 040 */
18volatile unsigned int lsi0_ctl; /* 100 */
19volatile unsigned int lsi0_bs; /* 104 */
20volatile unsigned int lsi0_bd; /* 108 */
21volatile unsigned int lsi0_to; /* 10C */
22volatile unsigned int reserved3; /* 110 */
23volatile unsigned int lsi1_ctl; /* 114 */
24volatile unsigned int lsi1_bs; /* 118 */
25volatile unsigned int lsi1_bd; /* 11C */
26volatile unsigned int lsi1_to; /* 120 */
27volatile unsigned int reserved4; /* 124 */
28volatile unsigned int lsi2_ctl; /* 128 */
29volatile unsigned int lsi2_bs; /* 12C */
30volatile unsigned int lsi2_bd; /* 130 */
31volatile unsigned int lsi2_to; /* 134 */
32volatile unsigned int reserved5; /* 138 */
33volatile unsigned int lsi3_ctl; /* 13C */
34volatile unsigned int lsi3_bs; /* 140 */
35volatile unsigned int lsi3_bd; /* 144 */
36volatile unsigned int lsi3_to; /* 148 */
37volatile unsigned int reserved6[9]; /* 14C-16C */
38volatile unsigned int scyc_ctl; /* 170 */
39volatile unsigned int scyc_addr; /* 174 */
40volatile unsigned int scyc_en; /* 178 */
41volatile unsigned int scyc_cmp; /* 17C */
42volatile unsigned int scyc_swp; /* 180 */
43volatile unsigned int lmisc; /* 184 */
44volatile unsigned int slsi; /* 188 */
45volatile unsigned int l_cmderr; /* 18C */
46volatile unsigned int laerr; /* 190 */
47volatile unsigned int reserved7[3]; /* 194-19C */
48volatile unsigned int lsi4_ctl; /* 1A0 */
49volatile unsigned int lsi4_bs; /* 1A4 */
50volatile unsigned int lsi4_bd; /* 1A8 */
51volatile unsigned int lsi4_to; /* 1AC */
52volatile unsigned int reserved8; /* 1B0 */
53volatile unsigned int lsi5_ctl; /* 1B4 */
54volatile unsigned int lsi5_bs; /* 1B8 */
55volatile unsigned int lsi5_bd; /* 1BC */
56volatile unsigned int lsi5_to; /* 1C0 */
57volatile unsigned int reserved9; /* 1C4 */
58volatile unsigned int lsi6_ctl; /* 1C8 */
59volatile unsigned int lsi6_bs; /* 1CC */
60volatile unsigned int lsi6_bd; /* 1D0 */
61volatile unsigned int lsi6_to; /* 1D4 */
62volatile unsigned int reserved10; /* 1D8 */
63volatile unsigned int lsi7_ctl; /* 1DC */
64volatile unsigned int lsi7_bs; /* 1E0 */
65volatile unsigned int lsi7_bd; /* 1E4 */
66volatile unsigned int lsi7_to; /* 1E8 */
67volatile unsigned int reserved11[5]; /* 1EC - 1FC*/
68volatile unsigned int dctl; /* 200 */
69volatile unsigned int dtbc; /* 204 */
70volatile unsigned int dla; /* 208 */
71volatile unsigned int reserved12; /* 20c */
72volatile unsigned int dva; /* 210 */
73volatile unsigned int reserved13; /* 214 */
74volatile unsigned int dcpp; /* 218 */
75volatile unsigned int reserved14; /* 21C */
76volatile unsigned int dgcs; /* 220 */
77volatile unsigned int d_llue; /* 224 */
78volatile unsigned int reserved15[(0x300-0x228)/4]; /* 228 - 2FC */
79volatile unsigned int lint_en; /* 300 */
80volatile unsigned int lint_stat; /* 304 */
81volatile unsigned int lint_map0; /* 308 */
82volatile unsigned int lint_map1; /* 30C */
83volatile unsigned int vint_en; /* 310 */
84volatile unsigned int vint_stat; /* 314 */
85volatile unsigned int vint_map0; /* 318 */
86volatile unsigned int vint_map1; /* 31C */
87volatile unsigned int statid; /* 320 */
88volatile unsigned int vx_statid[7]; /* 324 - 33C */
89volatile unsigned int lint_map2; /* 340 */
90volatile unsigned int vint_map2; /* 344 */
91volatile unsigned int mbox0; /* 348 */
92volatile unsigned int mbox1; /* 34C */
93volatile unsigned int mbox2; /* 350 */
94volatile unsigned int mbox3; /* 354 */
95volatile unsigned int sema0; /* 358 */
96volatile unsigned int sema1; /* 35C */
97volatile unsigned int reserved16[(0x400-0x360)/4]; /* 360 - 3FC */
98volatile unsigned int mast_ctl; /* 400 */
99volatile unsigned int misc_ctl; /* 404 */
100volatile unsigned int misc_stat; /* 408 */
101volatile unsigned int user_am; /* 40C */
102volatile unsigned int reserved17[(0x4fC-0x410)/4]; /* 410 - 4F8 */
103volatile unsigned int u2spec; /* 4FC */
104volatile unsigned int reserved17b[(0xf00-0x500)/4]; /* 500 - EFC */
105volatile unsigned int vsi0_ctl; /* F00 */
106volatile unsigned int vsi0_bs; /* F04 */
107volatile unsigned int vsi0_bd; /* F08 */
108volatile unsigned int vsi0_to; /* F0C */
109volatile unsigned int reserved18; /* F10 */
110volatile unsigned int vsi1_ctl; /* F14 */
111volatile unsigned int vsi1_bs; /* F18 */
112volatile unsigned int vsi1_bd; /* F1C */
113volatile unsigned int vsi1_to; /* F20 */
114volatile unsigned int reserved19; /* F24 */
115volatile unsigned int vsi2_ctl; /* F28 */
116volatile unsigned int vsi2_bs; /* F2C */
117volatile unsigned int vsi2_bd; /* F30 */
118volatile unsigned int vsi2_to; /* F34 */
119volatile unsigned int reserved20; /* F38 */
120volatile unsigned int vsi3_ctl; /* F3C */
121volatile unsigned int vsi3_bs; /* F40 */
122volatile unsigned int vsi3_bd; /* F44 */
123volatile unsigned int vsi3_to; /* F48 */
124volatile unsigned int reserved21[(0xf64-0xf4c)/4]; /* FC4 - F60 */
125volatile unsigned int lm_ctl; /* F64 */
126volatile unsigned int tl_bs; /* F68 */
127volatile unsigned int reserved22; /* F6C */
128volatile unsigned int vrai_ctl; /* F70 */
129volatile unsigned int vrai_bs; /* F74 */
130volatile unsigned int reserved23[2]; /* F78 - F7C */
131volatile unsigned int vcsr_ctl; /* F80 */
132volatile unsigned int vcsr_to; /* F84 */
133volatile unsigned int v_amerr; /* F88 */
134volatile unsigned int vaerr; /* F8C */
135volatile unsigned int vsi4_ctl; /* F90 */
136volatile unsigned int vsi4_bs; /* F94 */
137volatile unsigned int vsi4_bd; /* F98 */
138volatile unsigned int vsi4_to; /* F9C */
139volatile unsigned int reserved24; /* FA0 */
140volatile unsigned int vsi5_ctl; /* FA4 */
141volatile unsigned int vsi5_bs; /* FA8 */
142volatile unsigned int vsi5_bd; /* FAC */
143volatile unsigned int vsi5_to; /* FB0 */
144volatile unsigned int reserved25; /* FB4 */
145volatile unsigned int vsi6_ctl; /* FB8 */
146volatile unsigned int vsi6_bs; /* FBC */
147volatile unsigned int vsi6_bd; /* FC0 */
148volatile unsigned int vsi6_to; /* FC4 */
149volatile unsigned int reserved26; /* FC8 */
150volatile unsigned int vsi7_ctl; /* FCC */
151volatile unsigned int vsi7_bs; /* FD0 */
152volatile unsigned int vsi7_bd; /* FD4 */
153volatile unsigned int vsi7_to; /* FD8 */
154volatile unsigned int reserved27[6]; /* FDC - FF0 */
155volatile unsigned int vcsr_clr; /* FF4 */
156volatile unsigned int vcsr_set; /* FF8 */
157volatile unsigned int vcsr_bs; /* FFC */
158}universe_regs_t;
159
160/* Universe II Register Offsets */
161
162#define PCI_ID 0x0000
163#define PCI_CSR 0x0004
164#define PCI_CLASS 0x0008
165#define PCI_MISC0 0x000C
166#define PCI_BS0 0x0010
167#define PCI_BS1 0x0014
168#define PCI_MISC1 0x003C
169
170#define LSI0_CTL 0x0100
171#define LSI0_BS 0x0104
172#define LSI0_BD 0x0108
173#define LSI0_TO 0x010C
174
175#define LSI1_CTL 0x0114
176#define LSI1_BS 0x0118
177#define LSI1_BD 0x011C
178#define LSI1_TO 0x0120
179#define LSI2_CTL 0x0128
180#define LSI2_BS 0x012C
181#define LSI2_BD 0x0130
182#define LSI2_TO 0x0134
183
184#define LSI3_CTL 0x013C
185#define LSI3_BS 0x0140
186#define LSI3_BD 0x0144
187#define LSI3_T O0x0148
188
189#define SCYC_CTL 0x0170
190#define SCYC_ADDR 0x0174
191#define SCYC_EN 0x0178
192#define SCYC_CMP 0x017C
193#define SCYC_SWP 0x0180
194#define LMISC 0x0184
195#define SLSI 0x0188
196#define L_CMDERR 0x018C
197#define LAERR 0x0190
198
199#define LSI4_CTL 0x01A0
200#define LSI4_BS 0x01A4
201#define LSI4_BD 0x01A8
202#define LSI4_TO 0x01AC
203
204#define LSI5_CTL 0x01B4
205#define LSI5_BS 0x01B8
206#define LSI5_BD 0x01BC
207#define LSI5_TO 0x01C0
208
209#define LSI6_CTL 0x01C8
210#define LSI6_BS 0x01CC
211#define LSI6_BD 0x01D0
212#define LSI6_TO 0x01D4
213
214#define LSI7_CTL 0x01DC
215#define LSI7_BS 0x01E0
216#define LSI7_BD 0x01E4
217#define LSI7_TO 0x01E8
218
219#define DCTL 0x0200
220#define DTBC 0x0204
221#define DLA 0x0208
222#define DVA 0x0210
223#define DCPP 0x0218
224#define DGCS 0x0220
225#define D_LLUE 0x0224
226
227#define LINT_EN 0x0300
228#define LINT_STAT 0x0304
229#define LINT_MAP0 0x0308
230#define LINT_MAP1 0x030C
231#define VINT_EN 0x0310
232#define VINT_STAT 0x0314
233#define VINT_MAP0 0x0318
234#define VINT_MAP1 0x031C
235#define STATID 0x0320
236#define V1_STATID 0x0324
237#define V2_STATID 0x0328
238#define V3_STATID 0x032C
239#define V4_STATID 0x0330
240#define V5_STATID 0x0334
241#define V6_STATID 0x0338
242#define V7_STATID 0x033C
243
244#define LINT_MAP2 0x340
245#define VINT_MAP2 0x344
246#define MBOX0 0x348
247#define MBOX1 0x34C
248#define MBOX2 0x350
249#define MBOX3 0x354
250#define SEMA0 0x358
251#define SEMA1 0x35C
252
253#define MAST_CTL 0x0400
254#define MISC_CTL 0x0404
255#define MISC_STAT 0x0408
256#define USER_AM 0x040C
257
258#define VSI0_CTL 0x0F00
259#define VSI0_BS 0x0F04
260#define VSI0_BD 0x0F08
261#define VSI0_TO 0x0F0C
262
263#define VSI1_CTL 0x0F14
264#define VSI1_BS 0x0F18
265#define VSI1_BD 0x0F1C
266#define VSI1_TO 0x0F20
267
268#define VSI2_CT L0x0F28
269#define VSI2_BS 0x0F2C
270#define VSI2_BD 0x0F30
271#define VSI2_TO 0x0F34
272
273#define VSI3_CTL 0x0F3C
274#define VSI3_BS 0x0F40
275#define VSI3_BD 0x0F44
276#define VSI3_TO 0x0F48
277
278#define LM_CTL 0xF64
279#define LM_BS 0xF68
280
281#define VRAI_CTL 0x0F70
282#define VRAI_BS 0x0F74
283#define VCSR_CTL 0x0F80
284#define VCSR_TO 0x0F84
285#define V_AMERR 0x0F88
286#define VAERR 0x0F8C
287
288#define VSI4_CTL 0x0F90
289#define VSI4_BS 0x0F94
290#define VSI4_BD 0x0F98
291#define VSI4_TO 0x0F9C
292
293#define VSI5_CTL 0x0FA4
294#define VSI5_BS 0x0FA8
295#define VSI5_BD 0x0FAC
296#define VSI5_TO 0x0FB0
297
298#define VSI6_CTL 0x0FB8
299#define VSI6_BS 0x0FBC
300#define VSI6_BD 0x0FC0
301#define VSI6_TO 0x0FC4
302
303#define VSI7_CTL 0x0FCC
304#define VSI7_BS 0x0FD0
305#define VSI7_BD 0x0FD4
306#define VSI7_TO 0x0FD8
307
308#define VCSR_CLR 0x0FF4
309#define VCSR_SET 0x0FF8
310#define VCSR_BS 0x0FFC
311
312/* Interrupt Control Registers - "borrowed" from the Hannapel driver */
313#define BM_LINT_ACFAIL 0x00008000
314#define BM_LINT_SYSFAIL 0x00004000
315#define BM_LINT_SW_INT 0x00002000
316#define BM_LINT_SW_IACK 0x00001000
317#define BM_LINT_VERR 0x00000400
318#define BM_LINT_LERR 0x00000200
319#define BM_LINT_DMA 0x00000100
320#define BM_LINT_VIRQ 0x000000FE
321#define BM_LINT_VIRQ7 0x00000080
322#define BM_LINT_VIRQ6 0x00000040
323#define BM_LINT_VIRQ5 0x00000020
324#define BM_LINT_VIRQ4 0x00000010
325#define BM_LINT_VIRQ3 0x00000008
326#define BM_LINT_VIRQ2 0x00000004
327#define BM_LINT_VIRQ1 0x00000002
328#define BM_LINT_VOWN 0x00000001
329#define BM_VX_STATID_STATID 0x000000FF
330#define OF_VX_STATID_STATID 0
331#define BM_VX_STATID_ERR 0x00000100
332
333#endif /* __universe_h */
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