1   Package File Template


2  


3   Purpose: This package defines supplemental types, subtypes,


4   constants, and functions


5 


6 


7  library IEEE;


8  use IEEE.STD_LOGIC_1164.all;


9  use IEEE.STD_LOGIC_ARITH.ALL;


10  use IEEE.STD_LOGIC_UNSIGNED.ALL;


11   use IEEE.NUMERIC_STD.ALL;


12 


13  package fad_definitions is


14 


15 


16   Declare constants


17 


18  type mac_type is array (0 to 2) of std_logic_vector (15 downto 0);


19  type ip_type is array (0 to 3) of integer;


20   Network Settings


21 


22  constant MAC_ADDRESS : mac_type := (X"0011", X"9561", X"97B4");


23 


24   @ ETH zurich


25   constant NETMASK : ip_type := (255, 255, 248, 0);


26   constant IP_ADDRESS : ip_type := (192, 33, 99, 225);


27   constant GATEWAY : ip_type := (192, 33, 96, 1);


28 


29   @ TU Dortmund


30  constant NETMASK : ip_type := (255, 255, 255, 0);


31  constant IP_ADDRESS : ip_type := (129, 217, 160, 119);


32  constant GATEWAY : ip_type := (129, 217, 160, 1);


33 


34  constant FIRST_PORT : integer := 5000;


35   Network Settings End


36 


37  constant PACKAGE_VERSION : std_logic_vector(7 downto 0) := X"01";


38  constant PACKAGE_SUB_VERSION : std_logic_vector(7 downto 0) := X"02";


39  constant PACKAGE_HEADER_LENGTH : integer := 22;


40  constant PACKAGE_END_LENGTH : integer := 2;  CRC and ENDFlag


41 


42  constant W5300_S_INC : std_logic_vector(6 downto 0) := "1000000";  socket address offset


43 


44   W5300 Registers


45  constant W5300_BASE_ADR : std_logic_vector (9 downto 0) := (others => '0');


46  constant W5300_MR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"0";


47  constant W5300_IR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2";


48  constant W5300_IMR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"4";


49  constant W5300_SHAR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"8";


50  constant W5300_GAR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"10";


51  constant W5300_SUBR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"14";


52  constant W5300_SIPR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"18";


53  constant W5300_RTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"1C";


54  constant W5300_RCR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"1E";


55  constant W5300_TMS01R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"20";


56  constant W5300_TMS23R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"22";


57  constant W5300_TMS45R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"24";


58  constant W5300_TMS67R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"26";


59  constant W5300_RMS01R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"28";


60  constant W5300_RMS23R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2A";


61  constant W5300_RMS45R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2C";


62  constant W5300_RMS67R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2E";


63  constant W5300_MTYPER : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"30";


64 


65  constant W5300_S0_MR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"0";


66  constant W5300_S0_CR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"2";


67  constant W5300_S0_IMR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"4";


68  constant W5300_S0_IR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"6";


69  constant W5300_S0_SSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"8";


70  constant W5300_S0_PORTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"A";


71  constant W5300_S0_DPORTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"12";


72  constant W5300_S0_DIPR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"14";


73  constant W5300_S0_TX_WRSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"20";


74  constant W5300_S0_TX_FSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"24";


75  constant W5300_S0_RX_RSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"28";


76  constant W5300_S0_TX_FIFOR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"2E";


77  constant W5300_S0_RX_FIFOR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"30";


78   End W5300 registers


79 


80  


81  constant W5300_TX_FIFO_SIZE : integer := (15360 / 2);  Socket TX FIFOSize in 16 Bit Words


82 


83  constant LOG2_OF_RAM_SIZE_64B : integer := 15;


84  constant RAM_SIZE_64B : integer := 2**LOG2_OF_RAM_SIZE_64B;


85  constant RAM_SIZE_64B : integer := 24576;


86  constant RAM_SIZE_16B : integer := RAM_SIZE_64B * 4;


87 


88   TYPE definitions


89  type roi_max_type is array (0 to 8) of std_logic_vector (10 downto 0);


90  type roi_array_type is array (0 to 35) of integer range 0 to 1024;


91  type drs_s_cell_array_type is array (0 to 3) of std_logic_vector (9 downto 0);


92  type adc_data_array_type is array (0 to 3) of std_logic_vector (11 downto 0);


93 


94  type dac_array_type is array (0 to 7) of integer range 0 to 2**16  1;


95  type sensor_array_type is array (0 to 3) of integer range 0 to 2**16  1;


96 


97   constant DEFAULT_ROI : roi_array_type := (115, 125, 100, 102, 155, 101, 0, 101, 106,


98   181, 121, 189, 101, 101, 187, 56, 187, 101,


99   2, 141, 101, 100, 10, 100, 178, 101, 174,


100   12, 181, 100, 102, 101, 102, 0, 101, 108);


101   constant DEFAULT_ROI : roi_array_type := (others => 100);


102  constant DEFAULT_ROI : roi_array_type := (others => 210);


103 


104  constant DEFAULT_DAC : dac_array_type := (20972, 34079, 20526, 0, 28836, 28836, 28836, 28836);


105  constant DEFAULT_DAC : dac_array_type := (others => 0);


106 


107  constant DEFAULT_DRSADDR : std_logic_vector (3 downto 0):= "0000";


108  constant DEFAULT_DRSADDR_MODE : std_logic := '0';


109 


110 


111 


112   Commands


113  constant CMD_START : std_logic_vector := X"C0";


114  constant CMD_STOP : std_logic_vector := X"30";


115  constant CMD_TRIGGER : std_logic_vector := X"A0";


116 


117  constant CMD_TRIGGER_C : std_logic_vector := X"B0";


118  constant CMD_TRIGGER_S : std_logic_vector := X"20";


119  constant CMD_READ : std_logic_vector := X"0A";


120  constant CMD_WRITE : std_logic_vector := X"05";


121 


122  constant CMD_DENABLE : std_logic_vector := X"06";


123  constant CMD_DDISABLE : std_logic_vector := X"07";


124  constant CMD_DWRITE_RUN : std_logic_vector := X"08";


125  constant CMD_DWRITE_STOP : std_logic_vector := X"09";


126  constant CMD_SCLK_ON : std_logic_vector := X"10";


127  constant CMD_SCLK_OFF : std_logic_vector := X"11";


128 


129  constant CMD_PS_DIRINC : std_logic_vector := X"12";


130  constant CMD_PS_DIRDEC : std_logic_vector := X"13";


131  constant CMD_PS_DO : std_logic_vector := X"14";


132 


133  constant CMD_SRCLK_ON : std_logic_vector := X"15";


134  constant CMD_SRCLK_OFF : std_logic_vector := X"16";


135 


136  constant CMD_PS_RESET : std_logic_vector := X"17";


137 


138 


139 


140   Declare functions and procedure


141 


142 


143  end fad_definitions;


144 


145 

