source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd.bak @ 10074

Last change on this file since 10074 was 10074, checked in by neise, 9 years ago
added LED controller
File size: 177.9 KB
Line 
1DocumentHdrVersion "1.1"
2Header (DocumentHdr
3version 2
4dmPackageRefs [
5(DmPackageRef
6library "ieee"
7unitName "std_logic_1164"
8)
9(DmPackageRef
10library "ieee"
11unitName "std_logic_arith"
12)
13(DmPackageRef
14library "IEEE"
15unitName "NUMERIC_STD"
16)
17(DmPackageRef
18library "ieee"
19unitName "std_logic_unsigned"
20)
21(DmPackageRef
22library "FACT_FAD_lib"
23unitName "fad_definitions"
24)
25]
26instances [
27(Instance
28name "I_board_main"
29duLibraryName "FACT_FAD_lib"
30duName "FAD_main"
31elements [
32(GiElement
33name "RAMADDRWIDTH64b"
34type "integer"
35value "LOG2_OF_RAM_SIZE_64B"
36)
37]
38mwi 0
39uid 169,0
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44duName "assignment"
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52duLibraryName "moduleware"
53duName "and"
54elements [
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56mwi 1
57uid 10023,0
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59]
60embeddedInstances [
61(EmbeddedInstance
62name "eb_ID"
63number "1"
64)
65(EmbeddedInstance
66name "ADC_CLK"
67number "2"
68)
69(EmbeddedInstance
70name "ADC_DATA"
71number "3"
72)
73(EmbeddedInstance
74name "SRCLK"
75number "4"
76)
77(EmbeddedInstance
78name "T_CS"
79number "5"
80)
81(EmbeddedInstance
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83number "6"
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95number "9"
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98libraryRefs [
99"ieee"
100"FACT_FAD_lib"
101]
102)
103version "29.1"
104appVersion "2009.2 (Build 10)"
105noEmbeddedEditors 1
106model (BlockDiag
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110variable "HDLDir"
111value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
112)
113(vvPair
114variable "HDSDir"
115value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
116)
117(vvPair
118variable "SideDataDesignDir"
119value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.info"
120)
121(vvPair
122variable "SideDataUserDir"
123value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.user"
124)
125(vvPair
126variable "SourceDir"
127value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
128)
129(vvPair
130variable "appl"
131value "HDL Designer"
132)
133(vvPair
134variable "arch_name"
135value "struct"
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137(vvPair
138variable "config"
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140)
141(vvPair
142variable "d"
143value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board"
144)
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149(vvPair
150variable "date"
151value "04.01.2011"
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158variable "day_long"
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160)
161(vvPair
162variable "dd"
163value "04"
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169(vvPair
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174variable "f"
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178variable "f_logical"
179value "struct.bd"
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181(vvPair
182variable "f_noext"
183value "struct"
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186variable "group"
187value "UNKNOWN"
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189(vvPair
190variable "host"
191value "E5B-LABOR6"
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194variable "language"
195value "VHDL"
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197(vvPair
198variable "library"
199value "FACT_FAD_lib"
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201(vvPair
202variable "library_downstream_HdsLintPlugin"
203value "$HDS_PROJECT_DIR/FACT_FAD_lib/designcheck"
204)
205(vvPair
206variable "library_downstream_ISEPARInvoke"
207value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
208)
209(vvPair
210variable "library_downstream_ImpactInvoke"
211value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
212)
213(vvPair
214variable "library_downstream_ModelSimCompiler"
215value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
216)
217(vvPair
218variable "library_downstream_XSTDataPrep"
219value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
220)
221(vvPair
222variable "mm"
223value "01"
224)
225(vvPair
226variable "module_name"
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244)
245(vvPair
246variable "package_name"
247value "<Undefined Variable>"
248)
249(vvPair
250variable "project_name"
251value "FACT_FAD"
252)
253(vvPair
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255value "HDL Designer Series"
256)
257(vvPair
258variable "task_DesignCompilerPath"
259value "<TBD>"
260)
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265(vvPair
266variable "task_ModelSimPath"
267value "<TBD>"
268)
269(vvPair
270variable "task_NC-SimPath"
271value "<TBD>"
272)
273(vvPair
274variable "task_PrecisionRTLPath"
275value "<TBD>"
276)
277(vvPair
278variable "task_QuestaSimPath"
279value "<TBD>"
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281(vvPair
282variable "task_VCSPath"
283value "<TBD>"
284)
285(vvPair
286variable "this_ext"
287value "bd"
288)
289(vvPair
290variable "this_file"
291value "struct"
292)
293(vvPair
294variable "this_file_logical"
295value "struct"
296)
297(vvPair
298variable "time"
299value "13:01:09"
300)
301(vvPair
302variable "unit"
303value "FAD_Board"
304)
305(vvPair
306variable "user"
307value "dneise"
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309(vvPair
310variable "version"
311value "2009.2 (Build 10)"
312)
313(vvPair
314variable "view"
315value "struct"
316)
317(vvPair
318variable "year"
319value "2011"
320)
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997vasetType 1
998fg "0,65535,0"
999)
1000xt "80000,73625,80750,74375"
1001)
1002tg (CPTG
1003uid 193,0
1004ps "CptPortTextPlaceStrategy"
1005stg "RightVerticalLayoutStrategy"
1006f (Text
1007uid 194,0
1008va (VaSet
1009)
1010xt "76300,73500,79000,74500"
1011st "wiz_int"
1012ju 2
1013blo "79000,74300"
1014)
1015)
1016thePort (LogicalPort
1017decl (Decl
1018n "wiz_int"
1019t "std_logic"
1020o 11
1021suid 31,0
1022)
1023)
1024)
1025*23 (CptPort
1026uid 195,0
1027ps "OnEdgeStrategy"
1028shape (Triangle
1029uid 196,0
1030ro 90
1031va (VaSet
1032vasetType 1
1033fg "0,65535,0"
1034)
1035xt "80000,71625,80750,72375"
1036)
1037tg (CPTG
1038uid 197,0
1039ps "CptPortTextPlaceStrategy"
1040stg "RightVerticalLayoutStrategy"
1041f (Text
1042uid 198,0
1043va (VaSet
1044)
1045xt "76400,71500,79000,72500"
1046st "wiz_rd"
1047ju 2
1048blo "79000,72300"
1049)
1050)
1051thePort (LogicalPort
1052m 1
1053decl (Decl
1054n "wiz_rd"
1055t "std_logic"
1056o 46
1057suid 30,0
1058i "'1'"
1059)
1060)
1061)
1062*24 (CptPort
1063uid 199,0
1064ps "OnEdgeStrategy"
1065shape (Triangle
1066uid 200,0
1067ro 90
1068va (VaSet
1069vasetType 1
1070fg "0,65535,0"
1071)
1072xt "80000,72625,80750,73375"
1073)
1074tg (CPTG
1075uid 201,0
1076ps "CptPortTextPlaceStrategy"
1077stg "RightVerticalLayoutStrategy"
1078f (Text
1079uid 202,0
1080va (VaSet
1081)
1082xt "76300,72500,79000,73500"
1083st "wiz_wr"
1084ju 2
1085blo "79000,73300"
1086)
1087)
1088thePort (LogicalPort
1089m 1
1090decl (Decl
1091n "wiz_wr"
1092t "std_logic"
1093o 48
1094suid 29,0
1095i "'1'"
1096)
1097)
1098)
1099*25 (CptPort
1100uid 1304,0
1101ps "OnEdgeStrategy"
1102shape (Triangle
1103uid 1305,0
1104ro 270
1105va (VaSet
1106vasetType 1
1107fg "0,65535,0"
1108)
1109xt "51250,69625,52000,70375"
1110)
1111tg (CPTG
1112uid 1306,0
1113ps "CptPortTextPlaceStrategy"
1114stg "VerticalLayoutStrategy"
1115f (Text
1116uid 1307,0
1117va (VaSet
1118)
1119xt "53000,69500,57500,70500"
1120st "CLK_25_PS"
1121blo "53000,70300"
1122)
1123)
1124thePort (LogicalPort
1125m 1
1126decl (Decl
1127n "CLK_25_PS"
1128t "std_logic"
1129o 15
1130suid 35,0
1131)
1132)
1133)
1134*26 (CptPort
1135uid 1369,0
1136ps "OnEdgeStrategy"
1137shape (Triangle
1138uid 1370,0
1139ro 270
1140va (VaSet
1141vasetType 1
1142fg "0,65535,0"
1143)
1144xt "51250,68625,52000,69375"
1145)
1146tg (CPTG
1147uid 1371,0
1148ps "CptPortTextPlaceStrategy"
1149stg "VerticalLayoutStrategy"
1150f (Text
1151uid 1372,0
1152va (VaSet
1153)
1154xt "53000,68500,56100,69500"
1155st "CLK_50"
1156blo "53000,69300"
1157)
1158)
1159thePort (LogicalPort
1160m 1
1161decl (Decl
1162n "CLK_50"
1163t "std_logic"
1164o 16
1165suid 37,0
1166)
1167)
1168)
1169*27 (CptPort
1170uid 1385,0
1171ps "OnEdgeStrategy"
1172shape (Triangle
1173uid 1386,0
1174ro 90
1175va (VaSet
1176vasetType 1
1177fg "0,65535,0"
1178)
1179xt "51250,67625,52000,68375"
1180)
1181tg (CPTG
1182uid 1387,0
1183ps "CptPortTextPlaceStrategy"
1184stg "VerticalLayoutStrategy"
1185f (Text
1186uid 1388,0
1187va (VaSet
1188)
1189xt "53000,67500,54900,68500"
1190st "CLK"
1191blo "53000,68300"
1192)
1193)
1194thePort (LogicalPort
1195decl (Decl
1196n "CLK"
1197t "std_logic"
1198o 1
1199suid 38,0
1200)
1201)
1202)
1203*28 (CptPort
1204uid 1389,0
1205ps "OnEdgeStrategy"
1206shape (Triangle
1207uid 1390,0
1208ro 90
1209va (VaSet
1210vasetType 1
1211fg "0,65535,0"
1212)
1213xt "51250,94625,52000,95375"
1214)
1215tg (CPTG
1216uid 1391,0
1217ps "CptPortTextPlaceStrategy"
1218stg "VerticalLayoutStrategy"
1219f (Text
1220uid 1392,0
1221va (VaSet
1222)
1223xt "53000,94500,58900,95500"
1224st "adc_data_array"
1225blo "53000,95300"
1226)
1227)
1228thePort (LogicalPort
1229decl (Decl
1230n "adc_data_array"
1231t "adc_data_array_type"
1232o 6
1233suid 39,0
1234)
1235)
1236)
1237*29 (CptPort
1238uid 1511,0
1239ps "OnEdgeStrategy"
1240shape (Triangle
1241uid 1512,0
1242ro 90
1243va (VaSet
1244vasetType 1
1245fg "0,65535,0"
1246)
1247xt "51250,88625,52000,89375"
1248)
1249tg (CPTG
1250uid 1513,0
1251ps "CptPortTextPlaceStrategy"
1252stg "VerticalLayoutStrategy"
1253f (Text
1254uid 1514,0
1255va (VaSet
1256)
1257xt "53000,88500,61000,89500"
1258st "adc_otr_array : (3:0)"
1259blo "53000,89300"
1260)
1261)
1262thePort (LogicalPort
1263decl (Decl
1264n "adc_otr_array"
1265t "std_logic_vector"
1266b "(3 DOWNTO 0)"
1267o 7
1268suid 40,0
1269)
1270)
1271)
1272*30 (CptPort
1273uid 1572,0
1274ps "OnEdgeStrategy"
1275shape (Triangle
1276uid 1573,0
1277ro 270
1278va (VaSet
1279vasetType 1
1280fg "0,65535,0"
1281)
1282xt "51250,108625,52000,109375"
1283)
1284tg (CPTG
1285uid 1574,0
1286ps "CptPortTextPlaceStrategy"
1287stg "VerticalLayoutStrategy"
1288f (Text
1289uid 1575,0
1290va (VaSet
1291)
1292xt "53000,108500,61500,109500"
1293st "drs_channel_id : (3:0)"
1294blo "53000,109300"
1295)
1296)
1297thePort (LogicalPort
1298m 1
1299decl (Decl
1300n "drs_channel_id"
1301t "std_logic_vector"
1302b "(3 downto 0)"
1303o 33
1304suid 48,0
1305i "(others => '0')"
1306)
1307)
1308)
1309*31 (CptPort
1310uid 1576,0
1311ps "OnEdgeStrategy"
1312shape (Triangle
1313uid 1577,0
1314ro 270
1315va (VaSet
1316vasetType 1
1317fg "0,65535,0"
1318)
1319xt "51250,109625,52000,110375"
1320)
1321tg (CPTG
1322uid 1578,0
1323ps "CptPortTextPlaceStrategy"
1324stg "VerticalLayoutStrategy"
1325f (Text
1326uid 1579,0
1327va (VaSet
1328)
1329xt "53000,109500,57300,110500"
1330st "drs_dwrite"
1331blo "53000,110300"
1332)
1333)
1334thePort (LogicalPort
1335m 1
1336decl (Decl
1337n "drs_dwrite"
1338t "std_logic"
1339o 34
1340suid 49,0
1341i "'1'"
1342)
1343)
1344)
1345*32 (CptPort
1346uid 1588,0
1347ps "OnEdgeStrategy"
1348shape (Triangle
1349uid 1589,0
1350ro 90
1351va (VaSet
1352vasetType 1
1353fg "0,65535,0"
1354)
1355xt "51250,104625,52000,105375"
1356)
1357tg (CPTG
1358uid 1590,0
1359ps "CptPortTextPlaceStrategy"
1360stg "VerticalLayoutStrategy"
1361f (Text
1362uid 1591,0
1363va (VaSet
1364)
1365xt "53000,104500,58400,105500"
1366st "SROUT_in_0"
1367blo "53000,105300"
1368)
1369)
1370thePort (LogicalPort
1371decl (Decl
1372n "SROUT_in_0"
1373t "std_logic"
1374o 2
1375suid 42,0
1376)
1377)
1378)
1379*33 (CptPort
1380uid 1592,0
1381ps "OnEdgeStrategy"
1382shape (Triangle
1383uid 1593,0
1384ro 90
1385va (VaSet
1386vasetType 1
1387fg "0,65535,0"
1388)
1389xt "51250,105625,52000,106375"
1390)
1391tg (CPTG
1392uid 1594,0
1393ps "CptPortTextPlaceStrategy"
1394stg "VerticalLayoutStrategy"
1395f (Text
1396uid 1595,0
1397va (VaSet
1398)
1399xt "53000,105500,58400,106500"
1400st "SROUT_in_1"
1401blo "53000,106300"
1402)
1403)
1404thePort (LogicalPort
1405decl (Decl
1406n "SROUT_in_1"
1407t "std_logic"
1408o 3
1409suid 43,0
1410)
1411)
1412)
1413*34 (CptPort
1414uid 1596,0
1415ps "OnEdgeStrategy"
1416shape (Triangle
1417uid 1597,0
1418ro 90
1419va (VaSet
1420vasetType 1
1421fg "0,65535,0"
1422)
1423xt "51250,106625,52000,107375"
1424)
1425tg (CPTG
1426uid 1598,0
1427ps "CptPortTextPlaceStrategy"
1428stg "VerticalLayoutStrategy"
1429f (Text
1430uid 1599,0
1431va (VaSet
1432)
1433xt "53000,106500,58400,107500"
1434st "SROUT_in_2"
1435blo "53000,107300"
1436)
1437)
1438thePort (LogicalPort
1439decl (Decl
1440n "SROUT_in_2"
1441t "std_logic"
1442o 4
1443suid 44,0
1444)
1445)
1446)
1447*35 (CptPort
1448uid 1600,0
1449ps "OnEdgeStrategy"
1450shape (Triangle
1451uid 1601,0
1452ro 90
1453va (VaSet
1454vasetType 1
1455fg "0,65535,0"
1456)
1457xt "51250,107625,52000,108375"
1458)
1459tg (CPTG
1460uid 1602,0
1461ps "CptPortTextPlaceStrategy"
1462stg "VerticalLayoutStrategy"
1463f (Text
1464uid 1603,0
1465va (VaSet
1466)
1467xt "53000,107500,58400,108500"
1468st "SROUT_in_3"
1469blo "53000,108300"
1470)
1471)
1472thePort (LogicalPort
1473decl (Decl
1474n "SROUT_in_3"
1475t "std_logic"
1476o 5
1477suid 45,0
1478)
1479)
1480)
1481*36 (CptPort
1482uid 2379,0
1483ps "OnEdgeStrategy"
1484shape (Triangle
1485uid 2380,0
1486ro 270
1487va (VaSet
1488vasetType 1
1489fg "0,65535,0"
1490)
1491xt "51250,110625,52000,111375"
1492)
1493tg (CPTG
1494uid 2381,0
1495ps "CptPortTextPlaceStrategy"
1496stg "VerticalLayoutStrategy"
1497f (Text
1498uid 2382,0
1499va (VaSet
1500)
1501xt "53000,110500,57200,111500"
1502st "RSRLOAD"
1503blo "53000,111300"
1504)
1505)
1506thePort (LogicalPort
1507m 1
1508decl (Decl
1509n "RSRLOAD"
1510t "std_logic"
1511o 25
1512suid 56,0
1513i "'0'"
1514)
1515)
1516)
1517*37 (CptPort
1518uid 2383,0
1519ps "OnEdgeStrategy"
1520shape (Triangle
1521uid 2384,0
1522ro 270
1523va (VaSet
1524vasetType 1
1525fg "0,65535,0"
1526)
1527xt "51250,112625,52000,113375"
1528)
1529tg (CPTG
1530uid 2385,0
1531ps "CptPortTextPlaceStrategy"
1532stg "VerticalLayoutStrategy"
1533f (Text
1534uid 2386,0
1535va (VaSet
1536)
1537xt "53000,112500,56000,113500"
1538st "SRCLK"
1539blo "53000,113300"
1540)
1541)
1542thePort (LogicalPort
1543m 1
1544decl (Decl
1545n "SRCLK"
1546t "std_logic"
1547o 26
1548suid 57,0
1549i "'0'"
1550)
1551)
1552)
1553*38 (CptPort
1554uid 2969,0
1555ps "OnEdgeStrategy"
1556shape (Triangle
1557uid 2970,0
1558ro 90
1559va (VaSet
1560vasetType 1
1561fg "0,65535,0"
1562)
1563xt "80000,86625,80750,87375"
1564)
1565tg (CPTG
1566uid 2971,0
1567ps "CptPortTextPlaceStrategy"
1568stg "RightVerticalLayoutStrategy"
1569f (Text
1570uid 2972,0
1571va (VaSet
1572)
1573xt "76200,86500,79000,87500"
1574st "dac_cs"
1575ju 2
1576blo "79000,87300"
1577)
1578)
1579thePort (LogicalPort
1580m 1
1581decl (Decl
1582n "dac_cs"
1583t "std_logic"
1584o 31
1585suid 64,0
1586)
1587)
1588)
1589*39 (CptPort
1590uid 2973,0
1591ps "OnEdgeStrategy"
1592shape (Triangle
1593uid 2974,0
1594ro 90
1595va (VaSet
1596vasetType 1
1597fg "0,65535,0"
1598)
1599xt "80000,97625,80750,98375"
1600)
1601tg (CPTG
1602uid 2975,0
1603ps "CptPortTextPlaceStrategy"
1604stg "RightVerticalLayoutStrategy"
1605f (Text
1606uid 2976,0
1607va (VaSet
1608)
1609xt "77300,97500,79000,98500"
1610st "sclk"
1611ju 2
1612blo "79000,98300"
1613)
1614)
1615thePort (LogicalPort
1616m 1
1617decl (Decl
1618n "sclk"
1619t "std_logic"
1620o 41
1621suid 62,0
1622)
1623)
1624)
1625*40 (CptPort
1626uid 2977,0
1627ps "OnEdgeStrategy"
1628shape (Triangle
1629uid 2978,0
1630ro 90
1631va (VaSet
1632vasetType 1
1633fg "0,65535,0"
1634)
1635xt "80000,88625,80750,89375"
1636)
1637tg (CPTG
1638uid 2979,0
1639ps "CptPortTextPlaceStrategy"
1640stg "RightVerticalLayoutStrategy"
1641f (Text
1642uid 2980,0
1643va (VaSet
1644)
1645xt "72500,88500,79000,89500"
1646st "sensor_cs : (3:0)"
1647ju 2
1648blo "79000,89300"
1649)
1650)
1651thePort (LogicalPort
1652m 1
1653decl (Decl
1654n "sensor_cs"
1655t "std_logic_vector"
1656b "(3 DOWNTO 0)"
1657o 42
1658suid 65,0
1659)
1660)
1661)
1662*41 (CptPort
1663uid 2981,0
1664ps "OnEdgeStrategy"
1665shape (Diamond
1666uid 2982,0
1667ro 90
1668va (VaSet
1669vasetType 1
1670fg "0,65535,0"
1671)
1672xt "80000,98625,80750,99375"
1673)
1674tg (CPTG
1675uid 2983,0
1676ps "CptPortTextPlaceStrategy"
1677stg "RightVerticalLayoutStrategy"
1678f (Text
1679uid 2984,0
1680va (VaSet
1681)
1682xt "77600,98500,79000,99500"
1683st "sio"
1684ju 2
1685blo "79000,99300"
1686)
1687)
1688thePort (LogicalPort
1689m 2
1690decl (Decl
1691n "sio"
1692t "std_logic"
1693preAdd 0
1694posAdd 0
1695o 49
1696suid 63,0
1697)
1698)
1699)
1700*42 (CptPort
1701uid 3670,0
1702ps "OnEdgeStrategy"
1703shape (Triangle
1704uid 3671,0
1705ro 90
1706va (VaSet
1707vasetType 1
1708fg "0,65535,0"
1709)
1710xt "80000,99625,80750,100375"
1711)
1712tg (CPTG
1713uid 3672,0
1714ps "CptPortTextPlaceStrategy"
1715stg "RightVerticalLayoutStrategy"
1716f (Text
1717uid 3673,0
1718va (VaSet
1719)
1720xt "77000,99500,79000,100500"
1721st "mosi"
1722ju 2
1723blo "79000,100300"
1724)
1725)
1726thePort (LogicalPort
1727m 1
1728decl (Decl
1729n "mosi"
1730t "std_logic"
1731o 37
1732suid 66,0
1733i "'0'"
1734)
1735)
1736)
1737*43 (CptPort
1738uid 6427,0
1739ps "OnEdgeStrategy"
1740shape (Triangle
1741uid 6428,0
1742ro 90
1743va (VaSet
1744vasetType 1
1745fg "0,65535,0"
1746)
1747xt "80000,120625,80750,121375"
1748)
1749tg (CPTG
1750uid 6429,0
1751ps "CptPortTextPlaceStrategy"
1752stg "RightVerticalLayoutStrategy"
1753f (Text
1754uid 6430,0
1755va (VaSet
1756)
1757xt "76000,120500,79000,121500"
1758st "denable"
1759ju 2
1760blo "79000,121300"
1761)
1762)
1763thePort (LogicalPort
1764m 1
1765decl (Decl
1766n "denable"
1767t "std_logic"
1768eolc "-- default domino wave off"
1769posAdd 0
1770o 32
1771suid 67,0
1772i "'0'"
1773)
1774)
1775)
1776*44 (CptPort
1777uid 10046,0
1778ps "OnEdgeStrategy"
1779shape (Triangle
1780uid 10047,0
1781ro 270
1782va (VaSet
1783vasetType 1
1784fg "0,65535,0"
1785)
1786xt "51250,72625,52000,73375"
1787)
1788tg (CPTG
1789uid 10048,0
1790ps "CptPortTextPlaceStrategy"
1791stg "VerticalLayoutStrategy"
1792f (Text
1793uid 10049,0
1794va (VaSet
1795)
1796xt "53000,72500,57500,73500"
1797st "adc_clk_en"
1798blo "53000,73300"
1799)
1800)
1801thePort (LogicalPort
1802m 1
1803decl (Decl
1804n "adc_clk_en"
1805t "std_logic"
1806o 28
1807suid 69,0
1808i "'0'"
1809)
1810)
1811)
1812*45 (CptPort
1813uid 10246,0
1814ps "OnEdgeStrategy"
1815shape (Triangle
1816uid 10247,0
1817ro 90
1818va (VaSet
1819vasetType 1
1820fg "0,65535,0"
1821)
1822xt "80000,129625,80750,130375"
1823)
1824tg (CPTG
1825uid 10248,0
1826ps "CptPortTextPlaceStrategy"
1827stg "RightVerticalLayoutStrategy"
1828f (Text
1829uid 10249,0
1830va (VaSet
1831)
1832xt "73800,129500,79000,130500"
1833st "DCM_locked"
1834ju 2
1835blo "79000,130300"
1836)
1837)
1838thePort (LogicalPort
1839m 1
1840decl (Decl
1841n "DCM_locked"
1842t "std_logic"
1843preAdd 0
1844posAdd 0
1845o 17
1846suid 76,0
1847)
1848)
1849)
1850*46 (CptPort
1851uid 10254,0
1852ps "OnEdgeStrategy"
1853shape (Triangle
1854uid 10255,0
1855ro 90
1856va (VaSet
1857vasetType 1
1858fg "0,65535,0"
1859)
1860xt "80000,135625,80750,136375"
1861)
1862tg (CPTG
1863uid 10256,0
1864ps "CptPortTextPlaceStrategy"
1865stg "RightVerticalLayoutStrategy"
1866f (Text
1867uid 10257,0
1868va (VaSet
1869)
1870xt "71300,135500,79000,136500"
1871st "LOCKED_extraOUT"
1872ju 2
1873blo "79000,136300"
1874)
1875)
1876thePort (LogicalPort
1877m 1
1878decl (Decl
1879n "LOCKED_extraOUT"
1880t "std_logic"
1881o 18
1882suid 70,0
1883)
1884)
1885)
1886*47 (CptPort
1887uid 10258,0
1888ps "OnEdgeStrategy"
1889shape (Triangle
1890uid 10259,0
1891ro 90
1892va (VaSet
1893vasetType 1
1894fg "0,65535,0"
1895)
1896xt "80000,138625,80750,139375"
1897)
1898tg (CPTG
1899uid 10260,0
1900ps "CptPortTextPlaceStrategy"
1901stg "RightVerticalLayoutStrategy"
1902f (Text
1903uid 10261,0
1904va (VaSet
1905)
1906xt "74200,138500,79000,139500"
1907st "offset : (7:0)"
1908ju 2
1909blo "79000,139300"
1910)
1911)
1912thePort (LogicalPort
1913m 1
1914decl (Decl
1915n "offset"
1916t "std_logic_vector"
1917b "(7 downto 0)"
1918preAdd 0
1919posAdd 0
1920o 38
1921suid 77,0
1922i "(OTHERS => '0')"
1923)
1924)
1925)
1926*48 (CptPort
1927uid 10262,0
1928ps "OnEdgeStrategy"
1929shape (Triangle
1930uid 10263,0
1931ro 90
1932va (VaSet
1933vasetType 1
1934fg "0,65535,0"
1935)
1936xt "80000,125625,80750,126375"
1937)
1938tg (CPTG
1939uid 10264,0
1940ps "CptPortTextPlaceStrategy"
1941stg "RightVerticalLayoutStrategy"
1942f (Text
1943uid 10265,0
1944va (VaSet
1945)
1946xt "74600,125500,79000,126500"
1947st "PS_DIR_IN"
1948ju 2
1949blo "79000,126300"
1950)
1951)
1952thePort (LogicalPort
1953m 1
1954decl (Decl
1955n "PS_DIR_IN"
1956t "std_logic"
1957o 23
1958suid 80,0
1959)
1960)
1961)
1962*49 (CptPort
1963uid 10266,0
1964ps "OnEdgeStrategy"
1965shape (Triangle
1966uid 10267,0
1967ro 90
1968va (VaSet
1969vasetType 1
1970fg "0,65535,0"
1971)
1972xt "80000,126625,80750,127375"
1973)
1974tg (CPTG
1975uid 10268,0
1976ps "CptPortTextPlaceStrategy"
1977stg "RightVerticalLayoutStrategy"
1978f (Text
1979uid 10269,0
1980va (VaSet
1981)
1982xt "74800,126500,79000,127500"
1983st "PS_DO_IN"
1984ju 2
1985blo "79000,127300"
1986)
1987)
1988thePort (LogicalPort
1989m 1
1990decl (Decl
1991n "PS_DO_IN"
1992t "std_logic"
1993o 24
1994suid 81,0
1995)
1996)
1997)
1998*50 (CptPort
1999uid 10270,0
2000ps "OnEdgeStrategy"
2001shape (Triangle
2002uid 10271,0
2003ro 90
2004va (VaSet
2005vasetType 1
2006fg "0,65535,0"
2007)
2008xt "80000,134625,80750,135375"
2009)
2010tg (CPTG
2011uid 10272,0
2012ps "CptPortTextPlaceStrategy"
2013stg "RightVerticalLayoutStrategy"
2014f (Text
2015uid 10273,0
2016va (VaSet
2017)
2018xt "74000,134500,79000,135500"
2019st "PSCLK_OUT"
2020ju 2
2021blo "79000,135300"
2022)
2023)
2024thePort (LogicalPort
2025m 1
2026decl (Decl
2027n "PSCLK_OUT"
2028t "std_logic"
2029o 19
2030suid 74,0
2031)
2032)
2033)
2034*51 (CptPort
2035uid 10274,0
2036ps "OnEdgeStrategy"
2037shape (Triangle
2038uid 10275,0
2039ro 90
2040va (VaSet
2041vasetType 1
2042fg "0,65535,0"
2043)
2044xt "80000,133625,80750,134375"
2045)
2046tg (CPTG
2047uid 10276,0
2048ps "CptPortTextPlaceStrategy"
2049stg "RightVerticalLayoutStrategy"
2050f (Text
2051uid 10277,0
2052va (VaSet
2053)
2054xt "71200,133500,79000,134500"
2055st "PSDONE_extraOUT"
2056ju 2
2057blo "79000,134300"
2058)
2059)
2060thePort (LogicalPort
2061m 1
2062decl (Decl
2063n "PSDONE_extraOUT"
2064t "std_logic"
2065o 20
2066suid 71,0
2067)
2068)
2069)
2070*52 (CptPort
2071uid 10278,0
2072ps "OnEdgeStrategy"
2073shape (Triangle
2074uid 10279,0
2075ro 90
2076va (VaSet
2077vasetType 1
2078fg "0,65535,0"
2079)
2080xt "80000,128625,80750,129375"
2081)
2082tg (CPTG
2083uid 10280,0
2084ps "CptPortTextPlaceStrategy"
2085stg "RightVerticalLayoutStrategy"
2086f (Text
2087uid 10281,0
2088va (VaSet
2089)
2090xt "74400,128500,79000,129500"
2091st "PSEN_OUT"
2092ju 2
2093blo "79000,129300"
2094)
2095)
2096thePort (LogicalPort
2097m 1
2098decl (Decl
2099n "PSEN_OUT"
2100t "std_logic"
2101o 21
2102suid 73,0
2103)
2104)
2105)
2106*53 (CptPort
2107uid 10282,0
2108ps "OnEdgeStrategy"
2109shape (Triangle
2110uid 10283,0
2111ro 90
2112va (VaSet
2113vasetType 1
2114fg "0,65535,0"
2115)
2116xt "80000,127625,80750,128375"
2117)
2118tg (CPTG
2119uid 10284,0
2120ps "CptPortTextPlaceStrategy"
2121stg "RightVerticalLayoutStrategy"
2122f (Text
2123uid 10285,0
2124va (VaSet
2125)
2126xt "72000,127500,79000,128500"
2127st "PSINCDEC_OUT"
2128ju 2
2129blo "79000,128300"
2130)
2131)
2132thePort (LogicalPort
2133m 1
2134decl (Decl
2135n "PSINCDEC_OUT"
2136t "std_logic"
2137o 22
2138suid 72,0
2139)
2140)
2141)
2142*54 (CptPort
2143uid 10286,0
2144ps "OnEdgeStrategy"
2145shape (Triangle
2146uid 10287,0
2147ro 90
2148va (VaSet
2149vasetType 1
2150fg "0,65535,0"
2151)
2152xt "80000,131625,80750,132375"
2153)
2154tg (CPTG
2155uid 10288,0
2156ps "CptPortTextPlaceStrategy"
2157stg "RightVerticalLayoutStrategy"
2158f (Text
2159uid 10289,0
2160va (VaSet
2161)
2162xt "76800,131500,79000,132500"
2163st "ready"
2164ju 2
2165blo "79000,132300"
2166)
2167)
2168thePort (LogicalPort
2169m 1
2170decl (Decl
2171n "ready"
2172t "std_logic"
2173preAdd 0
2174posAdd 0
2175o 39
2176suid 79,0
2177i "'0'"
2178)
2179)
2180)
2181*55 (CptPort
2182uid 10290,0
2183ps "OnEdgeStrategy"
2184shape (Triangle
2185uid 10291,0
2186ro 90
2187va (VaSet
2188vasetType 1
2189fg "0,65535,0"
2190)
2191xt "80000,132625,80750,133375"
2192)
2193tg (CPTG
2194uid 10292,0
2195ps "CptPortTextPlaceStrategy"
2196stg "RightVerticalLayoutStrategy"
2197f (Text
2198uid 10293,0
2199va (VaSet
2200)
2201xt "76100,132500,79000,133500"
2202st "shifting"
2203ju 2
2204blo "79000,133300"
2205)
2206)
2207thePort (LogicalPort
2208m 1
2209decl (Decl
2210n "shifting"
2211t "std_logic"
2212prec "-- status:"
2213preAdd 0
2214posAdd 0
2215o 43
2216suid 78,0
2217i "'0'"
2218)
2219)
2220)
2221*56 (CptPort
2222uid 10320,0
2223ps "OnEdgeStrategy"
2224shape (Triangle
2225uid 10321,0
2226ro 90
2227va (VaSet
2228vasetType 1
2229fg "0,65535,0"
2230)
2231xt "80000,123625,80750,124375"
2232)
2233tg (CPTG
2234uid 10322,0
2235ps "CptPortTextPlaceStrategy"
2236stg "RightVerticalLayoutStrategy"
2237f (Text
2238uid 10323,0
2239va (VaSet
2240)
2241xt "74200,123500,79000,124500"
2242st "CLK25_OUT"
2243ju 2
2244blo "79000,124300"
2245)
2246)
2247thePort (LogicalPort
2248m 1
2249decl (Decl
2250n "CLK25_OUT"
2251t "std_logic"
2252o 12
2253suid 83,0
2254)
2255)
2256)
2257*57 (CptPort
2258uid 10324,0
2259ps "OnEdgeStrategy"
2260shape (Triangle
2261uid 10325,0
2262ro 90
2263va (VaSet
2264vasetType 1
2265fg "0,65535,0"
2266)
2267xt "80000,124625,80750,125375"
2268)
2269tg (CPTG
2270uid 10326,0
2271ps "CptPortTextPlaceStrategy"
2272stg "RightVerticalLayoutStrategy"
2273f (Text
2274uid 10327,0
2275va (VaSet
2276)
2277xt "72800,124500,79000,125500"
2278st "CLK25_PSOUT"
2279ju 2
2280blo "79000,125300"
2281)
2282)
2283thePort (LogicalPort
2284m 1
2285decl (Decl
2286n "CLK25_PSOUT"
2287t "std_logic"
2288o 13
2289suid 84,0
2290)
2291)
2292)
2293*58 (CptPort
2294uid 10328,0
2295ps "OnEdgeStrategy"
2296shape (Triangle
2297uid 10329,0
2298ro 90
2299va (VaSet
2300vasetType 1
2301fg "0,65535,0"
2302)
2303xt "80000,122625,80750,123375"
2304)
2305tg (CPTG
2306uid 10330,0
2307ps "CptPortTextPlaceStrategy"
2308stg "RightVerticalLayoutStrategy"
2309f (Text
2310uid 10331,0
2311va (VaSet
2312)
2313xt "74200,122500,79000,123500"
2314st "CLK50_OUT"
2315ju 2
2316blo "79000,123300"
2317)
2318)
2319thePort (LogicalPort
2320m 1
2321decl (Decl
2322n "CLK50_OUT"
2323t "std_logic"
2324o 14
2325suid 82,0
2326)
2327)
2328)
2329*59 (CptPort
2330uid 12314,0
2331ps "OnEdgeStrategy"
2332shape (Triangle
2333uid 12315,0
2334ro 90
2335va (VaSet
2336vasetType 1
2337fg "0,65535,0"
2338)
2339xt "80000,139625,80750,140375"
2340)
2341tg (CPTG
2342uid 12316,0
2343ps "CptPortTextPlaceStrategy"
2344stg "RightVerticalLayoutStrategy"
2345f (Text
2346uid 12317,0
2347va (VaSet
2348)
2349xt "75300,139500,79000,140500"
2350st "SRIN_out"
2351ju 2
2352blo "79000,140300"
2353)
2354)
2355thePort (LogicalPort
2356m 1
2357decl (Decl
2358n "SRIN_out"
2359t "std_logic"
2360o 27
2361suid 85,0
2362i "'0'"
2363)
2364)
2365)
2366*60 (CptPort
2367uid 12521,0
2368ps "OnEdgeStrategy"
2369shape (Triangle
2370uid 12522,0
2371ro 90
2372va (VaSet
2373vasetType 1
2374fg "0,65535,0"
2375)
2376xt "80000,140625,80750,141375"
2377)
2378tg (CPTG
2379uid 12523,0
2380ps "CptPortTextPlaceStrategy"
2381stg "RightVerticalLayoutStrategy"
2382f (Text
2383uid 12524,0
2384va (VaSet
2385)
2386xt "76500,140500,79000,141500"
2387st "amber"
2388ju 2
2389blo "79000,141300"
2390)
2391)
2392thePort (LogicalPort
2393m 1
2394decl (Decl
2395n "amber"
2396t "std_logic"
2397o 30
2398suid 87,0
2399)
2400)
2401)
2402*61 (CptPort
2403uid 12525,0
2404ps "OnEdgeStrategy"
2405shape (Triangle
2406uid 12526,0
2407ro 90
2408va (VaSet
2409vasetType 1
2410fg "0,65535,0"
2411)
2412xt "80000,141625,80750,142375"
2413)
2414tg (CPTG
2415uid 12527,0
2416ps "CptPortTextPlaceStrategy"
2417stg "RightVerticalLayoutStrategy"
2418f (Text
2419uid 12528,0
2420va (VaSet
2421)
2422xt "76600,141500,79000,142500"
2423st "green"
2424ju 2
2425blo "79000,142300"
2426)
2427)
2428thePort (LogicalPort
2429m 1
2430decl (Decl
2431n "green"
2432t "std_logic"
2433o 35
2434suid 86,0
2435)
2436)
2437)
2438*62 (CptPort
2439uid 12529,0
2440ps "OnEdgeStrategy"
2441shape (Triangle
2442uid 12530,0
2443ro 90
2444va (VaSet
2445vasetType 1
2446fg "0,65535,0"
2447)
2448xt "80000,142625,80750,143375"
2449)
2450tg (CPTG
2451uid 12531,0
2452ps "CptPortTextPlaceStrategy"
2453stg "RightVerticalLayoutStrategy"
2454f (Text
2455uid 12532,0
2456va (VaSet
2457)
2458xt "77500,142500,79000,143500"
2459st "red"
2460ju 2
2461blo "79000,143300"
2462)
2463)
2464thePort (LogicalPort
2465m 1
2466decl (Decl
2467n "red"
2468t "std_logic"
2469o 40
2470suid 88,0
2471)
2472)
2473)
2474]
2475shape (Rectangle
2476uid 170,0
2477va (VaSet
2478vasetType 1
2479fg "0,65535,0"
2480lineColor "0,32896,0"
2481lineWidth 2
2482)
2483xt "52000,66000,80000,144000"
2484)
2485oxt "15000,-1000,43000,27000"
2486ttg (MlTextGroup
2487uid 171,0
2488ps "CenterOffsetStrategy"
2489stg "VerticalLayoutStrategy"
2490textVec [
2491*63 (Text
2492uid 172,0
2493va (VaSet
2494font "Arial,8,1"
2495)
2496xt "52200,123000,58400,124000"
2497st "FACT_FAD_lib"
2498blo "52200,123800"
2499tm "BdLibraryNameMgr"
2500)
2501*64 (Text
2502uid 173,0
2503va (VaSet
2504font "Arial,8,1"
2505)
2506xt "52200,124000,56400,125000"
2507st "FAD_main"
2508blo "52200,124800"
2509tm "CptNameMgr"
2510)
2511*65 (Text
2512uid 174,0
2513va (VaSet
2514font "Arial,8,1"
2515)
2516xt "52200,125000,58000,126000"
2517st "I_board_main"
2518blo "52200,125800"
2519tm "InstanceNameMgr"
2520)
2521]
2522)
2523ga (GenericAssociation
2524uid 175,0
2525ps "EdgeToEdgeStrategy"
2526matrix (Matrix
2527uid 176,0
2528text (MLText
2529uid 177,0
2530va (VaSet
2531font "Courier New,8,0"
2532)
2533xt "52000,65200,81500,66000"
2534st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B    ( integer )  "
2535)
2536header ""
2537)
2538elements [
2539(GiElement
2540name "RAMADDRWIDTH64b"
2541type "integer"
2542value "LOG2_OF_RAM_SIZE_64B"
2543)
2544]
2545)
2546viewicon (ZoomableIcon
2547uid 178,0
2548sl 0
2549va (VaSet
2550vasetType 1
2551fg "49152,49152,49152"
2552)
2553xt "52250,142250,53750,143750"
2554iconName "BlockDiagram.png"
2555iconMaskName "BlockDiagram.msk"
2556ftype 1
2557)
2558viewiconposition 0
2559portVis (PortSigDisplay
2560)
2561archFileType "UNKNOWN"
2562)
2563*66 (PortIoIn
2564uid 231,0
2565shape (CompositeShape
2566uid 232,0
2567va (VaSet
2568vasetType 1
2569fg "0,0,32768"
2570)
2571optionalChildren [
2572(Pentagon
2573uid 233,0
2574sl 0
2575ro 270
2576xt "20000,77625,21500,78375"
2577)
2578(Line
2579uid 234,0
2580sl 0
2581ro 270
2582xt "21500,78000,22000,78000"
2583pts [
2584"21500,78000"
2585"22000,78000"
2586]
2587)
2588]
2589)
2590stc 0
2591sf 1
2592tg (WTG
2593uid 235,0
2594ps "PortIoTextPlaceStrategy"
2595stg "STSignalDisplayStrategy"
2596f (Text
2597uid 236,0
2598va (VaSet
2599)
2600xt "16900,77500,19000,78500"
2601st "TRG"
2602ju 2
2603blo "19000,78300"
2604tm "WireNameMgr"
2605)
2606)
2607)
2608*67 (PortIoIn
2609uid 251,0
2610shape (CompositeShape
2611uid 252,0
2612va (VaSet
2613vasetType 1
2614fg "0,0,32768"
2615)
2616optionalChildren [
2617(Pentagon
2618uid 253,0
2619sl 0
2620ro 270
2621xt "19000,67625,20500,68375"
2622)
2623(Line
2624uid 254,0
2625sl 0
2626ro 270
2627xt "20500,68000,21000,68000"
2628pts [
2629"20500,68000"
2630"21000,68000"
2631]
2632)
2633]
2634)
2635stc 0
2636sf 1
2637tg (WTG
2638uid 255,0
2639ps "PortIoTextPlaceStrategy"
2640stg "STSignalDisplayStrategy"
2641f (Text
2642uid 256,0
2643va (VaSet
2644)
2645xt "15200,67500,18000,68500"
2646st "X_50M"
2647ju 2
2648blo "18000,68300"
2649tm "WireNameMgr"
2650)
2651)
2652)
2653*68 (HdlText
2654uid 265,0
2655optionalChildren [
2656*69 (EmbeddedText
2657uid 271,0
2658commentText (CommentText
2659uid 272,0
2660ps "CenterOffsetStrategy"
2661shape (Rectangle
2662uid 273,0
2663va (VaSet
2664vasetType 1
2665fg "65535,65535,65535"
2666lineColor "0,0,32768"
2667lineWidth 2
2668)
2669xt "32000,83000,44000,87000"
2670)
2671oxt "12000,27000,20000,31000"
2672text (MLText
2673uid 274,0
2674va (VaSet
2675)
2676xt "32200,83200,39700,86200"
2677st "
2678-- hard-wired IDs
2679board_id <= \"0101\";
2680crate_id <= \"01\";
2681"
2682tm "HdlTextMgr"
2683wrapOption 3
2684visibleHeight 4000
2685visibleWidth 12000
2686)
2687)
2688)
2689]
2690shape (Rectangle
2691uid 266,0
2692va (VaSet
2693vasetType 1
2694fg "65535,65535,37120"
2695lineColor "0,0,32768"
2696lineWidth 2
2697)
2698xt "24000,80000,32000,87000"
2699)
2700oxt "12000,23000,17000,27000"
2701ttg (MlTextGroup
2702uid 267,0
2703ps "CenterOffsetStrategy"
2704stg "VerticalLayoutStrategy"
2705textVec [
2706*70 (Text
2707uid 268,0
2708va (VaSet
2709font "Arial,8,1"
2710)
2711xt "26150,81000,28650,82000"
2712st "eb_ID"
2713blo "26150,81800"
2714tm "HdlTextNameMgr"
2715)
2716*71 (Text
2717uid 269,0
2718va (VaSet
2719font "Arial,8,1"
2720)
2721xt "26150,82000,26950,83000"
2722st "1"
2723blo "26150,82800"
2724tm "HdlTextNumberMgr"
2725)
2726]
2727)
2728viewicon (ZoomableIcon
2729uid 270,0
2730sl 0
2731va (VaSet
2732vasetType 1
2733fg "49152,49152,49152"
2734)
2735xt "24250,85250,25750,86750"
2736iconName "TextFile.png"
2737iconMaskName "TextFile.msk"
2738ftype 21
2739)
2740viewiconposition 0
2741)
2742*72 (Net
2743uid 275,0
2744decl (Decl
2745n "board_id"
2746t "std_logic_vector"
2747b "(3 downto 0)"
2748preAdd 0
2749posAdd 0
2750o 73
2751suid 5,0
2752)
2753declText (MLText
2754uid 276,0
2755va (VaSet
2756font "Courier New,8,0"
2757)
2758xt "39000,62400,67500,63200"
2759st "SIGNAL board_id        : std_logic_vector(3 downto 0)
2760"
2761)
2762)
2763*73 (Net
2764uid 283,0
2765decl (Decl
2766n "crate_id"
2767t "std_logic_vector"
2768b "(1 downto 0)"
2769o 74
2770suid 6,0
2771)
2772declText (MLText
2773uid 284,0
2774va (VaSet
2775font "Courier New,8,0"
2776)
2777xt "39000,63200,67500,64000"
2778st "SIGNAL crate_id        : std_logic_vector(1 downto 0)
2779"
2780)
2781)
2782*74 (PortIoOut
2783uid 472,0
2784shape (CompositeShape
2785uid 473,0
2786va (VaSet
2787vasetType 1
2788fg "0,0,32768"
2789)
2790optionalChildren [
2791(Pentagon
2792uid 474,0
2793sl 0
2794ro 270
2795xt "111500,70625,113000,71375"
2796)
2797(Line
2798uid 475,0
2799sl 0
2800ro 270
2801xt "111000,71000,111500,71000"
2802pts [
2803"111000,71000"
2804"111500,71000"
2805]
2806)
2807]
2808)
2809stc 0
2810sf 1
2811tg (WTG
2812uid 476,0
2813ps "PortIoTextPlaceStrategy"
2814stg "STSignalDisplayStrategy"
2815f (Text
2816uid 477,0
2817va (VaSet
2818)
2819xt "114000,70500,117100,71500"
2820st "W_RES"
2821blo "114000,71300"
2822tm "WireNameMgr"
2823)
2824)
2825)
2826*75 (PortIoOut
2827uid 478,0
2828shape (CompositeShape
2829uid 479,0
2830va (VaSet
2831vasetType 1
2832fg "0,0,32768"
2833)
2834optionalChildren [
2835(Pentagon
2836uid 480,0
2837sl 0
2838ro 270
2839xt "111500,67625,113000,68375"
2840)
2841(Line
2842uid 481,0
2843sl 0
2844ro 270
2845xt "111000,68000,111500,68000"
2846pts [
2847"111000,68000"
2848"111500,68000"
2849]
2850)
2851]
2852)
2853stc 0
2854sf 1
2855tg (WTG
2856uid 482,0
2857ps "PortIoTextPlaceStrategy"
2858stg "STSignalDisplayStrategy"
2859f (Text
2860uid 483,0
2861va (VaSet
2862)
2863xt "114000,67500,116000,68500"
2864st "W_A"
2865blo "114000,68300"
2866tm "WireNameMgr"
2867)
2868)
2869)
2870*76 (PortIoOut
2871uid 484,0
2872shape (CompositeShape
2873uid 485,0
2874va (VaSet
2875vasetType 1
2876fg "0,0,32768"
2877)
2878optionalChildren [
2879(Pentagon
2880uid 486,0
2881sl 0
2882ro 270
2883xt "111500,74625,113000,75375"
2884)
2885(Line
2886uid 487,0
2887sl 0
2888ro 270
2889xt "111000,75000,111500,75000"
2890pts [
2891"111000,75000"
2892"111500,75000"
2893]
2894)
2895]
2896)
2897stc 0
2898sf 1
2899tg (WTG
2900uid 488,0
2901ps "PortIoTextPlaceStrategy"
2902stg "STSignalDisplayStrategy"
2903f (Text
2904uid 489,0
2905va (VaSet
2906)
2907xt "114000,74500,116600,75500"
2908st "W_CS"
2909blo "114000,75300"
2910tm "WireNameMgr"
2911)
2912)
2913)
2914*77 (PortIoInOut
2915uid 490,0
2916shape (CompositeShape
2917uid 491,0
2918va (VaSet
2919vasetType 1
2920fg "0,0,32768"
2921)
2922optionalChildren [
2923(Hexagon
2924uid 492,0
2925sl 0
2926xt "111500,68625,113000,69375"
2927)
2928(Line
2929uid 493,0
2930sl 0
2931xt "111000,69000,111500,69000"
2932pts [
2933"111000,69000"
2934"111500,69000"
2935]
2936)
2937]
2938)
2939stc 0
2940sf 1
2941tg (WTG
2942uid 494,0
2943ps "PortIoTextPlaceStrategy"
2944stg "STSignalDisplayStrategy"
2945f (Text
2946uid 495,0
2947va (VaSet
2948)
2949xt "114000,68500,116100,69500"
2950st "W_D"
2951blo "114000,69300"
2952tm "WireNameMgr"
2953)
2954)
2955)
2956*78 (PortIoIn
2957uid 496,0
2958shape (CompositeShape
2959uid 497,0
2960va (VaSet
2961vasetType 1
2962fg "0,0,32768"
2963)
2964optionalChildren [
2965(Pentagon
2966uid 498,0
2967sl 0
2968ro 90
2969xt "111500,73625,113000,74375"
2970)
2971(Line
2972uid 499,0
2973sl 0
2974ro 90
2975xt "111000,74000,111500,74000"
2976pts [
2977"111500,74000"
2978"111000,74000"
2979]
2980)
2981]
2982)
2983stc 0
2984sf 1
2985tg (WTG
2986uid 500,0
2987ps "PortIoTextPlaceStrategy"
2988stg "STSignalDisplayStrategy"
2989f (Text
2990uid 501,0
2991va (VaSet
2992)
2993xt "114000,73500,116800,74500"
2994st "W_INT"
2995blo "114000,74300"
2996tm "WireNameMgr"
2997)
2998)
2999)
3000*79 (PortIoOut
3001uid 502,0
3002shape (CompositeShape
3003uid 503,0
3004va (VaSet
3005vasetType 1
3006fg "0,0,32768"
3007)
3008optionalChildren [
3009(Pentagon
3010uid 504,0
3011sl 0
3012ro 270
3013xt "111500,71625,113000,72375"
3014)
3015(Line
3016uid 505,0
3017sl 0
3018ro 270
3019xt "111000,72000,111500,72000"
3020pts [
3021"111000,72000"
3022"111500,72000"
3023]
3024)
3025]
3026)
3027stc 0
3028sf 1
3029tg (WTG
3030uid 506,0
3031ps "PortIoTextPlaceStrategy"
3032stg "STSignalDisplayStrategy"
3033f (Text
3034uid 507,0
3035va (VaSet
3036)
3037xt "114000,71500,116700,72500"
3038st "W_RD"
3039blo "114000,72300"
3040tm "WireNameMgr"
3041)
3042)
3043)
3044*80 (PortIoOut
3045uid 508,0
3046shape (CompositeShape
3047uid 509,0
3048va (VaSet
3049vasetType 1
3050fg "0,0,32768"
3051)
3052optionalChildren [
3053(Pentagon
3054uid 510,0
3055sl 0
3056ro 270
3057xt "111500,72625,113000,73375"
3058)
3059(Line
3060uid 511,0
3061sl 0
3062ro 270
3063xt "111000,73000,111500,73000"
3064pts [
3065"111000,73000"
3066"111500,73000"
3067]
3068)
3069]
3070)
3071stc 0
3072sf 1
3073tg (WTG
3074uid 512,0
3075ps "PortIoTextPlaceStrategy"
3076stg "STSignalDisplayStrategy"
3077f (Text
3078uid 513,0
3079va (VaSet
3080)
3081xt "114000,72500,116800,73500"
3082st "W_WR"
3083blo "114000,73300"
3084tm "WireNameMgr"
3085)
3086)
3087)
3088*81 (Net
3089uid 1465,0
3090decl (Decl
3091n "adc_data_array"
3092t "adc_data_array_type"
3093o 72
3094suid 29,0
3095)
3096declText (MLText
3097uid 1466,0
3098va (VaSet
3099font "Courier New,8,0"
3100)
3101xt "39000,61600,63000,62400"
3102st "SIGNAL adc_data_array  : adc_data_array_type
3103"
3104)
3105)
3106*82 (Net
3107uid 2407,0
3108decl (Decl
3109n "RSRLOAD"
3110t "std_logic"
3111o 41
3112suid 57,0
3113i "'0'"
3114)
3115declText (MLText
3116uid 2408,0
3117va (VaSet
3118font "Courier New,8,0"
3119)
3120xt "39000,35800,67500,36600"
3121st "RSRLOAD         : std_logic                    := '0'
3122"
3123)
3124)
3125*83 (PortIoOut
3126uid 2415,0
3127shape (CompositeShape
3128uid 2416,0
3129va (VaSet
3130vasetType 1
3131fg "0,0,32768"
3132)
3133optionalChildren [
3134(Pentagon
3135uid 2417,0
3136sl 0
3137ro 90
3138xt "19000,110625,20500,111375"
3139)
3140(Line
3141uid 2418,0
3142sl 0
3143ro 90
3144xt "20500,111000,21000,111000"
3145pts [
3146"21000,111000"
3147"20500,111000"
3148]
3149)
3150]
3151)
3152stc 0
3153sf 1
3154tg (WTG
3155uid 2419,0
3156ps "PortIoTextPlaceStrategy"
3157stg "STSignalDisplayStrategy"
3158f (Text
3159uid 2420,0
3160va (VaSet
3161)
3162xt "13800,110500,18000,111500"
3163st "RSRLOAD"
3164ju 2
3165blo "18000,111300"
3166tm "WireNameMgr"
3167)
3168)
3169)
3170*84 (Net
3171uid 2421,0
3172decl (Decl
3173n "SRCLK"
3174t "std_logic"
3175o 70
3176suid 58,0
3177i "'0'"
3178)
3179declText (MLText
3180uid 2422,0
3181va (VaSet
3182font "Courier New,8,0"
3183)
3184xt "39000,60000,71000,60800"
3185st "SIGNAL SRCLK           : std_logic                    := '0'
3186"
3187)
3188)
3189*85 (Net
3190uid 3019,0
3191decl (Decl
3192n "sensor_cs"
3193t "std_logic_vector"
3194b "(3 DOWNTO 0)"
3195o 78
3196suid 65,0
3197)
3198declText (MLText
3199uid 3020,0
3200va (VaSet
3201font "Courier New,8,0"
3202)
3203xt "39000,66400,67500,67200"
3204st "SIGNAL sensor_cs       : std_logic_vector(3 DOWNTO 0)
3205"
3206)
3207)
3208*86 (Net
3209uid 3025,0
3210decl (Decl
3211n "DAC_CS"
3212t "std_logic"
3213o 24
3214suid 66,0
3215)
3216declText (MLText
3217uid 3026,0
3218va (VaSet
3219font "Courier New,8,0"
3220)
3221xt "39000,23000,54000,23800"
3222st "DAC_CS          : std_logic
3223"
3224)
3225)
3226*87 (PortIoOut
3227uid 3153,0
3228shape (CompositeShape
3229uid 3154,0
3230va (VaSet
3231vasetType 1
3232fg "0,0,32768"
3233)
3234optionalChildren [
3235(Pentagon
3236uid 3155,0
3237sl 0
3238ro 90
3239xt "19000,69625,20500,70375"
3240)
3241(Line
3242uid 3156,0
3243sl 0
3244ro 90
3245xt "20500,70000,21000,70000"
3246pts [
3247"21000,70000"
3248"20500,70000"
3249]
3250)
3251]
3252)
3253stc 0
3254sf 1
3255tg (WTG
3256uid 3157,0
3257ps "PortIoTextPlaceStrategy"
3258stg "STSignalDisplayStrategy"
3259f (Text
3260uid 3158,0
3261va (VaSet
3262)
3263xt "15200,69500,18000,70500"
3264st "A_CLK"
3265ju 2
3266blo "18000,70300"
3267tm "WireNameMgr"
3268)
3269)
3270)
3271*88 (Net
3272uid 3216,0
3273decl (Decl
3274n "X_50M"
3275t "STD_LOGIC"
3276preAdd 0
3277posAdd 0
3278o 16
3279suid 67,0
3280)
3281declText (MLText
3282uid 3217,0
3283va (VaSet
3284font "Courier New,8,0"
3285)
3286xt "39000,15800,54000,16600"
3287st "X_50M           : STD_LOGIC
3288"
3289)
3290)
3291*89 (Net
3292uid 3226,0
3293decl (Decl
3294n "TRG"
3295t "STD_LOGIC"
3296o 14
3297suid 68,0
3298)
3299declText (MLText
3300uid 3227,0
3301va (VaSet
3302font "Courier New,8,0"
3303)
3304xt "39000,14200,54000,15000"
3305st "TRG             : STD_LOGIC
3306"
3307)
3308)
3309*90 (HdlText
3310uid 3248,0
3311optionalChildren [
3312*91 (EmbeddedText
3313uid 3254,0
3314commentText (CommentText
3315uid 3255,0
3316ps "CenterOffsetStrategy"
3317shape (Rectangle
3318uid 3256,0
3319va (VaSet
3320vasetType 1
3321fg "65535,65535,65535"
3322lineColor "0,0,32768"
3323lineWidth 2
3324)
3325xt "29000,71000,41000,77000"
3326)
3327oxt "0,0,18000,5000"
3328text (MLText
3329uid 3257,0
3330va (VaSet
3331)
3332xt "29200,71200,41100,77200"
3333st "
3334-- ADC_CLK 2
3335A_CLK (0) <= CLK_25_PS;
3336A_CLK (1) <= CLK_25_PS;
3337A_CLK (2) <= CLK_25_PS;
3338A_CLK (3) <= CLK_25_PS;                                       
3339"
3340tm "HdlTextMgr"
3341wrapOption 3
3342visibleHeight 6000
3343visibleWidth 12000
3344)
3345)
3346)
3347]
3348shape (Rectangle
3349uid 3249,0
3350va (VaSet
3351vasetType 1
3352fg "65535,65535,37120"
3353lineColor "0,0,32768"
3354lineWidth 2
3355)
3356xt "24000,69000,29000,77000"
3357)
3358oxt "0,0,8000,10000"
3359ttg (MlTextGroup
3360uid 3250,0
3361ps "CenterOffsetStrategy"
3362stg "VerticalLayoutStrategy"
3363textVec [
3364*92 (Text
3365uid 3251,0
3366va (VaSet
3367font "Arial,8,1"
3368)
3369xt "24150,73000,28350,74000"
3370st "ADC_CLK"
3371blo "24150,73800"
3372tm "HdlTextNameMgr"
3373)
3374*93 (Text
3375uid 3252,0
3376va (VaSet
3377font "Arial,8,1"
3378)
3379xt "24150,74000,24950,75000"
3380st "2"
3381blo "24150,74800"
3382tm "HdlTextNumberMgr"
3383)
3384]
3385)
3386viewicon (ZoomableIcon
3387uid 3253,0
3388sl 0
3389va (VaSet
3390vasetType 1
3391fg "49152,49152,49152"
3392)
3393xt "24250,75250,25750,76750"
3394iconName "TextFile.png"
3395iconMaskName "TextFile.msk"
3396ftype 21
3397)
3398viewiconposition 0
3399)
3400*94 (Net
3401uid 3266,0
3402decl (Decl
3403n "A_CLK"
3404t "std_logic_vector"
3405b "(3 downto 0)"
3406o 19
3407suid 71,0
3408)
3409declText (MLText
3410uid 3267,0
3411va (VaSet
3412font "Courier New,8,0"
3413)
3414xt "39000,19000,64000,19800"
3415st "A_CLK           : std_logic_vector(3 downto 0)
3416"
3417)
3418)
3419*95 (Net
3420uid 3268,0
3421decl (Decl
3422n "CLK_25_PS"
3423t "std_logic"
3424o 59
3425suid 72,0
3426)
3427declText (MLText
3428uid 3269,0
3429va (VaSet
3430font "Courier New,8,0"
3431)
3432xt "39000,51200,57500,52000"
3433st "SIGNAL CLK_25_PS       : std_logic
3434"
3435)
3436)
3437*96 (PortIoOut
3438uid 3284,0
3439shape (CompositeShape
3440uid 3285,0
3441va (VaSet
3442vasetType 1
3443fg "0,0,32768"
3444)
3445optionalChildren [
3446(Pentagon
3447uid 3286,0
3448sl 0
3449ro 90
3450xt "19000,89625,20500,90375"
3451)
3452(Line
3453uid 3287,0
3454sl 0
3455ro 90
3456xt "20500,90000,21000,90000"
3457pts [
3458"21000,90000"
3459"20500,90000"
3460]
3461)
3462]
3463)
3464stc 0
3465sf 1
3466tg (WTG
3467uid 3288,0
3468ps "PortIoTextPlaceStrategy"
3469stg "STSignalDisplayStrategy"
3470f (Text
3471uid 3289,0
3472va (VaSet
3473)
3474xt "14400,89500,18000,90500"
3475st "OE_ADC"
3476ju 2
3477blo "18000,90300"
3478tm "WireNameMgr"
3479)
3480)
3481)
3482*97 (Net
3483uid 3290,0
3484decl (Decl
3485n "OE_ADC"
3486t "STD_LOGIC"
3487preAdd 0
3488posAdd 0
3489o 35
3490suid 73,0
3491)
3492declText (MLText
3493uid 3291,0
3494va (VaSet
3495font "Courier New,8,0"
3496)
3497xt "39000,30200,54000,31000"
3498st "OE_ADC          : STD_LOGIC
3499"
3500)
3501)
3502*98 (PortIoIn
3503uid 3292,0
3504shape (CompositeShape
3505uid 3293,0
3506va (VaSet
3507vasetType 1
3508fg "0,0,32768"
3509)
3510optionalChildren [
3511(Pentagon
3512uid 3294,0
3513sl 0
3514ro 270
3515xt "19000,88625,20500,89375"
3516)
3517(Line
3518uid 3295,0
3519sl 0
3520ro 270
3521xt "20500,89000,21000,89000"
3522pts [
3523"20500,89000"
3524"21000,89000"
3525]
3526)
3527]
3528)
3529stc 0
3530sf 1
3531tg (WTG
3532uid 3296,0
3533ps "PortIoTextPlaceStrategy"
3534stg "STSignalDisplayStrategy"
3535f (Text
3536uid 3297,0
3537va (VaSet
3538)
3539xt "15000,88500,18000,89500"
3540st "A_OTR"
3541ju 2
3542blo "18000,89300"
3543tm "WireNameMgr"
3544)
3545)
3546)
3547*99 (Net
3548uid 3298,0
3549decl (Decl
3550n "A_OTR"
3551t "std_logic_vector"
3552b "(3 DOWNTO 0)"
3553o 5
3554suid 74,0
3555)
3556declText (MLText
3557uid 3299,0
3558va (VaSet
3559font "Courier New,8,0"
3560)
3561xt "39000,7000,64000,7800"
3562st "A_OTR           : std_logic_vector(3 DOWNTO 0)
3563"
3564)
3565)
3566*100 (HdlText
3567uid 3300,0
3568optionalChildren [
3569*101 (EmbeddedText
3570uid 3306,0
3571commentText (CommentText
3572uid 3307,0
3573ps "CenterOffsetStrategy"
3574shape (Rectangle
3575uid 3308,0
3576va (VaSet
3577vasetType 1
3578fg "65535,65535,65535"
3579lineColor "0,0,32768"
3580lineWidth 2
3581)
3582xt "32000,96000,44000,102000"
3583)
3584oxt "0,0,18000,5000"
3585text (MLText
3586uid 3309,0
3587va (VaSet
3588)
3589xt "32200,96200,44200,102200"
3590st "
3591-- ADC_DATA 3
3592adc_data_array (0) <= A0_D;
3593adc_data_array (1) <= A1_D;
3594adc_data_array (2) <= A2_D;
3595adc_data_array (3) <= A3_D;                                       
3596"
3597tm "HdlTextMgr"
3598wrapOption 3
3599visibleHeight 6000
3600visibleWidth 12000
3601)
3602)
3603)
3604]
3605shape (Rectangle
3606uid 3301,0
3607va (VaSet
3608vasetType 1
3609fg "65535,65535,37120"
3610lineColor "0,0,32768"
3611lineWidth 2
3612)
3613xt "24000,94000,32000,102000"
3614)
3615oxt "0,0,8000,10000"
3616ttg (MlTextGroup
3617uid 3302,0
3618ps "CenterOffsetStrategy"
3619stg "VerticalLayoutStrategy"
3620textVec [
3621*102 (Text
3622uid 3303,0
3623va (VaSet
3624font "Arial,8,1"
3625)
3626xt "27150,95000,31750,96000"
3627st "ADC_DATA"
3628blo "27150,95800"
3629tm "HdlTextNameMgr"
3630)
3631*103 (Text
3632uid 3304,0
3633va (VaSet
3634font "Arial,8,1"
3635)
3636xt "27150,96000,27950,97000"
3637st "3"
3638blo "27150,96800"
3639tm "HdlTextNumberMgr"
3640)
3641]
3642)
3643viewicon (ZoomableIcon
3644uid 3305,0
3645sl 0
3646va (VaSet
3647vasetType 1
3648fg "49152,49152,49152"
3649)
3650xt "24250,100250,25750,101750"
3651iconName "TextFile.png"
3652iconMaskName "TextFile.msk"
3653ftype 21
3654)
3655viewiconposition 0
3656)
3657*104 (PortIoIn
3658uid 3310,0
3659shape (CompositeShape
3660uid 3311,0
3661va (VaSet
3662vasetType 1
3663fg "0,0,32768"
3664)
3665optionalChildren [
3666(Pentagon
3667uid 3312,0
3668sl 0
3669ro 270
3670xt "19000,94625,20500,95375"
3671)
3672(Line
3673uid 3313,0
3674sl 0
3675ro 270
3676xt "20500,95000,21000,95000"
3677pts [
3678"20500,95000"
3679"21000,95000"
3680]
3681)
3682]
3683)
3684stc 0
3685sf 1
3686tg (WTG
3687uid 3314,0
3688ps "PortIoTextPlaceStrategy"
3689stg "STSignalDisplayStrategy"
3690f (Text
3691uid 3315,0
3692va (VaSet
3693)
3694xt "15700,94500,18000,95500"
3695st "A0_D"
3696ju 2
3697blo "18000,95300"
3698tm "WireNameMgr"
3699)
3700)
3701)
3702*105 (PortIoIn
3703uid 3332,0
3704shape (CompositeShape
3705uid 3333,0
3706va (VaSet
3707vasetType 1
3708fg "0,0,32768"
3709)
3710optionalChildren [
3711(Pentagon
3712uid 3334,0
3713sl 0
3714ro 270
3715xt "19000,95625,20500,96375"
3716)
3717(Line
3718uid 3335,0
3719sl 0
3720ro 270
3721xt "20500,96000,21000,96000"
3722pts [
3723"20500,96000"
3724"21000,96000"
3725]
3726)
3727]
3728)
3729stc 0
3730sf 1
3731tg (WTG
3732uid 3336,0
3733ps "PortIoTextPlaceStrategy"
3734stg "STSignalDisplayStrategy"
3735f (Text
3736uid 3337,0
3737va (VaSet
3738)
3739xt "15700,95500,18000,96500"
3740st "A1_D"
3741ju 2
3742blo "18000,96300"
3743tm "WireNameMgr"
3744)
3745)
3746)
3747*106 (PortIoIn
3748uid 3338,0
3749shape (CompositeShape
3750uid 3339,0
3751va (VaSet
3752vasetType 1
3753fg "0,0,32768"
3754)
3755optionalChildren [
3756(Pentagon
3757uid 3340,0
3758sl 0
3759ro 270
3760xt "19000,96625,20500,97375"
3761)
3762(Line
3763uid 3341,0
3764sl 0
3765ro 270
3766xt "20500,97000,21000,97000"
3767pts [
3768"20500,97000"
3769"21000,97000"
3770]
3771)
3772]
3773)
3774stc 0
3775sf 1
3776tg (WTG
3777uid 3342,0
3778ps "PortIoTextPlaceStrategy"
3779stg "STSignalDisplayStrategy"
3780f (Text
3781uid 3343,0
3782va (VaSet
3783)
3784xt "15700,96500,18000,97500"
3785st "A2_D"
3786ju 2
3787blo "18000,97300"
3788tm "WireNameMgr"
3789)
3790)
3791)
3792*107 (PortIoIn
3793uid 3344,0
3794shape (CompositeShape
3795uid 3345,0
3796va (VaSet
3797vasetType 1
3798fg "0,0,32768"
3799)
3800optionalChildren [
3801(Pentagon
3802uid 3346,0
3803sl 0
3804ro 270
3805xt "19000,97625,20500,98375"
3806)
3807(Line
3808uid 3347,0
3809sl 0
3810ro 270
3811xt "20500,98000,21000,98000"
3812pts [
3813"20500,98000"
3814"21000,98000"
3815]
3816)
3817]
3818)
3819stc 0
3820sf 1
3821tg (WTG
3822uid 3348,0
3823ps "PortIoTextPlaceStrategy"
3824stg "STSignalDisplayStrategy"
3825f (Text
3826uid 3349,0
3827va (VaSet
3828)
3829xt "15700,97500,18000,98500"
3830st "A3_D"
3831ju 2
3832blo "18000,98300"
3833tm "WireNameMgr"
3834)
3835)
3836)
3837*108 (Net
3838uid 3374,0
3839decl (Decl
3840n "A0_D"
3841t "std_logic_vector"
3842b "(11 DOWNTO 0)"
3843o 1
3844suid 79,0
3845)
3846declText (MLText
3847uid 3375,0
3848va (VaSet
3849font "Courier New,8,0"
3850)
3851xt "39000,3800,64500,4600"
3852st "A0_D            : std_logic_vector(11 DOWNTO 0)
3853"
3854)
3855)
3856*109 (Net
3857uid 3376,0
3858decl (Decl
3859n "A1_D"
3860t "std_logic_vector"
3861b "(11 DOWNTO 0)"
3862o 2
3863suid 80,0
3864)
3865declText (MLText
3866uid 3377,0
3867va (VaSet
3868font "Courier New,8,0"
3869)
3870xt "39000,4600,64500,5400"
3871st "A1_D            : std_logic_vector(11 DOWNTO 0)
3872"
3873)
3874)
3875*110 (Net
3876uid 3378,0
3877decl (Decl
3878n "A2_D"
3879t "std_logic_vector"
3880b "(11 DOWNTO 0)"
3881o 3
3882suid 81,0
3883)
3884declText (MLText
3885uid 3379,0
3886va (VaSet
3887font "Courier New,8,0"
3888)
3889xt "39000,5400,64500,6200"
3890st "A2_D            : std_logic_vector(11 DOWNTO 0)
3891"
3892)
3893)
3894*111 (Net
3895uid 3380,0
3896decl (Decl
3897n "A3_D"
3898t "std_logic_vector"
3899b "(11 DOWNTO 0)"
3900o 4
3901suid 82,0
3902)
3903declText (MLText
3904uid 3381,0
3905va (VaSet
3906font "Courier New,8,0"
3907)
3908xt "39000,6200,64500,7000"
3909st "A3_D            : std_logic_vector(11 DOWNTO 0)
3910"
3911)
3912)
3913*112 (HdlText
3914uid 3394,0
3915optionalChildren [
3916*113 (EmbeddedText
3917uid 3400,0
3918commentText (CommentText
3919uid 3401,0
3920ps "CenterOffsetStrategy"
3921shape (Rectangle
3922uid 3402,0
3923va (VaSet
3924vasetType 1
3925fg "65535,65535,65535"
3926lineColor "0,0,32768"
3927lineWidth 2
3928)
3929xt "32000,114000,44000,120000"
3930)
3931oxt "0,0,18000,5000"
3932text (MLText
3933uid 3403,0
3934va (VaSet
3935)
3936xt "32200,114200,44200,120200"
3937st "
3938-- SRCLK 4         
3939D0_SRCLK <= SRCLK;
3940D1_SRCLK <= SRCLK;
3941D2_SRCLK <= SRCLK;
3942D3_SRCLK <= SRCLK;                               
3943"
3944tm "HdlTextMgr"
3945wrapOption 3
3946visibleHeight 6000
3947visibleWidth 12000
3948)
3949)
3950)
3951]
3952shape (Rectangle
3953uid 3395,0
3954va (VaSet
3955vasetType 1
3956fg "65535,65535,37120"
3957lineColor "0,0,32768"
3958lineWidth 2
3959)
3960xt "24000,112000,32000,120000"
3961)
3962oxt "0,0,8000,10000"
3963ttg (MlTextGroup
3964uid 3396,0
3965ps "CenterOffsetStrategy"
3966stg "VerticalLayoutStrategy"
3967textVec [
3968*114 (Text
3969uid 3397,0
3970va (VaSet
3971font "Arial,8,1"
3972)
3973xt "27150,113000,30350,114000"
3974st "SRCLK"
3975blo "27150,113800"
3976tm "HdlTextNameMgr"
3977)
3978*115 (Text
3979uid 3398,0
3980va (VaSet
3981font "Arial,8,1"
3982)
3983xt "27150,114000,27950,115000"
3984st "4"
3985blo "27150,114800"
3986tm "HdlTextNumberMgr"
3987)
3988]
3989)
3990viewicon (ZoomableIcon
3991uid 3399,0
3992sl 0
3993va (VaSet
3994vasetType 1
3995fg "49152,49152,49152"
3996)
3997xt "24250,118250,25750,119750"
3998iconName "TextFile.png"
3999iconMaskName "TextFile.msk"
4000ftype 21
4001)
4002viewiconposition 0
4003)
4004*116 (Net
4005uid 3460,0
4006decl (Decl
4007n "D0_SRCLK"
4008t "STD_LOGIC"
4009o 20
4010suid 87,0
4011)
4012declText (MLText
4013uid 3461,0
4014va (VaSet
4015font "Courier New,8,0"
4016)
4017xt "39000,19800,54000,20600"
4018st "D0_SRCLK        : STD_LOGIC
4019"
4020)
4021)
4022*117 (Net
4023uid 3462,0
4024decl (Decl
4025n "D1_SRCLK"
4026t "STD_LOGIC"
4027o 21
4028suid 88,0
4029)
4030declText (MLText
4031uid 3463,0
4032va (VaSet
4033font "Courier New,8,0"
4034)
4035xt "39000,20600,54000,21400"
4036st "D1_SRCLK        : STD_LOGIC
4037"
4038)
4039)
4040*118 (Net
4041uid 3464,0
4042decl (Decl
4043n "D2_SRCLK"
4044t "STD_LOGIC"
4045o 22
4046suid 89,0
4047)
4048declText (MLText
4049uid 3465,0
4050va (VaSet
4051font "Courier New,8,0"
4052)
4053xt "39000,21400,54000,22200"
4054st "D2_SRCLK        : STD_LOGIC
4055"
4056)
4057)
4058*119 (Net
4059uid 3466,0
4060decl (Decl
4061n "D3_SRCLK"
4062t "STD_LOGIC"
4063o 23
4064suid 90,0
4065)
4066declText (MLText
4067uid 3467,0
4068va (VaSet
4069font "Courier New,8,0"
4070)
4071xt "39000,22200,54000,23000"
4072st "D3_SRCLK        : STD_LOGIC
4073"
4074)
4075)
4076*120 (PortIoIn
4077uid 3476,0
4078shape (CompositeShape
4079uid 3477,0
4080va (VaSet
4081vasetType 1
4082fg "0,0,32768"
4083)
4084optionalChildren [
4085(Pentagon
4086uid 3478,0
4087sl 0
4088ro 270
4089xt "19000,104625,20500,105375"
4090)
4091(Line
4092uid 3479,0
4093sl 0
4094ro 270
4095xt "20500,105000,21000,105000"
4096pts [
4097"20500,105000"
4098"21000,105000"
4099]
4100)
4101]
4102)
4103stc 0
4104sf 1
4105tg (WTG
4106uid 3480,0
4107ps "PortIoTextPlaceStrategy"
4108stg "STSignalDisplayStrategy"
4109f (Text
4110uid 3481,0
4111va (VaSet
4112)
4113xt "13400,104500,18000,105500"
4114st "D0_SROUT"
4115ju 2
4116blo "18000,105300"
4117tm "WireNameMgr"
4118)
4119)
4120)
4121*121 (PortIoIn
4122uid 3482,0
4123shape (CompositeShape
4124uid 3483,0
4125va (VaSet
4126vasetType 1
4127fg "0,0,32768"
4128)
4129optionalChildren [
4130(Pentagon
4131uid 3484,0
4132sl 0
4133ro 270
4134xt "19000,105625,20500,106375"
4135)
4136(Line
4137uid 3485,0
4138sl 0
4139ro 270
4140xt "20500,106000,21000,106000"
4141pts [
4142"20500,106000"
4143"21000,106000"
4144]
4145)
4146]
4147)
4148stc 0
4149sf 1
4150tg (WTG
4151uid 3486,0
4152ps "PortIoTextPlaceStrategy"
4153stg "STSignalDisplayStrategy"
4154f (Text
4155uid 3487,0
4156va (VaSet
4157)
4158xt "13400,105500,18000,106500"
4159st "D1_SROUT"
4160ju 2
4161blo "18000,106300"
4162tm "WireNameMgr"
4163)
4164)
4165)
4166*122 (PortIoIn
4167uid 3488,0
4168shape (CompositeShape
4169uid 3489,0
4170va (VaSet
4171vasetType 1
4172fg "0,0,32768"
4173)
4174optionalChildren [
4175(Pentagon
4176uid 3490,0
4177sl 0
4178ro 270
4179xt "19000,106625,20500,107375"
4180)
4181(Line
4182uid 3491,0
4183sl 0
4184ro 270
4185xt "20500,107000,21000,107000"
4186pts [
4187"20500,107000"
4188"21000,107000"
4189]
4190)
4191]
4192)
4193stc 0
4194sf 1
4195tg (WTG
4196uid 3492,0
4197ps "PortIoTextPlaceStrategy"
4198stg "STSignalDisplayStrategy"
4199f (Text
4200uid 3493,0
4201va (VaSet
4202)
4203xt "13400,106500,18000,107500"
4204st "D2_SROUT"
4205ju 2
4206blo "18000,107300"
4207tm "WireNameMgr"
4208)
4209)
4210)
4211*123 (PortIoIn
4212uid 3494,0
4213shape (CompositeShape
4214uid 3495,0
4215va (VaSet
4216vasetType 1
4217fg "0,0,32768"
4218)
4219optionalChildren [
4220(Pentagon
4221uid 3496,0
4222sl 0
4223ro 270
4224xt "19000,107625,20500,108375"
4225)
4226(Line
4227uid 3497,0
4228sl 0
4229ro 270
4230xt "20500,108000,21000,108000"
4231pts [
4232"20500,108000"
4233"21000,108000"
4234]
4235)
4236]
4237)
4238stc 0
4239sf 1
4240tg (WTG
4241uid 3498,0
4242ps "PortIoTextPlaceStrategy"
4243stg "STSignalDisplayStrategy"
4244f (Text
4245uid 3499,0
4246va (VaSet
4247)
4248xt "13400,107500,18000,108500"
4249st "D3_SROUT"
4250ju 2
4251blo "18000,108300"
4252tm "WireNameMgr"
4253)
4254)
4255)
4256*124 (Net
4257uid 3500,0
4258decl (Decl
4259n "D0_SROUT"
4260t "std_logic"
4261o 6
4262suid 91,0
4263)
4264declText (MLText
4265uid 3501,0
4266va (VaSet
4267font "Courier New,8,0"
4268)
4269xt "39000,7800,54000,8600"
4270st "D0_SROUT        : std_logic
4271"
4272)
4273)
4274*125 (Net
4275uid 3502,0
4276decl (Decl
4277n "D1_SROUT"
4278t "std_logic"
4279o 7
4280suid 92,0
4281)
4282declText (MLText
4283uid 3503,0
4284va (VaSet
4285font "Courier New,8,0"
4286)
4287xt "39000,8600,54000,9400"
4288st "D1_SROUT        : std_logic
4289"
4290)
4291)
4292*126 (Net
4293uid 3504,0
4294decl (Decl
4295n "D2_SROUT"
4296t "std_logic"
4297o 8
4298suid 93,0
4299)
4300declText (MLText
4301uid 3505,0
4302va (VaSet
4303font "Courier New,8,0"
4304)
4305xt "39000,9400,54000,10200"
4306st "D2_SROUT        : std_logic
4307"
4308)
4309)
4310*127 (Net
4311uid 3506,0
4312decl (Decl
4313n "D3_SROUT"
4314t "std_logic"
4315o 9
4316suid 94,0
4317)
4318declText (MLText
4319uid 3507,0
4320va (VaSet
4321font "Courier New,8,0"
4322)
4323xt "39000,10200,54000,11000"
4324st "D3_SROUT        : std_logic
4325"
4326)
4327)
4328*128 (PortIoOut
4329uid 3508,0
4330shape (CompositeShape
4331uid 3509,0
4332va (VaSet
4333vasetType 1
4334fg "0,0,32768"
4335)
4336optionalChildren [
4337(Pentagon
4338uid 3510,0
4339sl 0
4340ro 90
4341xt "10000,125625,11500,126375"
4342)
4343(Line
4344uid 3511,0
4345sl 0
4346ro 90
4347xt "11500,126000,12000,126000"
4348pts [
4349"12000,126000"
4350"11500,126000"
4351]
4352)
4353]
4354)
4355stc 0
4356sf 1
4357tg (WTG
4358uid 3512,0
4359ps "PortIoTextPlaceStrategy"
4360stg "STSignalDisplayStrategy"
4361f (Text
4362uid 3513,0
4363va (VaSet
4364)
4365xt "7100,125500,9000,126500"
4366st "D_A"
4367ju 2
4368blo "9000,126300"
4369tm "WireNameMgr"
4370)
4371)
4372)
4373*129 (Net
4374uid 3514,0
4375decl (Decl
4376n "D_A"
4377t "std_logic_vector"
4378b "(3 DOWNTO 0)"
4379o 27
4380suid 95,0
4381i "(others => '0')"
4382)
4383declText (MLText
4384uid 3515,0
4385va (VaSet
4386font "Courier New,8,0"
4387)
4388xt "39000,25400,73500,26200"
4389st "D_A             : std_logic_vector(3 DOWNTO 0) := (others => '0')
4390"
4391)
4392)
4393*130 (PortIoOut
4394uid 3516,0
4395shape (CompositeShape
4396uid 3517,0
4397va (VaSet
4398vasetType 1
4399fg "0,0,32768"
4400)
4401optionalChildren [
4402(Pentagon
4403uid 3518,0
4404sl 0
4405ro 90
4406xt "19000,109625,20500,110375"
4407)
4408(Line
4409uid 3519,0
4410sl 0
4411ro 90
4412xt "20500,110000,21000,110000"
4413pts [
4414"21000,110000"
4415"20500,110000"
4416]
4417)
4418]
4419)
4420stc 0
4421sf 1
4422tg (WTG
4423uid 3520,0
4424ps "PortIoTextPlaceStrategy"
4425stg "STSignalDisplayStrategy"
4426f (Text
4427uid 3521,0
4428va (VaSet
4429)
4430xt "14500,109500,18000,110500"
4431st "DWRITE"
4432ju 2
4433blo "18000,110300"
4434tm "WireNameMgr"
4435)
4436)
4437)
4438*131 (Net
4439uid 3522,0
4440decl (Decl
4441n "DWRITE"
4442t "std_logic"
4443o 26
4444suid 96,0
4445i "'0'"
4446)
4447declText (MLText
4448uid 3523,0
4449va (VaSet
4450font "Courier New,8,0"
4451)
4452xt "39000,24600,67500,25400"
4453st "DWRITE          : std_logic                    := '0'
4454"
4455)
4456)
4457*132 (PortIoOut
4458uid 3536,0
4459shape (CompositeShape
4460uid 3537,0
4461va (VaSet
4462vasetType 1
4463fg "0,0,32768"
4464)
4465optionalChildren [
4466(Pentagon
4467uid 3538,0
4468sl 0
4469ro 270
4470xt "111500,86625,113000,87375"
4471)
4472(Line
4473uid 3539,0
4474sl 0
4475ro 270
4476xt "111000,87000,111500,87000"
4477pts [
4478"111000,87000"
4479"111500,87000"
4480]
4481)
4482]
4483)
4484stc 0
4485sf 1
4486tg (WTG
4487uid 3540,0
4488ps "PortIoTextPlaceStrategy"
4489stg "STSignalDisplayStrategy"
4490f (Text
4491uid 3541,0
4492va (VaSet
4493)
4494xt "114000,86500,117600,87500"
4495st "DAC_CS"
4496blo "114000,87300"
4497tm "WireNameMgr"
4498)
4499)
4500)
4501*133 (HdlText
4502uid 3542,0
4503optionalChildren [
4504*134 (EmbeddedText
4505uid 3612,0
4506commentText (CommentText
4507uid 3613,0
4508ps "CenterOffsetStrategy"
4509shape (Rectangle
4510uid 3614,0
4511va (VaSet
4512vasetType 1
4513fg "65535,65535,65535"
4514lineColor "0,0,32768"
4515lineWidth 2
4516)
4517xt "88000,90000,100000,96000"
4518)
4519oxt "0,0,18000,5000"
4520text (MLText
4521uid 3615,0
4522va (VaSet
4523)
4524xt "88200,90200,100100,96200"
4525st "
4526-- T_CS 5
4527T0_CS <= sensor_cs (0);
4528T1_CS <= sensor_cs (1);
4529T2_CS <= sensor_cs (2);
4530T3_CS <= sensor_cs (3);                                     
4531"
4532tm "HdlTextMgr"
4533wrapOption 3
4534visibleHeight 6000
4535visibleWidth 12000
4536)
4537)
4538)
4539]
4540shape (Rectangle
4541uid 3543,0
4542va (VaSet
4543vasetType 1
4544fg "65535,65535,37120"
4545lineColor "0,0,32768"
4546lineWidth 2
4547)
4548xt "100000,88000,108000,96000"
4549)
4550oxt "0,0,8000,10000"
4551ttg (MlTextGroup
4552uid 3544,0
4553ps "CenterOffsetStrategy"
4554stg "VerticalLayoutStrategy"
4555textVec [
4556*135 (Text
4557uid 3545,0
4558va (VaSet
4559font "Arial,8,1"
4560)
4561xt "103150,89000,105550,90000"
4562st "T_CS"
4563blo "103150,89800"
4564tm "HdlTextNameMgr"
4565)
4566*136 (Text
4567uid 3546,0
4568va (VaSet
4569font "Arial,8,1"
4570)
4571xt "103150,90000,103950,91000"
4572st "5"
4573blo "103150,90800"
4574tm "HdlTextNumberMgr"
4575)
4576]
4577)
4578viewicon (ZoomableIcon
4579uid 3547,0
4580sl 0
4581va (VaSet
4582vasetType 1
4583fg "49152,49152,49152"
4584)
4585xt "100250,94250,101750,95750"
4586iconName "TextFile.png"
4587iconMaskName "TextFile.msk"
4588ftype 21
4589)
4590viewiconposition 0
4591)
4592*137 (PortIoOut
4593uid 3548,0
4594shape (CompositeShape
4595uid 3549,0
4596va (VaSet
4597vasetType 1
4598fg "0,0,32768"
4599)
4600optionalChildren [
4601(Pentagon
4602uid 3550,0
4603sl 0
4604ro 270
4605xt "111500,88625,113000,89375"
4606)
4607(Line
4608uid 3551,0
4609sl 0
4610ro 270
4611xt "111000,89000,111500,89000"
4612pts [
4613"111000,89000"
4614"111500,89000"
4615]
4616)
4617]
4618)
4619stc 0
4620sf 1
4621tg (WTG
4622uid 3552,0
4623ps "PortIoTextPlaceStrategy"
4624stg "STSignalDisplayStrategy"
4625f (Text
4626uid 3553,0
4627va (VaSet
4628)
4629xt "114000,88500,116800,89500"
4630st "T0_CS"
4631blo "114000,89300"
4632tm "WireNameMgr"
4633)
4634)
4635)
4636*138 (PortIoOut
4637uid 3554,0
4638shape (CompositeShape
4639uid 3555,0
4640va (VaSet
4641vasetType 1
4642fg "0,0,32768"
4643)
4644optionalChildren [
4645(Pentagon
4646uid 3556,0
4647sl 0
4648ro 270
4649xt "111500,89625,113000,90375"
4650)
4651(Line
4652uid 3557,0
4653sl 0
4654ro 270
4655xt "111000,90000,111500,90000"
4656pts [
4657"111000,90000"
4658"111500,90000"
4659]
4660)
4661]
4662)
4663stc 0
4664sf 1
4665tg (WTG
4666uid 3558,0
4667ps "PortIoTextPlaceStrategy"
4668stg "STSignalDisplayStrategy"
4669f (Text
4670uid 3559,0
4671va (VaSet
4672)
4673xt "114000,89500,116800,90500"
4674st "T1_CS"
4675blo "114000,90300"
4676tm "WireNameMgr"
4677)
4678)
4679)
4680*139 (PortIoOut
4681uid 3560,0
4682shape (CompositeShape
4683uid 3561,0
4684va (VaSet
4685vasetType 1
4686fg "0,0,32768"
4687)
4688optionalChildren [
4689(Pentagon
4690uid 3562,0
4691sl 0
4692ro 270
4693xt "111500,90625,113000,91375"
4694)
4695(Line
4696uid 3563,0
4697sl 0
4698ro 270
4699xt "111000,91000,111500,91000"
4700pts [
4701"111000,91000"
4702"111500,91000"
4703]
4704)
4705]
4706)
4707stc 0
4708sf 1
4709tg (WTG
4710uid 3564,0
4711ps "PortIoTextPlaceStrategy"
4712stg "STSignalDisplayStrategy"
4713f (Text
4714uid 3565,0
4715va (VaSet
4716)
4717xt "114000,90500,116800,91500"
4718st "T2_CS"
4719blo "114000,91300"
4720tm "WireNameMgr"
4721)
4722)
4723)
4724*140 (PortIoOut
4725uid 3566,0
4726shape (CompositeShape
4727uid 3567,0
4728va (VaSet
4729vasetType 1
4730fg "0,0,32768"
4731)
4732optionalChildren [
4733(Pentagon
4734uid 3568,0
4735sl 0
4736ro 270
4737xt "111500,91625,113000,92375"
4738)
4739(Line
4740uid 3569,0
4741sl 0
4742ro 270
4743xt "111000,92000,111500,92000"
4744pts [
4745"111000,92000"
4746"111500,92000"
4747]
4748)
4749]
4750)
4751stc 0
4752sf 1
4753tg (WTG
4754uid 3570,0
4755ps "PortIoTextPlaceStrategy"
4756stg "STSignalDisplayStrategy"
4757f (Text
4758uid 3571,0
4759va (VaSet
4760)
4761xt "114000,91500,116800,92500"
4762st "T3_CS"
4763blo "114000,92300"
4764tm "WireNameMgr"
4765)
4766)
4767)
4768*141 (Net
4769uid 3604,0
4770decl (Decl
4771n "T0_CS"
4772t "std_logic"
4773o 44
4774suid 101,0
4775)
4776declText (MLText
4777uid 3605,0
4778va (VaSet
4779font "Courier New,8,0"
4780)
4781xt "39000,38200,54000,39000"
4782st "T0_CS           : std_logic
4783"
4784)
4785)
4786*142 (Net
4787uid 3606,0
4788decl (Decl
4789n "T1_CS"
4790t "std_logic"
4791o 45
4792suid 102,0
4793)
4794declText (MLText
4795uid 3607,0
4796va (VaSet
4797font "Courier New,8,0"
4798)
4799xt "39000,39000,54000,39800"
4800st "T1_CS           : std_logic
4801"
4802)
4803)
4804*143 (Net
4805uid 3608,0
4806decl (Decl
4807n "T2_CS"
4808t "std_logic"
4809o 46
4810suid 103,0
4811)
4812declText (MLText
4813uid 3609,0
4814va (VaSet
4815font "Courier New,8,0"
4816)
4817xt "39000,39800,54000,40600"
4818st "T2_CS           : std_logic
4819"
4820)
4821)
4822*144 (Net
4823uid 3610,0
4824decl (Decl
4825n "T3_CS"
4826t "std_logic"
4827o 47
4828suid 104,0
4829)
4830declText (MLText
4831uid 3611,0
4832va (VaSet
4833font "Courier New,8,0"
4834)
4835xt "39000,40600,54000,41400"
4836st "T3_CS           : std_logic
4837"
4838)
4839)
4840*145 (PortIoOut
4841uid 3624,0
4842shape (CompositeShape
4843uid 3625,0
4844va (VaSet
4845vasetType 1
4846fg "0,0,32768"
4847)
4848optionalChildren [
4849(Pentagon
4850uid 3626,0
4851sl 0
4852ro 270
4853xt "111500,97625,113000,98375"
4854)
4855(Line
4856uid 3627,0
4857sl 0
4858ro 270
4859xt "111000,98000,111500,98000"
4860pts [
4861"111000,98000"
4862"111500,98000"
4863]
4864)
4865]
4866)
4867stc 0
4868sf 1
4869tg (WTG
4870uid 3628,0
4871ps "PortIoTextPlaceStrategy"
4872stg "STSignalDisplayStrategy"
4873f (Text
4874uid 3629,0
4875va (VaSet
4876)
4877xt "113750,97500,116550,98500"
4878st "S_CLK"
4879blo "113750,98300"
4880tm "WireNameMgr"
4881)
4882)
4883)
4884*146 (Net
4885uid 3630,0
4886decl (Decl
4887n "S_CLK"
4888t "std_logic"
4889o 43
4890suid 105,0
4891)
4892declText (MLText
4893uid 3631,0
4894va (VaSet
4895font "Courier New,8,0"
4896)
4897xt "39000,37400,54000,38200"
4898st "S_CLK           : std_logic
4899"
4900)
4901)
4902*147 (Net
4903uid 3632,0
4904decl (Decl
4905n "W_A"
4906t "std_logic_vector"
4907b "(9 DOWNTO 0)"
4908o 49
4909suid 106,0
4910)
4911declText (MLText
4912uid 3633,0
4913va (VaSet
4914font "Courier New,8,0"
4915)
4916xt "39000,42200,64000,43000"
4917st "W_A             : std_logic_vector(9 DOWNTO 0)
4918"
4919)
4920)
4921*148 (Net
4922uid 3634,0
4923decl (Decl
4924n "W_D"
4925t "std_logic_vector"
4926b "(15 DOWNTO 0)"
4927o 55
4928suid 107,0
4929)
4930declText (MLText
4931uid 3635,0
4932va (VaSet
4933font "Courier New,8,0"
4934)
4935xt "39000,47000,64500,47800"
4936st "W_D             : std_logic_vector(15 DOWNTO 0)
4937"
4938)
4939)
4940*149 (Net
4941uid 3636,0
4942decl (Decl
4943n "W_RES"
4944t "std_logic"
4945o 52
4946suid 108,0
4947i "'1'"
4948)
4949declText (MLText
4950uid 3637,0
4951va (VaSet
4952font "Courier New,8,0"
4953)
4954xt "39000,44600,67500,45400"
4955st "W_RES           : std_logic                    := '1'
4956"
4957)
4958)
4959*150 (Net
4960uid 3638,0
4961decl (Decl
4962n "W_RD"
4963t "std_logic"
4964o 51
4965suid 109,0
4966i "'1'"
4967)
4968declText (MLText
4969uid 3639,0
4970va (VaSet
4971font "Courier New,8,0"
4972)
4973xt "39000,43800,67500,44600"
4974st "W_RD            : std_logic                    := '1'
4975"
4976)
4977)
4978*151 (Net
4979uid 3640,0
4980decl (Decl
4981n "W_WR"
4982t "std_logic"
4983o 53
4984suid 110,0
4985i "'1'"
4986)
4987declText (MLText
4988uid 3641,0
4989va (VaSet
4990font "Courier New,8,0"
4991)
4992xt "39000,45400,67500,46200"
4993st "W_WR            : std_logic                    := '1'
4994"
4995)
4996)
4997*152 (Net
4998uid 3642,0
4999decl (Decl
5000n "W_INT"
5001t "std_logic"
5002o 15
5003suid 111,0
5004)
5005declText (MLText
5006uid 3643,0
5007va (VaSet
5008font "Courier New,8,0"
5009)
5010xt "39000,15000,54000,15800"
5011st "W_INT           : std_logic
5012"
5013)
5014)
5015*153 (Net
5016uid 3644,0
5017decl (Decl
5018n "W_CS"
5019t "std_logic"
5020o 50
5021suid 112,0
5022i "'1'"
5023)
5024declText (MLText
5025uid 3645,0
5026va (VaSet
5027font "Courier New,8,0"
5028)
5029xt "39000,43000,67500,43800"
5030st "W_CS            : std_logic                    := '1'
5031"
5032)
5033)
5034*154 (PortIoInOut
5035uid 3674,0
5036shape (CompositeShape
5037uid 3675,0
5038va (VaSet
5039vasetType 1
5040fg "0,0,32768"
5041)
5042optionalChildren [
5043(Hexagon
5044uid 3676,0
5045sl 0
5046xt "111500,98625,113000,99375"
5047)
5048(Line
5049uid 3677,0
5050sl 0
5051xt "111000,99000,111500,99000"
5052pts [
5053"111000,99000"
5054"111500,99000"
5055]
5056)
5057]
5058)
5059stc 0
5060sf 1
5061tg (WTG
5062uid 3678,0
5063ps "PortIoTextPlaceStrategy"
5064stg "STSignalDisplayStrategy"
5065f (Text
5066uid 3679,0
5067va (VaSet
5068)
5069xt "114000,98500,116400,99500"
5070st "MISO"
5071blo "114000,99300"
5072tm "WireNameMgr"
5073)
5074)
5075)
5076*155 (Net
5077uid 3680,0
5078decl (Decl
5079n "MOSI"
5080t "std_logic"
5081o 34
5082suid 113,0
5083i "'0'"
5084)
5085declText (MLText
5086uid 3681,0
5087va (VaSet
5088font "Courier New,8,0"
5089)
5090xt "39000,29400,67500,30200"
5091st "MOSI            : std_logic                    := '0'
5092"
5093)
5094)
5095*156 (PortIoOut
5096uid 3688,0
5097shape (CompositeShape
5098uid 3689,0
5099va (VaSet
5100vasetType 1
5101fg "0,0,32768"
5102)
5103optionalChildren [
5104(Pentagon
5105uid 3690,0
5106sl 0
5107ro 270
5108xt "111500,99625,113000,100375"
5109)
5110(Line
5111uid 3691,0
5112sl 0
5113ro 270
5114xt "111000,100000,111500,100000"
5115pts [
5116"111000,100000"
5117"111500,100000"
5118]
5119)
5120]
5121)
5122stc 0
5123sf 1
5124tg (WTG
5125uid 3692,0
5126ps "PortIoTextPlaceStrategy"
5127stg "STSignalDisplayStrategy"
5128f (Text
5129uid 3693,0
5130va (VaSet
5131)
5132xt "114000,99500,116400,100500"
5133st "MOSI"
5134blo "114000,100300"
5135tm "WireNameMgr"
5136)
5137)
5138)
5139*157 (Net
5140uid 3694,0
5141decl (Decl
5142n "MISO"
5143t "std_logic"
5144preAdd 0
5145posAdd 0
5146o 54
5147suid 114,0
5148)
5149declText (MLText
5150uid 3695,0
5151va (VaSet
5152font "Courier New,8,0"
5153)
5154xt "39000,46200,54000,47000"
5155st "MISO            : std_logic
5156"
5157)
5158)
5159*158 (HdlText
5160uid 3700,0
5161optionalChildren [
5162*159 (EmbeddedText
5163uid 3706,0
5164commentText (CommentText
5165uid 3707,0
5166ps "CenterOffsetStrategy"
5167shape (Rectangle
5168uid 3708,0
5169va (VaSet
5170vasetType 1
5171fg "65535,65535,65535"
5172lineColor "0,0,32768"
5173lineWidth 2
5174)
5175xt "82000,106000,99000,118000"
5176)
5177oxt "0,0,18000,5000"
5178text (MLText
5179uid 3709,0
5180va (VaSet
5181)
5182xt "82200,106200,98600,118200"
5183st "
5184-- MISC 6     
5185TRG_V <= '0';
5186RS485_C_RE <= '0';
5187RS485_C_DE <= '0';   
5188RS485_C_DO <= RS485_C_DI;
5189
5190RS485_E_RE <= '0';     
5191RS485_E_DE <= '0';
5192--RS485_E_DO <= RS485_E_DI;
5193
5194-- DENABLE <= '0'; -- domino wave stopped
5195-- DENABLE <= '1'; -- domino wave running
5196
5197
5198EE_CS <= '1';
5199"
5200tm "HdlTextMgr"
5201wrapOption 3
5202visibleHeight 12000
5203visibleWidth 17000
5204)
5205)
5206)
5207]
5208shape (Rectangle
5209uid 3701,0
5210va (VaSet
5211vasetType 1
5212fg "65535,65535,37120"
5213lineColor "0,0,32768"
5214lineWidth 2
5215)
5216xt "100000,102000,108000,115000"
5217)
5218oxt "0,0,8000,10000"
5219ttg (MlTextGroup
5220uid 3702,0
5221ps "CenterOffsetStrategy"
5222stg "VerticalLayoutStrategy"
5223textVec [
5224*160 (Text
5225uid 3703,0
5226va (VaSet
5227font "Arial,8,1"
5228)
5229xt "103150,106000,105550,107000"
5230st "MISC"
5231blo "103150,106800"
5232tm "HdlTextNameMgr"
5233)
5234*161 (Text
5235uid 3704,0
5236va (VaSet
5237font "Arial,8,1"
5238)
5239xt "103150,107000,103950,108000"
5240st "6"
5241blo "103150,107800"
5242tm "HdlTextNumberMgr"
5243)
5244]
5245)
5246viewicon (ZoomableIcon
5247uid 3705,0
5248sl 0
5249va (VaSet
5250vasetType 1
5251fg "49152,49152,49152"
5252)
5253xt "100250,113250,101750,114750"
5254iconName "TextFile.png"
5255iconMaskName "TextFile.msk"
5256ftype 21
5257)
5258viewiconposition 0
5259)
5260*162 (PortIoOut
5261uid 3710,0
5262shape (CompositeShape
5263uid 3711,0
5264va (VaSet
5265vasetType 1
5266fg "0,0,32768"
5267)
5268optionalChildren [
5269(Pentagon
5270uid 3712,0
5271sl 0
5272ro 270
5273xt "111500,102625,113000,103375"
5274)
5275(Line
5276uid 3713,0
5277sl 0
5278ro 270
5279xt "111000,103000,111500,103000"
5280pts [
5281"111000,103000"
5282"111500,103000"
5283]
5284)
5285]
5286)
5287stc 0
5288sf 1
5289tg (WTG
5290uid 3714,0
5291ps "PortIoTextPlaceStrategy"
5292stg "STSignalDisplayStrategy"
5293f (Text
5294uid 3715,0
5295va (VaSet
5296)
5297xt "114000,102500,117000,103500"
5298st "TRG_V"
5299blo "114000,103300"
5300tm "WireNameMgr"
5301)
5302)
5303)
5304*163 (PortIoOut
5305uid 3716,0
5306shape (CompositeShape
5307uid 3717,0
5308va (VaSet
5309vasetType 1
5310fg "0,0,32768"
5311)
5312optionalChildren [
5313(Pentagon
5314uid 3718,0
5315sl 0
5316ro 270
5317xt "111500,103625,113000,104375"
5318)
5319(Line
5320uid 3719,0
5321sl 0
5322ro 270
5323xt "111000,104000,111500,104000"
5324pts [
5325"111000,104000"
5326"111500,104000"
5327]
5328)
5329]
5330)
5331stc 0
5332sf 1
5333tg (WTG
5334uid 3720,0
5335ps "PortIoTextPlaceStrategy"
5336stg "STSignalDisplayStrategy"
5337f (Text
5338uid 3721,0
5339va (VaSet
5340)
5341xt "114000,103500,119600,104500"
5342st "RS485_C_RE"
5343blo "114000,104300"
5344tm "WireNameMgr"
5345)
5346)
5347)
5348*164 (PortIoOut
5349uid 3722,0
5350shape (CompositeShape
5351uid 3723,0
5352va (VaSet
5353vasetType 1
5354fg "0,0,32768"
5355)
5356optionalChildren [
5357(Pentagon
5358uid 3724,0
5359sl 0
5360ro 270
5361xt "111500,104625,113000,105375"
5362)
5363(Line
5364uid 3725,0
5365sl 0
5366ro 270
5367xt "111000,105000,111500,105000"
5368pts [
5369"111000,105000"
5370"111500,105000"
5371]
5372)
5373]
5374)
5375stc 0
5376sf 1
5377tg (WTG
5378uid 3726,0
5379ps "PortIoTextPlaceStrategy"
5380stg "STSignalDisplayStrategy"
5381f (Text
5382uid 3727,0
5383va (VaSet
5384)
5385xt "114000,104500,119600,105500"
5386st "RS485_C_DE"
5387blo "114000,105300"
5388tm "WireNameMgr"
5389)
5390)
5391)
5392*165 (PortIoOut
5393uid 3728,0
5394shape (CompositeShape
5395uid 3729,0
5396va (VaSet
5397vasetType 1
5398fg "0,0,32768"
5399)
5400optionalChildren [
5401(Pentagon
5402uid 3730,0
5403sl 0
5404ro 270
5405xt "111500,105625,113000,106375"
5406)
5407(Line
5408uid 3731,0
5409sl 0
5410ro 270
5411xt "111000,106000,111500,106000"
5412pts [
5413"111000,106000"
5414"111500,106000"
5415]
5416)
5417]
5418)
5419stc 0
5420sf 1
5421tg (WTG
5422uid 3732,0
5423ps "PortIoTextPlaceStrategy"
5424stg "STSignalDisplayStrategy"
5425f (Text
5426uid 3733,0
5427va (VaSet
5428)
5429xt "114000,105500,119500,106500"
5430st "RS485_E_RE"
5431blo "114000,106300"
5432tm "WireNameMgr"
5433)
5434)
5435)
5436*166 (PortIoOut
5437uid 3734,0
5438shape (CompositeShape
5439uid 3735,0
5440va (VaSet
5441vasetType 1
5442fg "0,0,32768"
5443)
5444optionalChildren [
5445(Pentagon
5446uid 3736,0
5447sl 0
5448ro 270
5449xt "111500,106625,113000,107375"
5450)
5451(Line
5452uid 3737,0
5453sl 0
5454ro 270
5455xt "111000,107000,111500,107000"
5456pts [
5457"111000,107000"
5458"111500,107000"
5459]
5460)
5461]
5462)
5463stc 0
5464sf 1
5465tg (WTG
5466uid 3738,0
5467ps "PortIoTextPlaceStrategy"
5468stg "STSignalDisplayStrategy"
5469f (Text
5470uid 3739,0
5471va (VaSet
5472)
5473xt "114000,106500,119500,107500"
5474st "RS485_E_DE"
5475blo "114000,107300"
5476tm "WireNameMgr"
5477)
5478)
5479)
5480*167 (PortIoOut
5481uid 3740,0
5482shape (CompositeShape
5483uid 3741,0
5484va (VaSet
5485vasetType 1
5486fg "0,0,32768"
5487)
5488optionalChildren [
5489(Pentagon
5490uid 3742,0
5491sl 0
5492ro 270
5493xt "111500,120625,113000,121375"
5494)
5495(Line
5496uid 3743,0
5497sl 0
5498ro 270
5499xt "111000,121000,111500,121000"
5500pts [
5501"111000,121000"
5502"111500,121000"
5503]
5504)
5505]
5506)
5507stc 0
5508sf 1
5509tg (WTG
5510uid 3744,0
5511ps "PortIoTextPlaceStrategy"
5512stg "STSignalDisplayStrategy"
5513f (Text
5514uid 3745,0
5515va (VaSet
5516)
5517xt "114000,120500,118000,121500"
5518st "DENABLE"
5519blo "114000,121300"
5520tm "WireNameMgr"
5521)
5522)
5523)
5524*168 (PortIoOut
5525uid 3752,0
5526shape (CompositeShape
5527uid 3753,0
5528va (VaSet
5529vasetType 1
5530fg "0,0,32768"
5531)
5532optionalChildren [
5533(Pentagon
5534uid 3754,0
5535sl 0
5536ro 270
5537xt "111500,109625,113000,110375"
5538)
5539(Line
5540uid 3755,0
5541sl 0
5542ro 270
5543xt "111000,110000,111500,110000"
5544pts [
5545"111000,110000"
5546"111500,110000"
5547]
5548)
5549]
5550)
5551stc 0
5552sf 1
5553tg (WTG
5554uid 3756,0
5555ps "PortIoTextPlaceStrategy"
5556stg "STSignalDisplayStrategy"
5557f (Text
5558uid 3757,0
5559va (VaSet
5560)
5561xt "114000,109500,116900,110500"
5562st "EE_CS"
5563blo "114000,110300"
5564tm "WireNameMgr"
5565)
5566)
5567)
5568*169 (Net
5569uid 3864,0
5570decl (Decl
5571n "TRG_V"
5572t "std_logic"
5573o 48
5574suid 126,0
5575)
5576declText (MLText
5577uid 3865,0
5578va (VaSet
5579font "Courier New,8,0"
5580)
5581xt "39000,41400,54000,42200"
5582st "TRG_V           : std_logic
5583"
5584)
5585)
5586*170 (Net
5587uid 3866,0
5588decl (Decl
5589n "RS485_C_RE"
5590t "std_logic"
5591o 38
5592suid 127,0
5593)
5594declText (MLText
5595uid 3867,0
5596va (VaSet
5597font "Courier New,8,0"
5598)
5599xt "39000,33400,54000,34200"
5600st "RS485_C_RE      : std_logic
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5618st "RS485_C_DE      : std_logic
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5620)
5621)
5622*172 (Net
5623uid 3870,0
5624decl (Decl
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5626t "std_logic"
5627o 40
5628suid 129,0
5629)
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5632va (VaSet
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5634)
5635xt "39000,35000,54000,35800"
5636st "RS485_E_RE      : std_logic
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5638)
5639)
5640*173 (Net
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5645o 39
5646suid 130,0
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5650va (VaSet
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5660decl (Decl
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5663o 25
5664suid 131,0
5665i "'0'"
5666)
5667declText (MLText
5668uid 3875,0
5669va (VaSet
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5675)
5676)
5677*175 (Net
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5691st "EE_CS           : std_logic
5692"
5693)
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5723sf 1
5724tg (WTG
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5764)
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5767stc 0
5768sf 1
5769tg (WTG
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5781tm "WireNameMgr"
5782)
5783)
5784)
5785*178 (PortIoOut
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5813sf 1
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5822xt "13600,114500,18000,115500"
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5825blo "18000,115300"
5826tm "WireNameMgr"
5827)
5828)
5829)
5830*179 (PortIoOut
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5852"20500,116000"
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5858sf 1
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5870blo "18000,116300"
5871tm "WireNameMgr"
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5875*180 (PortIoOut
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5890(Line
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5897"111500,120000"
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5899)
5900]
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5903sf 1
5904tg (WTG
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5910va (VaSet
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5912xt "114000,119500,115900,120500"
5913st "D_T"
5914blo "114000,120300"
5915tm "WireNameMgr"
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5919*181 (Net
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5925o 28
5926suid 141,0
5927i "(OTHERS => '0')"
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5929declText (MLText
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5934xt "39000,26200,73500,27000"
5935st "D_T             : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')
5936"
5937)
5938)
5939*182 (PortIoIn
5940uid 6781,0
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5961"59000,157000"
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5963)
5964]
5965)
5966stc 0
5967sf 1
5968tg (WTG
5969uid 6785,0
5970ps "PortIoTextPlaceStrategy"
5971stg "STSignalDisplayStrategy"
5972f (Text
5973uid 6786,0
5974va (VaSet
5975)
5976xt "51800,156500,56000,157500"
5977st "D_PLLLCK"
5978ju 2
5979blo "56000,157300"
5980tm "WireNameMgr"
5981)
5982)
5983)
5984*183 (Net
5985uid 6793,0
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5989b "(3 DOWNTO 0)"
5990o 10
5991suid 152,0
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5999st "D_PLLLCK        : std_logic_vector(3 DOWNTO 0)
6000"
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6018(Line
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6024"75000,157000"
6025"75500,157000"
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6030stc 0
6031sf 1
6032tg (WTG
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6039)
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6047*185 (Net
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6051t "std_logic_vector"
6052b "(3 DOWNTO 0)"
6053o 29
6054suid 154,0
6055i "(others => '0')"
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6057declText (MLText
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6060font "Courier New,8,0"
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6062xt "39000,27000,73500,27800"
6063st "D_T2            : std_logic_vector(3 DOWNTO 0) := (others => '0')
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6067*186 (HdlText
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6083xt "62000,153000,72000,156000"
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6085oxt "0,0,18000,5000"
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6090xt "62200,153200,70300,154200"
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6092D_T2 <= D_PLLLCK;
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6094tm "HdlTextMgr"
6095wrapOption 3
6096visibleHeight 3000
6097visibleWidth 10000
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6100)
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6102shape (Rectangle
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6179-- eb2 8                                       
6180D_A <= drs_channel_id;
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6182"
6183tm "HdlTextMgr"
6184wrapOption 3
6185visibleHeight 6000
6186visibleWidth 20000
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6307*196 (Net
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6418tg (CPTG
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6434s (Text
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6440xt "137600,450107,137600,450107"
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6442blo "137600,450107"
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6445thePort (LogicalPort
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7173-- eb3 9                         
7174A0_T(0) <= CLK50_OUT;
7175A0_T(1)  <= CLK25_OUT;
7176A0_T(2) <= CLK25_PSOUT;
7177A0_T(3) <= PS_DIR_IN;
7178A0_T(4) <= PS_DO_IN;
7179A0_T(5) <= PSINCDEC_OUT;
7180A0_T(6) <= PSEN_OUT;
7181A0_T(7) <= DCM_locked;
7182
7183A1_T(0) <= ready;
7184A1_T(1) <= shifting;
7185A1_T(2) <= PSDONE_extraOUT;
7186A1_T(3) <= PSCLK_OUT;
7187A1_T(4) <= LOCKED_extraOUT;
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7189A1_T(5) <= '0';
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7399*246 (Net
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7403t "std_logic"
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7405posAdd 0
7406o 77
7407suid 192,0
7408i "'0'"
7409)
7410declText (MLText
7411uid 10561,0
7412va (VaSet
7413font "Courier New,8,0"
7414)
7415xt "39000,65600,71000,66400"
7416st "SIGNAL ready           : std_logic                    := '0'
7417"
7418)
7419)
7420*247 (Net
7421uid 10568,0
7422decl (Decl
7423n "shifting"
7424t "std_logic"
7425prec "-- status:"
7426preAdd 0
7427posAdd 0
7428o 79
7429suid 193,0
7430i "'0'"
7431)
7432declText (MLText
7433uid 10569,0
7434va (VaSet
7435font "Courier New,8,0"
7436)
7437xt "39000,67200,71000,68800"
7438st "-- status:
7439SIGNAL shifting        : std_logic                    := '0'
7440"
7441)
7442)
7443*248 (Net
7444uid 10576,0
7445decl (Decl
7446n "PSDONE_extraOUT"
7447t "std_logic"
7448o 65
7449suid 194,0
7450)
7451declText (MLText
7452uid 10577,0
7453va (VaSet
7454font "Courier New,8,0"
7455)
7456xt "39000,56000,57500,56800"
7457st "SIGNAL PSDONE_extraOUT : std_logic
7458"
7459)
7460)
7461*249 (Net
7462uid 10584,0
7463decl (Decl
7464n "PSCLK_OUT"
7465t "std_logic"
7466o 64
7467suid 195,0
7468)
7469declText (MLText
7470uid 10585,0
7471va (VaSet
7472font "Courier New,8,0"
7473)
7474xt "39000,55200,57500,56000"
7475st "SIGNAL PSCLK_OUT       : std_logic
7476"
7477)
7478)
7479*250 (Net
7480uid 10592,0
7481decl (Decl
7482n "LOCKED_extraOUT"
7483t "std_logic"
7484o 63
7485suid 196,0
7486)
7487declText (MLText
7488uid 10593,0
7489va (VaSet
7490font "Courier New,8,0"
7491)
7492xt "39000,54400,57500,55200"
7493st "SIGNAL LOCKED_extraOUT : std_logic
7494"
7495)
7496)
7497*251 (PortIoIn
7498uid 11090,0
7499shape (CompositeShape
7500uid 11091,0
7501va (VaSet
7502vasetType 1
7503fg "0,0,32768"
7504)
7505optionalChildren [
7506(Pentagon
7507uid 11092,0
7508sl 0
7509ro 270
7510xt "94000,102625,95500,103375"
7511)
7512(Line
7513uid 11093,0
7514sl 0
7515ro 270
7516xt "95500,103000,96000,103000"
7517pts [
7518"95500,103000"
7519"96000,103000"
7520]
7521)
7522]
7523)
7524stc 0
7525sf 1
7526tg (WTG
7527uid 11094,0
7528ps "PortIoTextPlaceStrategy"
7529stg "STSignalDisplayStrategy"
7530f (Text
7531uid 11095,0
7532va (VaSet
7533)
7534xt "87700,102500,93000,103500"
7535st "RS485_C_DI"
7536ju 2
7537blo "93000,103300"
7538tm "WireNameMgr"
7539)
7540)
7541)
7542*252 (Net
7543uid 11102,0
7544decl (Decl
7545n "RS485_C_DI"
7546t "std_logic"
7547o 11
7548suid 197,0
7549)
7550declText (MLText
7551uid 11103,0
7552va (VaSet
7553font "Courier New,8,0"
7554)
7555xt "39000,11800,54000,12600"
7556st "RS485_C_DI      : std_logic
7557"
7558)
7559)
7560*253 (PortIoOut
7561uid 11104,0
7562shape (CompositeShape
7563uid 11105,0
7564va (VaSet
7565vasetType 1
7566fg "0,0,32768"
7567)
7568optionalChildren [
7569(Pentagon
7570uid 11106,0
7571sl 0
7572ro 270
7573xt "111500,111625,113000,112375"
7574)
7575(Line
7576uid 11107,0
7577sl 0
7578ro 270
7579xt "111000,112000,111500,112000"
7580pts [
7581"111000,112000"
7582"111500,112000"
7583]
7584)
7585]
7586)
7587stc 0
7588sf 1
7589tg (WTG
7590uid 11108,0
7591ps "PortIoTextPlaceStrategy"
7592stg "STSignalDisplayStrategy"
7593f (Text
7594uid 11109,0
7595va (VaSet
7596)
7597xt "114000,111500,119700,112500"
7598st "RS485_C_DO"
7599blo "114000,112300"
7600tm "WireNameMgr"
7601)
7602)
7603)
7604*254 (Net
7605uid 11116,0
7606decl (Decl
7607n "RS485_C_DO"
7608t "std_logic"
7609o 37
7610suid 198,0
7611)
7612declText (MLText
7613uid 11117,0
7614va (VaSet
7615font "Courier New,8,0"
7616)
7617xt "39000,32600,54000,33400"
7618st "RS485_C_DO      : std_logic
7619"
7620)
7621)
7622*255 (PortIoIn
7623uid 11508,0
7624shape (CompositeShape
7625uid 11509,0
7626va (VaSet
7627vasetType 1
7628fg "0,0,32768"
7629)
7630optionalChildren [
7631(Pentagon
7632uid 11510,0
7633sl 0
7634ro 270
7635xt "121000,115625,122500,116375"
7636)
7637(Line
7638uid 11511,0
7639sl 0
7640ro 270
7641xt "122500,116000,123000,116000"
7642pts [
7643"122500,116000"
7644"123000,116000"
7645]
7646)
7647]
7648)
7649stc 0
7650sf 1
7651tg (WTG
7652uid 11512,0
7653ps "PortIoTextPlaceStrategy"
7654stg "STSignalDisplayStrategy"
7655f (Text
7656uid 11513,0
7657va (VaSet
7658)
7659xt "114800,115500,120000,116500"
7660st "RS485_E_DI"
7661ju 2
7662blo "120000,116300"
7663tm "WireNameMgr"
7664)
7665)
7666)
7667*256 (Net
7668uid 11520,0
7669decl (Decl
7670n "RS485_E_DI"
7671t "std_logic"
7672o 12
7673suid 200,0
7674)
7675declText (MLText
7676uid 11521,0
7677va (VaSet
7678font "Courier New,8,0"
7679)
7680xt "39000,12600,54000,13400"
7681st "RS485_E_DI      : std_logic
7682"
7683)
7684)
7685*257 (Net
7686uid 11534,0
7687decl (Decl
7688n "RS485_E_DO"
7689t "std_logic"
7690o 13
7691suid 201,0
7692)
7693declText (MLText
7694uid 11535,0
7695va (VaSet
7696font "Courier New,8,0"
7697)
7698xt "39000,13400,54000,14200"
7699st "RS485_E_DO      : std_logic
7700"
7701)
7702)
7703*258 (PortIoIn
7704uid 11922,0
7705shape (CompositeShape
7706uid 11923,0
7707va (VaSet
7708vasetType 1
7709fg "0,0,32768"
7710)
7711optionalChildren [
7712(Pentagon
7713uid 11924,0
7714sl 0
7715ro 90
7716xt "126500,113625,128000,114375"
7717)
7718(Line
7719uid 11925,0
7720sl 0
7721ro 90
7722xt "126000,114000,126500,114000"
7723pts [
7724"126500,114000"
7725"126000,114000"
7726]
7727)
7728]
7729)
7730stc 0
7731sf 1
7732tg (WTG
7733uid 11926,0
7734ps "PortIoTextPlaceStrategy"
7735stg "STSignalDisplayStrategy"
7736f (Text
7737uid 11927,0
7738va (VaSet
7739)
7740xt "129000,113500,134600,114500"
7741st "RS485_E_DO"
7742blo "129000,114300"
7743tm "WireNameMgr"
7744)
7745)
7746)
7747*259 (PortIoOut
7748uid 12326,0
7749shape (CompositeShape
7750uid 12327,0
7751va (VaSet
7752vasetType 1
7753fg "0,0,32768"
7754)
7755optionalChildren [
7756(Pentagon
7757uid 12328,0
7758sl 0
7759ro 270
7760xt "87500,139625,89000,140375"
7761)
7762(Line
7763uid 12329,0
7764sl 0
7765ro 270
7766xt "87000,140000,87500,140000"
7767pts [
7768"87000,140000"
7769"87500,140000"
7770]
7771)
7772]
7773)
7774stc 0
7775sf 1
7776tg (WTG
7777uid 12330,0
7778ps "PortIoTextPlaceStrategy"
7779stg "STSignalDisplayStrategy"
7780f (Text
7781uid 12331,0
7782va (VaSet
7783)
7784xt "89000,139500,91300,140500"
7785st "SRIN"
7786blo "89000,140300"
7787tm "WireNameMgr"
7788)
7789)
7790)
7791*260 (Net
7792uid 12334,0
7793decl (Decl
7794n "SRIN"
7795t "std_logic"
7796o 42
7797suid 203,0
7798i "'0'"
7799)
7800declText (MLText
7801uid 12335,0
7802va (VaSet
7803font "Courier New,8,0"
7804)
7805xt "39000,36600,67500,37400"
7806st "SRIN            : std_logic                    := '0'
7807"
7808)
7809)
7810*261 (PortIoOut
7811uid 12539,0
7812shape (CompositeShape
7813uid 12540,0
7814va (VaSet
7815vasetType 1
7816fg "0,0,32768"
7817)
7818optionalChildren [
7819(Pentagon
7820uid 12541,0
7821sl 0
7822ro 270
7823xt "87500,140625,89000,141375"
7824)
7825(Line
7826uid 12542,0
7827sl 0
7828ro 270
7829xt "87000,141000,87500,141000"
7830pts [
7831"87000,141000"
7832"87500,141000"
7833]
7834)
7835]
7836)
7837stc 0
7838sf 1
7839tg (WTG
7840uid 12543,0
7841ps "PortIoTextPlaceStrategy"
7842stg "STSignalDisplayStrategy"
7843f (Text
7844uid 12544,0
7845va (VaSet
7846)
7847xt "90000,140500,95100,141500"
7848st "AMBER_LED"
7849blo "90000,141300"
7850tm "WireNameMgr"
7851)
7852)
7853)
7854*262 (PortIoOut
7855uid 12553,0
7856shape (CompositeShape
7857uid 12554,0
7858va (VaSet
7859vasetType 1
7860fg "0,0,32768"
7861)
7862optionalChildren [
7863(Pentagon
7864uid 12555,0
7865sl 0
7866ro 270
7867xt "87500,141625,89000,142375"
7868)
7869(Line
7870uid 12556,0
7871sl 0
7872ro 270
7873xt "87000,142000,87500,142000"
7874pts [
7875"87000,142000"
7876"87500,142000"
7877]
7878)
7879]
7880)
7881stc 0
7882sf 1
7883tg (WTG
7884uid 12557,0
7885ps "PortIoTextPlaceStrategy"
7886stg "STSignalDisplayStrategy"
7887f (Text
7888uid 12558,0
7889va (VaSet
7890)
7891xt "90000,141500,95100,142500"
7892st "GREEN_LED"
7893blo "90000,142300"
7894tm "WireNameMgr"
7895)
7896)
7897)
7898*263 (PortIoOut
7899uid 12567,0
7900shape (CompositeShape
7901uid 12568,0
7902va (VaSet
7903vasetType 1
7904fg "0,0,32768"
7905)
7906optionalChildren [
7907(Pentagon
7908uid 12569,0
7909sl 0
7910ro 270
7911xt "87500,142625,89000,143375"
7912)
7913(Line
7914uid 12570,0
7915sl 0
7916ro 270
7917xt "87000,143000,87500,143000"
7918pts [
7919"87000,143000"
7920"87500,143000"
7921]
7922)
7923]
7924)
7925stc 0
7926sf 1
7927tg (WTG
7928uid 12571,0
7929ps "PortIoTextPlaceStrategy"
7930stg "STSignalDisplayStrategy"
7931f (Text
7932uid 12572,0
7933va (VaSet
7934)
7935xt "90000,142500,94000,143500"
7936st "RED_LED"
7937blo "90000,143300"
7938tm "WireNameMgr"
7939)
7940)
7941)
7942*264 (Net
7943uid 12762,0
7944decl (Decl
7945n "AMBER_LED"
7946t "std_logic"
7947o 31
7948suid 207,0
7949)
7950declText (MLText
7951uid 12763,0
7952va (VaSet
7953font "Courier New,8,0"
7954)
7955xt "39000,18200,54000,19000"
7956st "AMBER_LED       : std_logic
7957"
7958)
7959)
7960*265 (Net
7961uid 12764,0
7962decl (Decl
7963n "GREEN_LED"
7964t "std_logic"
7965o 32
7966suid 208,0
7967)
7968declText (MLText
7969uid 12765,0
7970va (VaSet
7971font "Courier New,8,0"
7972)
7973xt "39000,28600,54000,29400"
7974st "GREEN_LED       : std_logic
7975"
7976)
7977)
7978*266 (Net
7979uid 12766,0
7980decl (Decl
7981n "RED_LED"
7982t "std_logic"
7983o 33
7984suid 209,0
7985)
7986declText (MLText
7987uid 12767,0
7988va (VaSet
7989font "Courier New,8,0"
7990)
7991xt "39000,31000,54000,31800"
7992st "RED_LED         : std_logic
7993"
7994)
7995)
7996*267 (Wire
7997uid 245,0
7998shape (OrthoPolyLine
7999uid 246,0
8000va (VaSet
8001vasetType 3
8002)
8003xt "21000,68000,51250,68000"
8004pts [
8005"51250,68000"
8006"21000,68000"
8007]
8008)
8009start &27
8010end &67
8011ss 0
8012sat 32
8013eat 32
8014stc 0
8015st 0
8016sf 1
8017si 0
8018tg (WTG
8019uid 249,0
8020ps "ConnStartEndStrategy"
8021stg "STSignalDisplayStrategy"
8022f (Text
8023uid 250,0
8024va (VaSet
8025isHidden 1
8026)
8027xt "53250,67000,56050,68000"
8028st "X_50M"
8029blo "53250,67800"
8030tm "WireNameMgr"
8031)
8032)
8033on &88
8034)
8035*268 (Wire
8036uid 277,0
8037shape (OrthoPolyLine
8038uid 278,0
8039va (VaSet
8040vasetType 3
8041lineWidth 2
8042)
8043xt "32000,81000,51250,81000"
8044pts [
8045"51250,81000"
8046"32000,81000"
8047]
8048)
8049start &17
8050end &68
8051sat 32
8052eat 2
8053sty 1
8054st 0
8055sf 1
8056si 0
8057tg (WTG
8058uid 281,0
8059ps "ConnStartEndStrategy"
8060stg "STSignalDisplayStrategy"
8061f (Text
8062uid 282,0
8063va (VaSet
8064)
8065xt "44000,80000,49900,81000"
8066st "board_id : (3:0)"
8067blo "44000,80800"
8068tm "WireNameMgr"
8069)
8070)
8071on &72
8072)
8073*269 (Wire
8074uid 285,0
8075shape (OrthoPolyLine
8076uid 286,0
8077va (VaSet
8078vasetType 3
8079lineWidth 2
8080)
8081xt "32000,82000,51250,82000"
8082pts [
8083"51250,82000"
8084"32000,82000"
8085]
8086)
8087start &18
8088end &68
8089sat 32
8090eat 2
8091sty 1
8092st 0
8093sf 1
8094si 0
8095tg (WTG
8096uid 289,0
8097ps "ConnStartEndStrategy"
8098stg "STSignalDisplayStrategy"
8099f (Text
8100uid 290,0
8101va (VaSet
8102)
8103xt "45000,81000,50700,82000"
8104st "crate_id : (1:0)"
8105blo "45000,81800"
8106tm "WireNameMgr"
8107)
8108)
8109on &73
8110)
8111*270 (Wire
8112uid 362,0
8113shape (OrthoPolyLine
8114uid 363,0
8115va (VaSet
8116vasetType 3
8117)
8118xt "21000,90000,51250,90000"
8119pts [
8120"21000,90000"
8121"51250,90000"
8122]
8123)
8124start &96
8125end &16
8126sat 32
8127eat 32
8128stc 0
8129st 0
8130sf 1
8131si 0
8132tg (WTG
8133uid 364,0
8134ps "ConnStartEndStrategy"
8135stg "STSignalDisplayStrategy"
8136f (Text
8137uid 365,0
8138va (VaSet
8139isHidden 1
8140)
8141xt "22000,89000,25600,90000"
8142st "OE_ADC"
8143blo "22000,89800"
8144tm "WireNameMgr"
8145)
8146)
8147on &97
8148)
8149*271 (Wire
8150uid 418,0
8151shape (OrthoPolyLine
8152uid 419,0
8153va (VaSet
8154vasetType 3
8155)
8156xt "80750,71000,111000,71000"
8157pts [
8158"80750,71000"
8159"111000,71000"
8160]
8161)
8162start &13
8163end &74
8164sat 32
8165eat 32
8166stc 0
8167st 0
8168sf 1
8169si 0
8170tg (WTG
8171uid 422,0
8172ps "ConnStartEndStrategy"
8173stg "STSignalDisplayStrategy"
8174f (Text
8175uid 423,0
8176va (VaSet
8177isHidden 1
8178)
8179xt "82000,70000,85100,71000"
8180st "W_RES"
8181blo "82000,70800"
8182tm "WireNameMgr"
8183)
8184)
8185on &149
8186)
8187*272 (Wire
8188uid 426,0
8189shape (OrthoPolyLine
8190uid 427,0
8191va (VaSet
8192vasetType 3
8193lineWidth 2
8194)
8195xt "80750,68000,111000,68000"
8196pts [
8197"80750,68000"
8198"111000,68000"
8199]
8200)
8201start &19
8202end &75
8203sat 32
8204eat 32
8205sty 1
8206stc 0
8207st 0
8208sf 1
8209si 0
8210tg (WTG
8211uid 430,0
8212ps "ConnStartEndStrategy"
8213stg "STSignalDisplayStrategy"
8214f (Text
8215uid 431,0
8216va (VaSet
8217isHidden 1
8218)
8219xt "82000,67000,84000,68000"
8220st "W_A"
8221blo "82000,67800"
8222tm "WireNameMgr"
8223)
8224)
8225on &147
8226)
8227*273 (Wire
8228uid 434,0
8229shape (OrthoPolyLine
8230uid 435,0
8231va (VaSet
8232vasetType 3
8233)
8234xt "80750,75000,111000,75000"
8235pts [
8236"80750,75000"
8237"111000,75000"
8238]
8239)
8240start &20
8241end &76
8242sat 32
8243eat 32
8244stc 0
8245st 0
8246sf 1
8247si 0
8248tg (WTG
8249uid 438,0
8250ps "ConnStartEndStrategy"
8251stg "STSignalDisplayStrategy"
8252f (Text
8253uid 439,0
8254va (VaSet
8255isHidden 1
8256)
8257xt "82000,74000,84600,75000"
8258st "W_CS"
8259blo "82000,74800"
8260tm "WireNameMgr"
8261)
8262)
8263on &153
8264)
8265*274 (Wire
8266uid 442,0
8267shape (OrthoPolyLine
8268uid 443,0
8269va (VaSet
8270vasetType 3
8271lineWidth 2
8272)
8273xt "80750,69000,111000,69000"
8274pts [
8275"80750,69000"
8276"111000,69000"
8277]
8278)
8279start &21
8280end &77
8281sat 32
8282eat 32
8283sty 1
8284stc 0
8285st 0
8286sf 1
8287si 0
8288tg (WTG
8289uid 446,0
8290ps "ConnStartEndStrategy"
8291stg "STSignalDisplayStrategy"
8292f (Text
8293uid 447,0
8294va (VaSet
8295isHidden 1
8296)
8297xt "82000,68000,84100,69000"
8298st "W_D"
8299blo "82000,68800"
8300tm "WireNameMgr"
8301)
8302)
8303on &148
8304)
8305*275 (Wire
8306uid 450,0
8307shape (OrthoPolyLine
8308uid 451,0
8309va (VaSet
8310vasetType 3
8311)
8312xt "80750,74000,111000,74000"
8313pts [
8314"111000,74000"
8315"80750,74000"
8316]
8317)
8318start &78
8319end &22
8320sat 32
8321eat 32
8322stc 0
8323st 0
8324sf 1
8325si 0
8326tg (WTG
8327uid 454,0
8328ps "ConnStartEndStrategy"
8329stg "STSignalDisplayStrategy"
8330f (Text
8331uid 455,0
8332va (VaSet
8333isHidden 1
8334)
8335xt "82000,73000,84800,74000"
8336st "W_INT"
8337blo "82000,73800"
8338tm "WireNameMgr"
8339)
8340)
8341on &152
8342)
8343*276 (Wire
8344uid 458,0
8345shape (OrthoPolyLine
8346uid 459,0
8347va (VaSet
8348vasetType 3
8349)
8350xt "80750,72000,111000,72000"
8351pts [
8352"80750,72000"
8353"111000,72000"
8354]
8355)
8356start &23
8357end &79
8358sat 32
8359eat 32
8360stc 0
8361st 0
8362sf 1
8363si 0
8364tg (WTG
8365uid 462,0
8366ps "ConnStartEndStrategy"
8367stg "STSignalDisplayStrategy"
8368f (Text
8369uid 463,0
8370va (VaSet
8371isHidden 1
8372)
8373xt "82000,71000,84700,72000"
8374st "W_RD"
8375blo "82000,71800"
8376tm "WireNameMgr"
8377)
8378)
8379on &150
8380)
8381*277 (Wire
8382uid 466,0
8383shape (OrthoPolyLine
8384uid 467,0
8385va (VaSet
8386vasetType 3
8387)
8388xt "80750,73000,111000,73000"
8389pts [
8390"80750,73000"
8391"111000,73000"
8392]
8393)
8394start &24
8395end &80
8396sat 32
8397eat 32
8398stc 0
8399st 0
8400sf 1
8401si 0
8402tg (WTG
8403uid 470,0
8404ps "ConnStartEndStrategy"
8405stg "STSignalDisplayStrategy"
8406f (Text
8407uid 471,0
8408va (VaSet
8409isHidden 1
8410)
8411xt "82000,72000,84800,73000"
8412st "W_WR"
8413blo "82000,72800"
8414tm "WireNameMgr"
8415)
8416)
8417on &151
8418)
8419*278 (Wire
8420uid 1467,0
8421shape (OrthoPolyLine
8422uid 1468,0
8423va (VaSet
8424vasetType 3
8425)
8426xt "32000,95000,51250,95000"
8427pts [
8428"32000,95000"
8429"51250,95000"
8430]
8431)
8432start &100
8433end &28
8434sat 2
8435eat 32
8436st 0
8437sf 1
8438si 0
8439tg (WTG
8440uid 1471,0
8441ps "ConnStartEndStrategy"
8442stg "STSignalDisplayStrategy"
8443f (Text
8444uid 1472,0
8445va (VaSet
8446)
8447xt "34000,94000,39900,95000"
8448st "adc_data_array"
8449blo "34000,94800"
8450tm "WireNameMgr"
8451)
8452)
8453on &81
8454)
8455*279 (Wire
8456uid 1730,0
8457shape (OrthoPolyLine
8458uid 1731,0
8459va (VaSet
8460vasetType 3
8461lineWidth 2
8462)
8463xt "21000,89000,51250,89000"
8464pts [
8465"21000,89000"
8466"51250,89000"
8467]
8468)
8469start &98
8470end &29
8471sat 32
8472eat 32
8473sty 1
8474stc 0
8475st 0
8476sf 1
8477si 0
8478tg (WTG
8479uid 1734,0
8480ps "ConnStartEndStrategy"
8481stg "STSignalDisplayStrategy"
8482f (Text
8483uid 1735,0
8484va (VaSet
8485isHidden 1
8486)
8487xt "22000,88000,25000,89000"
8488st "A_OTR"
8489blo "22000,88800"
8490tm "WireNameMgr"
8491)
8492)
8493on &99
8494)
8495*280 (Wire
8496uid 1833,0
8497shape (OrthoPolyLine
8498uid 1834,0
8499va (VaSet
8500vasetType 3
8501lineWidth 2
8502)
8503xt "12000,126000,21000,126000"
8504pts [
8505"21000,126000"
8506"12000,126000"
8507]
8508)
8509start &190
8510end &128
8511sat 2
8512eat 32
8513sty 1
8514stc 0
8515st 0
8516sf 1
8517si 0
8518tg (WTG
8519uid 1837,0
8520ps "ConnStartEndStrategy"
8521stg "STSignalDisplayStrategy"
8522f (Text
8523uid 1838,0
8524va (VaSet
8525isHidden 1
8526)
8527xt "13000,125000,14900,126000"
8528st "D_A"
8529blo "13000,125800"
8530tm "WireNameMgr"
8531)
8532)
8533on &129
8534)
8535*281 (Wire
8536uid 1841,0
8537shape (OrthoPolyLine
8538uid 1842,0
8539va (VaSet
8540vasetType 3
8541)
8542xt "21000,110000,51250,110000"
8543pts [
8544"51250,110000"
8545"21000,110000"
8546]
8547)
8548start &31
8549end &130
8550sat 32
8551eat 32
8552stc 0
8553st 0
8554sf 1
8555si 0
8556tg (WTG
8557uid 1845,0
8558ps "ConnStartEndStrategy"
8559stg "STSignalDisplayStrategy"
8560f (Text
8561uid 1846,0
8562va (VaSet
8563isHidden 1
8564)
8565xt "22000,109000,25500,110000"
8566st "DWRITE"
8567blo "22000,109800"
8568tm "WireNameMgr"
8569)
8570)
8571on &131
8572)
8573*282 (Wire
8574uid 1865,0
8575shape (OrthoPolyLine
8576uid 1866,0
8577va (VaSet
8578vasetType 3
8579)
8580xt "21000,105000,51250,105000"
8581pts [
8582"21000,105000"
8583"51250,105000"
8584]
8585)
8586start &120
8587end &32
8588sat 32
8589eat 32
8590stc 0
8591st 0
8592sf 1
8593si 0
8594tg (WTG
8595uid 1869,0
8596ps "ConnStartEndStrategy"
8597stg "STSignalDisplayStrategy"
8598f (Text
8599uid 1870,0
8600va (VaSet
8601isHidden 1
8602)
8603xt "22000,104000,26600,105000"
8604st "D0_SROUT"
8605blo "22000,104800"
8606tm "WireNameMgr"
8607)
8608)
8609on &124
8610)
8611*283 (Wire
8612uid 1873,0
8613shape (OrthoPolyLine
8614uid 1874,0
8615va (VaSet
8616vasetType 3
8617)
8618xt "21000,106000,51250,106000"
8619pts [
8620"21000,106000"
8621"51250,106000"
8622]
8623)
8624start &121
8625end &33
8626sat 32
8627eat 32
8628stc 0
8629st 0
8630sf 1
8631si 0
8632tg (WTG
8633uid 1877,0
8634ps "ConnStartEndStrategy"
8635stg "STSignalDisplayStrategy"
8636f (Text
8637uid 1878,0
8638va (VaSet
8639isHidden 1
8640)
8641xt "22000,105000,26600,106000"
8642st "D1_SROUT"
8643blo "22000,105800"
8644tm "WireNameMgr"
8645)
8646)
8647on &125
8648)
8649*284 (Wire
8650uid 1881,0
8651shape (OrthoPolyLine
8652uid 1882,0
8653va (VaSet
8654vasetType 3
8655)
8656xt "21000,107000,51250,107000"
8657pts [
8658"21000,107000"
8659"51250,107000"
8660]
8661)
8662start &122
8663end &34
8664sat 32
8665eat 32
8666stc 0
8667st 0
8668sf 1
8669si 0
8670tg (WTG
8671uid 1885,0
8672ps "ConnStartEndStrategy"
8673stg "STSignalDisplayStrategy"
8674f (Text
8675uid 1886,0
8676va (VaSet
8677isHidden 1
8678)
8679xt "22000,106000,26600,107000"
8680st "D2_SROUT"
8681blo "22000,106800"
8682tm "WireNameMgr"
8683)
8684)
8685on &126
8686)
8687*285 (Wire
8688uid 1889,0
8689shape (OrthoPolyLine
8690uid 1890,0
8691va (VaSet
8692vasetType 3
8693)
8694xt "21000,108000,51250,108000"
8695pts [
8696"21000,108000"
8697"51250,108000"
8698]
8699)
8700start &123
8701end &35
8702sat 32
8703eat 32
8704stc 0
8705st 0
8706sf 1
8707si 0
8708tg (WTG
8709uid 1893,0
8710ps "ConnStartEndStrategy"
8711stg "STSignalDisplayStrategy"
8712f (Text
8713uid 1894,0
8714va (VaSet
8715isHidden 1
8716)
8717xt "22000,107000,26600,108000"
8718st "D3_SROUT"
8719blo "22000,107800"
8720tm "WireNameMgr"
8721)
8722)
8723on &127
8724)
8725*286 (Wire
8726uid 2409,0
8727shape (OrthoPolyLine
8728uid 2410,0
8729va (VaSet
8730vasetType 3
8731)
8732xt "21000,111000,51250,111000"
8733pts [
8734"51250,111000"
8735"21000,111000"
8736]
8737)
8738start &36
8739end &83
8740sat 32
8741eat 32
8742stc 0
8743st 0
8744sf 1
8745si 0
8746tg (WTG
8747uid 2413,0
8748ps "ConnStartEndStrategy"
8749stg "STSignalDisplayStrategy"
8750f (Text
8751uid 2414,0
8752va (VaSet
8753isHidden 1
8754)
8755xt "22000,110000,26200,111000"
8756st "RSRLOAD"
8757blo "22000,110800"
8758tm "WireNameMgr"
8759)
8760)
8761on &82
8762)
8763*287 (Wire
8764uid 2423,0
8765shape (OrthoPolyLine
8766uid 2424,0
8767va (VaSet
8768vasetType 3
8769)
8770xt "32000,113000,51250,113000"
8771pts [
8772"51250,113000"
8773"32000,113000"
8774]
8775)
8776start &37
8777end &112
8778sat 32
8779eat 1
8780stc 0
8781st 0
8782sf 1
8783si 0
8784tg (WTG
8785uid 2427,0
8786ps "ConnStartEndStrategy"
8787stg "STSignalDisplayStrategy"
8788f (Text
8789uid 2428,0
8790va (VaSet
8791isHidden 1
8792)
8793xt "66250,109000,69250,110000"
8794st "SRCLK"
8795blo "66250,109800"
8796tm "WireNameMgr"
8797)
8798)
8799on &84
8800)
8801*288 (Wire
8802uid 3009,0
8803shape (OrthoPolyLine
8804uid 3010,0
8805va (VaSet
8806vasetType 3
8807)
8808xt "80750,98000,111000,98000"
8809pts [
8810"80750,98000"
8811"111000,98000"
8812]
8813)
8814start &39
8815end &145
8816sat 32
8817eat 32
8818stc 0
8819st 0
8820sf 1
8821si 0
8822tg (WTG
8823uid 3011,0
8824ps "ConnStartEndStrategy"
8825stg "STSignalDisplayStrategy"
8826f (Text
8827uid 3012,0
8828va (VaSet
8829isHidden 1
8830)
8831xt "82000,97000,84800,98000"
8832st "S_CLK"
8833blo "82000,97800"
8834tm "WireNameMgr"
8835)
8836)
8837on &146
8838)
8839*289 (Wire
8840uid 3015,0
8841shape (OrthoPolyLine
8842uid 3016,0
8843va (VaSet
8844vasetType 3
8845)
8846xt "80750,99000,111000,99000"
8847pts [
8848"80750,99000"
8849"111000,99000"
8850]
8851)
8852start &41
8853end &154
8854sat 32
8855eat 32
8856stc 0
8857st 0
8858sf 1
8859si 0
8860tg (WTG
8861uid 3017,0
8862ps "ConnStartEndStrategy"
8863stg "STSignalDisplayStrategy"
8864f (Text
8865uid 3018,0
8866va (VaSet
8867isHidden 1
8868)
8869xt "82750,98000,85150,99000"
8870st "MISO"
8871blo "82750,98800"
8872tm "WireNameMgr"
8873)
8874)
8875on &157
8876)
8877*290 (Wire
8878uid 3021,0
8879shape (OrthoPolyLine
8880uid 3022,0
8881va (VaSet
8882vasetType 3
8883lineWidth 2
8884)
8885xt "80750,89000,100000,89000"
8886pts [
8887"80750,89000"
8888"100000,89000"
8889]
8890)
8891start &40
8892end &133
8893sat 32
8894eat 1
8895sty 1
8896st 0
8897sf 1
8898si 0
8899tg (WTG
8900uid 3023,0
8901ps "ConnStartEndStrategy"
8902stg "STSignalDisplayStrategy"
8903f (Text
8904uid 3024,0
8905va (VaSet
8906)
8907xt "92000,88000,98500,89000"
8908st "sensor_cs : (3:0)"
8909blo "92000,88800"
8910tm "WireNameMgr"
8911)
8912)
8913on &85
8914)
8915*291 (Wire
8916uid 3027,0
8917shape (OrthoPolyLine
8918uid 3028,0
8919va (VaSet
8920vasetType 3
8921)
8922xt "94000,87000,111000,87000"
8923pts [
8924"94000,87000"
8925"111000,87000"
8926]
8927)
8928start &200
8929end &132
8930ss 0
8931sat 32
8932eat 32
8933stc 0
8934st 0
8935sf 1
8936si 0
8937tg (WTG
8938uid 3031,0
8939ps "ConnStartEndStrategy"
8940stg "STSignalDisplayStrategy"
8941f (Text
8942uid 3032,0
8943va (VaSet
8944isHidden 1
8945)
8946xt "95000,86000,98600,87000"
8947st "DAC_CS"
8948blo "95000,86800"
8949tm "WireNameMgr"
8950)
8951)
8952on &86
8953)
8954*292 (Wire
8955uid 3218,0
8956shape (OrthoPolyLine
8957uid 3219,0
8958va (VaSet
8959vasetType 3
8960)
8961xt "22000,78000,51250,78000"
8962pts [
8963"22000,78000"
8964"51250,78000"
8965]
8966)
8967start &66
8968end &15
8969sat 32
8970eat 32
8971stc 0
8972st 0
8973sf 1
8974si 0
8975tg (WTG
8976uid 3220,0
8977ps "ConnStartEndStrategy"
8978stg "STSignalDisplayStrategy"
8979f (Text
8980uid 3221,0
8981va (VaSet
8982isHidden 1
8983)
8984xt "33000,77000,35100,78000"
8985st "TRG"
8986blo "33000,77800"
8987tm "WireNameMgr"
8988)
8989)
8990on &89
8991)
8992*293 (Wire
8993uid 3260,0
8994shape (OrthoPolyLine
8995uid 3261,0
8996va (VaSet
8997vasetType 3
8998lineWidth 2
8999)
9000xt "21000,70000,24000,70000"
9001pts [
9002"21000,70000"
9003"24000,70000"
9004]
9005)
9006start &87
9007end &90
9008sat 32
9009eat 2
9010sty 1
9011stc 0
9012st 0
9013sf 1
9014si 0
9015tg (WTG
9016uid 3264,0
9017ps "ConnStartEndStrategy"
9018stg "STSignalDisplayStrategy"
9019f (Text
9020uid 3265,0
9021va (VaSet
9022isHidden 1
9023)
9024xt "23000,69000,25800,70000"
9025st "A_CLK"
9026blo "23000,69800"
9027tm "WireNameMgr"
9028)
9029)
9030on &94
9031)
9032*294 (Wire
9033uid 3270,0
9034shape (OrthoPolyLine
9035uid 3271,0
9036va (VaSet
9037vasetType 3
9038)
9039xt "29000,70000,43000,72000"
9040pts [
9041"43000,72000"
9042"43000,70000"
9043"32000,70000"
9044"29000,70000"
9045]
9046)
9047start &213
9048end &90
9049sat 32
9050eat 1
9051st 0
9052sf 1
9053si 0
9054tg (WTG
9055uid 3274,0
9056ps "ConnStartEndStrategy"
9057stg "STSignalDisplayStrategy"
9058f (Text
9059uid 3275,0
9060va (VaSet
9061)
9062xt "35000,69000,39500,70000"
9063st "CLK_25_PS"
9064blo "35000,69800"
9065tm "WireNameMgr"
9066)
9067)
9068on &95
9069)
9070*295 (Wire
9071uid 3318,0
9072shape (OrthoPolyLine
9073uid 3319,0
9074va (VaSet
9075vasetType 3
9076lineWidth 2
9077)
9078xt "21000,95000,24000,95000"
9079pts [
9080"21000,95000"
9081"24000,95000"
9082]
9083)
9084start &104
9085end &100
9086sat 32
9087eat 1
9088sty 1
9089stc 0
9090st 0
9091sf 1
9092si 0
9093tg (WTG
9094uid 3322,0
9095ps "ConnStartEndStrategy"
9096stg "STSignalDisplayStrategy"
9097f (Text
9098uid 3323,0
9099va (VaSet
9100isHidden 1
9101)
9102xt "23000,94000,25300,95000"
9103st "A0_D"
9104blo "23000,94800"
9105tm "WireNameMgr"
9106)
9107)
9108on &108
9109)
9110*296 (Wire
9111uid 3352,0
9112shape (OrthoPolyLine
9113uid 3353,0
9114va (VaSet
9115vasetType 3
9116lineWidth 2
9117)
9118xt "21000,96000,24000,96000"
9119pts [
9120"21000,96000"
9121"24000,96000"
9122]
9123)
9124start &105
9125end &100
9126sat 32
9127eat 1
9128sty 1
9129stc 0
9130st 0
9131sf 1
9132si 0
9133tg (WTG
9134uid 3356,0
9135ps "ConnStartEndStrategy"
9136stg "STSignalDisplayStrategy"
9137f (Text
9138uid 3357,0
9139va (VaSet
9140isHidden 1
9141)
9142xt "23000,95000,25300,96000"
9143st "A1_D"
9144blo "23000,95800"
9145tm "WireNameMgr"
9146)
9147)
9148on &109
9149)
9150*297 (Wire
9151uid 3360,0
9152shape (OrthoPolyLine
9153uid 3361,0
9154va (VaSet
9155vasetType 3
9156lineWidth 2
9157)
9158xt "21000,97000,24000,97000"
9159pts [
9160"21000,97000"
9161"24000,97000"
9162]
9163)
9164start &106
9165end &100
9166sat 32
9167eat 1
9168sty 1
9169stc 0
9170st 0
9171sf 1
9172si 0
9173tg (WTG
9174uid 3364,0
9175ps "ConnStartEndStrategy"
9176stg "STSignalDisplayStrategy"
9177f (Text
9178uid 3365,0
9179va (VaSet
9180isHidden 1
9181)
9182xt "23000,96000,25300,97000"
9183st "A2_D"
9184blo "23000,96800"
9185tm "WireNameMgr"
9186)
9187)
9188on &110
9189)
9190*298 (Wire
9191uid 3368,0
9192shape (OrthoPolyLine
9193uid 3369,0
9194va (VaSet
9195vasetType 3
9196lineWidth 2
9197)
9198xt "21000,98000,24000,98000"
9199pts [
9200"21000,98000"
9201"24000,98000"
9202]
9203)
9204start &107
9205end &100
9206sat 32
9207eat 1
9208sty 1
9209stc 0
9210st 0
9211sf 1
9212si 0
9213tg (WTG
9214uid 3372,0
9215ps "ConnStartEndStrategy"
9216stg "STSignalDisplayStrategy"
9217f (Text
9218uid 3373,0
9219va (VaSet
9220isHidden 1
9221)
9222xt "23000,97000,25300,98000"
9223st "A3_D"
9224blo "23000,97800"
9225tm "WireNameMgr"
9226)
9227)
9228on &111
9229)
9230*299 (Wire
9231uid 3430,0
9232shape (OrthoPolyLine
9233uid 3431,0
9234va (VaSet
9235vasetType 3
9236)
9237xt "21000,113000,24000,113000"
9238pts [
9239"21000,113000"
9240"24000,113000"
9241]
9242)
9243start &176
9244end &112
9245sat 32
9246eat 2
9247stc 0
9248st 0
9249sf 1
9250si 0
9251tg (WTG
9252uid 3434,0
9253ps "ConnStartEndStrategy"
9254stg "STSignalDisplayStrategy"
9255f (Text
9256uid 3435,0
9257va (VaSet
9258isHidden 1
9259)
9260xt "23000,112000,27400,113000"
9261st "D0_SRCLK"
9262blo "23000,112800"
9263tm "WireNameMgr"
9264)
9265)
9266on &116
9267)
9268*300 (Wire
9269uid 3438,0
9270shape (OrthoPolyLine
9271uid 3439,0
9272va (VaSet
9273vasetType 3
9274)
9275xt "21000,114000,24000,114000"
9276pts [
9277"21000,114000"
9278"24000,114000"
9279]
9280)
9281start &177
9282end &112
9283sat 32
9284eat 2
9285stc 0
9286st 0
9287sf 1
9288si 0
9289tg (WTG
9290uid 3442,0
9291ps "ConnStartEndStrategy"
9292stg "STSignalDisplayStrategy"
9293f (Text
9294uid 3443,0
9295va (VaSet
9296isHidden 1
9297)
9298xt "23000,113000,27400,114000"
9299st "D1_SRCLK"
9300blo "23000,113800"
9301tm "WireNameMgr"
9302)
9303)
9304on &117
9305)
9306*301 (Wire
9307uid 3446,0
9308shape (OrthoPolyLine
9309uid 3447,0
9310va (VaSet
9311vasetType 3
9312)
9313xt "21000,115000,24000,115000"
9314pts [
9315"21000,115000"
9316"24000,115000"
9317]
9318)
9319start &178
9320end &112
9321sat 32
9322eat 2
9323stc 0
9324st 0
9325sf 1
9326si 0
9327tg (WTG
9328uid 3450,0
9329ps "ConnStartEndStrategy"
9330stg "STSignalDisplayStrategy"
9331f (Text
9332uid 3451,0
9333va (VaSet
9334isHidden 1
9335)
9336xt "23000,114000,27400,115000"
9337st "D2_SRCLK"
9338blo "23000,114800"
9339tm "WireNameMgr"
9340)
9341)
9342on &118
9343)
9344*302 (Wire
9345uid 3454,0
9346shape (OrthoPolyLine
9347uid 3455,0
9348va (VaSet
9349vasetType 3
9350)
9351xt "21000,116000,24000,116000"
9352pts [
9353"21000,116000"
9354"24000,116000"
9355]
9356)
9357start &179
9358end &112
9359sat 32
9360eat 2
9361stc 0
9362st 0
9363sf 1
9364si 0
9365tg (WTG
9366uid 3458,0
9367ps "ConnStartEndStrategy"
9368stg "STSignalDisplayStrategy"
9369f (Text
9370uid 3459,0
9371va (VaSet
9372isHidden 1
9373)
9374xt "23000,115000,27400,116000"
9375st "D3_SRCLK"
9376blo "23000,115800"
9377tm "WireNameMgr"
9378)
9379)
9380on &119
9381)
9382*303 (Wire
9383uid 3574,0
9384shape (OrthoPolyLine
9385uid 3575,0
9386va (VaSet
9387vasetType 3
9388)
9389xt "108000,89000,111000,89000"
9390pts [
9391"111000,89000"
9392"108000,89000"
9393]
9394)
9395start &137
9396end &133
9397sat 32
9398eat 2
9399stc 0
9400st 0
9401sf 1
9402si 0
9403tg (WTG
9404uid 3578,0
9405ps "ConnStartEndStrategy"
9406stg "STSignalDisplayStrategy"
9407f (Text
9408uid 3579,0
9409va (VaSet
9410isHidden 1
9411)
9412xt "108000,88000,110800,89000"
9413st "T0_CS"
9414blo "108000,88800"
9415tm "WireNameMgr"
9416)
9417)
9418on &141
9419)
9420*304 (Wire
9421uid 3582,0
9422shape (OrthoPolyLine
9423uid 3583,0
9424va (VaSet
9425vasetType 3
9426)
9427xt "108000,90000,111000,90000"
9428pts [
9429"111000,90000"
9430"108000,90000"
9431]
9432)
9433start &138
9434end &133
9435sat 32
9436eat 2
9437stc 0
9438st 0
9439sf 1
9440si 0
9441tg (WTG
9442uid 3586,0
9443ps "ConnStartEndStrategy"
9444stg "STSignalDisplayStrategy"
9445f (Text
9446uid 3587,0
9447va (VaSet
9448isHidden 1
9449)
9450xt "108000,89000,110800,90000"
9451st "T1_CS"
9452blo "108000,89800"
9453tm "WireNameMgr"
9454)
9455)
9456on &142
9457)
9458*305 (Wire
9459uid 3590,0
9460shape (OrthoPolyLine
9461uid 3591,0
9462va (VaSet
9463vasetType 3
9464)
9465xt "108000,91000,111000,91000"
9466pts [
9467"111000,91000"
9468"108000,91000"
9469]
9470)
9471start &139
9472end &133
9473sat 32
9474eat 2
9475stc 0
9476st 0
9477sf 1
9478si 0
9479tg (WTG
9480uid 3594,0
9481ps "ConnStartEndStrategy"
9482stg "STSignalDisplayStrategy"
9483f (Text
9484uid 3595,0
9485va (VaSet
9486isHidden 1
9487)
9488xt "108000,90000,110800,91000"
9489st "T2_CS"
9490blo "108000,90800"
9491tm "WireNameMgr"
9492)
9493)
9494on &143
9495)
9496*306 (Wire
9497uid 3598,0
9498shape (OrthoPolyLine
9499uid 3599,0
9500va (VaSet
9501vasetType 3
9502)
9503xt "108000,92000,111000,92000"
9504pts [
9505"111000,92000"
9506"108000,92000"
9507]
9508)
9509start &140
9510end &133
9511sat 32
9512eat 2
9513stc 0
9514st 0
9515sf 1
9516si 0
9517tg (WTG
9518uid 3602,0
9519ps "ConnStartEndStrategy"
9520stg "STSignalDisplayStrategy"
9521f (Text
9522uid 3603,0
9523va (VaSet
9524isHidden 1
9525)
9526xt "108000,91000,110800,92000"
9527st "T3_CS"
9528blo "108000,91800"
9529tm "WireNameMgr"
9530)
9531)
9532on &144
9533)
9534*307 (Wire
9535uid 3682,0
9536shape (OrthoPolyLine
9537uid 3683,0
9538va (VaSet
9539vasetType 3
9540)
9541xt "80750,100000,111000,100000"
9542pts [
9543"80750,100000"
9544"111000,100000"
9545]
9546)
9547start &42
9548end &156
9549sat 32
9550eat 32
9551stc 0
9552st 0
9553sf 1
9554si 0
9555tg (WTG
9556uid 3686,0
9557ps "ConnStartEndStrategy"
9558stg "STSignalDisplayStrategy"
9559f (Text
9560uid 3687,0
9561va (VaSet
9562isHidden 1
9563)
9564xt "82000,99000,84400,100000"
9565st "MOSI"
9566blo "82000,99800"
9567tm "WireNameMgr"
9568)
9569)
9570on &155
9571)
9572*308 (Wire
9573uid 3778,0
9574shape (OrthoPolyLine
9575uid 3779,0
9576va (VaSet
9577vasetType 3
9578)
9579xt "108000,103000,111000,103000"
9580pts [
9581"111000,103000"
9582"108000,103000"
9583]
9584)
9585start &162
9586end &158
9587sat 32
9588eat 2
9589stc 0
9590st 0
9591sf 1
9592si 0
9593tg (WTG
9594uid 3782,0
9595ps "ConnStartEndStrategy"
9596stg "STSignalDisplayStrategy"
9597f (Text
9598uid 3783,0
9599va (VaSet
9600isHidden 1
9601)
9602xt "108000,102000,111000,103000"
9603st "TRG_V"
9604blo "108000,102800"
9605tm "WireNameMgr"
9606)
9607)
9608on &169
9609)
9610*309 (Wire
9611uid 3786,0
9612shape (OrthoPolyLine
9613uid 3787,0
9614va (VaSet
9615vasetType 3
9616)
9617xt "108000,104000,111000,104000"
9618pts [
9619"111000,104000"
9620"108000,104000"
9621]
9622)
9623start &163
9624end &158
9625sat 32
9626eat 2
9627stc 0
9628st 0
9629sf 1
9630si 0
9631tg (WTG
9632uid 3790,0
9633ps "ConnStartEndStrategy"
9634stg "STSignalDisplayStrategy"
9635f (Text
9636uid 3791,0
9637va (VaSet
9638isHidden 1
9639)
9640xt "108000,103000,113600,104000"
9641st "RS485_C_RE"
9642blo "108000,103800"
9643tm "WireNameMgr"
9644)
9645)
9646on &170
9647)
9648*310 (Wire
9649uid 3794,0
9650shape (OrthoPolyLine
9651uid 3795,0
9652va (VaSet
9653vasetType 3
9654)
9655xt "108000,105000,111000,105000"
9656pts [
9657"111000,105000"
9658"108000,105000"
9659]
9660)
9661start &164
9662end &158
9663sat 32
9664eat 2
9665stc 0
9666st 0
9667sf 1
9668si 0
9669tg (WTG
9670uid 3798,0
9671ps "ConnStartEndStrategy"
9672stg "STSignalDisplayStrategy"
9673f (Text
9674uid 3799,0
9675va (VaSet
9676isHidden 1
9677)
9678xt "108000,104000,113600,105000"
9679st "RS485_C_DE"
9680blo "108000,104800"
9681tm "WireNameMgr"
9682)
9683)
9684on &171
9685)
9686*311 (Wire
9687uid 3802,0
9688shape (OrthoPolyLine
9689uid 3803,0
9690va (VaSet
9691vasetType 3
9692)
9693xt "108000,106000,111000,106000"
9694pts [
9695"111000,106000"
9696"108000,106000"
9697]
9698)
9699start &165
9700end &158
9701sat 32
9702eat 2
9703stc 0
9704st 0
9705sf 1
9706si 0
9707tg (WTG
9708uid 3806,0
9709ps "ConnStartEndStrategy"
9710stg "STSignalDisplayStrategy"
9711f (Text
9712uid 3807,0
9713va (VaSet
9714isHidden 1
9715)
9716xt "108000,105000,113500,106000"
9717st "RS485_E_RE"
9718blo "108000,105800"
9719tm "WireNameMgr"
9720)
9721)
9722on &172
9723)
9724*312 (Wire
9725uid 3810,0
9726shape (OrthoPolyLine
9727uid 3811,0
9728va (VaSet
9729vasetType 3
9730)
9731xt "108000,107000,111000,107000"
9732pts [
9733"111000,107000"
9734"108000,107000"
9735]
9736)
9737start &166
9738end &158
9739sat 32
9740eat 2
9741stc 0
9742st 0
9743sf 1
9744si 0
9745tg (WTG
9746uid 3814,0
9747ps "ConnStartEndStrategy"
9748stg "STSignalDisplayStrategy"
9749f (Text
9750uid 3815,0
9751va (VaSet
9752isHidden 1
9753)
9754xt "108000,106000,113500,107000"
9755st "RS485_E_DE"
9756blo "108000,106800"
9757tm "WireNameMgr"
9758)
9759)
9760on &173
9761)
9762*313 (Wire
9763uid 3834,0
9764shape (OrthoPolyLine
9765uid 3835,0
9766va (VaSet
9767vasetType 3
9768)
9769xt "108000,110000,111000,110000"
9770pts [
9771"111000,110000"
9772"108000,110000"
9773]
9774)
9775start &168
9776end &158
9777sat 32
9778eat 2
9779stc 0
9780st 0
9781sf 1
9782si 0
9783tg (WTG
9784uid 3838,0
9785ps "ConnStartEndStrategy"
9786stg "STSignalDisplayStrategy"
9787f (Text
9788uid 3839,0
9789va (VaSet
9790isHidden 1
9791)
9792xt "108000,109000,110900,110000"
9793st "EE_CS"
9794blo "108000,109800"
9795tm "WireNameMgr"
9796)
9797)
9798on &175
9799)
9800*314 (Wire
9801uid 4942,0
9802shape (OrthoPolyLine
9803uid 4943,0
9804va (VaSet
9805vasetType 3
9806lineWidth 2
9807)
9808xt "80750,120000,111000,120000"
9809pts [
9810"80750,120000"
9811"111000,120000"
9812]
9813)
9814start &14
9815end &180
9816sat 32
9817eat 32
9818sty 1
9819stc 0
9820st 0
9821sf 1
9822si 0
9823tg (WTG
9824uid 4948,0
9825ps "ConnStartEndStrategy"
9826stg "STSignalDisplayStrategy"
9827f (Text
9828uid 4949,0
9829va (VaSet
9830isHidden 1
9831)
9832xt "82750,117000,84650,118000"
9833st "D_T"
9834blo "82750,117800"
9835tm "WireNameMgr"
9836)
9837)
9838on &181
9839)
9840*315 (Wire
9841uid 6431,0
9842shape (OrthoPolyLine
9843uid 6432,0
9844va (VaSet
9845vasetType 3
9846)
9847xt "80750,121000,111000,121000"
9848pts [
9849"80750,121000"
9850"111000,121000"
9851]
9852)
9853start &43
9854end &167
9855sat 32
9856eat 32
9857stc 0
9858st 0
9859sf 1
9860si 0
9861tg (WTG
9862uid 6435,0
9863ps "ConnStartEndStrategy"
9864stg "STSignalDisplayStrategy"
9865f (Text
9866uid 6436,0
9867va (VaSet
9868isHidden 1
9869)
9870xt "92000,120000,96000,121000"
9871st "DENABLE"
9872blo "92000,120800"
9873tm "WireNameMgr"
9874)
9875)
9876on &174
9877)
9878*316 (Wire
9879uid 6787,0
9880shape (OrthoPolyLine
9881uid 6788,0
9882va (VaSet
9883vasetType 3
9884lineWidth 2
9885)
9886xt "59000,157000,65000,157000"
9887pts [
9888"59000,157000"
9889"65000,157000"
9890]
9891)
9892start &182
9893end &186
9894sat 32
9895eat 1
9896sty 1
9897st 0
9898sf 1
9899si 0
9900tg (WTG
9901uid 6791,0
9902ps "ConnStartEndStrategy"
9903stg "STSignalDisplayStrategy"
9904f (Text
9905uid 6792,0
9906va (VaSet
9907isHidden 1
9908)
9909xt "61000,156000,67800,157000"
9910st "D_PLLLCK : (3:0)"
9911blo "61000,156800"
9912tm "WireNameMgr"
9913)
9914)
9915on &183
9916)
9917*317 (Wire
9918uid 6880,0
9919shape (OrthoPolyLine
9920uid 6881,0
9921va (VaSet
9922vasetType 3
9923lineWidth 2
9924)
9925xt "68000,157000,75000,157000"
9926pts [
9927"68000,157000"
9928"75000,157000"
9929]
9930)
9931start &186
9932end &184
9933sat 2
9934eat 32
9935sty 1
9936st 0
9937sf 1
9938si 0
9939tg (WTG
9940uid 6884,0
9941ps "ConnStartEndStrategy"
9942stg "STSignalDisplayStrategy"
9943f (Text
9944uid 6885,0
9945va (VaSet
9946isHidden 1
9947)
9948xt "70000,156000,74900,157000"
9949st "D_T2 : (3:0)"
9950blo "70000,156800"
9951tm "WireNameMgr"
9952)
9953)
9954on &185
9955)
9956*318 (Wire
9957uid 7144,0
9958shape (OrthoPolyLine
9959uid 7145,0
9960va (VaSet
9961vasetType 3
9962lineWidth 2
9963)
9964xt "122000,126000,132000,126000"
9965pts [
9966"122000,126000"
9967"132000,126000"
9968]
9969)
9970end &194
9971sat 16
9972eat 32
9973sty 1
9974st 0
9975sf 1
9976si 0
9977tg (WTG
9978uid 7148,0
9979ps "ConnStartEndStrategy"
9980stg "STSignalDisplayStrategy"
9981f (Text
9982uid 7149,0
9983va (VaSet
9984isHidden 1
9985)
9986xt "124000,125000,128800,126000"
9987st "A1_T : (7:0)"
9988blo "124000,125800"
9989tm "WireNameMgr"
9990)
9991)
9992on &195
9993)
9994*319 (Wire
9995uid 7477,0
9996shape (OrthoPolyLine
9997uid 7478,0
9998va (VaSet
9999vasetType 3
10000)
10001xt "80750,87000,91000,87000"
10002pts [
10003"80750,87000"
10004"91000,87000"
10005]
10006)
10007start &38
10008end &198
10009es 0
10010sat 32
10011eat 32
10012st 0
10013sf 1
10014si 0
10015tg (WTG
10016uid 7483,0
10017ps "ConnStartEndStrategy"
10018stg "STSignalDisplayStrategy"
10019f (Text
10020uid 7484,0
10021va (VaSet
10022)
10023xt "83000,86000,85700,87000"
10024st "dummy"
10025blo "83000,86800"
10026tm "WireNameMgr"
10027)
10028)
10029on &196
10030)
10031*320 (Wire
10032uid 8853,0
10033shape (OrthoPolyLine
10034uid 8854,0
10035va (VaSet
10036vasetType 3
10037lineWidth 2
10038)
10039xt "18000,109000,51250,124000"
10040pts [
10041"51250,109000"
10042"18000,109000"
10043"18000,124000"
10044"21000,124000"
10045]
10046)
10047start &30
10048end &190
10049sat 32
10050eat 1
10051sty 1
10052st 0
10053sf 1
10054si 0
10055tg (WTG
10056uid 8857,0
10057ps "ConnStartEndStrategy"
10058stg "STSignalDisplayStrategy"
10059f (Text
10060uid 8858,0
10061va (VaSet
10062)
10063xt "42000,108000,50500,109000"
10064st "drs_channel_id : (3:0)"
10065blo "42000,108800"
10066tm "WireNameMgr"
10067)
10068)
10069on &210
10070)
10071*321 (Wire
10072uid 9502,0
10073shape (OrthoPolyLine
10074uid 9503,0
10075va (VaSet
10076vasetType 3
10077)
10078xt "46000,69000,51250,69000"
10079pts [
10080"51250,69000"
10081"46000,69000"
10082]
10083)
10084start &26
10085sat 32
10086eat 16
10087st 0
10088sf 1
10089si 0
10090tg (WTG
10091uid 9506,0
10092ps "ConnStartEndStrategy"
10093stg "STSignalDisplayStrategy"
10094f (Text
10095uid 9507,0
10096va (VaSet
10097)
10098xt "47000,68000,50100,69000"
10099st "CLK_50"
10100blo "47000,68800"
10101tm "WireNameMgr"
10102)
10103)
10104on &211
10105)
10106*322 (Wire
10107uid 10034,0
10108shape (OrthoPolyLine
10109uid 10035,0
10110va (VaSet
10111vasetType 3
10112)
10113xt "49000,70000,51250,71000"
10114pts [
10115"51250,70000"
10116"49000,70000"
10117"49000,71000"
10118]
10119)
10120start &25
10121end &218
10122sat 32
10123eat 32
10124st 0
10125sf 1
10126si 0
10127tg (WTG
10128uid 10036,0
10129ps "ConnStartEndStrategy"
10130stg "STSignalDisplayStrategy"
10131f (Text
10132uid 10037,0
10133va (VaSet
10134isHidden 1
10135)
10136xt "45250,69000,50550,70000"
10137st "CLK_25_PS1"
10138blo "45250,69800"
10139tm "WireNameMgr"
10140)
10141)
10142on &230
10143)
10144*323 (Wire
10145uid 10052,0
10146shape (OrthoPolyLine
10147uid 10053,0
10148va (VaSet
10149vasetType 3
10150)
10151xt "49000,73000,51250,73000"
10152pts [
10153"51250,73000"
10154"49000,73000"
10155]
10156)
10157start &44
10158end &216
10159sat 32
10160eat 32
10161st 0
10162sf 1
10163si 0
10164tg (WTG
10165uid 10054,0
10166ps "ConnStartEndStrategy"
10167stg "STSignalDisplayStrategy"
10168f (Text
10169uid 10055,0
10170va (VaSet
10171isHidden 1
10172)
10173xt "47000,72000,51500,73000"
10174st "adc_clk_en"
10175blo "47000,72800"
10176tm "WireNameMgr"
10177)
10178)
10179on &231
10180)
10181*324 (Wire
10182uid 10302,0
10183shape (OrthoPolyLine
10184uid 10303,0
10185va (VaSet
10186vasetType 3
10187lineWidth 2
10188)
10189xt "122000,128000,132000,128000"
10190pts [
10191"122000,128000"
10192"132000,128000"
10193]
10194)
10195end &232
10196sat 16
10197eat 32
10198sty 1
10199st 0
10200sf 1
10201si 0
10202tg (WTG
10203uid 10306,0
10204ps "ConnStartEndStrategy"
10205stg "STSignalDisplayStrategy"
10206f (Text
10207uid 10307,0
10208va (VaSet
10209isHidden 1
10210)
10211xt "124000,127000,128800,128000"
10212st "A0_T : (7:0)"
10213blo "124000,127800"
10214tm "WireNameMgr"
10215)
10216)
10217on &233
10218)
10219*325 (Wire
10220uid 10452,0
10221shape (OrthoPolyLine
10222uid 10453,0
10223va (VaSet
10224vasetType 3
10225lineWidth 2
10226)
10227xt "112000,126000,122000,126000"
10228pts [
10229"112000,126000"
10230"122000,126000"
10231]
10232)
10233start &234
10234sat 2
10235eat 16
10236sty 1
10237st 0
10238sf 1
10239si 0
10240tg (WTG
10241uid 10458,0
10242ps "ConnStartEndStrategy"
10243stg "STSignalDisplayStrategy"
10244f (Text
10245uid 10459,0
10246va (VaSet
10247)
10248xt "114000,125000,118800,126000"
10249st "A0_T : (7:0)"
10250blo "114000,125800"
10251tm "WireNameMgr"
10252)
10253)
10254on &233
10255)
10256*326 (Wire
10257uid 10460,0
10258shape (OrthoPolyLine
10259uid 10461,0
10260va (VaSet
10261vasetType 3
10262lineWidth 2
10263)
10264xt "112000,127000,122000,127000"
10265pts [
10266"112000,127000"
10267"122000,127000"
10268]
10269)
10270start &234
10271sat 2
10272eat 16
10273sty 1
10274st 0
10275sf 1
10276si 0
10277tg (WTG
10278uid 10466,0
10279ps "ConnStartEndStrategy"
10280stg "STSignalDisplayStrategy"
10281f (Text
10282uid 10467,0
10283va (VaSet
10284)
10285xt "114000,126000,118800,127000"
10286st "A1_T : (7:0)"
10287blo "114000,126800"
10288tm "WireNameMgr"
10289)
10290)
10291on &195
10292)
10293*327 (Wire
10294uid 10498,0
10295shape (OrthoPolyLine
10296uid 10499,0
10297va (VaSet
10298vasetType 3
10299)
10300xt "80750,123000,88000,123000"
10301pts [
10302"80750,123000"
10303"88000,123000"
10304]
10305)
10306start &58
10307sat 32
10308eat 16
10309st 0
10310sf 1
10311si 0
10312tg (WTG
10313uid 10502,0
10314ps "ConnStartEndStrategy"
10315stg "STSignalDisplayStrategy"
10316f (Text
10317uid 10503,0
10318va (VaSet
10319)
10320xt "82000,122000,86800,123000"
10321st "CLK50_OUT"
10322blo "82000,122800"
10323tm "WireNameMgr"
10324)
10325)
10326on &238
10327)
10328*328 (Wire
10329uid 10506,0
10330shape (OrthoPolyLine
10331uid 10507,0
10332va (VaSet
10333vasetType 3
10334)
10335xt "80750,124000,88000,124000"
10336pts [
10337"80750,124000"
10338"88000,124000"
10339]
10340)
10341start &56
10342sat 32
10343eat 16
10344st 0
10345sf 1
10346si 0
10347tg (WTG
10348uid 10510,0
10349ps "ConnStartEndStrategy"
10350stg "STSignalDisplayStrategy"
10351f (Text
10352uid 10511,0
10353va (VaSet
10354)
10355xt "82000,123000,86800,124000"
10356st "CLK25_OUT"
10357blo "82000,123800"
10358tm "WireNameMgr"
10359)
10360)
10361on &239
10362)
10363*329 (Wire
10364uid 10514,0
10365shape (OrthoPolyLine
10366uid 10515,0
10367va (VaSet
10368vasetType 3
10369)
10370xt "80750,125000,89000,125000"
10371pts [
10372"80750,125000"
10373"89000,125000"
10374]
10375)
10376start &57
10377sat 32
10378eat 16
10379st 0
10380sf 1
10381si 0
10382tg (WTG
10383uid 10518,0
10384ps "ConnStartEndStrategy"
10385stg "STSignalDisplayStrategy"
10386f (Text
10387uid 10519,0
10388va (VaSet
10389)
10390xt "82000,124000,88200,125000"
10391st "CLK25_PSOUT"
10392blo "82000,124800"
10393tm "WireNameMgr"
10394)
10395)
10396on &240
10397)
10398*330 (Wire
10399uid 10522,0
10400shape (OrthoPolyLine
10401uid 10523,0
10402va (VaSet
10403vasetType 3
10404)
10405xt "80750,126000,87000,126000"
10406pts [
10407"80750,126000"
10408"87000,126000"
10409]
10410)
10411start &48
10412sat 32
10413eat 16
10414st 0
10415sf 1
10416si 0
10417tg (WTG
10418uid 10526,0
10419ps "ConnStartEndStrategy"
10420stg "STSignalDisplayStrategy"
10421f (Text
10422uid 10527,0
10423va (VaSet
10424)
10425xt "82000,125000,86400,126000"
10426st "PS_DIR_IN"
10427blo "82000,125800"
10428tm "WireNameMgr"
10429)
10430)
10431on &241
10432)
10433*331 (Wire
10434uid 10530,0
10435shape (OrthoPolyLine
10436uid 10531,0
10437va (VaSet
10438vasetType 3
10439)
10440xt "80750,127000,87000,127000"
10441pts [
10442"80750,127000"
10443"87000,127000"
10444]
10445)
10446start &49
10447sat 32
10448eat 16
10449st 0
10450sf 1
10451si 0
10452tg (WTG
10453uid 10534,0
10454ps "ConnStartEndStrategy"
10455stg "STSignalDisplayStrategy"
10456f (Text
10457uid 10535,0
10458va (VaSet
10459)
10460xt "82000,126000,86200,127000"
10461st "PS_DO_IN"
10462blo "82000,126800"
10463tm "WireNameMgr"
10464)
10465)
10466on &242
10467)
10468*332 (Wire
10469uid 10538,0
10470shape (OrthoPolyLine
10471uid 10539,0
10472va (VaSet
10473vasetType 3
10474)
10475xt "80750,129000,88000,129000"
10476pts [
10477"80750,129000"
10478"88000,129000"
10479]
10480)
10481start &52
10482sat 32
10483eat 16
10484st 0
10485sf 1
10486si 0
10487tg (WTG
10488uid 10542,0
10489ps "ConnStartEndStrategy"
10490stg "STSignalDisplayStrategy"
10491f (Text
10492uid 10543,0
10493va (VaSet
10494)
10495xt "82000,128000,86600,129000"
10496st "PSEN_OUT"
10497blo "82000,128800"
10498tm "WireNameMgr"
10499)
10500)
10501on &243
10502)
10503*333 (Wire
10504uid 10546,0
10505shape (OrthoPolyLine
10506uid 10547,0
10507va (VaSet
10508vasetType 3
10509)
10510xt "80750,128000,90000,128000"
10511pts [
10512"80750,128000"
10513"90000,128000"
10514]
10515)
10516start &53
10517sat 32
10518eat 16
10519st 0
10520sf 1
10521si 0
10522tg (WTG
10523uid 10550,0
10524ps "ConnStartEndStrategy"
10525stg "STSignalDisplayStrategy"
10526f (Text
10527uid 10551,0
10528va (VaSet
10529)
10530xt "82000,127000,89000,128000"
10531st "PSINCDEC_OUT"
10532blo "82000,127800"
10533tm "WireNameMgr"
10534)
10535)
10536on &244
10537)
10538*334 (Wire
10539uid 10554,0
10540shape (OrthoPolyLine
10541uid 10555,0
10542va (VaSet
10543vasetType 3
10544)
10545xt "80750,130000,88000,130000"
10546pts [
10547"80750,130000"
10548"88000,130000"
10549]
10550)
10551start &45
10552sat 32
10553eat 16
10554st 0
10555sf 1
10556si 0
10557tg (WTG
10558uid 10558,0
10559ps "ConnStartEndStrategy"
10560stg "STSignalDisplayStrategy"
10561f (Text
10562uid 10559,0
10563va (VaSet
10564)
10565xt "82000,129000,87200,130000"
10566st "DCM_locked"
10567blo "82000,129800"
10568tm "WireNameMgr"
10569)
10570)
10571on &245
10572)
10573*335 (Wire
10574uid 10562,0
10575shape (OrthoPolyLine
10576uid 10563,0
10577va (VaSet
10578vasetType 3
10579)
10580xt "80750,132000,85000,132000"
10581pts [
10582"80750,132000"
10583"85000,132000"
10584]
10585)
10586start &54
10587sat 32
10588eat 16
10589st 0
10590sf 1
10591si 0
10592tg (WTG
10593uid 10566,0
10594ps "ConnStartEndStrategy"
10595stg "STSignalDisplayStrategy"
10596f (Text
10597uid 10567,0
10598va (VaSet
10599)
10600xt "82000,131000,84200,132000"
10601st "ready"
10602blo "82000,131800"
10603tm "WireNameMgr"
10604)
10605)
10606on &246
10607)
10608*336 (Wire
10609uid 10570,0
10610shape (OrthoPolyLine
10611uid 10571,0
10612va (VaSet
10613vasetType 3
10614)
10615xt "80750,133000,86000,133000"
10616pts [
10617"80750,133000"
10618"86000,133000"
10619]
10620)
10621start &55
10622sat 32
10623eat 16
10624st 0
10625sf 1
10626si 0
10627tg (WTG
10628uid 10574,0
10629ps "ConnStartEndStrategy"
10630stg "STSignalDisplayStrategy"
10631f (Text
10632uid 10575,0
10633va (VaSet
10634)
10635xt "82000,132000,84900,133000"
10636st "shifting"
10637blo "82000,132800"
10638tm "WireNameMgr"
10639)
10640)
10641on &247
10642)
10643*337 (Wire
10644uid 10578,0
10645shape (OrthoPolyLine
10646uid 10579,0
10647va (VaSet
10648vasetType 3
10649)
10650xt "80750,134000,91000,134000"
10651pts [
10652"80750,134000"
10653"91000,134000"
10654]
10655)
10656start &51
10657sat 32
10658eat 16
10659st 0
10660sf 1
10661si 0
10662tg (WTG
10663uid 10582,0
10664ps "ConnStartEndStrategy"
10665stg "STSignalDisplayStrategy"
10666f (Text
10667uid 10583,0
10668va (VaSet
10669)
10670xt "82000,133000,89800,134000"
10671st "PSDONE_extraOUT"
10672blo "82000,133800"
10673tm "WireNameMgr"
10674)
10675)
10676on &248
10677)
10678*338 (Wire
10679uid 10586,0
10680shape (OrthoPolyLine
10681uid 10587,0
10682va (VaSet
10683vasetType 3
10684)
10685xt "80750,135000,88000,135000"
10686pts [
10687"80750,135000"
10688"88000,135000"
10689]
10690)
10691start &50
10692sat 32
10693eat 16
10694st 0
10695sf 1
10696si 0
10697tg (WTG
10698uid 10590,0
10699ps "ConnStartEndStrategy"
10700stg "STSignalDisplayStrategy"
10701f (Text
10702uid 10591,0
10703va (VaSet
10704)
10705xt "82000,134000,87000,135000"
10706st "PSCLK_OUT"
10707blo "82000,134800"
10708tm "WireNameMgr"
10709)
10710)
10711on &249
10712)
10713*339 (Wire
10714uid 10594,0
10715shape (OrthoPolyLine
10716uid 10595,0
10717va (VaSet
10718vasetType 3
10719)
10720xt "80750,136000,91000,136000"
10721pts [
10722"80750,136000"
10723"91000,136000"
10724]
10725)
10726start &46
10727sat 32
10728eat 16
10729st 0
10730sf 1
10731si 0
10732tg (WTG
10733uid 10598,0
10734ps "ConnStartEndStrategy"
10735stg "STSignalDisplayStrategy"
10736f (Text
10737uid 10599,0
10738va (VaSet
10739)
10740xt "82000,135000,89700,136000"
10741st "LOCKED_extraOUT"
10742blo "82000,135800"
10743tm "WireNameMgr"
10744)
10745)
10746on &250
10747)
10748*340 (Wire
10749uid 10600,0
10750shape (OrthoPolyLine
10751uid 10601,0
10752va (VaSet
10753vasetType 3
10754)
10755xt "96000,123000,106000,123000"
10756pts [
10757"96000,123000"
10758"106000,123000"
10759]
10760)
10761end &234
10762sat 16
10763eat 1
10764st 0
10765sf 1
10766si 0
10767tg (WTG
10768uid 10606,0
10769ps "ConnStartEndStrategy"
10770stg "STSignalDisplayStrategy"
10771f (Text
10772uid 10607,0
10773va (VaSet
10774)
10775xt "98000,122000,102800,123000"
10776st "CLK25_OUT"
10777blo "98000,122800"
10778tm "WireNameMgr"
10779)
10780)
10781on &239
10782)
10783*341 (Wire
10784uid 10608,0
10785shape (OrthoPolyLine
10786uid 10609,0
10787va (VaSet
10788vasetType 3
10789)
10790xt "96000,124000,106000,124000"
10791pts [
10792"96000,124000"
10793"106000,124000"
10794]
10795)
10796end &234
10797sat 16
10798eat 1
10799st 0
10800sf 1
10801si 0
10802tg (WTG
10803uid 10614,0
10804ps "ConnStartEndStrategy"
10805stg "STSignalDisplayStrategy"
10806f (Text
10807uid 10615,0
10808va (VaSet
10809)
10810xt "98000,123000,104200,124000"
10811st "CLK25_PSOUT"
10812blo "98000,123800"
10813tm "WireNameMgr"
10814)
10815)
10816on &240
10817)
10818*342 (Wire
10819uid 10616,0
10820shape (OrthoPolyLine
10821uid 10617,0
10822va (VaSet
10823vasetType 3
10824)
10825xt "96000,125000,106000,125000"
10826pts [
10827"96000,125000"
10828"106000,125000"
10829]
10830)
10831end &234
10832sat 16
10833eat 1
10834st 0
10835sf 1
10836si 0
10837tg (WTG
10838uid 10622,0
10839ps "ConnStartEndStrategy"
10840stg "STSignalDisplayStrategy"
10841f (Text
10842uid 10623,0
10843va (VaSet
10844)
10845xt "98000,124000,102800,125000"
10846st "CLK50_OUT"
10847blo "98000,124800"
10848tm "WireNameMgr"
10849)
10850)
10851on &238
10852)
10853*343 (Wire
10854uid 10624,0
10855shape (OrthoPolyLine
10856uid 10625,0
10857va (VaSet
10858vasetType 3
10859)
10860xt "96000,126000,106000,126000"
10861pts [
10862"96000,126000"
10863"106000,126000"
10864]
10865)
10866end &234
10867sat 16
10868eat 1
10869st 0
10870sf 1
10871si 0
10872tg (WTG
10873uid 10630,0
10874ps "ConnStartEndStrategy"
10875stg "STSignalDisplayStrategy"
10876f (Text
10877uid 10631,0
10878va (VaSet
10879)
10880xt "98000,125000,103200,126000"
10881st "DCM_locked"
10882blo "98000,125800"
10883tm "WireNameMgr"
10884)
10885)
10886on &245
10887)
10888*344 (Wire
10889uid 10632,0
10890shape (OrthoPolyLine
10891uid 10633,0
10892va (VaSet
10893vasetType 3
10894)
10895xt "96000,127000,106000,127000"
10896pts [
10897"96000,127000"
10898"106000,127000"
10899]
10900)
10901end &234
10902sat 16
10903eat 1
10904st 0
10905sf 1
10906si 0
10907tg (WTG
10908uid 10638,0
10909ps "ConnStartEndStrategy"
10910stg "STSignalDisplayStrategy"
10911f (Text
10912uid 10639,0
10913va (VaSet
10914)
10915xt "98000,126000,105700,127000"
10916st "LOCKED_extraOUT"
10917blo "98000,126800"
10918tm "WireNameMgr"
10919)
10920)
10921on &250
10922)
10923*345 (Wire
10924uid 10640,0
10925shape (OrthoPolyLine
10926uid 10641,0
10927va (VaSet
10928vasetType 3
10929)
10930xt "96000,128000,106000,128000"
10931pts [
10932"96000,128000"
10933"106000,128000"
10934]
10935)
10936end &234
10937sat 16
10938eat 1
10939st 0
10940sf 1
10941si 0
10942tg (WTG
10943uid 10646,0
10944ps "ConnStartEndStrategy"
10945stg "STSignalDisplayStrategy"
10946f (Text
10947uid 10647,0
10948va (VaSet
10949)
10950xt "98000,127000,103000,128000"
10951st "PSCLK_OUT"
10952blo "98000,127800"
10953tm "WireNameMgr"
10954)
10955)
10956on &249
10957)
10958*346 (Wire
10959uid 10648,0
10960shape (OrthoPolyLine
10961uid 10649,0
10962va (VaSet
10963vasetType 3
10964)
10965xt "96000,129000,106000,129000"
10966pts [
10967"96000,129000"
10968"106000,129000"
10969]
10970)
10971end &234
10972sat 16
10973eat 1
10974st 0
10975sf 1
10976si 0
10977tg (WTG
10978uid 10654,0
10979ps "ConnStartEndStrategy"
10980stg "STSignalDisplayStrategy"
10981f (Text
10982uid 10655,0
10983va (VaSet
10984)
10985xt "98000,128000,105800,129000"
10986st "PSDONE_extraOUT"
10987blo "98000,128800"
10988tm "WireNameMgr"
10989)
10990)
10991on &248
10992)
10993*347 (Wire
10994uid 10656,0
10995shape (OrthoPolyLine
10996uid 10657,0
10997va (VaSet
10998vasetType 3
10999)
11000xt "96000,130000,106000,130000"
11001pts [
11002"96000,130000"
11003"106000,130000"
11004]
11005)
11006end &234
11007sat 16
11008eat 1
11009st 0
11010sf 1
11011si 0
11012tg (WTG
11013uid 10662,0
11014ps "ConnStartEndStrategy"
11015stg "STSignalDisplayStrategy"
11016f (Text
11017uid 10663,0
11018va (VaSet
11019)
11020xt "98000,129000,102600,130000"
11021st "PSEN_OUT"
11022blo "98000,129800"
11023tm "WireNameMgr"
11024)
11025)
11026on &243
11027)
11028*348 (Wire
11029uid 10664,0
11030shape (OrthoPolyLine
11031uid 10665,0
11032va (VaSet
11033vasetType 3
11034)
11035xt "96000,131000,106000,131000"
11036pts [
11037"96000,131000"
11038"106000,131000"
11039]
11040)
11041end &234
11042sat 16
11043eat 1
11044st 0
11045sf 1
11046si 0
11047tg (WTG
11048uid 10670,0
11049ps "ConnStartEndStrategy"
11050stg "STSignalDisplayStrategy"
11051f (Text
11052uid 10671,0
11053va (VaSet
11054)
11055xt "98000,130000,105000,131000"
11056st "PSINCDEC_OUT"
11057blo "98000,130800"
11058tm "WireNameMgr"
11059)
11060)
11061on &244
11062)
11063*349 (Wire
11064uid 10672,0
11065shape (OrthoPolyLine
11066uid 10673,0
11067va (VaSet
11068vasetType 3
11069)
11070xt "96000,132000,106000,132000"
11071pts [
11072"96000,132000"
11073"106000,132000"
11074]
11075)
11076end &234
11077sat 16
11078eat 1
11079st 0
11080sf 1
11081si 0
11082tg (WTG
11083uid 10678,0
11084ps "ConnStartEndStrategy"
11085stg "STSignalDisplayStrategy"
11086f (Text
11087uid 10679,0
11088va (VaSet
11089)
11090xt "98000,131000,102400,132000"
11091st "PS_DIR_IN"
11092blo "98000,131800"
11093tm "WireNameMgr"
11094)
11095)
11096on &241
11097)
11098*350 (Wire
11099uid 10680,0
11100shape (OrthoPolyLine
11101uid 10681,0
11102va (VaSet
11103vasetType 3
11104)
11105xt "96000,133000,106000,133000"
11106pts [
11107"96000,133000"
11108"106000,133000"
11109]
11110)
11111end &234
11112sat 16
11113eat 1
11114st 0
11115sf 1
11116si 0
11117tg (WTG
11118uid 10686,0
11119ps "ConnStartEndStrategy"
11120stg "STSignalDisplayStrategy"
11121f (Text
11122uid 10687,0
11123va (VaSet
11124)
11125xt "98000,132000,102200,133000"
11126st "PS_DO_IN"
11127blo "98000,132800"
11128tm "WireNameMgr"
11129)
11130)
11131on &242
11132)
11133*351 (Wire
11134uid 10688,0
11135shape (OrthoPolyLine
11136uid 10689,0
11137va (VaSet
11138vasetType 3
11139)
11140xt "96000,134000,106000,134000"
11141pts [
11142"96000,134000"
11143"106000,134000"
11144]
11145)
11146end &234
11147sat 16
11148eat 1
11149st 0
11150sf 1
11151si 0
11152tg (WTG
11153uid 10694,0
11154ps "ConnStartEndStrategy"
11155stg "STSignalDisplayStrategy"
11156f (Text
11157uid 10695,0
11158va (VaSet
11159)
11160xt "98000,133000,100200,134000"
11161st "ready"
11162blo "98000,133800"
11163tm "WireNameMgr"
11164)
11165)
11166on &246
11167)
11168*352 (Wire
11169uid 10696,0
11170shape (OrthoPolyLine
11171uid 10697,0
11172va (VaSet
11173vasetType 3
11174)
11175xt "96000,135000,106000,135000"
11176pts [
11177"96000,135000"
11178"106000,135000"
11179]
11180)
11181end &234
11182sat 16
11183eat 1
11184st 0
11185sf 1
11186si 0
11187tg (WTG
11188uid 10702,0
11189ps "ConnStartEndStrategy"
11190stg "STSignalDisplayStrategy"
11191f (Text
11192uid 10703,0
11193va (VaSet
11194)
11195xt "98000,134000,100900,135000"
11196st "shifting"
11197blo "98000,134800"
11198tm "WireNameMgr"
11199)
11200)
11201on &247
11202)
11203*353 (Wire
11204uid 11096,0
11205shape (OrthoPolyLine
11206uid 11097,0
11207va (VaSet
11208vasetType 3
11209)
11210xt "96000,103000,100000,103000"
11211pts [
11212"96000,103000"
11213"100000,103000"
11214]
11215)
11216start &251
11217end &158
11218sat 32
11219eat 1
11220st 0
11221sf 1
11222si 0
11223tg (WTG
11224uid 11100,0
11225ps "ConnStartEndStrategy"
11226stg "STSignalDisplayStrategy"
11227f (Text
11228uid 11101,0
11229va (VaSet
11230isHidden 1
11231)
11232xt "126000,96000,131300,97000"
11233st "RS485_C_DI"
11234blo "126000,96800"
11235tm "WireNameMgr"
11236)
11237)
11238on &252
11239)
11240*354 (Wire
11241uid 11110,0
11242shape (OrthoPolyLine
11243uid 11111,0
11244va (VaSet
11245vasetType 3
11246)
11247xt "108000,112000,111000,112000"
11248pts [
11249"108000,112000"
11250"111000,112000"
11251]
11252)
11253start &158
11254end &253
11255sat 2
11256eat 32
11257st 0
11258sf 1
11259si 0
11260tg (WTG
11261uid 11114,0
11262ps "ConnStartEndStrategy"
11263stg "STSignalDisplayStrategy"
11264f (Text
11265uid 11115,0
11266va (VaSet
11267isHidden 1
11268)
11269xt "110000,111000,115700,112000"
11270st "RS485_C_DO"
11271blo "110000,111800"
11272tm "WireNameMgr"
11273)
11274)
11275on &254
11276)
11277*355 (Wire
11278uid 11514,0
11279shape (OrthoPolyLine
11280uid 11515,0
11281va (VaSet
11282vasetType 3
11283)
11284xt "123000,116000,127000,116000"
11285pts [
11286"123000,116000"
11287"127000,116000"
11288]
11289)
11290start &255
11291sat 32
11292eat 16
11293st 0
11294sf 1
11295si 0
11296tg (WTG
11297uid 11518,0
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11310)
11311on &256
11312)
11313*356 (Wire
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11325)
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11327sat 16
11328eat 32
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11332tg (WTG
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11358"80750,140000"
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11362start &59
11363end &259
11364sat 32
11365eat 32
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11367st 0
11368sf 1
11369si 0
11370tg (WTG
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11385on &260
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11397"87000,141000"
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11399)
11400start &60
11401end &261
11402ss 0
11403sat 32
11404eat 32
11405st 0
11406sf 1
11407si 0
11408tg (WTG
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11420tm "WireNameMgr"
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11422)
11423on &264
11424)
11425*359 (Wire
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11435"87000,142000"
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11439end &262
11440ss 0
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11442eat 32
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11444sf 1
11445si 0
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11461on &265
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11475)
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11477end &263
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11479eat 32
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11498on &266
11499)
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11501bg "65535,65535,65535"
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11507xySpacing 1000
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11625exportStdPackageRefs 1
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11784)
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11786)
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11797)
11798elements [
11799]
11800)
11801portVis (PortSigDisplay
11802)
11803prms (Property
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11805pname "params"
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11807)
11808visOptions (mwParamsVisibilityOptions
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11810)
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11853)
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11922]
11923)
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11937)
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11991)
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12045viewiconposition 0
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12059text (MLText
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12061)
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12067wrapOption 3
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12077fg "65535,65535,0"
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12109)
12110xt "-400,-400,400,400"
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12112)
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12114defaultPortIoIn (PortIoIn
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12152defaultPortIoOut (PortIoOut
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12187)
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12231optionalChildren [
12232(Hexagon
12233sl 0
12234xt "500,-375,2000,375"
12235)
12236(Line
12237sl 0
12238xt "0,0,500,0"
12239pts [
12240"0,0"
12241"500,0"
12242]
12243)
12244]
12245)
12246stc 0
12247sf 1
12248tg (WTG
12249ps "PortIoTextPlaceStrategy"
12250stg "STSignalDisplayStrategy"
12251f (Text
12252va (VaSet
12253)
12254xt "0,-375,0,-375"
12255blo "0,-375"
12256tm "WireNameMgr"
12257)
12258)
12259)
12260defaultSignal (Wire
12261shape (OrthoPolyLine
12262va (VaSet
12263vasetType 3
12264)
12265pts [
12266"0,0"
12267"0,0"
12268]
12269)
12270ss 0
12271es 0
12272sat 32
12273eat 32
12274st 0
12275sf 1
12276si 0
12277tg (WTG
12278ps "ConnStartEndStrategy"
12279stg "STSignalDisplayStrategy"
12280f (Text
12281va (VaSet
12282)
12283xt "0,0,1900,1000"
12284st "sig0"
12285blo "0,800"
12286tm "WireNameMgr"
12287)
12288)
12289)
12290defaultBus (Wire
12291shape (OrthoPolyLine
12292va (VaSet
12293vasetType 3
12294lineWidth 2
12295)
12296pts [
12297"0,0"
12298"0,0"
12299]
12300)
12301ss 0
12302es 0
12303sat 32
12304eat 32
12305sty 1
12306st 0
12307sf 1
12308si 0
12309tg (WTG
12310ps "ConnStartEndStrategy"
12311stg "STSignalDisplayStrategy"
12312f (Text
12313va (VaSet
12314)
12315xt "0,0,2400,1000"
12316st "dbus0"
12317blo "0,800"
12318tm "WireNameMgr"
12319)
12320)
12321)
12322defaultBundle (Bundle
12323shape (OrthoPolyLine
12324va (VaSet
12325vasetType 3
12326lineColor "32768,0,0"
12327lineWidth 2
12328)
12329pts [
12330"0,0"
12331"0,0"
12332]
12333)
12334ss 0
12335es 0
12336sat 32
12337eat 32
12338textGroup (BiTextGroup
12339ps "ConnStartEndStrategy"
12340stg "VerticalLayoutStrategy"
12341first (Text
12342va (VaSet
12343)
12344xt "0,0,3000,1000"
12345st "bundle0"
12346blo "0,800"
12347tm "BundleNameMgr"
12348)
12349second (MLText
12350va (VaSet
12351)
12352xt "0,1000,1000,2000"
12353st "()"
12354tm "BundleContentsMgr"
12355)
12356)
12357bundleNet &0
12358)
12359defaultPortMapFrame (PortMapFrame
12360ps "PortMapFrameStrategy"
12361shape (RectFrame
12362va (VaSet
12363vasetType 1
12364fg "65535,65535,65535"
12365lineColor "0,0,32768"
12366lineWidth 2
12367)
12368xt "0,0,10000,12000"
12369)
12370portMapText (BiTextGroup
12371ps "BottomRightOffsetStrategy"
12372stg "VerticalLayoutStrategy"
12373first (MLText
12374va (VaSet
12375)
12376)
12377second (MLText
12378va (VaSet
12379)
12380tm "PortMapTextMgr"
12381)
12382)
12383)
12384defaultGenFrame (Frame
12385shape (RectFrame
12386va (VaSet
12387vasetType 1
12388fg "65535,65535,65535"
12389lineColor "26368,26368,26368"
12390lineStyle 2
12391lineWidth 2
12392)
12393xt "0,0,20000,20000"
12394)
12395title (TextAssociate
12396ps "TopLeftStrategy"
12397text (MLText
12398va (VaSet
12399)
12400xt "0,-1100,12600,-100"
12401st "g0: FOR i IN 0 TO n GENERATE"
12402tm "FrameTitleTextMgr"
12403)
12404)
12405seqNum (FrameSequenceNumber
12406ps "TopLeftStrategy"
12407shape (Rectangle
12408va (VaSet
12409vasetType 1
12410fg "65535,65535,65535"
12411)
12412xt "50,50,1250,1450"
12413)
12414num (Text
12415va (VaSet
12416)
12417xt "250,250,1050,1250"
12418st "1"
12419blo "250,1050"
12420tm "FrameSeqNumMgr"
12421)
12422)
12423decls (MlTextGroup
12424ps "BottomRightOffsetStrategy"
12425stg "VerticalLayoutStrategy"
12426textVec [
12427*388 (Text
12428va (VaSet
12429font "Arial,8,1"
12430)
12431xt "14100,20000,22000,21000"
12432st "Frame Declarations"
12433blo "14100,20800"
12434)
12435*389 (MLText
12436va (VaSet
12437)
12438xt "14100,21000,14100,21000"
12439tm "BdFrameDeclTextMgr"
12440)
12441]
12442)
12443)
12444defaultBlockFrame (Frame
12445shape (RectFrame
12446va (VaSet
12447vasetType 1
12448fg "65535,65535,65535"
12449lineColor "26368,26368,26368"
12450lineStyle 1
12451lineWidth 2
12452)
12453xt "0,0,20000,20000"
12454)
12455title (TextAssociate
12456ps "TopLeftStrategy"
12457text (MLText
12458va (VaSet
12459)
12460xt "0,-1100,7400,-100"
12461st "b0: BLOCK (guard)"
12462tm "FrameTitleTextMgr"
12463)
12464)
12465seqNum (FrameSequenceNumber
12466ps "TopLeftStrategy"
12467shape (Rectangle
12468va (VaSet
12469vasetType 1
12470fg "65535,65535,65535"
12471)
12472xt "50,50,1250,1450"
12473)
12474num (Text
12475va (VaSet
12476)
12477xt "250,250,1050,1250"
12478st "1"
12479blo "250,1050"
12480tm "FrameSeqNumMgr"
12481)
12482)
12483decls (MlTextGroup
12484ps "BottomRightOffsetStrategy"
12485stg "VerticalLayoutStrategy"
12486textVec [
12487*390 (Text
12488va (VaSet
12489font "Arial,8,1"
12490)
12491xt "14100,20000,22000,21000"
12492st "Frame Declarations"
12493blo "14100,20800"
12494)
12495*391 (MLText
12496va (VaSet
12497)
12498xt "14100,21000,14100,21000"
12499tm "BdFrameDeclTextMgr"
12500)
12501]
12502)
12503style 3
12504)
12505defaultSaCptPort (CptPort
12506ps "OnEdgeStrategy"
12507shape (Triangle
12508ro 90
12509va (VaSet
12510vasetType 1
12511fg "0,65535,0"
12512)
12513xt "0,0,750,750"
12514)
12515tg (CPTG
12516ps "CptPortTextPlaceStrategy"
12517stg "VerticalLayoutStrategy"
12518f (Text
12519va (VaSet
12520)
12521xt "0,750,1800,1750"
12522st "Port"
12523blo "0,1550"
12524)
12525)
12526thePort (LogicalPort
12527decl (Decl
12528n "Port"
12529t ""
12530o 0
12531)
12532)
12533)
12534defaultSaCptPortBuffer (CptPort
12535ps "OnEdgeStrategy"
12536shape (Diamond
12537va (VaSet
12538vasetType 1
12539fg "65535,65535,65535"
12540)
12541xt "0,0,750,750"
12542)
12543tg (CPTG
12544ps "CptPortTextPlaceStrategy"
12545stg "VerticalLayoutStrategy"
12546f (Text
12547va (VaSet
12548)
12549xt "0,750,1800,1750"
12550st "Port"
12551blo "0,1550"
12552)
12553)
12554thePort (LogicalPort
12555m 3
12556decl (Decl
12557n "Port"
12558t ""
12559o 0
12560)
12561)
12562)
12563defaultDeclText (MLText
12564va (VaSet
12565font "Courier New,8,0"
12566)
12567)
12568archDeclarativeBlock (BdArchDeclBlock
12569uid 1,0
12570stg "BdArchDeclBlockLS"
12571declLabel (Text
12572uid 2,0
12573va (VaSet
12574font "Arial,8,1"
12575)
12576xt "37000,1800,42400,2800"
12577st "Declarations"
12578blo "37000,2600"
12579)
12580portLabel (Text
12581uid 3,0
12582va (VaSet
12583font "Arial,8,1"
12584)
12585xt "37000,2800,39700,3800"
12586st "Ports:"
12587blo "37000,3600"
12588)
12589preUserLabel (Text
12590uid 4,0
12591va (VaSet
12592isHidden 1
12593font "Arial,8,1"
12594)
12595xt "37000,1800,40800,2800"
12596st "Pre User:"
12597blo "37000,2600"
12598)
12599preUserText (MLText
12600uid 5,0
12601va (VaSet
12602isHidden 1
12603font "Courier New,8,0"
12604)
12605xt "37000,1800,37000,1800"
12606tm "BdDeclarativeTextMgr"
12607)
12608diagSignalLabel (Text
12609uid 6,0
12610va (VaSet
12611font "Arial,8,1"
12612)
12613xt "37000,47800,44100,48800"
12614st "Diagram Signals:"
12615blo "37000,48600"
12616)
12617postUserLabel (Text
12618uid 7,0
12619va (VaSet
12620isHidden 1
12621font "Arial,8,1"
12622)
12623xt "37000,1800,41700,2800"
12624st "Post User:"
12625blo "37000,2600"
12626)
12627postUserText (MLText
12628uid 8,0
12629va (VaSet
12630isHidden 1
12631font "Courier New,8,0"
12632)
12633xt "37000,1800,37000,1800"
12634tm "BdDeclarativeTextMgr"
12635)
12636)
12637commonDM (CommonDM
12638ldm (LogicalDM
12639suid 209,0
12640usingSuid 1
12641emptyRow *392 (LEmptyRow
12642)
12643uid 54,0
12644optionalChildren [
12645*393 (RefLabelRowHdr
12646)
12647*394 (TitleRowHdr
12648)
12649*395 (FilterRowHdr
12650)
12651*396 (RefLabelColHdr
12652tm "RefLabelColHdrMgr"
12653)
12654*397 (RowExpandColHdr
12655tm "RowExpandColHdrMgr"
12656)
12657*398 (GroupColHdr
12658tm "GroupColHdrMgr"
12659)
12660*399 (NameColHdr
12661tm "BlockDiagramNameColHdrMgr"
12662)
12663*400 (ModeColHdr
12664tm "BlockDiagramModeColHdrMgr"
12665)
12666*401 (TypeColHdr
12667tm "BlockDiagramTypeColHdrMgr"
12668)
12669*402 (BoundsColHdr
12670tm "BlockDiagramBoundsColHdrMgr"
12671)
12672*403 (InitColHdr
12673tm "BlockDiagramInitColHdrMgr"
12674)
12675*404 (EolColHdr
12676tm "BlockDiagramEolColHdrMgr"
12677)
12678*405 (LeafLogPort
12679port (LogicalPort
12680m 4
12681decl (Decl
12682n "board_id"
12683t "std_logic_vector"
12684b "(3 downto 0)"
12685preAdd 0
12686posAdd 0
12687o 73
12688suid 5,0
12689)
12690)
12691uid 327,0
12692)
12693*406 (LeafLogPort
12694port (LogicalPort
12695m 4
12696decl (Decl
12697n "crate_id"
12698t "std_logic_vector"
12699b "(1 downto 0)"
12700o 74
12701suid 6,0
12702)
12703)
12704uid 329,0
12705)
12706*407 (LeafLogPort
12707port (LogicalPort
12708m 4
12709decl (Decl
12710n "adc_data_array"
12711t "adc_data_array_type"
12712o 72
12713suid 29,0
12714)
12715)
12716uid 1491,0
12717)
12718*408 (LeafLogPort
12719port (LogicalPort
12720m 1
12721decl (Decl
12722n "RSRLOAD"
12723t "std_logic"
12724o 41
12725suid 57,0
12726i "'0'"
12727)
12728)
12729uid 2435,0
12730)
12731*409 (LeafLogPort
12732port (LogicalPort
12733m 4
12734decl (Decl
12735n "SRCLK"
12736t "std_logic"
12737o 70
12738suid 58,0
12739i "'0'"
12740)
12741)
12742uid 2437,0
12743)
12744*410 (LeafLogPort
12745port (LogicalPort
12746m 4
12747decl (Decl
12748n "sensor_cs"
12749t "std_logic_vector"
12750b "(3 DOWNTO 0)"
12751o 78
12752suid 65,0
12753)
12754)
12755uid 3037,0
12756)
12757*411 (LeafLogPort
12758port (LogicalPort
12759m 1
12760decl (Decl
12761n "DAC_CS"
12762t "std_logic"
12763o 24
12764suid 66,0
12765)
12766)
12767uid 3039,0
12768)
12769*412 (LeafLogPort
12770port (LogicalPort
12771decl (Decl
12772n "X_50M"
12773t "STD_LOGIC"
12774preAdd 0
12775posAdd 0
12776o 16
12777suid 67,0
12778)
12779)
12780uid 3276,0
12781)
12782*413 (LeafLogPort
12783port (LogicalPort
12784decl (Decl
12785n "TRG"
12786t "STD_LOGIC"
12787o 14
12788suid 68,0
12789)
12790)
12791uid 3278,0
12792)
12793*414 (LeafLogPort
12794port (LogicalPort
12795m 1
12796decl (Decl
12797n "A_CLK"
12798t "std_logic_vector"
12799b "(3 downto 0)"
12800o 19
12801suid 71,0
12802)
12803)
12804uid 3280,0
12805)
12806*415 (LeafLogPort
12807port (LogicalPort
12808m 4
12809decl (Decl
12810n "CLK_25_PS"
12811t "std_logic"
12812o 59
12813suid 72,0
12814)
12815)
12816uid 3282,0
12817)
12818*416 (LeafLogPort
12819port (LogicalPort
12820m 1
12821decl (Decl
12822n "OE_ADC"
12823t "STD_LOGIC"
12824preAdd 0
12825posAdd 0
12826o 35
12827suid 73,0
12828)
12829)
12830uid 3382,0
12831)
12832*417 (LeafLogPort
12833port (LogicalPort
12834decl (Decl
12835n "A_OTR"
12836t "std_logic_vector"
12837b "(3 DOWNTO 0)"
12838o 5
12839suid 74,0
12840)
12841)
12842uid 3384,0
12843)
12844*418 (LeafLogPort
12845port (LogicalPort
12846decl (Decl
12847n "A0_D"
12848t "std_logic_vector"
12849b "(11 DOWNTO 0)"
12850o 1
12851suid 79,0
12852)
12853)
12854uid 3386,0
12855)
12856*419 (LeafLogPort
12857port (LogicalPort
12858decl (Decl
12859n "A1_D"
12860t "std_logic_vector"
12861b "(11 DOWNTO 0)"
12862o 2
12863suid 80,0
12864)
12865)
12866uid 3388,0
12867)
12868*420 (LeafLogPort
12869port (LogicalPort
12870decl (Decl
12871n "A2_D"
12872t "std_logic_vector"
12873b "(11 DOWNTO 0)"
12874o 3
12875suid 81,0
12876)
12877)
12878uid 3390,0
12879)
12880*421 (LeafLogPort
12881port (LogicalPort
12882decl (Decl
12883n "A3_D"
12884t "std_logic_vector"
12885b "(11 DOWNTO 0)"
12886o 4
12887suid 82,0
12888)
12889)
12890uid 3392,0
12891)
12892*422 (LeafLogPort
12893port (LogicalPort
12894m 1
12895decl (Decl
12896n "D0_SRCLK"
12897t "STD_LOGIC"
12898o 20
12899suid 87,0
12900)
12901)
12902uid 3468,0
12903)
12904*423 (LeafLogPort
12905port (LogicalPort
12906m 1
12907decl (Decl
12908n "D1_SRCLK"
12909t "STD_LOGIC"
12910o 21
12911suid 88,0
12912)
12913)
12914uid 3470,0
12915)
12916*424 (LeafLogPort
12917port (LogicalPort
12918m 1
12919decl (Decl
12920n "D2_SRCLK"
12921t "STD_LOGIC"
12922o 22
12923suid 89,0
12924)
12925)
12926uid 3472,0
12927)
12928*425 (LeafLogPort
12929port (LogicalPort
12930m 1
12931decl (Decl
12932n "D3_SRCLK"
12933t "STD_LOGIC"
12934o 23
12935suid 90,0
12936)
12937)
12938uid 3474,0
12939)
12940*426 (LeafLogPort
12941port (LogicalPort
12942decl (Decl
12943n "D0_SROUT"
12944t "std_logic"
12945o 6
12946suid 91,0
12947)
12948)
12949uid 3524,0
12950)
12951*427 (LeafLogPort
12952port (LogicalPort
12953decl (Decl
12954n "D1_SROUT"
12955t "std_logic"
12956o 7
12957suid 92,0
12958)
12959)
12960uid 3526,0
12961)
12962*428 (LeafLogPort
12963port (LogicalPort
12964decl (Decl
12965n "D2_SROUT"
12966t "std_logic"
12967o 8
12968suid 93,0
12969)
12970)
12971uid 3528,0
12972)
12973*429 (LeafLogPort
12974port (LogicalPort
12975decl (Decl
12976n "D3_SROUT"
12977t "std_logic"
12978o 9
12979suid 94,0
12980)
12981)
12982uid 3530,0
12983)
12984*430 (LeafLogPort
12985port (LogicalPort
12986m 1
12987decl (Decl
12988n "D_A"
12989t "std_logic_vector"
12990b "(3 DOWNTO 0)"
12991o 27
12992suid 95,0
12993i "(others => '0')"
12994)
12995)
12996uid 3532,0
12997)
12998*431 (LeafLogPort
12999port (LogicalPort
13000m 1
13001decl (Decl
13002n "DWRITE"
13003t "std_logic"
13004o 26
13005suid 96,0
13006i "'0'"
13007)
13008)
13009uid 3534,0
13010)
13011*432 (LeafLogPort
13012port (LogicalPort
13013m 1
13014decl (Decl
13015n "T0_CS"
13016t "std_logic"
13017o 44
13018suid 101,0
13019)
13020)
13021uid 3646,0
13022)
13023*433 (LeafLogPort
13024port (LogicalPort
13025m 1
13026decl (Decl
13027n "T1_CS"
13028t "std_logic"
13029o 45
13030suid 102,0
13031)
13032)
13033uid 3648,0
13034)
13035*434 (LeafLogPort
13036port (LogicalPort
13037m 1
13038decl (Decl
13039n "T2_CS"
13040t "std_logic"
13041o 46
13042suid 103,0
13043)
13044)
13045uid 3650,0
13046)
13047*435 (LeafLogPort
13048port (LogicalPort
13049m 1
13050decl (Decl
13051n "T3_CS"
13052t "std_logic"
13053o 47
13054suid 104,0
13055)
13056)
13057uid 3652,0
13058)
13059*436 (LeafLogPort
13060port (LogicalPort
13061m 1
13062decl (Decl
13063n "S_CLK"
13064t "std_logic"
13065o 43
13066suid 105,0
13067)
13068)
13069uid 3654,0
13070)
13071*437 (LeafLogPort
13072port (LogicalPort
13073m 1
13074decl (Decl
13075n "W_A"
13076t "std_logic_vector"
13077b "(9 DOWNTO 0)"
13078o 49
13079suid 106,0
13080)
13081)
13082uid 3656,0
13083)
13084*438 (LeafLogPort
13085port (LogicalPort
13086m 2
13087decl (Decl
13088n "W_D"
13089t "std_logic_vector"
13090b "(15 DOWNTO 0)"
13091o 55
13092suid 107,0
13093)
13094)
13095uid 3658,0
13096)
13097*439 (LeafLogPort
13098port (LogicalPort
13099m 1
13100decl (Decl
13101n "W_RES"
13102t "std_logic"
13103o 52
13104suid 108,0
13105i "'1'"
13106)
13107)
13108uid 3660,0
13109)
13110*440 (LeafLogPort
13111port (LogicalPort
13112m 1
13113decl (Decl
13114n "W_RD"
13115t "std_logic"
13116o 51
13117suid 109,0
13118i "'1'"
13119)
13120)
13121uid 3662,0
13122)
13123*441 (LeafLogPort
13124port (LogicalPort
13125m 1
13126decl (Decl
13127n "W_WR"
13128t "std_logic"
13129o 53
13130suid 110,0
13131i "'1'"
13132)
13133)
13134uid 3664,0
13135)
13136*442 (LeafLogPort
13137port (LogicalPort
13138decl (Decl
13139n "W_INT"
13140t "std_logic"
13141o 15
13142suid 111,0
13143)
13144)
13145uid 3666,0
13146)
13147*443 (LeafLogPort
13148port (LogicalPort
13149m 1
13150decl (Decl
13151n "W_CS"
13152t "std_logic"
13153o 50
13154suid 112,0
13155i "'1'"
13156)
13157)
13158uid 3668,0
13159)
13160*444 (LeafLogPort
13161port (LogicalPort
13162m 1
13163decl (Decl
13164n "MOSI"
13165t "std_logic"
13166o 34
13167suid 113,0
13168i "'0'"
13169)
13170)
13171uid 3696,0
13172)
13173*445 (LeafLogPort
13174port (LogicalPort
13175m 2
13176decl (Decl
13177n "MISO"
13178t "std_logic"
13179preAdd 0
13180posAdd 0
13181o 54
13182suid 114,0
13183)
13184)
13185uid 3698,0
13186)
13187*446 (LeafLogPort
13188port (LogicalPort
13189m 1
13190decl (Decl
13191n "TRG_V"
13192t "std_logic"
13193o 48
13194suid 126,0
13195)
13196)
13197uid 3886,0
13198)
13199*447 (LeafLogPort
13200port (LogicalPort
13201m 1
13202decl (Decl
13203n "RS485_C_RE"
13204t "std_logic"
13205o 38
13206suid 127,0
13207)
13208)
13209uid 3888,0
13210)
13211*448 (LeafLogPort
13212port (LogicalPort
13213m 1
13214decl (Decl
13215n "RS485_C_DE"
13216t "std_logic"
13217o 36
13218suid 128,0
13219)
13220)
13221uid 3890,0
13222)
13223*449 (LeafLogPort
13224port (LogicalPort
13225m 1
13226decl (Decl
13227n "RS485_E_RE"
13228t "std_logic"
13229o 40
13230suid 129,0
13231)
13232)
13233uid 3892,0
13234)
13235*450 (LeafLogPort
13236port (LogicalPort
13237m 1
13238decl (Decl
13239n "RS485_E_DE"
13240t "std_logic"
13241o 39
13242suid 130,0
13243)
13244)
13245uid 3894,0
13246)
13247*451 (LeafLogPort
13248port (LogicalPort
13249m 1
13250decl (Decl
13251n "DENABLE"
13252t "std_logic"
13253o 25
13254suid 131,0
13255i "'0'"
13256)
13257)
13258uid 3896,0
13259)
13260*452 (LeafLogPort
13261port (LogicalPort
13262m 1
13263decl (Decl
13264n "EE_CS"
13265t "std_logic"
13266o 30
13267suid 133,0
13268)
13269)
13270uid 3900,0
13271)
13272*453 (LeafLogPort
13273port (LogicalPort
13274m 1
13275decl (Decl
13276n "D_T"
13277t "std_logic_vector"
13278b "(7 DOWNTO 0)"
13279o 28
13280suid 141,0
13281i "(OTHERS => '0')"
13282)
13283)
13284uid 5322,0
13285)
13286*454 (LeafLogPort
13287port (LogicalPort
13288decl (Decl
13289n "D_PLLLCK"
13290t "std_logic_vector"
13291b "(3 DOWNTO 0)"
13292o 10
13293suid 152,0
13294)
13295)
13296uid 6777,0
13297scheme 0
13298)
13299*455 (LeafLogPort
13300port (LogicalPort
13301m 1
13302decl (Decl
13303n "D_T2"
13304t "std_logic_vector"
13305b "(3 DOWNTO 0)"
13306o 29
13307suid 154,0
13308i "(others => '0')"
13309)
13310)
13311uid 6872,0
13312scheme 0
13313)
13314*456 (LeafLogPort
13315port (LogicalPort
13316m 1
13317decl (Decl
13318n "A1_T"
13319t "std_logic_vector"
13320b "(7 DOWNTO 0)"
13321o 18
13322suid 155,0
13323i "(OTHERS => '0')"
13324)
13325)
13326uid 7134,0
13327scheme 0
13328)
13329*457 (LeafLogPort
13330port (LogicalPort
13331m 4
13332decl (Decl
13333n "dummy"
13334t "std_logic"
13335o 76
13336suid 157,0
13337)
13338)
13339uid 7473,0
13340scheme 0
13341)
13342*458 (LeafLogPort
13343port (LogicalPort
13344m 4
13345decl (Decl
13346n "drs_channel_id"
13347t "std_logic_vector"
13348b "(3 downto 0)"
13349o 75
13350suid 159,0
13351i "(others => '0')"
13352)
13353)
13354uid 8875,0
13355)
13356*459 (LeafLogPort
13357port (LogicalPort
13358m 4
13359decl (Decl
13360n "CLK_50"
13361t "std_logic"
13362o 61
13363suid 163,0
13364)
13365)
13366uid 9516,0
13367)
13368*460 (LeafLogPort
13369port (LogicalPort
13370m 4
13371decl (Decl
13372n "CLK_25_PS1"
13373t "std_logic"
13374o 60
13375suid 164,0
13376)
13377)
13378uid 10056,0
13379)
13380*461 (LeafLogPort
13381port (LogicalPort
13382m 4
13383decl (Decl
13384n "adc_clk_en"
13385t "std_logic"
13386o 71
13387suid 165,0
13388i "'0'"
13389)
13390)
13391uid 10058,0
13392)
13393*462 (LeafLogPort
13394port (LogicalPort
13395m 1
13396decl (Decl
13397n "A0_T"
13398t "std_logic_vector"
13399b "(7 DOWNTO 0)"
13400o 17
13401suid 166,0
13402i "(others => '0')"
13403)
13404)
13405uid 10294,0
13406scheme 0
13407)
13408*463 (LeafLogPort
13409port (LogicalPort
13410m 4
13411decl (Decl
13412n "CLK50_OUT"
13413t "std_logic"
13414o 58
13415suid 184,0
13416)
13417)
13418uid 10704,0
13419)
13420*464 (LeafLogPort
13421port (LogicalPort
13422m 4
13423decl (Decl
13424n "CLK25_OUT"
13425t "std_logic"
13426o 56
13427suid 185,0
13428)
13429)
13430uid 10706,0
13431)
13432*465 (LeafLogPort
13433port (LogicalPort
13434m 4
13435decl (Decl
13436n "CLK25_PSOUT"
13437t "std_logic"
13438o 57
13439suid 186,0
13440)
13441)
13442uid 10708,0
13443)
13444*466 (LeafLogPort
13445port (LogicalPort
13446m 4
13447decl (Decl
13448n "PS_DIR_IN"
13449t "std_logic"
13450o 68
13451suid 187,0
13452)
13453)
13454uid 10710,0
13455)
13456*467 (LeafLogPort
13457port (LogicalPort
13458m 4
13459decl (Decl
13460n "PS_DO_IN"
13461t "std_logic"
13462o 69
13463suid 188,0
13464)
13465)
13466uid 10712,0
13467)
13468*468 (LeafLogPort
13469port (LogicalPort
13470m 4
13471decl (Decl
13472n "PSEN_OUT"
13473t "std_logic"
13474o 66
13475suid 189,0
13476)
13477)
13478uid 10714,0
13479)
13480*469 (LeafLogPort
13481port (LogicalPort
13482m 4
13483decl (Decl
13484n "PSINCDEC_OUT"
13485t "std_logic"
13486o 67
13487suid 190,0
13488)
13489)
13490uid 10716,0
13491)
13492*470 (LeafLogPort
13493port (LogicalPort
13494m 4
13495decl (Decl
13496n "DCM_locked"
13497t "std_logic"
13498preAdd 0
13499posAdd 0
13500o 62
13501suid 191,0
13502)
13503)
13504uid 10718,0
13505)
13506*471 (LeafLogPort
13507port (LogicalPort
13508m 4
13509decl (Decl
13510n "ready"
13511t "std_logic"
13512preAdd 0
13513posAdd 0
13514o 77
13515suid 192,0
13516i "'0'"
13517)
13518)
13519uid 10720,0
13520)
13521*472 (LeafLogPort
13522port (LogicalPort
13523m 4
13524decl (Decl
13525n "shifting"
13526t "std_logic"
13527prec "-- status:"
13528preAdd 0
13529posAdd 0
13530o 79
13531suid 193,0
13532i "'0'"
13533)
13534)
13535uid 10722,0
13536)
13537*473 (LeafLogPort
13538port (LogicalPort
13539m 4
13540decl (Decl
13541n "PSDONE_extraOUT"
13542t "std_logic"
13543o 65
13544suid 194,0
13545)
13546)
13547uid 10724,0
13548)
13549*474 (LeafLogPort
13550port (LogicalPort
13551m 4
13552decl (Decl
13553n "PSCLK_OUT"
13554t "std_logic"
13555o 64
13556suid 195,0
13557)
13558)
13559uid 10726,0
13560)
13561*475 (LeafLogPort
13562port (LogicalPort
13563m 4
13564decl (Decl
13565n "LOCKED_extraOUT"
13566t "std_logic"
13567o 63
13568suid 196,0
13569)
13570)
13571uid 10728,0
13572)
13573*476 (LeafLogPort
13574port (LogicalPort
13575decl (Decl
13576n "RS485_C_DI"
13577t "std_logic"
13578o 11
13579suid 197,0
13580)
13581)
13582uid 11084,0
13583scheme 0
13584)
13585*477 (LeafLogPort
13586port (LogicalPort
13587m 1
13588decl (Decl
13589n "RS485_C_DO"
13590t "std_logic"
13591o 37
13592suid 198,0
13593)
13594)
13595uid 11086,0
13596scheme 0
13597)
13598*478 (LeafLogPort
13599port (LogicalPort
13600decl (Decl
13601n "RS485_E_DI"
13602t "std_logic"
13603o 12
13604suid 200,0
13605)
13606)
13607uid 11504,0
13608scheme 0
13609)
13610*479 (LeafLogPort
13611port (LogicalPort
13612decl (Decl
13613n "RS485_E_DO"
13614t "std_logic"
13615o 13
13616suid 201,0
13617)
13618)
13619uid 11506,0
13620scheme 0
13621)
13622*480 (LeafLogPort
13623port (LogicalPort
13624m 1
13625decl (Decl
13626n "SRIN"
13627t "std_logic"
13628o 42
13629suid 203,0
13630i "'0'"
13631)
13632)
13633uid 12336,0
13634)
13635*481 (LeafLogPort
13636port (LogicalPort
13637m 1
13638decl (Decl
13639n "AMBER_LED"
13640t "std_logic"
13641o 31
13642suid 207,0
13643)
13644)
13645uid 12768,0
13646)
13647*482 (LeafLogPort
13648port (LogicalPort
13649m 1
13650decl (Decl
13651n "GREEN_LED"
13652t "std_logic"
13653o 32
13654suid 208,0
13655)
13656)
13657uid 12770,0
13658)
13659*483 (LeafLogPort
13660port (LogicalPort
13661m 1
13662decl (Decl
13663n "RED_LED"
13664t "std_logic"
13665o 33
13666suid 209,0
13667)
13668)
13669uid 12772,0
13670)
13671]
13672)
13673pdm (PhysicalDM
13674displayShortBounds 1
13675editShortBounds 1
13676uid 67,0
13677optionalChildren [
13678*484 (Sheet
13679sheetRow (SheetRow
13680headerVa (MVa
13681cellColor "49152,49152,49152"
13682fontColor "0,0,0"
13683font "Tahoma,10,0"
13684)
13685cellVa (MVa
13686cellColor "65535,65535,65535"
13687fontColor "0,0,0"
13688font "Tahoma,10,0"
13689)
13690groupVa (MVa
13691cellColor "39936,56832,65280"
13692fontColor "0,0,0"
13693font "Tahoma,10,0"
13694)
13695emptyMRCItem *485 (MRCItem
13696litem &392
13697pos 79
13698dimension 20
13699)
13700uid 69,0
13701optionalChildren [
13702*486 (MRCItem
13703litem &393
13704pos 0
13705dimen