source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd.bak@ 10081

Last change on this file since 10081 was 10081, checked in by neise, 12 years ago
DRS write shift register & write config register
File size: 178.2 KB
Line 
1DocumentHdrVersion "1.1"
2Header (DocumentHdr
3version 2
4dmPackageRefs [
5(DmPackageRef
6library "ieee"
7unitName "std_logic_1164"
8)
9(DmPackageRef
10library "ieee"
11unitName "std_logic_arith"
12)
13(DmPackageRef
14library "IEEE"
15unitName "NUMERIC_STD"
16)
17(DmPackageRef
18library "ieee"
19unitName "std_logic_unsigned"
20)
21(DmPackageRef
22library "FACT_FAD_lib"
23unitName "fad_definitions"
24)
25]
26instances [
27(Instance
28name "I_board_main"
29duLibraryName "FACT_FAD_lib"
30duName "FAD_main"
31elements [
32(GiElement
33name "RAMADDRWIDTH64b"
34type "integer"
35value "LOG2_OF_RAM_SIZE_64B"
36)
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38mwi 0
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60embeddedInstances [
61(EmbeddedInstance
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63number "1"
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65(EmbeddedInstance
66name "ADC_CLK"
67number "2"
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69(EmbeddedInstance
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71number "3"
72)
73(EmbeddedInstance
74name "SRCLK"
75number "4"
76)
77(EmbeddedInstance
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79number "5"
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98libraryRefs [
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100"FACT_FAD_lib"
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103version "29.1"
104appVersion "2009.2 (Build 10)"
105noEmbeddedEditors 1
106model (BlockDiag
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111value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
112)
113(vvPair
114variable "HDSDir"
115value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
116)
117(vvPair
118variable "SideDataDesignDir"
119value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.info"
120)
121(vvPair
122variable "SideDataUserDir"
123value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.user"
124)
125(vvPair
126variable "SourceDir"
127value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
128)
129(vvPair
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133(vvPair
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137(vvPair
138variable "config"
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141(vvPair
142variable "d"
143value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board"
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207value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
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209(vvPair
210variable "library_downstream_ImpactInvoke"
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213(vvPair
214variable "library_downstream_ModelSimCompiler"
215value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
216)
217(vvPair
218variable "library_downstream_XSTDataPrep"
219value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
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222variable "mm"
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225(vvPair
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247value "<Undefined Variable>"
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249(vvPair
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251value "FACT_FAD"
252)
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267value "<TBD>"
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269(vvPair
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271value "<TBD>"
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273(vvPair
274variable "task_PrecisionRTLPath"
275value "<TBD>"
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277(vvPair
278variable "task_QuestaSimPath"
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281(vvPair
282variable "task_VCSPath"
283value "<TBD>"
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285(vvPair
286variable "this_ext"
287value "bd"
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291value "struct"
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293(vvPair
294variable "this_file_logical"
295value "struct"
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297(vvPair
298variable "time"
299value "15:55:05"
300)
301(vvPair
302variable "unit"
303value "FAD_Board"
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306variable "user"
307value "dneise"
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310variable "version"
311value "2009.2 (Build 10)"
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315value "struct"
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318variable "year"
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996va (VaSet
997vasetType 1
998fg "0,65535,0"
999)
1000xt "80000,73625,80750,74375"
1001)
1002tg (CPTG
1003uid 193,0
1004ps "CptPortTextPlaceStrategy"
1005stg "RightVerticalLayoutStrategy"
1006f (Text
1007uid 194,0
1008va (VaSet
1009)
1010xt "76300,73500,79000,74500"
1011st "wiz_int"
1012ju 2
1013blo "79000,74300"
1014)
1015)
1016thePort (LogicalPort
1017decl (Decl
1018n "wiz_int"
1019t "std_logic"
1020o 11
1021suid 31,0
1022)
1023)
1024)
1025*23 (CptPort
1026uid 195,0
1027ps "OnEdgeStrategy"
1028shape (Triangle
1029uid 196,0
1030ro 90
1031va (VaSet
1032vasetType 1
1033fg "0,65535,0"
1034)
1035xt "80000,71625,80750,72375"
1036)
1037tg (CPTG
1038uid 197,0
1039ps "CptPortTextPlaceStrategy"
1040stg "RightVerticalLayoutStrategy"
1041f (Text
1042uid 198,0
1043va (VaSet
1044)
1045xt "76400,71500,79000,72500"
1046st "wiz_rd"
1047ju 2
1048blo "79000,72300"
1049)
1050)
1051thePort (LogicalPort
1052m 1
1053decl (Decl
1054n "wiz_rd"
1055t "std_logic"
1056o 46
1057suid 30,0
1058i "'1'"
1059)
1060)
1061)
1062*24 (CptPort
1063uid 199,0
1064ps "OnEdgeStrategy"
1065shape (Triangle
1066uid 200,0
1067ro 90
1068va (VaSet
1069vasetType 1
1070fg "0,65535,0"
1071)
1072xt "80000,72625,80750,73375"
1073)
1074tg (CPTG
1075uid 201,0
1076ps "CptPortTextPlaceStrategy"
1077stg "RightVerticalLayoutStrategy"
1078f (Text
1079uid 202,0
1080va (VaSet
1081)
1082xt "76300,72500,79000,73500"
1083st "wiz_wr"
1084ju 2
1085blo "79000,73300"
1086)
1087)
1088thePort (LogicalPort
1089m 1
1090decl (Decl
1091n "wiz_wr"
1092t "std_logic"
1093o 48
1094suid 29,0
1095i "'1'"
1096)
1097)
1098)
1099*25 (CptPort
1100uid 1304,0
1101ps "OnEdgeStrategy"
1102shape (Triangle
1103uid 1305,0
1104ro 270
1105va (VaSet
1106vasetType 1
1107fg "0,65535,0"
1108)
1109xt "51250,69625,52000,70375"
1110)
1111tg (CPTG
1112uid 1306,0
1113ps "CptPortTextPlaceStrategy"
1114stg "VerticalLayoutStrategy"
1115f (Text
1116uid 1307,0
1117va (VaSet
1118)
1119xt "53000,69500,57500,70500"
1120st "CLK_25_PS"
1121blo "53000,70300"
1122)
1123)
1124thePort (LogicalPort
1125m 1
1126decl (Decl
1127n "CLK_25_PS"
1128t "std_logic"
1129o 15
1130suid 35,0
1131)
1132)
1133)
1134*26 (CptPort
1135uid 1369,0
1136ps "OnEdgeStrategy"
1137shape (Triangle
1138uid 1370,0
1139ro 270
1140va (VaSet
1141vasetType 1
1142fg "0,65535,0"
1143)
1144xt "51250,68625,52000,69375"
1145)
1146tg (CPTG
1147uid 1371,0
1148ps "CptPortTextPlaceStrategy"
1149stg "VerticalLayoutStrategy"
1150f (Text
1151uid 1372,0
1152va (VaSet
1153)
1154xt "53000,68500,56100,69500"
1155st "CLK_50"
1156blo "53000,69300"
1157)
1158)
1159thePort (LogicalPort
1160m 1
1161decl (Decl
1162n "CLK_50"
1163t "std_logic"
1164o 16
1165suid 37,0
1166)
1167)
1168)
1169*27 (CptPort
1170uid 1385,0
1171ps "OnEdgeStrategy"
1172shape (Triangle
1173uid 1386,0
1174ro 90
1175va (VaSet
1176vasetType 1
1177fg "0,65535,0"
1178)
1179xt "51250,67625,52000,68375"
1180)
1181tg (CPTG
1182uid 1387,0
1183ps "CptPortTextPlaceStrategy"
1184stg "VerticalLayoutStrategy"
1185f (Text
1186uid 1388,0
1187va (VaSet
1188)
1189xt "53000,67500,54900,68500"
1190st "CLK"
1191blo "53000,68300"
1192)
1193)
1194thePort (LogicalPort
1195decl (Decl
1196n "CLK"
1197t "std_logic"
1198o 1
1199suid 38,0
1200)
1201)
1202)
1203*28 (CptPort
1204uid 1389,0
1205ps "OnEdgeStrategy"
1206shape (Triangle
1207uid 1390,0
1208ro 90
1209va (VaSet
1210vasetType 1
1211fg "0,65535,0"
1212)
1213xt "51250,94625,52000,95375"
1214)
1215tg (CPTG
1216uid 1391,0
1217ps "CptPortTextPlaceStrategy"
1218stg "VerticalLayoutStrategy"
1219f (Text
1220uid 1392,0
1221va (VaSet
1222)
1223xt "53000,94500,58900,95500"
1224st "adc_data_array"
1225blo "53000,95300"
1226)
1227)
1228thePort (LogicalPort
1229decl (Decl
1230n "adc_data_array"
1231t "adc_data_array_type"
1232o 6
1233suid 39,0
1234)
1235)
1236)
1237*29 (CptPort
1238uid 1511,0
1239ps "OnEdgeStrategy"
1240shape (Triangle
1241uid 1512,0
1242ro 90
1243va (VaSet
1244vasetType 1
1245fg "0,65535,0"
1246)
1247xt "51250,88625,52000,89375"
1248)
1249tg (CPTG
1250uid 1513,0
1251ps "CptPortTextPlaceStrategy"
1252stg "VerticalLayoutStrategy"
1253f (Text
1254uid 1514,0
1255va (VaSet
1256)
1257xt "53000,88500,61000,89500"
1258st "adc_otr_array : (3:0)"
1259blo "53000,89300"
1260)
1261)
1262thePort (LogicalPort
1263decl (Decl
1264n "adc_otr_array"
1265t "std_logic_vector"
1266b "(3 DOWNTO 0)"
1267o 7
1268suid 40,0
1269)
1270)
1271)
1272*30 (CptPort
1273uid 1572,0
1274ps "OnEdgeStrategy"
1275shape (Triangle
1276uid 1573,0
1277ro 270
1278va (VaSet
1279vasetType 1
1280fg "0,65535,0"
1281)
1282xt "51250,108625,52000,109375"
1283)
1284tg (CPTG
1285uid 1574,0
1286ps "CptPortTextPlaceStrategy"
1287stg "VerticalLayoutStrategy"
1288f (Text
1289uid 1575,0
1290va (VaSet
1291)
1292xt "53000,108500,61500,109500"
1293st "drs_channel_id : (3:0)"
1294blo "53000,109300"
1295)
1296)
1297thePort (LogicalPort
1298m 1
1299decl (Decl
1300n "drs_channel_id"
1301t "std_logic_vector"
1302b "(3 downto 0)"
1303o 33
1304suid 48,0
1305i "(others => '0')"
1306)
1307)
1308)
1309*31 (CptPort
1310uid 1576,0
1311ps "OnEdgeStrategy"
1312shape (Triangle
1313uid 1577,0
1314ro 270
1315va (VaSet
1316vasetType 1
1317fg "0,65535,0"
1318)
1319xt "51250,109625,52000,110375"
1320)
1321tg (CPTG
1322uid 1578,0
1323ps "CptPortTextPlaceStrategy"
1324stg "VerticalLayoutStrategy"
1325f (Text
1326uid 1579,0
1327va (VaSet
1328)
1329xt "53000,109500,57300,110500"
1330st "drs_dwrite"
1331blo "53000,110300"
1332)
1333)
1334thePort (LogicalPort
1335m 1
1336decl (Decl
1337n "drs_dwrite"
1338t "std_logic"
1339o 34
1340suid 49,0
1341i "'1'"
1342)
1343)
1344)
1345*32 (CptPort
1346uid 1588,0
1347ps "OnEdgeStrategy"
1348shape (Triangle
1349uid 1589,0
1350ro 90
1351va (VaSet
1352vasetType 1
1353fg "0,65535,0"
1354)
1355xt "51250,104625,52000,105375"
1356)
1357tg (CPTG
1358uid 1590,0
1359ps "CptPortTextPlaceStrategy"
1360stg "VerticalLayoutStrategy"
1361f (Text
1362uid 1591,0
1363va (VaSet
1364)
1365xt "53000,104500,58400,105500"
1366st "SROUT_in_0"
1367blo "53000,105300"
1368)
1369)
1370thePort (LogicalPort
1371decl (Decl
1372n "SROUT_in_0"
1373t "std_logic"
1374o 2
1375suid 42,0
1376)
1377)
1378)
1379*33 (CptPort
1380uid 1592,0
1381ps "OnEdgeStrategy"
1382shape (Triangle
1383uid 1593,0
1384ro 90
1385va (VaSet
1386vasetType 1
1387fg "0,65535,0"
1388)
1389xt "51250,105625,52000,106375"
1390)
1391tg (CPTG
1392uid 1594,0
1393ps "CptPortTextPlaceStrategy"
1394stg "VerticalLayoutStrategy"
1395f (Text
1396uid 1595,0
1397va (VaSet
1398)
1399xt "53000,105500,58400,106500"
1400st "SROUT_in_1"
1401blo "53000,106300"
1402)
1403)
1404thePort (LogicalPort
1405decl (Decl
1406n "SROUT_in_1"
1407t "std_logic"
1408o 3
1409suid 43,0
1410)
1411)
1412)
1413*34 (CptPort
1414uid 1596,0
1415ps "OnEdgeStrategy"
1416shape (Triangle
1417uid 1597,0
1418ro 90
1419va (VaSet
1420vasetType 1
1421fg "0,65535,0"
1422)
1423xt "51250,106625,52000,107375"
1424)
1425tg (CPTG
1426uid 1598,0
1427ps "CptPortTextPlaceStrategy"
1428stg "VerticalLayoutStrategy"
1429f (Text
1430uid 1599,0
1431va (VaSet
1432)
1433xt "53000,106500,58400,107500"
1434st "SROUT_in_2"
1435blo "53000,107300"
1436)
1437)
1438thePort (LogicalPort
1439decl (Decl
1440n "SROUT_in_2"
1441t "std_logic"
1442o 4
1443suid 44,0
1444)
1445)
1446)
1447*35 (CptPort
1448uid 1600,0
1449ps "OnEdgeStrategy"
1450shape (Triangle
1451uid 1601,0
1452ro 90
1453va (VaSet
1454vasetType 1
1455fg "0,65535,0"
1456)
1457xt "51250,107625,52000,108375"
1458)
1459tg (CPTG
1460uid 1602,0
1461ps "CptPortTextPlaceStrategy"
1462stg "VerticalLayoutStrategy"
1463f (Text
1464uid 1603,0
1465va (VaSet
1466)
1467xt "53000,107500,58400,108500"
1468st "SROUT_in_3"
1469blo "53000,108300"
1470)
1471)
1472thePort (LogicalPort
1473decl (Decl
1474n "SROUT_in_3"
1475t "std_logic"
1476o 5
1477suid 45,0
1478)
1479)
1480)
1481*36 (CptPort
1482uid 2379,0
1483ps "OnEdgeStrategy"
1484shape (Triangle
1485uid 2380,0
1486ro 270
1487va (VaSet
1488vasetType 1
1489fg "0,65535,0"
1490)
1491xt "51250,110625,52000,111375"
1492)
1493tg (CPTG
1494uid 2381,0
1495ps "CptPortTextPlaceStrategy"
1496stg "VerticalLayoutStrategy"
1497f (Text
1498uid 2382,0
1499va (VaSet
1500)
1501xt "53000,110500,57200,111500"
1502st "RSRLOAD"
1503blo "53000,111300"
1504)
1505)
1506thePort (LogicalPort
1507m 1
1508decl (Decl
1509n "RSRLOAD"
1510t "std_logic"
1511o 25
1512suid 56,0
1513i "'0'"
1514)
1515)
1516)
1517*37 (CptPort
1518uid 2383,0
1519ps "OnEdgeStrategy"
1520shape (Triangle
1521uid 2384,0
1522ro 270
1523va (VaSet
1524vasetType 1
1525fg "0,65535,0"
1526)
1527xt "51250,112625,52000,113375"
1528)
1529tg (CPTG
1530uid 2385,0
1531ps "CptPortTextPlaceStrategy"
1532stg "VerticalLayoutStrategy"
1533f (Text
1534uid 2386,0
1535va (VaSet
1536)
1537xt "53000,112500,56000,113500"
1538st "SRCLK"
1539blo "53000,113300"
1540)
1541)
1542thePort (LogicalPort
1543m 1
1544decl (Decl
1545n "SRCLK"
1546t "std_logic"
1547o 26
1548suid 57,0
1549i "'0'"
1550)
1551)
1552)
1553*38 (CptPort
1554uid 2969,0
1555ps "OnEdgeStrategy"
1556shape (Triangle
1557uid 2970,0
1558ro 90
1559va (VaSet
1560vasetType 1
1561fg "0,65535,0"
1562)
1563xt "80000,86625,80750,87375"
1564)
1565tg (CPTG
1566uid 2971,0
1567ps "CptPortTextPlaceStrategy"
1568stg "RightVerticalLayoutStrategy"
1569f (Text
1570uid 2972,0
1571va (VaSet
1572)
1573xt "76200,86500,79000,87500"
1574st "dac_cs"
1575ju 2
1576blo "79000,87300"
1577)
1578)
1579thePort (LogicalPort
1580m 1
1581decl (Decl
1582n "dac_cs"
1583t "std_logic"
1584o 31
1585suid 64,0
1586)
1587)
1588)
1589*39 (CptPort
1590uid 2973,0
1591ps "OnEdgeStrategy"
1592shape (Triangle
1593uid 2974,0
1594ro 90
1595va (VaSet
1596vasetType 1
1597fg "0,65535,0"
1598)
1599xt "80000,97625,80750,98375"
1600)
1601tg (CPTG
1602uid 2975,0
1603ps "CptPortTextPlaceStrategy"
1604stg "RightVerticalLayoutStrategy"
1605f (Text
1606uid 2976,0
1607va (VaSet
1608)
1609xt "77300,97500,79000,98500"
1610st "sclk"
1611ju 2
1612blo "79000,98300"
1613)
1614)
1615thePort (LogicalPort
1616m 1
1617decl (Decl
1618n "sclk"
1619t "std_logic"
1620o 41
1621suid 62,0
1622)
1623)
1624)
1625*40 (CptPort
1626uid 2977,0
1627ps "OnEdgeStrategy"
1628shape (Triangle
1629uid 2978,0
1630ro 90
1631va (VaSet
1632vasetType 1
1633fg "0,65535,0"
1634)
1635xt "80000,88625,80750,89375"
1636)
1637tg (CPTG
1638uid 2979,0
1639ps "CptPortTextPlaceStrategy"
1640stg "RightVerticalLayoutStrategy"
1641f (Text
1642uid 2980,0
1643va (VaSet
1644)
1645xt "72500,88500,79000,89500"
1646st "sensor_cs : (3:0)"
1647ju 2
1648blo "79000,89300"
1649)
1650)
1651thePort (LogicalPort
1652m 1
1653decl (Decl
1654n "sensor_cs"
1655t "std_logic_vector"
1656b "(3 DOWNTO 0)"
1657o 42
1658suid 65,0
1659)
1660)
1661)
1662*41 (CptPort
1663uid 2981,0
1664ps "OnEdgeStrategy"
1665shape (Diamond
1666uid 2982,0
1667ro 90
1668va (VaSet
1669vasetType 1
1670fg "0,65535,0"
1671)
1672xt "80000,98625,80750,99375"
1673)
1674tg (CPTG
1675uid 2983,0
1676ps "CptPortTextPlaceStrategy"
1677stg "RightVerticalLayoutStrategy"
1678f (Text
1679uid 2984,0
1680va (VaSet
1681)
1682xt "77600,98500,79000,99500"
1683st "sio"
1684ju 2
1685blo "79000,99300"
1686)
1687)
1688thePort (LogicalPort
1689m 2
1690decl (Decl
1691n "sio"
1692t "std_logic"
1693preAdd 0
1694posAdd 0
1695o 49
1696suid 63,0
1697)
1698)
1699)
1700*42 (CptPort
1701uid 3670,0
1702ps "OnEdgeStrategy"
1703shape (Triangle
1704uid 3671,0
1705ro 90
1706va (VaSet
1707vasetType 1
1708fg "0,65535,0"
1709)
1710xt "80000,99625,80750,100375"
1711)
1712tg (CPTG
1713uid 3672,0
1714ps "CptPortTextPlaceStrategy"
1715stg "RightVerticalLayoutStrategy"
1716f (Text
1717uid 3673,0
1718va (VaSet
1719)
1720xt "77000,99500,79000,100500"
1721st "mosi"
1722ju 2
1723blo "79000,100300"
1724)
1725)
1726thePort (LogicalPort
1727m 1
1728decl (Decl
1729n "mosi"
1730t "std_logic"
1731o 37
1732suid 66,0
1733i "'0'"
1734)
1735)
1736)
1737*43 (CptPort
1738uid 6427,0
1739ps "OnEdgeStrategy"
1740shape (Triangle
1741uid 6428,0
1742ro 90
1743va (VaSet
1744vasetType 1
1745fg "0,65535,0"
1746)
1747xt "80000,120625,80750,121375"
1748)
1749tg (CPTG
1750uid 6429,0
1751ps "CptPortTextPlaceStrategy"
1752stg "RightVerticalLayoutStrategy"
1753f (Text
1754uid 6430,0
1755va (VaSet
1756)
1757xt "76000,120500,79000,121500"
1758st "denable"
1759ju 2
1760blo "79000,121300"
1761)
1762)
1763thePort (LogicalPort
1764m 1
1765decl (Decl
1766n "denable"
1767t "std_logic"
1768eolc "-- default domino wave off"
1769posAdd 0
1770o 32
1771suid 67,0
1772i "'0'"
1773)
1774)
1775)
1776*44 (CptPort
1777uid 10046,0
1778ps "OnEdgeStrategy"
1779shape (Triangle
1780uid 10047,0
1781ro 270
1782va (VaSet
1783vasetType 1
1784fg "0,65535,0"
1785)
1786xt "51250,72625,52000,73375"
1787)
1788tg (CPTG
1789uid 10048,0
1790ps "CptPortTextPlaceStrategy"
1791stg "VerticalLayoutStrategy"
1792f (Text
1793uid 10049,0
1794va (VaSet
1795)
1796xt "53000,72500,57500,73500"
1797st "adc_clk_en"
1798blo "53000,73300"
1799)
1800)
1801thePort (LogicalPort
1802m 1
1803decl (Decl
1804n "adc_clk_en"
1805t "std_logic"
1806o 28
1807suid 69,0
1808i "'0'"
1809)
1810)
1811)
1812*45 (CptPort
1813uid 10246,0
1814ps "OnEdgeStrategy"
1815shape (Triangle
1816uid 10247,0
1817ro 90
1818va (VaSet
1819vasetType 1
1820fg "0,65535,0"
1821)
1822xt "80000,129625,80750,130375"
1823)
1824tg (CPTG
1825uid 10248,0
1826ps "CptPortTextPlaceStrategy"
1827stg "RightVerticalLayoutStrategy"
1828f (Text
1829uid 10249,0
1830va (VaSet
1831)
1832xt "73800,129500,79000,130500"
1833st "DCM_locked"
1834ju 2
1835blo "79000,130300"
1836)
1837)
1838thePort (LogicalPort
1839m 1
1840decl (Decl
1841n "DCM_locked"
1842t "std_logic"
1843preAdd 0
1844posAdd 0
1845o 17
1846suid 76,0
1847)
1848)
1849)
1850*46 (CptPort
1851uid 10254,0
1852ps "OnEdgeStrategy"
1853shape (Triangle
1854uid 10255,0
1855ro 90
1856va (VaSet
1857vasetType 1
1858fg "0,65535,0"
1859)
1860xt "80000,135625,80750,136375"
1861)
1862tg (CPTG
1863uid 10256,0
1864ps "CptPortTextPlaceStrategy"
1865stg "RightVerticalLayoutStrategy"
1866f (Text
1867uid 10257,0
1868va (VaSet
1869)
1870xt "71300,135500,79000,136500"
1871st "LOCKED_extraOUT"
1872ju 2
1873blo "79000,136300"
1874)
1875)
1876thePort (LogicalPort
1877m 1
1878decl (Decl
1879n "LOCKED_extraOUT"
1880t "std_logic"
1881o 18
1882suid 70,0
1883)
1884)
1885)
1886*47 (CptPort
1887uid 10258,0
1888ps "OnEdgeStrategy"
1889shape (Triangle
1890uid 10259,0
1891ro 90
1892va (VaSet
1893vasetType 1
1894fg "0,65535,0"
1895)
1896xt "80000,138625,80750,139375"
1897)
1898tg (CPTG
1899uid 10260,0
1900ps "CptPortTextPlaceStrategy"
1901stg "RightVerticalLayoutStrategy"
1902f (Text
1903uid 10261,0
1904va (VaSet
1905)
1906xt "74200,138500,79000,139500"
1907st "offset : (7:0)"
1908ju 2
1909blo "79000,139300"
1910)
1911)
1912thePort (LogicalPort
1913m 1
1914decl (Decl
1915n "offset"
1916t "std_logic_vector"
1917b "(7 downto 0)"
1918preAdd 0
1919posAdd 0
1920o 38
1921suid 77,0
1922i "(OTHERS => '0')"
1923)
1924)
1925)
1926*48 (CptPort
1927uid 10262,0
1928ps "OnEdgeStrategy"
1929shape (Triangle
1930uid 10263,0
1931ro 90
1932va (VaSet
1933vasetType 1
1934fg "0,65535,0"
1935)
1936xt "80000,125625,80750,126375"
1937)
1938tg (CPTG
1939uid 10264,0
1940ps "CptPortTextPlaceStrategy"
1941stg "RightVerticalLayoutStrategy"
1942f (Text
1943uid 10265,0
1944va (VaSet
1945)
1946xt "74600,125500,79000,126500"
1947st "PS_DIR_IN"
1948ju 2
1949blo "79000,126300"
1950)
1951)
1952thePort (LogicalPort
1953m 1
1954decl (Decl
1955n "PS_DIR_IN"
1956t "std_logic"
1957o 23
1958suid 80,0
1959)
1960)
1961)
1962*49 (CptPort
1963uid 10266,0
1964ps "OnEdgeStrategy"
1965shape (Triangle
1966uid 10267,0
1967ro 90
1968va (VaSet
1969vasetType 1
1970fg "0,65535,0"
1971)
1972xt "80000,126625,80750,127375"
1973)
1974tg (CPTG
1975uid 10268,0
1976ps "CptPortTextPlaceStrategy"
1977stg "RightVerticalLayoutStrategy"
1978f (Text
1979uid 10269,0
1980va (VaSet
1981)
1982xt "74800,126500,79000,127500"
1983st "PS_DO_IN"
1984ju 2
1985blo "79000,127300"
1986)
1987)
1988thePort (LogicalPort
1989m 1
1990decl (Decl
1991n "PS_DO_IN"
1992t "std_logic"
1993o 24
1994suid 81,0
1995)
1996)
1997)
1998*50 (CptPort
1999uid 10270,0
2000ps "OnEdgeStrategy"
2001shape (Triangle
2002uid 10271,0
2003ro 90
2004va (VaSet
2005vasetType 1
2006fg "0,65535,0"
2007)
2008xt "80000,134625,80750,135375"
2009)
2010tg (CPTG
2011uid 10272,0
2012ps "CptPortTextPlaceStrategy"
2013stg "RightVerticalLayoutStrategy"
2014f (Text
2015uid 10273,0
2016va (VaSet
2017)
2018xt "74000,134500,79000,135500"
2019st "PSCLK_OUT"
2020ju 2
2021blo "79000,135300"
2022)
2023)
2024thePort (LogicalPort
2025m 1
2026decl (Decl
2027n "PSCLK_OUT"
2028t "std_logic"
2029o 19
2030suid 74,0
2031)
2032)
2033)
2034*51 (CptPort
2035uid 10274,0
2036ps "OnEdgeStrategy"
2037shape (Triangle
2038uid 10275,0
2039ro 90
2040va (VaSet
2041vasetType 1
2042fg "0,65535,0"
2043)
2044xt "80000,133625,80750,134375"
2045)
2046tg (CPTG
2047uid 10276,0
2048ps "CptPortTextPlaceStrategy"
2049stg "RightVerticalLayoutStrategy"
2050f (Text
2051uid 10277,0
2052va (VaSet
2053)
2054xt "71200,133500,79000,134500"
2055st "PSDONE_extraOUT"
2056ju 2
2057blo "79000,134300"
2058)
2059)
2060thePort (LogicalPort
2061m 1
2062decl (Decl
2063n "PSDONE_extraOUT"
2064t "std_logic"
2065o 20
2066suid 71,0
2067)
2068)
2069)
2070*52 (CptPort
2071uid 10278,0
2072ps "OnEdgeStrategy"
2073shape (Triangle
2074uid 10279,0
2075ro 90
2076va (VaSet
2077vasetType 1
2078fg "0,65535,0"
2079)
2080xt "80000,128625,80750,129375"
2081)
2082tg (CPTG
2083uid 10280,0
2084ps "CptPortTextPlaceStrategy"
2085stg "RightVerticalLayoutStrategy"
2086f (Text
2087uid 10281,0
2088va (VaSet
2089)
2090xt "74400,128500,79000,129500"
2091st "PSEN_OUT"
2092ju 2
2093blo "79000,129300"
2094)
2095)
2096thePort (LogicalPort
2097m 1
2098decl (Decl
2099n "PSEN_OUT"
2100t "std_logic"
2101o 21
2102suid 73,0
2103)
2104)
2105)
2106*53 (CptPort
2107uid 10282,0
2108ps "OnEdgeStrategy"
2109shape (Triangle
2110uid 10283,0
2111ro 90
2112va (VaSet
2113vasetType 1
2114fg "0,65535,0"
2115)
2116xt "80000,127625,80750,128375"
2117)
2118tg (CPTG
2119uid 10284,0
2120ps "CptPortTextPlaceStrategy"
2121stg "RightVerticalLayoutStrategy"
2122f (Text
2123uid 10285,0
2124va (VaSet
2125)
2126xt "72000,127500,79000,128500"
2127st "PSINCDEC_OUT"
2128ju 2
2129blo "79000,128300"
2130)
2131)
2132thePort (LogicalPort
2133m 1
2134decl (Decl
2135n "PSINCDEC_OUT"
2136t "std_logic"
2137o 22
2138suid 72,0
2139)
2140)
2141)
2142*54 (CptPort
2143uid 10286,0
2144ps "OnEdgeStrategy"
2145shape (Triangle
2146uid 10287,0
2147ro 90
2148va (VaSet
2149vasetType 1
2150fg "0,65535,0"
2151)
2152xt "80000,131625,80750,132375"
2153)
2154tg (CPTG
2155uid 10288,0
2156ps "CptPortTextPlaceStrategy"
2157stg "RightVerticalLayoutStrategy"
2158f (Text
2159uid 10289,0
2160va (VaSet
2161)
2162xt "76800,131500,79000,132500"
2163st "ready"
2164ju 2
2165blo "79000,132300"
2166)
2167)
2168thePort (LogicalPort
2169m 1
2170decl (Decl
2171n "ready"
2172t "std_logic"
2173preAdd 0
2174posAdd 0
2175o 39
2176suid 79,0
2177i "'0'"
2178)
2179)
2180)
2181*55 (CptPort
2182uid 10290,0
2183ps "OnEdgeStrategy"
2184shape (Triangle
2185uid 10291,0
2186ro 90
2187va (VaSet
2188vasetType 1
2189fg "0,65535,0"
2190)
2191xt "80000,132625,80750,133375"
2192)
2193tg (CPTG
2194uid 10292,0
2195ps "CptPortTextPlaceStrategy"
2196stg "RightVerticalLayoutStrategy"
2197f (Text
2198uid 10293,0
2199va (VaSet
2200)
2201xt "76100,132500,79000,133500"
2202st "shifting"
2203ju 2
2204blo "79000,133300"
2205)
2206)
2207thePort (LogicalPort
2208m 1
2209decl (Decl
2210n "shifting"
2211t "std_logic"
2212prec "-- status:"
2213preAdd 0
2214posAdd 0
2215o 43
2216suid 78,0
2217i "'0'"
2218)
2219)
2220)
2221*56 (CptPort
2222uid 10320,0
2223ps "OnEdgeStrategy"
2224shape (Triangle
2225uid 10321,0
2226ro 90
2227va (VaSet
2228vasetType 1
2229fg "0,65535,0"
2230)
2231xt "80000,123625,80750,124375"
2232)
2233tg (CPTG
2234uid 10322,0
2235ps "CptPortTextPlaceStrategy"
2236stg "RightVerticalLayoutStrategy"
2237f (Text
2238uid 10323,0
2239va (VaSet
2240)
2241xt "74200,123500,79000,124500"
2242st "CLK25_OUT"
2243ju 2
2244blo "79000,124300"
2245)
2246)
2247thePort (LogicalPort
2248m 1
2249decl (Decl
2250n "CLK25_OUT"
2251t "std_logic"
2252o 12
2253suid 83,0
2254)
2255)
2256)
2257*57 (CptPort
2258uid 10324,0
2259ps "OnEdgeStrategy"
2260shape (Triangle
2261uid 10325,0
2262ro 90
2263va (VaSet
2264vasetType 1
2265fg "0,65535,0"
2266)
2267xt "80000,124625,80750,125375"
2268)
2269tg (CPTG
2270uid 10326,0
2271ps "CptPortTextPlaceStrategy"
2272stg "RightVerticalLayoutStrategy"
2273f (Text
2274uid 10327,0
2275va (VaSet
2276)
2277xt "72800,124500,79000,125500"
2278st "CLK25_PSOUT"
2279ju 2
2280blo "79000,125300"
2281)
2282)
2283thePort (LogicalPort
2284m 1
2285decl (Decl
2286n "CLK25_PSOUT"
2287t "std_logic"
2288o 13
2289suid 84,0
2290)
2291)
2292)
2293*58 (CptPort
2294uid 10328,0
2295ps "OnEdgeStrategy"
2296shape (Triangle
2297uid 10329,0
2298ro 90
2299va (VaSet
2300vasetType 1
2301fg "0,65535,0"
2302)
2303xt "80000,122625,80750,123375"
2304)
2305tg (CPTG
2306uid 10330,0
2307ps "CptPortTextPlaceStrategy"
2308stg "RightVerticalLayoutStrategy"
2309f (Text
2310uid 10331,0
2311va (VaSet
2312)
2313xt "74200,122500,79000,123500"
2314st "CLK50_OUT"
2315ju 2
2316blo "79000,123300"
2317)
2318)
2319thePort (LogicalPort
2320m 1
2321decl (Decl
2322n "CLK50_OUT"
2323t "std_logic"
2324o 14
2325suid 82,0
2326)
2327)
2328)
2329*59 (CptPort
2330uid 12314,0
2331ps "OnEdgeStrategy"
2332shape (Triangle
2333uid 12315,0
2334ro 90
2335va (VaSet
2336vasetType 1
2337fg "0,65535,0"
2338)
2339xt "80000,139625,80750,140375"
2340)
2341tg (CPTG
2342uid 12316,0
2343ps "CptPortTextPlaceStrategy"
2344stg "RightVerticalLayoutStrategy"
2345f (Text
2346uid 12317,0
2347va (VaSet
2348)
2349xt "75300,139500,79000,140500"
2350st "SRIN_out"
2351ju 2
2352blo "79000,140300"
2353)
2354)
2355thePort (LogicalPort
2356m 1
2357decl (Decl
2358n "SRIN_out"
2359t "std_logic"
2360o 27
2361suid 85,0
2362i "'0'"
2363)
2364)
2365)
2366*60 (CptPort
2367uid 12521,0
2368ps "OnEdgeStrategy"
2369shape (Triangle
2370uid 12522,0
2371ro 90
2372va (VaSet
2373vasetType 1
2374fg "0,65535,0"
2375)
2376xt "80000,140625,80750,141375"
2377)
2378tg (CPTG
2379uid 12523,0
2380ps "CptPortTextPlaceStrategy"
2381stg "RightVerticalLayoutStrategy"
2382f (Text
2383uid 12524,0
2384va (VaSet
2385)
2386xt "76500,140500,79000,141500"
2387st "amber"
2388ju 2
2389blo "79000,141300"
2390)
2391)
2392thePort (LogicalPort
2393m 1
2394decl (Decl
2395n "amber"
2396t "std_logic"
2397o 30
2398suid 87,0
2399)
2400)
2401)
2402*61 (CptPort
2403uid 12525,0
2404ps "OnEdgeStrategy"
2405shape (Triangle
2406uid 12526,0
2407ro 90
2408va (VaSet
2409vasetType 1
2410fg "0,65535,0"
2411)
2412xt "80000,141625,80750,142375"
2413)
2414tg (CPTG
2415uid 12527,0
2416ps "CptPortTextPlaceStrategy"
2417stg "RightVerticalLayoutStrategy"
2418f (Text
2419uid 12528,0
2420va (VaSet
2421)
2422xt "76600,141500,79000,142500"
2423st "green"
2424ju 2
2425blo "79000,142300"
2426)
2427)
2428thePort (LogicalPort
2429m 1
2430decl (Decl
2431n "green"
2432t "std_logic"
2433o 35
2434suid 86,0
2435)
2436)
2437)
2438*62 (CptPort
2439uid 12529,0
2440ps "OnEdgeStrategy"
2441shape (Triangle
2442uid 12530,0
2443ro 90
2444va (VaSet
2445vasetType 1
2446fg "0,65535,0"
2447)
2448xt "80000,142625,80750,143375"
2449)
2450tg (CPTG
2451uid 12531,0
2452ps "CptPortTextPlaceStrategy"
2453stg "RightVerticalLayoutStrategy"
2454f (Text
2455uid 12532,0
2456va (VaSet
2457)
2458xt "77500,142500,79000,143500"
2459st "red"
2460ju 2
2461blo "79000,143300"
2462)
2463)
2464thePort (LogicalPort
2465m 1
2466decl (Decl
2467n "red"
2468t "std_logic"
2469o 40
2470suid 88,0
2471)
2472)
2473)
2474]
2475shape (Rectangle
2476uid 170,0
2477va (VaSet
2478vasetType 1
2479fg "0,65535,0"
2480lineColor "0,32896,0"
2481lineWidth 2
2482)
2483xt "52000,66000,80000,144000"
2484)
2485oxt "15000,-1000,43000,27000"
2486ttg (MlTextGroup
2487uid 171,0
2488ps "CenterOffsetStrategy"
2489stg "VerticalLayoutStrategy"
2490textVec [
2491*63 (Text
2492uid 172,0
2493va (VaSet
2494font "Arial,8,1"
2495)
2496xt "52200,123000,58400,124000"
2497st "FACT_FAD_lib"
2498blo "52200,123800"
2499tm "BdLibraryNameMgr"
2500)
2501*64 (Text
2502uid 173,0
2503va (VaSet
2504font "Arial,8,1"
2505)
2506xt "52200,124000,56400,125000"
2507st "FAD_main"
2508blo "52200,124800"
2509tm "CptNameMgr"
2510)
2511*65 (Text
2512uid 174,0
2513va (VaSet
2514font "Arial,8,1"
2515)
2516xt "52200,125000,58000,126000"
2517st "I_board_main"
2518blo "52200,125800"
2519tm "InstanceNameMgr"
2520)
2521]
2522)
2523ga (GenericAssociation
2524uid 175,0
2525ps "EdgeToEdgeStrategy"
2526matrix (Matrix
2527uid 176,0
2528text (MLText
2529uid 177,0
2530va (VaSet
2531font "Courier New,8,0"
2532)
2533xt "52000,65200,81500,66000"
2534st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B ( integer ) "
2535)
2536header ""
2537)
2538elements [
2539(GiElement
2540name "RAMADDRWIDTH64b"
2541type "integer"
2542value "LOG2_OF_RAM_SIZE_64B"
2543)
2544]
2545)
2546viewicon (ZoomableIcon
2547uid 178,0
2548sl 0
2549va (VaSet
2550vasetType 1
2551fg "49152,49152,49152"
2552)
2553xt "52250,142250,53750,143750"
2554iconName "BlockDiagram.png"
2555iconMaskName "BlockDiagram.msk"
2556ftype 1
2557)
2558viewiconposition 0
2559portVis (PortSigDisplay
2560)
2561archFileType "UNKNOWN"
2562)
2563*66 (PortIoIn
2564uid 231,0
2565shape (CompositeShape
2566uid 232,0
2567va (VaSet
2568vasetType 1
2569fg "0,0,32768"
2570)
2571optionalChildren [
2572(Pentagon
2573uid 233,0
2574sl 0
2575ro 270
2576xt "20000,77625,21500,78375"
2577)
2578(Line
2579uid 234,0
2580sl 0
2581ro 270
2582xt "21500,78000,22000,78000"
2583pts [
2584"21500,78000"
2585"22000,78000"
2586]
2587)
2588]
2589)
2590stc 0
2591sf 1
2592tg (WTG
2593uid 235,0
2594ps "PortIoTextPlaceStrategy"
2595stg "STSignalDisplayStrategy"
2596f (Text
2597uid 236,0
2598va (VaSet
2599)
2600xt "16900,77500,19000,78500"
2601st "TRG"
2602ju 2
2603blo "19000,78300"
2604tm "WireNameMgr"
2605)
2606)
2607)
2608*67 (PortIoIn
2609uid 251,0
2610shape (CompositeShape
2611uid 252,0
2612va (VaSet
2613vasetType 1
2614fg "0,0,32768"
2615)
2616optionalChildren [
2617(Pentagon
2618uid 253,0
2619sl 0
2620ro 270
2621xt "19000,67625,20500,68375"
2622)
2623(Line
2624uid 254,0
2625sl 0
2626ro 270
2627xt "20500,68000,21000,68000"
2628pts [
2629"20500,68000"
2630"21000,68000"
2631]
2632)
2633]
2634)
2635stc 0
2636sf 1
2637tg (WTG
2638uid 255,0
2639ps "PortIoTextPlaceStrategy"
2640stg "STSignalDisplayStrategy"
2641f (Text
2642uid 256,0
2643va (VaSet
2644)
2645xt "15200,67500,18000,68500"
2646st "X_50M"
2647ju 2
2648blo "18000,68300"
2649tm "WireNameMgr"
2650)
2651)
2652)
2653*68 (HdlText
2654uid 265,0
2655optionalChildren [
2656*69 (EmbeddedText
2657uid 271,0
2658commentText (CommentText
2659uid 272,0
2660ps "CenterOffsetStrategy"
2661shape (Rectangle
2662uid 273,0
2663va (VaSet
2664vasetType 1
2665fg "65535,65535,65535"
2666lineColor "0,0,32768"
2667lineWidth 2
2668)
2669xt "32000,83000,44000,87000"
2670)
2671oxt "12000,27000,20000,31000"
2672text (MLText
2673uid 274,0
2674va (VaSet
2675)
2676xt "32200,83200,39700,86200"
2677st "
2678-- hard-wired IDs
2679board_id <= \"0101\";
2680crate_id <= \"01\";
2681"
2682tm "HdlTextMgr"
2683wrapOption 3
2684visibleHeight 4000
2685visibleWidth 12000
2686)
2687)
2688)
2689]
2690shape (Rectangle
2691uid 266,0
2692va (VaSet
2693vasetType 1
2694fg "65535,65535,37120"
2695lineColor "0,0,32768"
2696lineWidth 2
2697)
2698xt "24000,80000,32000,87000"
2699)
2700oxt "12000,23000,17000,27000"
2701ttg (MlTextGroup
2702uid 267,0
2703ps "CenterOffsetStrategy"
2704stg "VerticalLayoutStrategy"
2705textVec [
2706*70 (Text
2707uid 268,0
2708va (VaSet
2709font "Arial,8,1"
2710)
2711xt "26150,81000,28650,82000"
2712st "eb_ID"
2713blo "26150,81800"
2714tm "HdlTextNameMgr"
2715)
2716*71 (Text
2717uid 269,0
2718va (VaSet
2719font "Arial,8,1"
2720)
2721xt "26150,82000,26950,83000"
2722st "1"
2723blo "26150,82800"
2724tm "HdlTextNumberMgr"
2725)
2726]
2727)
2728viewicon (ZoomableIcon
2729uid 270,0
2730sl 0
2731va (VaSet
2732vasetType 1
2733fg "49152,49152,49152"
2734)
2735xt "24250,85250,25750,86750"
2736iconName "TextFile.png"
2737iconMaskName "TextFile.msk"
2738ftype 21
2739)
2740viewiconposition 0
2741)
2742*72 (Net
2743uid 275,0
2744decl (Decl
2745n "board_id"
2746t "std_logic_vector"
2747b "(3 downto 0)"
2748preAdd 0
2749posAdd 0
2750o 73
2751suid 5,0
2752)
2753declText (MLText
2754uid 276,0
2755va (VaSet
2756font "Courier New,8,0"
2757)
2758xt "39000,62400,67500,63200"
2759st "SIGNAL board_id : std_logic_vector(3 downto 0)"
2760)
2761)
2762*73 (Net
2763uid 283,0
2764decl (Decl
2765n "crate_id"
2766t "std_logic_vector"
2767b "(1 downto 0)"
2768o 74
2769suid 6,0
2770)
2771declText (MLText
2772uid 284,0
2773va (VaSet
2774font "Courier New,8,0"
2775)
2776xt "39000,63200,67500,64000"
2777st "SIGNAL crate_id : std_logic_vector(1 downto 0)"
2778)
2779)
2780*74 (PortIoOut
2781uid 472,0
2782shape (CompositeShape
2783uid 473,0
2784va (VaSet
2785vasetType 1
2786fg "0,0,32768"
2787)
2788optionalChildren [
2789(Pentagon
2790uid 474,0
2791sl 0
2792ro 270
2793xt "111500,70625,113000,71375"
2794)
2795(Line
2796uid 475,0
2797sl 0
2798ro 270
2799xt "111000,71000,111500,71000"
2800pts [
2801"111000,71000"
2802"111500,71000"
2803]
2804)
2805]
2806)
2807stc 0
2808sf 1
2809tg (WTG
2810uid 476,0
2811ps "PortIoTextPlaceStrategy"
2812stg "STSignalDisplayStrategy"
2813f (Text
2814uid 477,0
2815va (VaSet
2816)
2817xt "114000,70500,117100,71500"
2818st "W_RES"
2819blo "114000,71300"
2820tm "WireNameMgr"
2821)
2822)
2823)
2824*75 (PortIoOut
2825uid 478,0
2826shape (CompositeShape
2827uid 479,0
2828va (VaSet
2829vasetType 1
2830fg "0,0,32768"
2831)
2832optionalChildren [
2833(Pentagon
2834uid 480,0
2835sl 0
2836ro 270
2837xt "111500,67625,113000,68375"
2838)
2839(Line
2840uid 481,0
2841sl 0
2842ro 270
2843xt "111000,68000,111500,68000"
2844pts [
2845"111000,68000"
2846"111500,68000"
2847]
2848)
2849]
2850)
2851stc 0
2852sf 1
2853tg (WTG
2854uid 482,0
2855ps "PortIoTextPlaceStrategy"
2856stg "STSignalDisplayStrategy"
2857f (Text
2858uid 483,0
2859va (VaSet
2860)
2861xt "114000,67500,116000,68500"
2862st "W_A"
2863blo "114000,68300"
2864tm "WireNameMgr"
2865)
2866)
2867)
2868*76 (PortIoOut
2869uid 484,0
2870shape (CompositeShape
2871uid 485,0
2872va (VaSet
2873vasetType 1
2874fg "0,0,32768"
2875)
2876optionalChildren [
2877(Pentagon
2878uid 486,0
2879sl 0
2880ro 270
2881xt "111500,74625,113000,75375"
2882)
2883(Line
2884uid 487,0
2885sl 0
2886ro 270
2887xt "111000,75000,111500,75000"
2888pts [
2889"111000,75000"
2890"111500,75000"
2891]
2892)
2893]
2894)
2895stc 0
2896sf 1
2897tg (WTG
2898uid 488,0
2899ps "PortIoTextPlaceStrategy"
2900stg "STSignalDisplayStrategy"
2901f (Text
2902uid 489,0
2903va (VaSet
2904)
2905xt "114000,74500,116600,75500"
2906st "W_CS"
2907blo "114000,75300"
2908tm "WireNameMgr"
2909)
2910)
2911)
2912*77 (PortIoInOut
2913uid 490,0
2914shape (CompositeShape
2915uid 491,0
2916va (VaSet
2917vasetType 1
2918fg "0,0,32768"
2919)
2920optionalChildren [
2921(Hexagon
2922uid 492,0
2923sl 0
2924xt "111500,68625,113000,69375"
2925)
2926(Line
2927uid 493,0
2928sl 0
2929xt "111000,69000,111500,69000"
2930pts [
2931"111000,69000"
2932"111500,69000"
2933]
2934)
2935]
2936)
2937stc 0
2938sf 1
2939tg (WTG
2940uid 494,0
2941ps "PortIoTextPlaceStrategy"
2942stg "STSignalDisplayStrategy"
2943f (Text
2944uid 495,0
2945va (VaSet
2946)
2947xt "114000,68500,116100,69500"
2948st "W_D"
2949blo "114000,69300"
2950tm "WireNameMgr"
2951)
2952)
2953)
2954*78 (PortIoIn
2955uid 496,0
2956shape (CompositeShape
2957uid 497,0
2958va (VaSet
2959vasetType 1
2960fg "0,0,32768"
2961)
2962optionalChildren [
2963(Pentagon
2964uid 498,0
2965sl 0
2966ro 90
2967xt "111500,73625,113000,74375"
2968)
2969(Line
2970uid 499,0
2971sl 0
2972ro 90
2973xt "111000,74000,111500,74000"
2974pts [
2975"111500,74000"
2976"111000,74000"
2977]
2978)
2979]
2980)
2981stc 0
2982sf 1
2983tg (WTG
2984uid 500,0
2985ps "PortIoTextPlaceStrategy"
2986stg "STSignalDisplayStrategy"
2987f (Text
2988uid 501,0
2989va (VaSet
2990)
2991xt "114000,73500,116800,74500"
2992st "W_INT"
2993blo "114000,74300"
2994tm "WireNameMgr"
2995)
2996)
2997)
2998*79 (PortIoOut
2999uid 502,0
3000shape (CompositeShape
3001uid 503,0
3002va (VaSet
3003vasetType 1
3004fg "0,0,32768"
3005)
3006optionalChildren [
3007(Pentagon
3008uid 504,0
3009sl 0
3010ro 270
3011xt "111500,71625,113000,72375"
3012)
3013(Line
3014uid 505,0
3015sl 0
3016ro 270
3017xt "111000,72000,111500,72000"
3018pts [
3019"111000,72000"
3020"111500,72000"
3021]
3022)
3023]
3024)
3025stc 0
3026sf 1
3027tg (WTG
3028uid 506,0
3029ps "PortIoTextPlaceStrategy"
3030stg "STSignalDisplayStrategy"
3031f (Text
3032uid 507,0
3033va (VaSet
3034)
3035xt "114000,71500,116700,72500"
3036st "W_RD"
3037blo "114000,72300"
3038tm "WireNameMgr"
3039)
3040)
3041)
3042*80 (PortIoOut
3043uid 508,0
3044shape (CompositeShape
3045uid 509,0
3046va (VaSet
3047vasetType 1
3048fg "0,0,32768"
3049)
3050optionalChildren [
3051(Pentagon
3052uid 510,0
3053sl 0
3054ro 270
3055xt "111500,72625,113000,73375"
3056)
3057(Line
3058uid 511,0
3059sl 0
3060ro 270
3061xt "111000,73000,111500,73000"
3062pts [
3063"111000,73000"
3064"111500,73000"
3065]
3066)
3067]
3068)
3069stc 0
3070sf 1
3071tg (WTG
3072uid 512,0
3073ps "PortIoTextPlaceStrategy"
3074stg "STSignalDisplayStrategy"
3075f (Text
3076uid 513,0
3077va (VaSet
3078)
3079xt "114000,72500,116800,73500"
3080st "W_WR"
3081blo "114000,73300"
3082tm "WireNameMgr"
3083)
3084)
3085)
3086*81 (Net
3087uid 1465,0
3088decl (Decl
3089n "adc_data_array"
3090t "adc_data_array_type"
3091o 72
3092suid 29,0
3093)
3094declText (MLText
3095uid 1466,0
3096va (VaSet
3097font "Courier New,8,0"
3098)
3099xt "39000,61600,63000,62400"
3100st "SIGNAL adc_data_array : adc_data_array_type"
3101)
3102)
3103*82 (Net
3104uid 2407,0
3105decl (Decl
3106n "RSRLOAD"
3107t "std_logic"
3108o 41
3109suid 57,0
3110i "'0'"
3111)
3112declText (MLText
3113uid 2408,0
3114va (VaSet
3115font "Courier New,8,0"
3116)
3117xt "39000,35800,67500,36600"
3118st "RSRLOAD : std_logic := '0'"
3119)
3120)
3121*83 (PortIoOut
3122uid 2415,0
3123shape (CompositeShape
3124uid 2416,0
3125va (VaSet
3126vasetType 1
3127fg "0,0,32768"
3128)
3129optionalChildren [
3130(Pentagon
3131uid 2417,0
3132sl 0
3133ro 90
3134xt "19000,110625,20500,111375"
3135)
3136(Line
3137uid 2418,0
3138sl 0
3139ro 90
3140xt "20500,111000,21000,111000"
3141pts [
3142"21000,111000"
3143"20500,111000"
3144]
3145)
3146]
3147)
3148stc 0
3149sf 1
3150tg (WTG
3151uid 2419,0
3152ps "PortIoTextPlaceStrategy"
3153stg "STSignalDisplayStrategy"
3154f (Text
3155uid 2420,0
3156va (VaSet
3157)
3158xt "13800,110500,18000,111500"
3159st "RSRLOAD"
3160ju 2
3161blo "18000,111300"
3162tm "WireNameMgr"
3163)
3164)
3165)
3166*84 (Net
3167uid 2421,0
3168decl (Decl
3169n "SRCLK"
3170t "std_logic"
3171o 70
3172suid 58,0
3173i "'0'"
3174)
3175declText (MLText
3176uid 2422,0
3177va (VaSet
3178font "Courier New,8,0"
3179)
3180xt "39000,60000,71000,60800"
3181st "SIGNAL SRCLK : std_logic := '0'"
3182)
3183)
3184*85 (Net
3185uid 3019,0
3186decl (Decl
3187n "sensor_cs"
3188t "std_logic_vector"
3189b "(3 DOWNTO 0)"
3190o 78
3191suid 65,0
3192)
3193declText (MLText
3194uid 3020,0
3195va (VaSet
3196font "Courier New,8,0"
3197)
3198xt "39000,66400,67500,67200"
3199st "SIGNAL sensor_cs : std_logic_vector(3 DOWNTO 0)"
3200)
3201)
3202*86 (Net
3203uid 3025,0
3204decl (Decl
3205n "DAC_CS"
3206t "std_logic"
3207o 24
3208suid 66,0
3209)
3210declText (MLText
3211uid 3026,0
3212va (VaSet
3213font "Courier New,8,0"
3214)
3215xt "39000,23000,54000,23800"
3216st "DAC_CS : std_logic"
3217)
3218)
3219*87 (PortIoOut
3220uid 3153,0
3221shape (CompositeShape
3222uid 3154,0
3223va (VaSet
3224vasetType 1
3225fg "0,0,32768"
3226)
3227optionalChildren [
3228(Pentagon
3229uid 3155,0
3230sl 0
3231ro 90
3232xt "19000,69625,20500,70375"
3233)
3234(Line
3235uid 3156,0
3236sl 0
3237ro 90
3238xt "20500,70000,21000,70000"
3239pts [
3240"21000,70000"
3241"20500,70000"
3242]
3243)
3244]
3245)
3246stc 0
3247sf 1
3248tg (WTG
3249uid 3157,0
3250ps "PortIoTextPlaceStrategy"
3251stg "STSignalDisplayStrategy"
3252f (Text
3253uid 3158,0
3254va (VaSet
3255)
3256xt "15200,69500,18000,70500"
3257st "A_CLK"
3258ju 2
3259blo "18000,70300"
3260tm "WireNameMgr"
3261)
3262)
3263)
3264*88 (Net
3265uid 3216,0
3266decl (Decl
3267n "X_50M"
3268t "STD_LOGIC"
3269preAdd 0
3270posAdd 0
3271o 16
3272suid 67,0
3273)
3274declText (MLText
3275uid 3217,0
3276va (VaSet
3277font "Courier New,8,0"
3278)
3279xt "39000,15800,54000,16600"
3280st "X_50M : STD_LOGIC"
3281)
3282)
3283*89 (Net
3284uid 3226,0
3285decl (Decl
3286n "TRG"
3287t "STD_LOGIC"
3288o 14
3289suid 68,0
3290)
3291declText (MLText
3292uid 3227,0
3293va (VaSet
3294font "Courier New,8,0"
3295)
3296xt "39000,14200,54000,15000"
3297st "TRG : STD_LOGIC"
3298)
3299)
3300*90 (HdlText
3301uid 3248,0
3302optionalChildren [
3303*91 (EmbeddedText
3304uid 3254,0
3305commentText (CommentText
3306uid 3255,0
3307ps "CenterOffsetStrategy"
3308shape (Rectangle
3309uid 3256,0
3310va (VaSet
3311vasetType 1
3312fg "65535,65535,65535"
3313lineColor "0,0,32768"
3314lineWidth 2
3315)
3316xt "29000,71000,41000,77000"
3317)
3318oxt "0,0,18000,5000"
3319text (MLText
3320uid 3257,0
3321va (VaSet
3322)
3323xt "29200,71200,41100,77200"
3324st "
3325-- ADC_CLK 2
3326A_CLK (0) <= CLK_25_PS;
3327A_CLK (1) <= CLK_25_PS;
3328A_CLK (2) <= CLK_25_PS;
3329A_CLK (3) <= CLK_25_PS;
3330"
3331tm "HdlTextMgr"
3332wrapOption 3
3333visibleHeight 6000
3334visibleWidth 12000
3335)
3336)
3337)
3338]
3339shape (Rectangle
3340uid 3249,0
3341va (VaSet
3342vasetType 1
3343fg "65535,65535,37120"
3344lineColor "0,0,32768"
3345lineWidth 2
3346)
3347xt "24000,69000,29000,77000"
3348)
3349oxt "0,0,8000,10000"
3350ttg (MlTextGroup
3351uid 3250,0
3352ps "CenterOffsetStrategy"
3353stg "VerticalLayoutStrategy"
3354textVec [
3355*92 (Text
3356uid 3251,0
3357va (VaSet
3358font "Arial,8,1"
3359)
3360xt "24150,73000,28350,74000"
3361st "ADC_CLK"
3362blo "24150,73800"
3363tm "HdlTextNameMgr"
3364)
3365*93 (Text
3366uid 3252,0
3367va (VaSet
3368font "Arial,8,1"
3369)
3370xt "24150,74000,24950,75000"
3371st "2"
3372blo "24150,74800"
3373tm "HdlTextNumberMgr"
3374)
3375]
3376)
3377viewicon (ZoomableIcon
3378uid 3253,0
3379sl 0
3380va (VaSet
3381vasetType 1
3382fg "49152,49152,49152"
3383)
3384xt "24250,75250,25750,76750"
3385iconName "TextFile.png"
3386iconMaskName "TextFile.msk"
3387ftype 21
3388)
3389viewiconposition 0
3390)
3391*94 (Net
3392uid 3266,0
3393decl (Decl
3394n "A_CLK"
3395t "std_logic_vector"
3396b "(3 downto 0)"
3397o 19
3398suid 71,0
3399)
3400declText (MLText
3401uid 3267,0
3402va (VaSet
3403font "Courier New,8,0"
3404)
3405xt "39000,19000,64000,19800"
3406st "A_CLK : std_logic_vector(3 downto 0)"
3407)
3408)
3409*95 (Net
3410uid 3268,0
3411decl (Decl
3412n "CLK_25_PS"
3413t "std_logic"
3414o 59
3415suid 72,0
3416)
3417declText (MLText
3418uid 3269,0
3419va (VaSet
3420font "Courier New,8,0"
3421)
3422xt "39000,51200,57500,52000"
3423st "SIGNAL CLK_25_PS : std_logic"
3424)
3425)
3426*96 (PortIoOut
3427uid 3284,0
3428shape (CompositeShape
3429uid 3285,0
3430va (VaSet
3431vasetType 1
3432fg "0,0,32768"
3433)
3434optionalChildren [
3435(Pentagon
3436uid 3286,0
3437sl 0
3438ro 90
3439xt "19000,89625,20500,90375"
3440)
3441(Line
3442uid 3287,0
3443sl 0
3444ro 90
3445xt "20500,90000,21000,90000"
3446pts [
3447"21000,90000"
3448"20500,90000"
3449]
3450)
3451]
3452)
3453stc 0
3454sf 1
3455tg (WTG
3456uid 3288,0
3457ps "PortIoTextPlaceStrategy"
3458stg "STSignalDisplayStrategy"
3459f (Text
3460uid 3289,0
3461va (VaSet
3462)
3463xt "14400,89500,18000,90500"
3464st "OE_ADC"
3465ju 2
3466blo "18000,90300"
3467tm "WireNameMgr"
3468)
3469)
3470)
3471*97 (Net
3472uid 3290,0
3473decl (Decl
3474n "OE_ADC"
3475t "STD_LOGIC"
3476preAdd 0
3477posAdd 0
3478o 35
3479suid 73,0
3480)
3481declText (MLText
3482uid 3291,0
3483va (VaSet
3484font "Courier New,8,0"
3485)
3486xt "39000,30200,54000,31000"
3487st "OE_ADC : STD_LOGIC"
3488)
3489)
3490*98 (PortIoIn
3491uid 3292,0
3492shape (CompositeShape
3493uid 3293,0
3494va (VaSet
3495vasetType 1
3496fg "0,0,32768"
3497)
3498optionalChildren [
3499(Pentagon
3500uid 3294,0
3501sl 0
3502ro 270
3503xt "19000,88625,20500,89375"
3504)
3505(Line
3506uid 3295,0
3507sl 0
3508ro 270
3509xt "20500,89000,21000,89000"
3510pts [
3511"20500,89000"
3512"21000,89000"
3513]
3514)
3515]
3516)
3517stc 0
3518sf 1
3519tg (WTG
3520uid 3296,0
3521ps "PortIoTextPlaceStrategy"
3522stg "STSignalDisplayStrategy"
3523f (Text
3524uid 3297,0
3525va (VaSet
3526)
3527xt "15000,88500,18000,89500"
3528st "A_OTR"
3529ju 2
3530blo "18000,89300"
3531tm "WireNameMgr"
3532)
3533)
3534)
3535*99 (Net
3536uid 3298,0
3537decl (Decl
3538n "A_OTR"
3539t "std_logic_vector"
3540b "(3 DOWNTO 0)"
3541o 5
3542suid 74,0
3543)
3544declText (MLText
3545uid 3299,0
3546va (VaSet
3547font "Courier New,8,0"
3548)
3549xt "39000,7000,64000,7800"
3550st "A_OTR : std_logic_vector(3 DOWNTO 0)"
3551)
3552)
3553*100 (HdlText
3554uid 3300,0
3555optionalChildren [
3556*101 (EmbeddedText
3557uid 3306,0
3558commentText (CommentText
3559uid 3307,0
3560ps "CenterOffsetStrategy"
3561shape (Rectangle
3562uid 3308,0
3563va (VaSet
3564vasetType 1
3565fg "65535,65535,65535"
3566lineColor "0,0,32768"
3567lineWidth 2
3568)
3569xt "32000,96000,44000,102000"
3570)
3571oxt "0,0,18000,5000"
3572text (MLText
3573uid 3309,0
3574va (VaSet
3575)
3576xt "32200,96200,44200,102200"
3577st "
3578-- ADC_DATA 3
3579adc_data_array (0) <= A0_D;
3580adc_data_array (1) <= A1_D;
3581adc_data_array (2) <= A2_D;
3582adc_data_array (3) <= A3_D;
3583"
3584tm "HdlTextMgr"
3585wrapOption 3
3586visibleHeight 6000
3587visibleWidth 12000
3588)
3589)
3590)
3591]
3592shape (Rectangle
3593uid 3301,0
3594va (VaSet
3595vasetType 1
3596fg "65535,65535,37120"
3597lineColor "0,0,32768"
3598lineWidth 2
3599)
3600xt "24000,94000,32000,102000"
3601)
3602oxt "0,0,8000,10000"
3603ttg (MlTextGroup
3604uid 3302,0
3605ps "CenterOffsetStrategy"
3606stg "VerticalLayoutStrategy"
3607textVec [
3608*102 (Text
3609uid 3303,0
3610va (VaSet
3611font "Arial,8,1"
3612)
3613xt "27150,95000,31750,96000"
3614st "ADC_DATA"
3615blo "27150,95800"
3616tm "HdlTextNameMgr"
3617)
3618*103 (Text
3619uid 3304,0
3620va (VaSet
3621font "Arial,8,1"
3622)
3623xt "27150,96000,27950,97000"
3624st "3"
3625blo "27150,96800"
3626tm "HdlTextNumberMgr"
3627)
3628]
3629)
3630viewicon (ZoomableIcon
3631uid 3305,0
3632sl 0
3633va (VaSet
3634vasetType 1
3635fg "49152,49152,49152"
3636)
3637xt "24250,100250,25750,101750"
3638iconName "TextFile.png"
3639iconMaskName "TextFile.msk"
3640ftype 21
3641)
3642viewiconposition 0
3643)
3644*104 (PortIoIn
3645uid 3310,0
3646shape (CompositeShape
3647uid 3311,0
3648va (VaSet
3649vasetType 1
3650fg "0,0,32768"
3651)
3652optionalChildren [
3653(Pentagon
3654uid 3312,0
3655sl 0
3656ro 270
3657xt "19000,94625,20500,95375"
3658)
3659(Line
3660uid 3313,0
3661sl 0
3662ro 270
3663xt "20500,95000,21000,95000"
3664pts [
3665"20500,95000"
3666"21000,95000"
3667]
3668)
3669]
3670)
3671stc 0
3672sf 1
3673tg (WTG
3674uid 3314,0
3675ps "PortIoTextPlaceStrategy"
3676stg "STSignalDisplayStrategy"
3677f (Text
3678uid 3315,0
3679va (VaSet
3680)
3681xt "15700,94500,18000,95500"
3682st "A0_D"
3683ju 2
3684blo "18000,95300"
3685tm "WireNameMgr"
3686)
3687)
3688)
3689*105 (PortIoIn
3690uid 3332,0
3691shape (CompositeShape
3692uid 3333,0
3693va (VaSet
3694vasetType 1
3695fg "0,0,32768"
3696)
3697optionalChildren [
3698(Pentagon
3699uid 3334,0
3700sl 0
3701ro 270
3702xt "19000,95625,20500,96375"
3703)
3704(Line
3705uid 3335,0
3706sl 0
3707ro 270
3708xt "20500,96000,21000,96000"
3709pts [
3710"20500,96000"
3711"21000,96000"
3712]
3713)
3714]
3715)
3716stc 0
3717sf 1
3718tg (WTG
3719uid 3336,0
3720ps "PortIoTextPlaceStrategy"
3721stg "STSignalDisplayStrategy"
3722f (Text
3723uid 3337,0
3724va (VaSet
3725)
3726xt "15700,95500,18000,96500"
3727st "A1_D"
3728ju 2
3729blo "18000,96300"
3730tm "WireNameMgr"
3731)
3732)
3733)
3734*106 (PortIoIn
3735uid 3338,0
3736shape (CompositeShape
3737uid 3339,0
3738va (VaSet
3739vasetType 1
3740fg "0,0,32768"
3741)
3742optionalChildren [
3743(Pentagon
3744uid 3340,0
3745sl 0
3746ro 270
3747xt "19000,96625,20500,97375"
3748)
3749(Line
3750uid 3341,0
3751sl 0
3752ro 270
3753xt "20500,97000,21000,97000"
3754pts [
3755"20500,97000"
3756"21000,97000"
3757]
3758)
3759]
3760)
3761stc 0
3762sf 1
3763tg (WTG
3764uid 3342,0
3765ps "PortIoTextPlaceStrategy"
3766stg "STSignalDisplayStrategy"
3767f (Text
3768uid 3343,0
3769va (VaSet
3770)
3771xt "15700,96500,18000,97500"
3772st "A2_D"
3773ju 2
3774blo "18000,97300"
3775tm "WireNameMgr"
3776)
3777)
3778)
3779*107 (PortIoIn
3780uid 3344,0
3781shape (CompositeShape
3782uid 3345,0
3783va (VaSet
3784vasetType 1
3785fg "0,0,32768"
3786)
3787optionalChildren [
3788(Pentagon
3789uid 3346,0
3790sl 0
3791ro 270
3792xt "19000,97625,20500,98375"
3793)
3794(Line
3795uid 3347,0
3796sl 0
3797ro 270
3798xt "20500,98000,21000,98000"
3799pts [
3800"20500,98000"
3801"21000,98000"
3802]
3803)
3804]
3805)
3806stc 0
3807sf 1
3808tg (WTG
3809uid 3348,0
3810ps "PortIoTextPlaceStrategy"
3811stg "STSignalDisplayStrategy"
3812f (Text
3813uid 3349,0
3814va (VaSet
3815)
3816xt "15700,97500,18000,98500"
3817st "A3_D"
3818ju 2
3819blo "18000,98300"
3820tm "WireNameMgr"
3821)
3822)
3823)
3824*108 (Net
3825uid 3374,0
3826decl (Decl
3827n "A0_D"
3828t "std_logic_vector"
3829b "(11 DOWNTO 0)"
3830o 1
3831suid 79,0
3832)
3833declText (MLText
3834uid 3375,0
3835va (VaSet
3836font "Courier New,8,0"
3837)
3838xt "39000,3800,64500,4600"
3839st "A0_D : std_logic_vector(11 DOWNTO 0)"
3840)
3841)
3842*109 (Net
3843uid 3376,0
3844decl (Decl
3845n "A1_D"
3846t "std_logic_vector"
3847b "(11 DOWNTO 0)"
3848o 2
3849suid 80,0
3850)
3851declText (MLText
3852uid 3377,0
3853va (VaSet
3854font "Courier New,8,0"
3855)
3856xt "39000,4600,64500,5400"
3857st "A1_D : std_logic_vector(11 DOWNTO 0)"
3858)
3859)
3860*110 (Net
3861uid 3378,0
3862decl (Decl
3863n "A2_D"
3864t "std_logic_vector"
3865b "(11 DOWNTO 0)"
3866o 3
3867suid 81,0
3868)
3869declText (MLText
3870uid 3379,0
3871va (VaSet
3872font "Courier New,8,0"
3873)
3874xt "39000,5400,64500,6200"
3875st "A2_D : std_logic_vector(11 DOWNTO 0)"
3876)
3877)
3878*111 (Net
3879uid 3380,0
3880decl (Decl
3881n "A3_D"
3882t "std_logic_vector"
3883b "(11 DOWNTO 0)"
3884o 4
3885suid 82,0
3886)
3887declText (MLText
3888uid 3381,0
3889va (VaSet
3890font "Courier New,8,0"
3891)
3892xt "39000,6200,64500,7000"
3893st "A3_D : std_logic_vector(11 DOWNTO 0)"
3894)
3895)
3896*112 (HdlText
3897uid 3394,0
3898optionalChildren [
3899*113 (EmbeddedText
3900uid 3400,0
3901commentText (CommentText
3902uid 3401,0
3903ps "CenterOffsetStrategy"
3904shape (Rectangle
3905uid 3402,0
3906va (VaSet
3907vasetType 1
3908fg "65535,65535,65535"
3909lineColor "0,0,32768"
3910lineWidth 2
3911)
3912xt "32000,114000,44000,120000"
3913)
3914oxt "0,0,18000,5000"
3915text (MLText
3916uid 3403,0
3917va (VaSet
3918)
3919xt "32200,114200,44200,120200"
3920st "
3921-- SRCLK 4
3922D0_SRCLK <= SRCLK;
3923D1_SRCLK <= SRCLK;
3924D2_SRCLK <= SRCLK;
3925D3_SRCLK <= SRCLK;
3926"
3927tm "HdlTextMgr"
3928wrapOption 3
3929visibleHeight 6000
3930visibleWidth 12000
3931)
3932)
3933)
3934]
3935shape (Rectangle
3936uid 3395,0
3937va (VaSet
3938vasetType 1
3939fg "65535,65535,37120"
3940lineColor "0,0,32768"
3941lineWidth 2
3942)
3943xt "24000,112000,32000,120000"
3944)
3945oxt "0,0,8000,10000"
3946ttg (MlTextGroup
3947uid 3396,0
3948ps "CenterOffsetStrategy"
3949stg "VerticalLayoutStrategy"
3950textVec [
3951*114 (Text
3952uid 3397,0
3953va (VaSet
3954font "Arial,8,1"
3955)
3956xt "27150,113000,30350,114000"
3957st "SRCLK"
3958blo "27150,113800"
3959tm "HdlTextNameMgr"
3960)
3961*115 (Text
3962uid 3398,0
3963va (VaSet
3964font "Arial,8,1"
3965)
3966xt "27150,114000,27950,115000"
3967st "4"
3968blo "27150,114800"
3969tm "HdlTextNumberMgr"
3970)
3971]
3972)
3973viewicon (ZoomableIcon
3974uid 3399,0
3975sl 0
3976va (VaSet
3977vasetType 1
3978fg "49152,49152,49152"
3979)
3980xt "24250,118250,25750,119750"
3981iconName "TextFile.png"
3982iconMaskName "TextFile.msk"
3983ftype 21
3984)
3985viewiconposition 0
3986)
3987*116 (Net
3988uid 3460,0
3989decl (Decl
3990n "D0_SRCLK"
3991t "STD_LOGIC"
3992o 20
3993suid 87,0
3994)
3995declText (MLText
3996uid 3461,0
3997va (VaSet
3998font "Courier New,8,0"
3999)
4000xt "39000,19800,54000,20600"
4001st "D0_SRCLK : STD_LOGIC"
4002)
4003)
4004*117 (Net
4005uid 3462,0
4006decl (Decl
4007n "D1_SRCLK"
4008t "STD_LOGIC"
4009o 21
4010suid 88,0
4011)
4012declText (MLText
4013uid 3463,0
4014va (VaSet
4015font "Courier New,8,0"
4016)
4017xt "39000,20600,54000,21400"
4018st "D1_SRCLK : STD_LOGIC"
4019)
4020)
4021*118 (Net
4022uid 3464,0
4023decl (Decl
4024n "D2_SRCLK"
4025t "STD_LOGIC"
4026o 22
4027suid 89,0
4028)
4029declText (MLText
4030uid 3465,0
4031va (VaSet
4032font "Courier New,8,0"
4033)
4034xt "39000,21400,54000,22200"
4035st "D2_SRCLK : STD_LOGIC"
4036)
4037)
4038*119 (Net
4039uid 3466,0
4040decl (Decl
4041n "D3_SRCLK"
4042t "STD_LOGIC"
4043o 23
4044suid 90,0
4045)
4046declText (MLText
4047uid 3467,0
4048va (VaSet
4049font "Courier New,8,0"
4050)
4051xt "39000,22200,54000,23000"
4052st "D3_SRCLK : STD_LOGIC"
4053)
4054)
4055*120 (PortIoIn
4056uid 3476,0
4057shape (CompositeShape
4058uid 3477,0
4059va (VaSet
4060vasetType 1
4061fg "0,0,32768"
4062)
4063optionalChildren [
4064(Pentagon
4065uid 3478,0
4066sl 0
4067ro 270
4068xt "19000,104625,20500,105375"
4069)
4070(Line
4071uid 3479,0
4072sl 0
4073ro 270
4074xt "20500,105000,21000,105000"
4075pts [
4076"20500,105000"
4077"21000,105000"
4078]
4079)
4080]
4081)
4082stc 0
4083sf 1
4084tg (WTG
4085uid 3480,0
4086ps "PortIoTextPlaceStrategy"
4087stg "STSignalDisplayStrategy"
4088f (Text
4089uid 3481,0
4090va (VaSet
4091)
4092xt "13400,104500,18000,105500"
4093st "D0_SROUT"
4094ju 2
4095blo "18000,105300"
4096tm "WireNameMgr"
4097)
4098)
4099)
4100*121 (PortIoIn
4101uid 3482,0
4102shape (CompositeShape
4103uid 3483,0
4104va (VaSet
4105vasetType 1
4106fg "0,0,32768"
4107)
4108optionalChildren [
4109(Pentagon
4110uid 3484,0
4111sl 0
4112ro 270
4113xt "19000,105625,20500,106375"
4114)
4115(Line
4116uid 3485,0
4117sl 0
4118ro 270
4119xt "20500,106000,21000,106000"
4120pts [
4121"20500,106000"
4122"21000,106000"
4123]
4124)
4125]
4126)
4127stc 0
4128sf 1
4129tg (WTG
4130uid 3486,0
4131ps "PortIoTextPlaceStrategy"
4132stg "STSignalDisplayStrategy"
4133f (Text
4134uid 3487,0
4135va (VaSet
4136)
4137xt "13400,105500,18000,106500"
4138st "D1_SROUT"
4139ju 2
4140blo "18000,106300"
4141tm "WireNameMgr"
4142)
4143)
4144)
4145*122 (PortIoIn
4146uid 3488,0
4147shape (CompositeShape
4148uid 3489,0
4149va (VaSet
4150vasetType 1
4151fg "0,0,32768"
4152)
4153optionalChildren [
4154(Pentagon
4155uid 3490,0
4156sl 0
4157ro 270
4158xt "19000,106625,20500,107375"
4159)
4160(Line
4161uid 3491,0
4162sl 0
4163ro 270
4164xt "20500,107000,21000,107000"
4165pts [
4166"20500,107000"
4167"21000,107000"
4168]
4169)
4170]
4171)
4172stc 0
4173sf 1
4174tg (WTG
4175uid 3492,0
4176ps "PortIoTextPlaceStrategy"
4177stg "STSignalDisplayStrategy"
4178f (Text
4179uid 3493,0
4180va (VaSet
4181)
4182xt "13400,106500,18000,107500"
4183st "D2_SROUT"
4184ju 2
4185blo "18000,107300"
4186tm "WireNameMgr"
4187)
4188)
4189)
4190*123 (PortIoIn
4191uid 3494,0
4192shape (CompositeShape
4193uid 3495,0
4194va (VaSet
4195vasetType 1
4196fg "0,0,32768"
4197)
4198optionalChildren [
4199(Pentagon
4200uid 3496,0
4201sl 0
4202ro 270
4203xt "19000,107625,20500,108375"
4204)
4205(Line
4206uid 3497,0
4207sl 0
4208ro 270
4209xt "20500,108000,21000,108000"
4210pts [
4211"20500,108000"
4212"21000,108000"
4213]
4214)
4215]
4216)
4217stc 0
4218sf 1
4219tg (WTG
4220uid 3498,0
4221ps "PortIoTextPlaceStrategy"
4222stg "STSignalDisplayStrategy"
4223f (Text
4224uid 3499,0
4225va (VaSet
4226)
4227xt "13400,107500,18000,108500"
4228st "D3_SROUT"
4229ju 2
4230blo "18000,108300"
4231tm "WireNameMgr"
4232)
4233)
4234)
4235*124 (Net
4236uid 3500,0
4237decl (Decl
4238n "D0_SROUT"
4239t "std_logic"
4240o 6
4241suid 91,0
4242)
4243declText (MLText
4244uid 3501,0
4245va (VaSet
4246font "Courier New,8,0"
4247)
4248xt "39000,7800,54000,8600"
4249st "D0_SROUT : std_logic"
4250)
4251)
4252*125 (Net
4253uid 3502,0
4254decl (Decl
4255n "D1_SROUT"
4256t "std_logic"
4257o 7
4258suid 92,0
4259)
4260declText (MLText
4261uid 3503,0
4262va (VaSet
4263font "Courier New,8,0"
4264)
4265xt "39000,8600,54000,9400"
4266st "D1_SROUT : std_logic"
4267)
4268)
4269*126 (Net
4270uid 3504,0
4271decl (Decl
4272n "D2_SROUT"
4273t "std_logic"
4274o 8
4275suid 93,0
4276)
4277declText (MLText
4278uid 3505,0
4279va (VaSet
4280font "Courier New,8,0"
4281)
4282xt "39000,9400,54000,10200"
4283st "D2_SROUT : std_logic"
4284)
4285)
4286*127 (Net
4287uid 3506,0
4288decl (Decl
4289n "D3_SROUT"
4290t "std_logic"
4291o 9
4292suid 94,0
4293)
4294declText (MLText
4295uid 3507,0
4296va (VaSet
4297font "Courier New,8,0"
4298)
4299xt "39000,10200,54000,11000"
4300st "D3_SROUT : std_logic"
4301)
4302)
4303*128 (PortIoOut
4304uid 3508,0
4305shape (CompositeShape
4306uid 3509,0
4307va (VaSet
4308vasetType 1
4309fg "0,0,32768"
4310)
4311optionalChildren [
4312(Pentagon
4313uid 3510,0
4314sl 0
4315ro 90
4316xt "10000,125625,11500,126375"
4317)
4318(Line
4319uid 3511,0
4320sl 0
4321ro 90
4322xt "11500,126000,12000,126000"
4323pts [
4324"12000,126000"
4325"11500,126000"
4326]
4327)
4328]
4329)
4330stc 0
4331sf 1
4332tg (WTG
4333uid 3512,0
4334ps "PortIoTextPlaceStrategy"
4335stg "STSignalDisplayStrategy"
4336f (Text
4337uid 3513,0
4338va (VaSet
4339)
4340xt "7100,125500,9000,126500"
4341st "D_A"
4342ju 2
4343blo "9000,126300"
4344tm "WireNameMgr"
4345)
4346)
4347)
4348*129 (Net
4349uid 3514,0
4350decl (Decl
4351n "D_A"
4352t "std_logic_vector"
4353b "(3 DOWNTO 0)"
4354o 27
4355suid 95,0
4356i "(others => '0')"
4357)
4358declText (MLText
4359uid 3515,0
4360va (VaSet
4361font "Courier New,8,0"
4362)
4363xt "39000,25400,73500,26200"
4364st "D_A : std_logic_vector(3 DOWNTO 0) := (others => '0')"
4365)
4366)
4367*130 (PortIoOut
4368uid 3516,0
4369shape (CompositeShape
4370uid 3517,0
4371va (VaSet
4372vasetType 1
4373fg "0,0,32768"
4374)
4375optionalChildren [
4376(Pentagon
4377uid 3518,0
4378sl 0
4379ro 90
4380xt "19000,109625,20500,110375"
4381)
4382(Line
4383uid 3519,0
4384sl 0
4385ro 90
4386xt "20500,110000,21000,110000"
4387pts [
4388"21000,110000"
4389"20500,110000"
4390]
4391)
4392]
4393)
4394stc 0
4395sf 1
4396tg (WTG
4397uid 3520,0
4398ps "PortIoTextPlaceStrategy"
4399stg "STSignalDisplayStrategy"
4400f (Text
4401uid 3521,0
4402va (VaSet
4403)
4404xt "14500,109500,18000,110500"
4405st "DWRITE"
4406ju 2
4407blo "18000,110300"
4408tm "WireNameMgr"
4409)
4410)
4411)
4412*131 (Net
4413uid 3522,0
4414decl (Decl
4415n "DWRITE"
4416t "std_logic"
4417o 26
4418suid 96,0
4419i "'0'"
4420)
4421declText (MLText
4422uid 3523,0
4423va (VaSet
4424font "Courier New,8,0"
4425)
4426xt "39000,24600,67500,25400"
4427st "DWRITE : std_logic := '0'"
4428)
4429)
4430*132 (PortIoOut
4431uid 3536,0
4432shape (CompositeShape
4433uid 3537,0
4434va (VaSet
4435vasetType 1
4436fg "0,0,32768"
4437)
4438optionalChildren [
4439(Pentagon
4440uid 3538,0
4441sl 0
4442ro 270
4443xt "111500,86625,113000,87375"
4444)
4445(Line
4446uid 3539,0
4447sl 0
4448ro 270
4449xt "111000,87000,111500,87000"
4450pts [
4451"111000,87000"
4452"111500,87000"
4453]
4454)
4455]
4456)
4457stc 0
4458sf 1
4459tg (WTG
4460uid 3540,0
4461ps "PortIoTextPlaceStrategy"
4462stg "STSignalDisplayStrategy"
4463f (Text
4464uid 3541,0
4465va (VaSet
4466)
4467xt "114000,86500,117600,87500"
4468st "DAC_CS"
4469blo "114000,87300"
4470tm "WireNameMgr"
4471)
4472)
4473)
4474*133 (HdlText
4475uid 3542,0
4476optionalChildren [
4477*134 (EmbeddedText
4478uid 3612,0
4479commentText (CommentText
4480uid 3613,0
4481ps "CenterOffsetStrategy"
4482shape (Rectangle
4483uid 3614,0
4484va (VaSet
4485vasetType 1
4486fg "65535,65535,65535"
4487lineColor "0,0,32768"
4488lineWidth 2
4489)
4490xt "88000,90000,100000,96000"
4491)
4492oxt "0,0,18000,5000"
4493text (MLText
4494uid 3615,0
4495va (VaSet
4496)
4497xt "88200,90200,100100,96200"
4498st "
4499-- T_CS 5
4500T0_CS <= sensor_cs (0);
4501T1_CS <= sensor_cs (1);
4502T2_CS <= sensor_cs (2);
4503T3_CS <= sensor_cs (3);
4504"
4505tm "HdlTextMgr"
4506wrapOption 3
4507visibleHeight 6000
4508visibleWidth 12000
4509)
4510)
4511)
4512]
4513shape (Rectangle
4514uid 3543,0
4515va (VaSet
4516vasetType 1
4517fg "65535,65535,37120"
4518lineColor "0,0,32768"
4519lineWidth 2
4520)
4521xt "100000,88000,108000,96000"
4522)
4523oxt "0,0,8000,10000"
4524ttg (MlTextGroup
4525uid 3544,0
4526ps "CenterOffsetStrategy"
4527stg "VerticalLayoutStrategy"
4528textVec [
4529*135 (Text
4530uid 3545,0
4531va (VaSet
4532font "Arial,8,1"
4533)
4534xt "103150,89000,105550,90000"
4535st "T_CS"
4536blo "103150,89800"
4537tm "HdlTextNameMgr"
4538)
4539*136 (Text
4540uid 3546,0
4541va (VaSet
4542font "Arial,8,1"
4543)
4544xt "103150,90000,103950,91000"
4545st "5"
4546blo "103150,90800"
4547tm "HdlTextNumberMgr"
4548)
4549]
4550)
4551viewicon (ZoomableIcon
4552uid 3547,0
4553sl 0
4554va (VaSet
4555vasetType 1
4556fg "49152,49152,49152"
4557)
4558xt "100250,94250,101750,95750"
4559iconName "TextFile.png"
4560iconMaskName "TextFile.msk"
4561ftype 21
4562)
4563viewiconposition 0
4564)
4565*137 (PortIoOut
4566uid 3548,0
4567shape (CompositeShape
4568uid 3549,0
4569va (VaSet
4570vasetType 1
4571fg "0,0,32768"
4572)
4573optionalChildren [
4574(Pentagon
4575uid 3550,0
4576sl 0
4577ro 270
4578xt "111500,88625,113000,89375"
4579)
4580(Line
4581uid 3551,0
4582sl 0
4583ro 270
4584xt "111000,89000,111500,89000"
4585pts [
4586"111000,89000"
4587"111500,89000"
4588]
4589)
4590]
4591)
4592stc 0
4593sf 1
4594tg (WTG
4595uid 3552,0
4596ps "PortIoTextPlaceStrategy"
4597stg "STSignalDisplayStrategy"
4598f (Text
4599uid 3553,0
4600va (VaSet
4601)
4602xt "114000,88500,116800,89500"
4603st "T0_CS"
4604blo "114000,89300"
4605tm "WireNameMgr"
4606)
4607)
4608)
4609*138 (PortIoOut
4610uid 3554,0
4611shape (CompositeShape
4612uid 3555,0
4613va (VaSet
4614vasetType 1
4615fg "0,0,32768"
4616)
4617optionalChildren [
4618(Pentagon
4619uid 3556,0
4620sl 0
4621ro 270
4622xt "111500,89625,113000,90375"
4623)
4624(Line
4625uid 3557,0
4626sl 0
4627ro 270
4628xt "111000,90000,111500,90000"
4629pts [
4630"111000,90000"
4631"111500,90000"
4632]
4633)
4634]
4635)
4636stc 0
4637sf 1
4638tg (WTG
4639uid 3558,0
4640ps "PortIoTextPlaceStrategy"
4641stg "STSignalDisplayStrategy"
4642f (Text
4643uid 3559,0
4644va (VaSet
4645)
4646xt "114000,89500,116800,90500"
4647st "T1_CS"
4648blo "114000,90300"
4649tm "WireNameMgr"
4650)
4651)
4652)
4653*139 (PortIoOut
4654uid 3560,0
4655shape (CompositeShape
4656uid 3561,0
4657va (VaSet
4658vasetType 1
4659fg "0,0,32768"
4660)
4661optionalChildren [
4662(Pentagon
4663uid 3562,0
4664sl 0
4665ro 270
4666xt "111500,90625,113000,91375"
4667)
4668(Line
4669uid 3563,0
4670sl 0
4671ro 270
4672xt "111000,91000,111500,91000"
4673pts [
4674"111000,91000"
4675"111500,91000"
4676]
4677)
4678]
4679)
4680stc 0
4681sf 1
4682tg (WTG
4683uid 3564,0
4684ps "PortIoTextPlaceStrategy"
4685stg "STSignalDisplayStrategy"
4686f (Text
4687uid 3565,0
4688va (VaSet
4689)
4690xt "114000,90500,116800,91500"
4691st "T2_CS"
4692blo "114000,91300"
4693tm "WireNameMgr"
4694)
4695)
4696)
4697*140 (PortIoOut
4698uid 3566,0
4699shape (CompositeShape
4700uid 3567,0
4701va (VaSet
4702vasetType 1
4703fg "0,0,32768"
4704)
4705optionalChildren [
4706(Pentagon
4707uid 3568,0
4708sl 0
4709ro 270
4710xt "111500,91625,113000,92375"
4711)
4712(Line
4713uid 3569,0
4714sl 0
4715ro 270
4716xt "111000,92000,111500,92000"
4717pts [
4718"111000,92000"
4719"111500,92000"
4720]
4721)
4722]
4723)
4724stc 0
4725sf 1
4726tg (WTG
4727uid 3570,0
4728ps "PortIoTextPlaceStrategy"
4729stg "STSignalDisplayStrategy"
4730f (Text
4731uid 3571,0
4732va (VaSet
4733)
4734xt "114000,91500,116800,92500"
4735st "T3_CS"
4736blo "114000,92300"
4737tm "WireNameMgr"
4738)
4739)
4740)
4741*141 (Net
4742uid 3604,0
4743decl (Decl
4744n "T0_CS"
4745t "std_logic"
4746o 44
4747suid 101,0
4748)
4749declText (MLText
4750uid 3605,0
4751va (VaSet
4752font "Courier New,8,0"
4753)
4754xt "39000,38200,54000,39000"
4755st "T0_CS : std_logic"
4756)
4757)
4758*142 (Net
4759uid 3606,0
4760decl (Decl
4761n "T1_CS"
4762t "std_logic"
4763o 45
4764suid 102,0
4765)
4766declText (MLText
4767uid 3607,0
4768va (VaSet
4769font "Courier New,8,0"
4770)
4771xt "39000,39000,54000,39800"
4772st "T1_CS : std_logic"
4773)
4774)
4775*143 (Net
4776uid 3608,0
4777decl (Decl
4778n "T2_CS"
4779t "std_logic"
4780o 46
4781suid 103,0
4782)
4783declText (MLText
4784uid 3609,0
4785va (VaSet
4786font "Courier New,8,0"
4787)
4788xt "39000,39800,54000,40600"
4789st "T2_CS : std_logic"
4790)
4791)
4792*144 (Net
4793uid 3610,0
4794decl (Decl
4795n "T3_CS"
4796t "std_logic"
4797o 47
4798suid 104,0
4799)
4800declText (MLText
4801uid 3611,0
4802va (VaSet
4803font "Courier New,8,0"
4804)
4805xt "39000,40600,54000,41400"
4806st "T3_CS : std_logic"
4807)
4808)
4809*145 (PortIoOut
4810uid 3624,0
4811shape (CompositeShape
4812uid 3625,0
4813va (VaSet
4814vasetType 1
4815fg "0,0,32768"
4816)
4817optionalChildren [
4818(Pentagon
4819uid 3626,0
4820sl 0
4821ro 270
4822xt "111500,97625,113000,98375"
4823)
4824(Line
4825uid 3627,0
4826sl 0
4827ro 270
4828xt "111000,98000,111500,98000"
4829pts [
4830"111000,98000"
4831"111500,98000"
4832]
4833)
4834]
4835)
4836stc 0
4837sf 1
4838tg (WTG
4839uid 3628,0
4840ps "PortIoTextPlaceStrategy"
4841stg "STSignalDisplayStrategy"
4842f (Text
4843uid 3629,0
4844va (VaSet
4845)
4846xt "113750,97500,116550,98500"
4847st "S_CLK"
4848blo "113750,98300"
4849tm "WireNameMgr"
4850)
4851)
4852)
4853*146 (Net
4854uid 3630,0
4855decl (Decl
4856n "S_CLK"
4857t "std_logic"
4858o 43
4859suid 105,0
4860)
4861declText (MLText
4862uid 3631,0
4863va (VaSet
4864font "Courier New,8,0"
4865)
4866xt "39000,37400,54000,38200"
4867st "S_CLK : std_logic"
4868)
4869)
4870*147 (Net
4871uid 3632,0
4872decl (Decl
4873n "W_A"
4874t "std_logic_vector"
4875b "(9 DOWNTO 0)"
4876o 49
4877suid 106,0
4878)
4879declText (MLText
4880uid 3633,0
4881va (VaSet
4882font "Courier New,8,0"
4883)
4884xt "39000,42200,64000,43000"
4885st "W_A : std_logic_vector(9 DOWNTO 0)"
4886)
4887)
4888*148 (Net
4889uid 3634,0
4890decl (Decl
4891n "W_D"
4892t "std_logic_vector"
4893b "(15 DOWNTO 0)"
4894o 55
4895suid 107,0
4896)
4897declText (MLText
4898uid 3635,0
4899va (VaSet
4900font "Courier New,8,0"
4901)
4902xt "39000,47000,64500,47800"
4903st "W_D : std_logic_vector(15 DOWNTO 0)"
4904)
4905)
4906*149 (Net
4907uid 3636,0
4908decl (Decl
4909n "W_RES"
4910t "std_logic"
4911o 52
4912suid 108,0
4913i "'1'"
4914)
4915declText (MLText
4916uid 3637,0
4917va (VaSet
4918font "Courier New,8,0"
4919)
4920xt "39000,44600,67500,45400"
4921st "W_RES : std_logic := '1'"
4922)
4923)
4924*150 (Net
4925uid 3638,0
4926decl (Decl
4927n "W_RD"
4928t "std_logic"
4929o 51
4930suid 109,0
4931i "'1'"
4932)
4933declText (MLText
4934uid 3639,0
4935va (VaSet
4936font "Courier New,8,0"
4937)
4938xt "39000,43800,67500,44600"
4939st "W_RD : std_logic := '1'"
4940)
4941)
4942*151 (Net
4943uid 3640,0
4944decl (Decl
4945n "W_WR"
4946t "std_logic"
4947o 53
4948suid 110,0
4949i "'1'"
4950)
4951declText (MLText
4952uid 3641,0
4953va (VaSet
4954font "Courier New,8,0"
4955)
4956xt "39000,45400,67500,46200"
4957st "W_WR : std_logic := '1'"
4958)
4959)
4960*152 (Net
4961uid 3642,0
4962decl (Decl
4963n "W_INT"
4964t "std_logic"
4965o 15
4966suid 111,0
4967)
4968declText (MLText
4969uid 3643,0
4970va (VaSet
4971font "Courier New,8,0"
4972)
4973xt "39000,15000,54000,15800"
4974st "W_INT : std_logic"
4975)
4976)
4977*153 (Net
4978uid 3644,0
4979decl (Decl
4980n "W_CS"
4981t "std_logic"
4982o 50
4983suid 112,0
4984i "'1'"
4985)
4986declText (MLText
4987uid 3645,0
4988va (VaSet
4989font "Courier New,8,0"
4990)
4991xt "39000,43000,67500,43800"
4992st "W_CS : std_logic := '1'"
4993)
4994)
4995*154 (PortIoInOut
4996uid 3674,0
4997shape (CompositeShape
4998uid 3675,0
4999va (VaSet
5000vasetType 1
5001fg "0,0,32768"
5002)
5003optionalChildren [
5004(Hexagon
5005uid 3676,0
5006sl 0
5007xt "111500,98625,113000,99375"
5008)
5009(Line
5010uid 3677,0
5011sl 0
5012xt "111000,99000,111500,99000"
5013pts [
5014"111000,99000"
5015"111500,99000"
5016]
5017)
5018]
5019)
5020stc 0
5021sf 1
5022tg (WTG
5023uid 3678,0
5024ps "PortIoTextPlaceStrategy"
5025stg "STSignalDisplayStrategy"
5026f (Text
5027uid 3679,0
5028va (VaSet
5029)
5030xt "114000,98500,116400,99500"
5031st "MISO"
5032blo "114000,99300"
5033tm "WireNameMgr"
5034)
5035)
5036)
5037*155 (Net
5038uid 3680,0
5039decl (Decl
5040n "MOSI"
5041t "std_logic"
5042o 34
5043suid 113,0
5044i "'0'"
5045)
5046declText (MLText
5047uid 3681,0
5048va (VaSet
5049font "Courier New,8,0"
5050)
5051xt "39000,29400,67500,30200"
5052st "MOSI : std_logic := '0'"
5053)
5054)
5055*156 (PortIoOut
5056uid 3688,0
5057shape (CompositeShape
5058uid 3689,0
5059va (VaSet
5060vasetType 1
5061fg "0,0,32768"
5062)
5063optionalChildren [
5064(Pentagon
5065uid 3690,0
5066sl 0
5067ro 270
5068xt "111500,99625,113000,100375"
5069)
5070(Line
5071uid 3691,0
5072sl 0
5073ro 270
5074xt "111000,100000,111500,100000"
5075pts [
5076"111000,100000"
5077"111500,100000"
5078]
5079)
5080]
5081)
5082stc 0
5083sf 1
5084tg (WTG
5085uid 3692,0
5086ps "PortIoTextPlaceStrategy"
5087stg "STSignalDisplayStrategy"
5088f (Text
5089uid 3693,0
5090va (VaSet
5091)
5092xt "114000,99500,116400,100500"
5093st "MOSI"
5094blo "114000,100300"
5095tm "WireNameMgr"
5096)
5097)
5098)
5099*157 (Net
5100uid 3694,0
5101decl (Decl
5102n "MISO"
5103t "std_logic"
5104preAdd 0
5105posAdd 0
5106o 54
5107suid 114,0
5108)
5109declText (MLText
5110uid 3695,0
5111va (VaSet
5112font "Courier New,8,0"
5113)
5114xt "39000,46200,54000,47000"
5115st "MISO : std_logic"
5116)
5117)
5118*158 (HdlText
5119uid 3700,0
5120optionalChildren [
5121*159 (EmbeddedText
5122uid 3706,0
5123commentText (CommentText
5124uid 3707,0
5125ps "CenterOffsetStrategy"
5126shape (Rectangle
5127uid 3708,0
5128va (VaSet
5129vasetType 1
5130fg "65535,65535,65535"
5131lineColor "0,0,32768"
5132lineWidth 2
5133)
5134xt "82000,106000,99000,118000"
5135)
5136oxt "0,0,18000,5000"
5137text (MLText
5138uid 3709,0
5139va (VaSet
5140)
5141xt "82200,106200,98600,118200"
5142st "
5143-- MISC 6
5144TRG_V <= '0';
5145RS485_C_RE <= '0';
5146RS485_C_DE <= '0';
5147RS485_C_DO <= RS485_C_DI;
5148
5149RS485_E_RE <= '0';
5150RS485_E_DE <= '0';
5151--RS485_E_DO <= RS485_E_DI;
5152
5153-- DENABLE <= '0'; -- domino wave stopped
5154-- DENABLE <= '1'; -- domino wave running
5155
5156
5157EE_CS <= '1';
5158"
5159tm "HdlTextMgr"
5160wrapOption 3
5161visibleHeight 12000
5162visibleWidth 17000
5163)
5164)
5165)
5166]
5167shape (Rectangle
5168uid 3701,0
5169va (VaSet
5170vasetType 1
5171fg "65535,65535,37120"
5172lineColor "0,0,32768"
5173lineWidth 2
5174)
5175xt "100000,102000,108000,115000"
5176)
5177oxt "0,0,8000,10000"
5178ttg (MlTextGroup
5179uid 3702,0
5180ps "CenterOffsetStrategy"
5181stg "VerticalLayoutStrategy"
5182textVec [
5183*160 (Text
5184uid 3703,0
5185va (VaSet
5186font "Arial,8,1"
5187)
5188xt "103150,106000,105550,107000"
5189st "MISC"
5190blo "103150,106800"
5191tm "HdlTextNameMgr"
5192)
5193*161 (Text
5194uid 3704,0
5195va (VaSet
5196font "Arial,8,1"
5197)
5198xt "103150,107000,103950,108000"
5199st "6"
5200blo "103150,107800"
5201tm "HdlTextNumberMgr"
5202)
5203]
5204)
5205viewicon (ZoomableIcon
5206uid 3705,0
5207sl 0
5208va (VaSet
5209vasetType 1
5210fg "49152,49152,49152"
5211)
5212xt "100250,113250,101750,114750"
5213iconName "TextFile.png"
5214iconMaskName "TextFile.msk"
5215ftype 21
5216)
5217viewiconposition 0
5218)
5219*162 (PortIoOut
5220uid 3710,0
5221shape (CompositeShape
5222uid 3711,0
5223va (VaSet
5224vasetType 1
5225fg "0,0,32768"
5226)
5227optionalChildren [
5228(Pentagon
5229uid 3712,0
5230sl 0
5231ro 270
5232xt "111500,102625,113000,103375"
5233)
5234(Line
5235uid 3713,0
5236sl 0
5237ro 270
5238xt "111000,103000,111500,103000"
5239pts [
5240"111000,103000"
5241"111500,103000"
5242]
5243)
5244]
5245)
5246stc 0
5247sf 1
5248tg (WTG
5249uid 3714,0
5250ps "PortIoTextPlaceStrategy"
5251stg "STSignalDisplayStrategy"
5252f (Text
5253uid 3715,0
5254va (VaSet
5255)
5256xt "114000,102500,117000,103500"
5257st "TRG_V"
5258blo "114000,103300"
5259tm "WireNameMgr"
5260)
5261)
5262)
5263*163 (PortIoOut
5264uid 3716,0
5265shape (CompositeShape
5266uid 3717,0
5267va (VaSet
5268vasetType 1
5269fg "0,0,32768"
5270)
5271optionalChildren [
5272(Pentagon
5273uid 3718,0
5274sl 0
5275ro 270
5276xt "111500,103625,113000,104375"
5277)
5278(Line
5279uid 3719,0
5280sl 0
5281ro 270
5282xt "111000,104000,111500,104000"
5283pts [
5284"111000,104000"
5285"111500,104000"
5286]
5287)
5288]
5289)
5290stc 0
5291sf 1
5292tg (WTG
5293uid 3720,0
5294ps "PortIoTextPlaceStrategy"
5295stg "STSignalDisplayStrategy"
5296f (Text
5297uid 3721,0
5298va (VaSet
5299)
5300xt "114000,103500,119600,104500"
5301st "RS485_C_RE"
5302blo "114000,104300"
5303tm "WireNameMgr"
5304)
5305)
5306)
5307*164 (PortIoOut
5308uid 3722,0
5309shape (CompositeShape
5310uid 3723,0
5311va (VaSet
5312vasetType 1
5313fg "0,0,32768"
5314)
5315optionalChildren [
5316(Pentagon
5317uid 3724,0
5318sl 0
5319ro 270
5320xt "111500,104625,113000,105375"
5321)
5322(Line
5323uid 3725,0
5324sl 0
5325ro 270
5326xt "111000,105000,111500,105000"
5327pts [
5328"111000,105000"
5329"111500,105000"
5330]
5331)
5332]
5333)
5334stc 0
5335sf 1
5336tg (WTG
5337uid 3726,0
5338ps "PortIoTextPlaceStrategy"
5339stg "STSignalDisplayStrategy"
5340f (Text
5341uid 3727,0
5342va (VaSet
5343)
5344xt "114000,104500,119600,105500"
5345st "RS485_C_DE"
5346blo "114000,105300"
5347tm "WireNameMgr"
5348)
5349)
5350)
5351*165 (PortIoOut
5352uid 3728,0
5353shape (CompositeShape
5354uid 3729,0
5355va (VaSet
5356vasetType 1
5357fg "0,0,32768"
5358)
5359optionalChildren [
5360(Pentagon
5361uid 3730,0
5362sl 0
5363ro 270
5364xt "111500,105625,113000,106375"
5365)
5366(Line
5367uid 3731,0
5368sl 0
5369ro 270
5370xt "111000,106000,111500,106000"
5371pts [
5372"111000,106000"
5373"111500,106000"
5374]
5375)
5376]
5377)
5378stc 0
5379sf 1
5380tg (WTG
5381uid 3732,0
5382ps "PortIoTextPlaceStrategy"
5383stg "STSignalDisplayStrategy"
5384f (Text
5385uid 3733,0
5386va (VaSet
5387)
5388xt "114000,105500,119500,106500"
5389st "RS485_E_RE"
5390blo "114000,106300"
5391tm "WireNameMgr"
5392)
5393)
5394)
5395*166 (PortIoOut
5396uid 3734,0
5397shape (CompositeShape
5398uid 3735,0
5399va (VaSet
5400vasetType 1
5401fg "0,0,32768"
5402)
5403optionalChildren [
5404(Pentagon
5405uid 3736,0
5406sl 0
5407ro 270
5408xt "111500,106625,113000,107375"
5409)
5410(Line
5411uid 3737,0
5412sl 0
5413ro 270
5414xt "111000,107000,111500,107000"
5415pts [
5416"111000,107000"
5417"111500,107000"
5418]
5419)
5420]
5421)
5422stc 0
5423sf 1
5424tg (WTG
5425uid 3738,0
5426ps "PortIoTextPlaceStrategy"
5427stg "STSignalDisplayStrategy"
5428f (Text
5429uid 3739,0
5430va (VaSet
5431)
5432xt "114000,106500,119500,107500"
5433st "RS485_E_DE"
5434blo "114000,107300"
5435tm "WireNameMgr"
5436)
5437)
5438)
5439*167 (PortIoOut
5440uid 3740,0
5441shape (CompositeShape
5442uid 3741,0
5443va (VaSet
5444vasetType 1
5445fg "0,0,32768"
5446)
5447optionalChildren [
5448(Pentagon
5449uid 3742,0
5450sl 0
5451ro 270
5452xt "111500,120625,113000,121375"
5453)
5454(Line
5455uid 3743,0
5456sl 0
5457ro 270
5458xt "111000,121000,111500,121000"
5459pts [
5460"111000,121000"
5461"111500,121000"
5462]
5463)
5464]
5465)
5466stc 0
5467sf 1
5468tg (WTG
5469uid 3744,0
5470ps "PortIoTextPlaceStrategy"
5471stg "STSignalDisplayStrategy"
5472f (Text
5473uid 3745,0
5474va (VaSet
5475)
5476xt "114000,120500,118000,121500"
5477st "DENABLE"
5478blo "114000,121300"
5479tm "WireNameMgr"
5480)
5481)
5482)
5483*168 (PortIoOut
5484uid 3752,0
5485shape (CompositeShape
5486uid 3753,0
5487va (VaSet
5488vasetType 1
5489fg "0,0,32768"
5490)
5491optionalChildren [
5492(Pentagon
5493uid 3754,0
5494sl 0
5495ro 270
5496xt "111500,109625,113000,110375"
5497)
5498(Line
5499uid 3755,0
5500sl 0
5501ro 270
5502xt "111000,110000,111500,110000"
5503pts [
5504"111000,110000"
5505"111500,110000"
5506]
5507)
5508]
5509)
5510stc 0
5511sf 1
5512tg (WTG
5513uid 3756,0
5514ps "PortIoTextPlaceStrategy"
5515stg "STSignalDisplayStrategy"
5516f (Text
5517uid 3757,0
5518va (VaSet
5519)
5520xt "114000,109500,116900,110500"
5521st "EE_CS"
5522blo "114000,110300"
5523tm "WireNameMgr"
5524)
5525)
5526)
5527*169 (Net
5528uid 3864,0
5529decl (Decl
5530n "TRG_V"
5531t "std_logic"
5532o 48
5533suid 126,0
5534)
5535declText (MLText
5536uid 3865,0
5537va (VaSet
5538font "Courier New,8,0"
5539)
5540xt "39000,41400,54000,42200"
5541st "TRG_V : std_logic"
5542)
5543)
5544*170 (Net
5545uid 3866,0
5546decl (Decl
5547n "RS485_C_RE"
5548t "std_logic"
5549o 38
5550suid 127,0
5551)
5552declText (MLText
5553uid 3867,0
5554va (VaSet
5555font "Courier New,8,0"
5556)
5557xt "39000,33400,54000,34200"
5558st "RS485_C_RE : std_logic"
5559)
5560)
5561*171 (Net
5562uid 3868,0
5563decl (Decl
5564n "RS485_C_DE"
5565t "std_logic"
5566o 36
5567suid 128,0
5568)
5569declText (MLText
5570uid 3869,0
5571va (VaSet
5572font "Courier New,8,0"
5573)
5574xt "39000,31800,54000,32600"
5575st "RS485_C_DE : std_logic"
5576)
5577)
5578*172 (Net
5579uid 3870,0
5580decl (Decl
5581n "RS485_E_RE"
5582t "std_logic"
5583o 40
5584suid 129,0
5585)
5586declText (MLText
5587uid 3871,0
5588va (VaSet
5589font "Courier New,8,0"
5590)
5591xt "39000,35000,54000,35800"
5592st "RS485_E_RE : std_logic"
5593)
5594)
5595*173 (Net
5596uid 3872,0
5597decl (Decl
5598n "RS485_E_DE"
5599t "std_logic"
5600o 39
5601suid 130,0
5602)
5603declText (MLText
5604uid 3873,0
5605va (VaSet
5606font "Courier New,8,0"
5607)
5608xt "39000,34200,54000,35000"
5609st "RS485_E_DE : std_logic"
5610)
5611)
5612*174 (Net
5613uid 3874,0
5614decl (Decl
5615n "DENABLE"
5616t "std_logic"
5617o 25
5618suid 131,0
5619i "'0'"
5620)
5621declText (MLText
5622uid 3875,0
5623va (VaSet
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7118A0_T(2) <= CLK25_PSOUT;
7119A0_T(3) <= PS_DIR_IN;
7120A0_T(4) <= PS_DO_IN;
7121A0_T(5) <= PSINCDEC_OUT;
7122A0_T(6) <= PSEN_OUT;
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7124
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7127A1_T(2) <= PSDONE_extraOUT;
7128A1_T(3) <= PSCLK_OUT;
7129A1_T(4) <= LOCKED_extraOUT;
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7434optionalChildren [
7435(Pentagon
7436uid 11092,0
7437sl 0
7438ro 270
7439xt "94000,102625,95500,103375"
7440)
7441(Line
7442uid 11093,0
7443sl 0
7444ro 270
7445xt "95500,103000,96000,103000"
7446pts [
7447"95500,103000"
7448"96000,103000"
7449]
7450)
7451]
7452)
7453stc 0
7454sf 1
7455tg (WTG
7456uid 11094,0
7457ps "PortIoTextPlaceStrategy"
7458stg "STSignalDisplayStrategy"
7459f (Text
7460uid 11095,0
7461va (VaSet
7462)
7463xt "87700,102500,93000,103500"
7464st "RS485_C_DI"
7465ju 2
7466blo "93000,103300"
7467tm "WireNameMgr"
7468)
7469)
7470)
7471*252 (Net
7472uid 11102,0
7473decl (Decl
7474n "RS485_C_DI"
7475t "std_logic"
7476o 11
7477suid 197,0
7478)
7479declText (MLText
7480uid 11103,0
7481va (VaSet
7482font "Courier New,8,0"
7483)
7484xt "39000,11800,54000,12600"
7485st "RS485_C_DI : std_logic"
7486)
7487)
7488*253 (PortIoOut
7489uid 11104,0
7490shape (CompositeShape
7491uid 11105,0
7492va (VaSet
7493vasetType 1
7494fg "0,0,32768"
7495)
7496optionalChildren [
7497(Pentagon
7498uid 11106,0
7499sl 0
7500ro 270
7501xt "111500,111625,113000,112375"
7502)
7503(Line
7504uid 11107,0
7505sl 0
7506ro 270
7507xt "111000,112000,111500,112000"
7508pts [
7509"111000,112000"
7510"111500,112000"
7511]
7512)
7513]
7514)
7515stc 0
7516sf 1
7517tg (WTG
7518uid 11108,0
7519ps "PortIoTextPlaceStrategy"
7520stg "STSignalDisplayStrategy"
7521f (Text
7522uid 11109,0
7523va (VaSet
7524)
7525xt "114000,111500,119700,112500"
7526st "RS485_C_DO"
7527blo "114000,112300"
7528tm "WireNameMgr"
7529)
7530)
7531)
7532*254 (Net
7533uid 11116,0
7534decl (Decl
7535n "RS485_C_DO"
7536t "std_logic"
7537o 37
7538suid 198,0
7539)
7540declText (MLText
7541uid 11117,0
7542va (VaSet
7543font "Courier New,8,0"
7544)
7545xt "39000,32600,54000,33400"
7546st "RS485_C_DO : std_logic"
7547)
7548)
7549*255 (PortIoIn
7550uid 11508,0
7551shape (CompositeShape
7552uid 11509,0
7553va (VaSet
7554vasetType 1
7555fg "0,0,32768"
7556)
7557optionalChildren [
7558(Pentagon
7559uid 11510,0
7560sl 0
7561ro 270
7562xt "121000,115625,122500,116375"
7563)
7564(Line
7565uid 11511,0
7566sl 0
7567ro 270
7568xt "122500,116000,123000,116000"
7569pts [
7570"122500,116000"
7571"123000,116000"
7572]
7573)
7574]
7575)
7576stc 0
7577sf 1
7578tg (WTG
7579uid 11512,0
7580ps "PortIoTextPlaceStrategy"
7581stg "STSignalDisplayStrategy"
7582f (Text
7583uid 11513,0
7584va (VaSet
7585)
7586xt "114800,115500,120000,116500"
7587st "RS485_E_DI"
7588ju 2
7589blo "120000,116300"
7590tm "WireNameMgr"
7591)
7592)
7593)
7594*256 (Net
7595uid 11520,0
7596decl (Decl
7597n "RS485_E_DI"
7598t "std_logic"
7599o 12
7600suid 200,0
7601)
7602declText (MLText
7603uid 11521,0
7604va (VaSet
7605font "Courier New,8,0"
7606)
7607xt "39000,12600,54000,13400"
7608st "RS485_E_DI : std_logic"
7609)
7610)
7611*257 (Net
7612uid 11534,0
7613decl (Decl
7614n "RS485_E_DO"
7615t "std_logic"
7616o 13
7617suid 201,0
7618)
7619declText (MLText
7620uid 11535,0
7621va (VaSet
7622font "Courier New,8,0"
7623)
7624xt "39000,13400,54000,14200"
7625st "RS485_E_DO : std_logic"
7626)
7627)
7628*258 (PortIoIn
7629uid 11922,0
7630shape (CompositeShape
7631uid 11923,0
7632va (VaSet
7633vasetType 1
7634fg "0,0,32768"
7635)
7636optionalChildren [
7637(Pentagon
7638uid 11924,0
7639sl 0
7640ro 90
7641xt "126500,113625,128000,114375"
7642)
7643(Line
7644uid 11925,0
7645sl 0
7646ro 90
7647xt "126000,114000,126500,114000"
7648pts [
7649"126500,114000"
7650"126000,114000"
7651]
7652)
7653]
7654)
7655stc 0
7656sf 1
7657tg (WTG
7658uid 11926,0
7659ps "PortIoTextPlaceStrategy"
7660stg "STSignalDisplayStrategy"
7661f (Text
7662uid 11927,0
7663va (VaSet
7664)
7665xt "129000,113500,134600,114500"
7666st "RS485_E_DO"
7667blo "129000,114300"
7668tm "WireNameMgr"
7669)
7670)
7671)
7672*259 (PortIoOut
7673uid 12326,0
7674shape (CompositeShape
7675uid 12327,0
7676va (VaSet
7677vasetType 1
7678fg "0,0,32768"
7679)
7680optionalChildren [
7681(Pentagon
7682uid 12328,0
7683sl 0
7684ro 270
7685xt "87500,139625,89000,140375"
7686)
7687(Line
7688uid 12329,0
7689sl 0
7690ro 270
7691xt "87000,140000,87500,140000"
7692pts [
7693"87000,140000"
7694"87500,140000"
7695]
7696)
7697]
7698)
7699stc 0
7700sf 1
7701tg (WTG
7702uid 12330,0
7703ps "PortIoTextPlaceStrategy"
7704stg "STSignalDisplayStrategy"
7705f (Text
7706uid 12331,0
7707va (VaSet
7708)
7709xt "89000,139500,91300,140500"
7710st "SRIN"
7711blo "89000,140300"
7712tm "WireNameMgr"
7713)
7714)
7715)
7716*260 (Net
7717uid 12334,0
7718decl (Decl
7719n "SRIN"
7720t "std_logic"
7721o 42
7722suid 203,0
7723i "'0'"
7724)
7725declText (MLText
7726uid 12335,0
7727va (VaSet
7728font "Courier New,8,0"
7729)
7730xt "39000,36600,67500,37400"
7731st "SRIN : std_logic := '0'"
7732)
7733)
7734*261 (PortIoOut
7735uid 12539,0
7736shape (CompositeShape
7737uid 12540,0
7738va (VaSet
7739vasetType 1
7740fg "0,0,32768"
7741)
7742optionalChildren [
7743(Pentagon
7744uid 12541,0
7745sl 0
7746ro 270
7747xt "87500,140625,89000,141375"
7748)
7749(Line
7750uid 12542,0
7751sl 0
7752ro 270
7753xt "87000,141000,87500,141000"
7754pts [
7755"87000,141000"
7756"87500,141000"
7757]
7758)
7759]
7760)
7761stc 0
7762sf 1
7763tg (WTG
7764uid 12543,0
7765ps "PortIoTextPlaceStrategy"
7766stg "STSignalDisplayStrategy"
7767f (Text
7768uid 12544,0
7769va (VaSet
7770)
7771xt "90000,140500,95100,141500"
7772st "AMBER_LED"
7773blo "90000,141300"
7774tm "WireNameMgr"
7775)
7776)
7777)
7778*262 (PortIoOut
7779uid 12553,0
7780shape (CompositeShape
7781uid 12554,0
7782va (VaSet
7783vasetType 1
7784fg "0,0,32768"
7785)
7786optionalChildren [
7787(Pentagon
7788uid 12555,0
7789sl 0
7790ro 270
7791xt "87500,141625,89000,142375"
7792)
7793(Line
7794uid 12556,0
7795sl 0
7796ro 270
7797xt "87000,142000,87500,142000"
7798pts [
7799"87000,142000"
7800"87500,142000"
7801]
7802)
7803]
7804)
7805stc 0
7806sf 1
7807tg (WTG
7808uid 12557,0
7809ps "PortIoTextPlaceStrategy"
7810stg "STSignalDisplayStrategy"
7811f (Text
7812uid 12558,0
7813va (VaSet
7814)
7815xt "90000,141500,95100,142500"
7816st "GREEN_LED"
7817blo "90000,142300"
7818tm "WireNameMgr"
7819)
7820)
7821)
7822*263 (PortIoOut
7823uid 12567,0
7824shape (CompositeShape
7825uid 12568,0
7826va (VaSet
7827vasetType 1
7828fg "0,0,32768"
7829)
7830optionalChildren [
7831(Pentagon
7832uid 12569,0
7833sl 0
7834ro 270
7835xt "87500,142625,89000,143375"
7836)
7837(Line
7838uid 12570,0
7839sl 0
7840ro 270
7841xt "87000,143000,87500,143000"
7842pts [
7843"87000,143000"
7844"87500,143000"
7845]
7846)
7847]
7848)
7849stc 0
7850sf 1
7851tg (WTG
7852uid 12571,0
7853ps "PortIoTextPlaceStrategy"
7854stg "STSignalDisplayStrategy"
7855f (Text
7856uid 12572,0
7857va (VaSet
7858)
7859xt "90000,142500,94000,143500"
7860st "RED_LED"
7861blo "90000,143300"
7862tm "WireNameMgr"
7863)
7864)
7865)
7866*264 (Net
7867uid 12762,0
7868decl (Decl
7869n "AMBER_LED"
7870t "std_logic"
7871o 31
7872suid 207,0
7873)
7874declText (MLText
7875uid 12763,0
7876va (VaSet
7877font "Courier New,8,0"
7878)
7879xt "39000,18200,54000,19000"
7880st "AMBER_LED : std_logic"
7881)
7882)
7883*265 (Net
7884uid 12764,0
7885decl (Decl
7886n "GREEN_LED"
7887t "std_logic"
7888o 32
7889suid 208,0
7890)
7891declText (MLText
7892uid 12765,0
7893va (VaSet
7894font "Courier New,8,0"
7895)
7896xt "39000,28600,54000,29400"
7897st "GREEN_LED : std_logic"
7898)
7899)
7900*266 (Net
7901uid 12766,0
7902decl (Decl
7903n "RED_LED"
7904t "std_logic"
7905o 33
7906suid 209,0
7907)
7908declText (MLText
7909uid 12767,0
7910va (VaSet
7911font "Courier New,8,0"
7912)
7913xt "39000,31000,54000,31800"
7914st "RED_LED : std_logic"
7915)
7916)
7917*267 (Wire
7918uid 245,0
7919shape (OrthoPolyLine
7920uid 246,0
7921va (VaSet
7922vasetType 3
7923)
7924xt "21000,68000,51250,68000"
7925pts [
7926"51250,68000"
7927"21000,68000"
7928]
7929)
7930start &27
7931end &67
7932ss 0
7933sat 32
7934eat 32
7935stc 0
7936st 0
7937sf 1
7938si 0
7939tg (WTG
7940uid 249,0
7941ps "ConnStartEndStrategy"
7942stg "STSignalDisplayStrategy"
7943f (Text
7944uid 250,0
7945va (VaSet
7946isHidden 1
7947)
7948xt "53250,67000,56050,68000"
7949st "X_50M"
7950blo "53250,67800"
7951tm "WireNameMgr"
7952)
7953)
7954on &88
7955)
7956*268 (Wire
7957uid 277,0
7958shape (OrthoPolyLine
7959uid 278,0
7960va (VaSet
7961vasetType 3
7962lineWidth 2
7963)
7964xt "32000,81000,51250,81000"
7965pts [
7966"51250,81000"
7967"32000,81000"
7968]
7969)
7970start &17
7971end &68
7972sat 32
7973eat 2
7974sty 1
7975st 0
7976sf 1
7977si 0
7978tg (WTG
7979uid 281,0
7980ps "ConnStartEndStrategy"
7981stg "STSignalDisplayStrategy"
7982f (Text
7983uid 282,0
7984va (VaSet
7985)
7986xt "44000,80000,49900,81000"
7987st "board_id : (3:0)"
7988blo "44000,80800"
7989tm "WireNameMgr"
7990)
7991)
7992on &72
7993)
7994*269 (Wire
7995uid 285,0
7996shape (OrthoPolyLine
7997uid 286,0
7998va (VaSet
7999vasetType 3
8000lineWidth 2
8001)
8002xt "32000,82000,51250,82000"
8003pts [
8004"51250,82000"
8005"32000,82000"
8006]
8007)
8008start &18
8009end &68
8010sat 32
8011eat 2
8012sty 1
8013st 0
8014sf 1
8015si 0
8016tg (WTG
8017uid 289,0
8018ps "ConnStartEndStrategy"
8019stg "STSignalDisplayStrategy"
8020f (Text
8021uid 290,0
8022va (VaSet
8023)
8024xt "45000,81000,50700,82000"
8025st "crate_id : (1:0)"
8026blo "45000,81800"
8027tm "WireNameMgr"
8028)
8029)
8030on &73
8031)
8032*270 (Wire
8033uid 362,0
8034shape (OrthoPolyLine
8035uid 363,0
8036va (VaSet
8037vasetType 3
8038)
8039xt "21000,90000,51250,90000"
8040pts [
8041"21000,90000"
8042"51250,90000"
8043]
8044)
8045start &96
8046end &16
8047sat 32
8048eat 32
8049stc 0
8050st 0
8051sf 1
8052si 0
8053tg (WTG
8054uid 364,0
8055ps "ConnStartEndStrategy"
8056stg "STSignalDisplayStrategy"
8057f (Text
8058uid 365,0
8059va (VaSet
8060isHidden 1
8061)
8062xt "22000,89000,25600,90000"
8063st "OE_ADC"
8064blo "22000,89800"
8065tm "WireNameMgr"
8066)
8067)
8068on &97
8069)
8070*271 (Wire
8071uid 418,0
8072shape (OrthoPolyLine
8073uid 419,0
8074va (VaSet
8075vasetType 3
8076)
8077xt "80750,71000,111000,71000"
8078pts [
8079"80750,71000"
8080"111000,71000"
8081]
8082)
8083start &13
8084end &74
8085sat 32
8086eat 32
8087stc 0
8088st 0
8089sf 1
8090si 0
8091tg (WTG
8092uid 422,0
8093ps "ConnStartEndStrategy"
8094stg "STSignalDisplayStrategy"
8095f (Text
8096uid 423,0
8097va (VaSet
8098isHidden 1
8099)
8100xt "82000,70000,85100,71000"
8101st "W_RES"
8102blo "82000,70800"
8103tm "WireNameMgr"
8104)
8105)
8106on &149
8107)
8108*272 (Wire
8109uid 426,0
8110shape (OrthoPolyLine
8111uid 427,0
8112va (VaSet
8113vasetType 3
8114lineWidth 2
8115)
8116xt "80750,68000,111000,68000"
8117pts [
8118"80750,68000"
8119"111000,68000"
8120]
8121)
8122start &19
8123end &75
8124sat 32
8125eat 32
8126sty 1
8127stc 0
8128st 0
8129sf 1
8130si 0
8131tg (WTG
8132uid 430,0
8133ps "ConnStartEndStrategy"
8134stg "STSignalDisplayStrategy"
8135f (Text
8136uid 431,0
8137va (VaSet
8138isHidden 1
8139)
8140xt "82000,67000,84000,68000"
8141st "W_A"
8142blo "82000,67800"
8143tm "WireNameMgr"
8144)
8145)
8146on &147
8147)
8148*273 (Wire
8149uid 434,0
8150shape (OrthoPolyLine
8151uid 435,0
8152va (VaSet
8153vasetType 3
8154)
8155xt "80750,75000,111000,75000"
8156pts [
8157"80750,75000"
8158"111000,75000"
8159]
8160)
8161start &20
8162end &76
8163sat 32
8164eat 32
8165stc 0
8166st 0
8167sf 1
8168si 0
8169tg (WTG
8170uid 438,0
8171ps "ConnStartEndStrategy"
8172stg "STSignalDisplayStrategy"
8173f (Text
8174uid 439,0
8175va (VaSet
8176isHidden 1
8177)
8178xt "82000,74000,84600,75000"
8179st "W_CS"
8180blo "82000,74800"
8181tm "WireNameMgr"
8182)
8183)
8184on &153
8185)
8186*274 (Wire
8187uid 442,0
8188shape (OrthoPolyLine
8189uid 443,0
8190va (VaSet
8191vasetType 3
8192lineWidth 2
8193)
8194xt "80750,69000,111000,69000"
8195pts [
8196"80750,69000"
8197"111000,69000"
8198]
8199)
8200start &21
8201end &77
8202sat 32
8203eat 32
8204sty 1
8205stc 0
8206st 0
8207sf 1
8208si 0
8209tg (WTG
8210uid 446,0
8211ps "ConnStartEndStrategy"
8212stg "STSignalDisplayStrategy"
8213f (Text
8214uid 447,0
8215va (VaSet
8216isHidden 1
8217)
8218xt "82000,68000,84100,69000"
8219st "W_D"
8220blo "82000,68800"
8221tm "WireNameMgr"
8222)
8223)
8224on &148
8225)
8226*275 (Wire
8227uid 450,0
8228shape (OrthoPolyLine
8229uid 451,0
8230va (VaSet
8231vasetType 3
8232)
8233xt "80750,74000,111000,74000"
8234pts [
8235"111000,74000"
8236"80750,74000"
8237]
8238)
8239start &78
8240end &22
8241sat 32
8242eat 32
8243stc 0
8244st 0
8245sf 1
8246si 0
8247tg (WTG
8248uid 454,0
8249ps "ConnStartEndStrategy"
8250stg "STSignalDisplayStrategy"
8251f (Text
8252uid 455,0
8253va (VaSet
8254isHidden 1
8255)
8256xt "82000,73000,84800,74000"
8257st "W_INT"
8258blo "82000,73800"
8259tm "WireNameMgr"
8260)
8261)
8262on &152
8263)
8264*276 (Wire
8265uid 458,0
8266shape (OrthoPolyLine
8267uid 459,0
8268va (VaSet
8269vasetType 3
8270)
8271xt "80750,72000,111000,72000"
8272pts [
8273"80750,72000"
8274"111000,72000"
8275]
8276)
8277start &23
8278end &79
8279sat 32
8280eat 32
8281stc 0
8282st 0
8283sf 1
8284si 0
8285tg (WTG
8286uid 462,0
8287ps "ConnStartEndStrategy"
8288stg "STSignalDisplayStrategy"
8289f (Text
8290uid 463,0
8291va (VaSet
8292isHidden 1
8293)
8294xt "82000,71000,84700,72000"
8295st "W_RD"
8296blo "82000,71800"
8297tm "WireNameMgr"
8298)
8299)
8300on &150
8301)
8302*277 (Wire
8303uid 466,0
8304shape (OrthoPolyLine
8305uid 467,0
8306va (VaSet
8307vasetType 3
8308)
8309xt "80750,73000,111000,73000"
8310pts [
8311"80750,73000"
8312"111000,73000"
8313]
8314)
8315start &24
8316end &80
8317sat 32
8318eat 32
8319stc 0
8320st 0
8321sf 1
8322si 0
8323tg (WTG
8324uid 470,0
8325ps "ConnStartEndStrategy"
8326stg "STSignalDisplayStrategy"
8327f (Text
8328uid 471,0
8329va (VaSet
8330isHidden 1
8331)
8332xt "82000,72000,84800,73000"
8333st "W_WR"
8334blo "82000,72800"
8335tm "WireNameMgr"
8336)
8337)
8338on &151
8339)
8340*278 (Wire
8341uid 1467,0
8342shape (OrthoPolyLine
8343uid 1468,0
8344va (VaSet
8345vasetType 3
8346)
8347xt "32000,95000,51250,95000"
8348pts [
8349"32000,95000"
8350"51250,95000"
8351]
8352)
8353start &100
8354end &28
8355sat 2
8356eat 32
8357st 0
8358sf 1
8359si 0
8360tg (WTG
8361uid 1471,0
8362ps "ConnStartEndStrategy"
8363stg "STSignalDisplayStrategy"
8364f (Text
8365uid 1472,0
8366va (VaSet
8367)
8368xt "34000,94000,39900,95000"
8369st "adc_data_array"
8370blo "34000,94800"
8371tm "WireNameMgr"
8372)
8373)
8374on &81
8375)
8376*279 (Wire
8377uid 1730,0
8378shape (OrthoPolyLine
8379uid 1731,0
8380va (VaSet
8381vasetType 3
8382lineWidth 2
8383)
8384xt "21000,89000,51250,89000"
8385pts [
8386"21000,89000"
8387"51250,89000"
8388]
8389)
8390start &98
8391end &29
8392sat 32
8393eat 32
8394sty 1
8395stc 0
8396st 0
8397sf 1
8398si 0
8399tg (WTG
8400uid 1734,0
8401ps "ConnStartEndStrategy"
8402stg "STSignalDisplayStrategy"
8403f (Text
8404uid 1735,0
8405va (VaSet
8406isHidden 1
8407)
8408xt "22000,88000,25000,89000"
8409st "A_OTR"
8410blo "22000,88800"
8411tm "WireNameMgr"
8412)
8413)
8414on &99
8415)
8416*280 (Wire
8417uid 1833,0
8418shape (OrthoPolyLine
8419uid 1834,0
8420va (VaSet
8421vasetType 3
8422lineWidth 2
8423)
8424xt "12000,126000,21000,126000"
8425pts [
8426"21000,126000"
8427"12000,126000"
8428]
8429)
8430start &190
8431end &128
8432sat 2
8433eat 32
8434sty 1
8435stc 0
8436st 0
8437sf 1
8438si 0
8439tg (WTG
8440uid 1837,0
8441ps "ConnStartEndStrategy"
8442stg "STSignalDisplayStrategy"
8443f (Text
8444uid 1838,0
8445va (VaSet
8446isHidden 1
8447)
8448xt "13000,125000,14900,126000"
8449st "D_A"
8450blo "13000,125800"
8451tm "WireNameMgr"
8452)
8453)
8454on &129
8455)
8456*281 (Wire
8457uid 1841,0
8458shape (OrthoPolyLine
8459uid 1842,0
8460va (VaSet
8461vasetType 3
8462)
8463xt "21000,110000,51250,110000"
8464pts [
8465"51250,110000"
8466"21000,110000"
8467]
8468)
8469start &31
8470end &130
8471sat 32
8472eat 32
8473stc 0
8474st 0
8475sf 1
8476si 0
8477tg (WTG
8478uid 1845,0
8479ps "ConnStartEndStrategy"
8480stg "STSignalDisplayStrategy"
8481f (Text
8482uid 1846,0
8483va (VaSet
8484isHidden 1
8485)
8486xt "22000,109000,25500,110000"
8487st "DWRITE"
8488blo "22000,109800"
8489tm "WireNameMgr"
8490)
8491)
8492on &131
8493)
8494*282 (Wire
8495uid 1865,0
8496shape (OrthoPolyLine
8497uid 1866,0
8498va (VaSet
8499vasetType 3
8500)
8501xt "21000,105000,51250,105000"
8502pts [
8503"21000,105000"
8504"51250,105000"
8505]
8506)
8507start &120
8508end &32
8509sat 32
8510eat 32
8511stc 0
8512st 0
8513sf 1
8514si 0
8515tg (WTG
8516uid 1869,0
8517ps "ConnStartEndStrategy"
8518stg "STSignalDisplayStrategy"
8519f (Text
8520uid 1870,0
8521va (VaSet
8522isHidden 1
8523)
8524xt "22000,104000,26600,105000"
8525st "D0_SROUT"
8526blo "22000,104800"
8527tm "WireNameMgr"
8528)
8529)
8530on &124
8531)
8532*283 (Wire
8533uid 1873,0
8534shape (OrthoPolyLine
8535uid 1874,0
8536va (VaSet
8537vasetType 3
8538)
8539xt "21000,106000,51250,106000"
8540pts [
8541"21000,106000"
8542"51250,106000"
8543]
8544)
8545start &121
8546end &33
8547sat 32
8548eat 32
8549stc 0
8550st 0
8551sf 1
8552si 0
8553tg (WTG
8554uid 1877,0
8555ps "ConnStartEndStrategy"
8556stg "STSignalDisplayStrategy"
8557f (Text
8558uid 1878,0
8559va (VaSet
8560isHidden 1
8561)
8562xt "22000,105000,26600,106000"
8563st "D1_SROUT"
8564blo "22000,105800"
8565tm "WireNameMgr"
8566)
8567)
8568on &125
8569)
8570*284 (Wire
8571uid 1881,0
8572shape (OrthoPolyLine
8573uid 1882,0
8574va (VaSet
8575vasetType 3
8576)
8577xt "21000,107000,51250,107000"
8578pts [
8579"21000,107000"
8580"51250,107000"
8581]
8582)
8583start &122
8584end &34
8585sat 32
8586eat 32
8587stc 0
8588st 0
8589sf 1
8590si 0
8591tg (WTG
8592uid 1885,0
8593ps "ConnStartEndStrategy"
8594stg "STSignalDisplayStrategy"
8595f (Text
8596uid 1886,0
8597va (VaSet
8598isHidden 1
8599)
8600xt "22000,106000,26600,107000"
8601st "D2_SROUT"
8602blo "22000,106800"
8603tm "WireNameMgr"
8604)
8605)
8606on &126
8607)
8608*285 (Wire
8609uid 1889,0
8610shape (OrthoPolyLine
8611uid 1890,0
8612va (VaSet
8613vasetType 3
8614)
8615xt "21000,108000,51250,108000"
8616pts [
8617"21000,108000"
8618"51250,108000"
8619]
8620)
8621start &123
8622end &35
8623sat 32
8624eat 32
8625stc 0
8626st 0
8627sf 1
8628si 0
8629tg (WTG
8630uid 1893,0
8631ps "ConnStartEndStrategy"
8632stg "STSignalDisplayStrategy"
8633f (Text
8634uid 1894,0
8635va (VaSet
8636isHidden 1
8637)
8638xt "22000,107000,26600,108000"
8639st "D3_SROUT"
8640blo "22000,107800"
8641tm "WireNameMgr"
8642)
8643)
8644on &127
8645)
8646*286 (Wire
8647uid 2409,0
8648shape (OrthoPolyLine
8649uid 2410,0
8650va (VaSet
8651vasetType 3
8652)
8653xt "21000,111000,51250,111000"
8654pts [
8655"51250,111000"
8656"21000,111000"
8657]
8658)
8659start &36
8660end &83
8661sat 32
8662eat 32
8663stc 0
8664st 0
8665sf 1
8666si 0
8667tg (WTG
8668uid 2413,0
8669ps "ConnStartEndStrategy"
8670stg "STSignalDisplayStrategy"
8671f (Text
8672uid 2414,0
8673va (VaSet
8674isHidden 1
8675)
8676xt "22000,110000,26200,111000"
8677st "RSRLOAD"
8678blo "22000,110800"
8679tm "WireNameMgr"
8680)
8681)
8682on &82
8683)
8684*287 (Wire
8685uid 2423,0
8686shape (OrthoPolyLine
8687uid 2424,0
8688va (VaSet
8689vasetType 3
8690)
8691xt "32000,113000,51250,113000"
8692pts [
8693"51250,113000"
8694"32000,113000"
8695]
8696)
8697start &37
8698end &112
8699sat 32
8700eat 1
8701stc 0
8702st 0
8703sf 1
8704si 0
8705tg (WTG
8706uid 2427,0
8707ps "ConnStartEndStrategy"
8708stg "STSignalDisplayStrategy"
8709f (Text
8710uid 2428,0
8711va (VaSet
8712isHidden 1
8713)
8714xt "66250,109000,69250,110000"
8715st "SRCLK"
8716blo "66250,109800"
8717tm "WireNameMgr"
8718)
8719)
8720on &84
8721)
8722*288 (Wire
8723uid 3009,0
8724shape (OrthoPolyLine
8725uid 3010,0
8726va (VaSet
8727vasetType 3
8728)
8729xt "80750,98000,111000,98000"
8730pts [
8731"80750,98000"
8732"111000,98000"
8733]
8734)
8735start &39
8736end &145
8737sat 32
8738eat 32
8739stc 0
8740st 0
8741sf 1
8742si 0
8743tg (WTG
8744uid 3011,0
8745ps "ConnStartEndStrategy"
8746stg "STSignalDisplayStrategy"
8747f (Text
8748uid 3012,0
8749va (VaSet
8750isHidden 1
8751)
8752xt "82000,97000,84800,98000"
8753st "S_CLK"
8754blo "82000,97800"
8755tm "WireNameMgr"
8756)
8757)
8758on &146
8759)
8760*289 (Wire
8761uid 3015,0
8762shape (OrthoPolyLine
8763uid 3016,0
8764va (VaSet
8765vasetType 3
8766)
8767xt "80750,99000,111000,99000"
8768pts [
8769"80750,99000"
8770"111000,99000"
8771]
8772)
8773start &41
8774end &154
8775sat 32
8776eat 32
8777stc 0
8778st 0
8779sf 1
8780si 0
8781tg (WTG
8782uid 3017,0
8783ps "ConnStartEndStrategy"
8784stg "STSignalDisplayStrategy"
8785f (Text
8786uid 3018,0
8787va (VaSet
8788isHidden 1
8789)
8790xt "82750,98000,85150,99000"
8791st "MISO"
8792blo "82750,98800"
8793tm "WireNameMgr"
8794)
8795)
8796on &157
8797)
8798*290 (Wire
8799uid 3021,0
8800shape (OrthoPolyLine
8801uid 3022,0
8802va (VaSet
8803vasetType 3
8804lineWidth 2
8805)
8806xt "80750,89000,100000,89000"
8807pts [
8808"80750,89000"
8809"100000,89000"
8810]
8811)
8812start &40
8813end &133
8814sat 32
8815eat 1
8816sty 1
8817st 0
8818sf 1
8819si 0
8820tg (WTG
8821uid 3023,0
8822ps "ConnStartEndStrategy"
8823stg "STSignalDisplayStrategy"
8824f (Text
8825uid 3024,0
8826va (VaSet
8827)
8828xt "92000,88000,98500,89000"
8829st "sensor_cs : (3:0)"
8830blo "92000,88800"
8831tm "WireNameMgr"
8832)
8833)
8834on &85
8835)
8836*291 (Wire
8837uid 3027,0
8838shape (OrthoPolyLine
8839uid 3028,0
8840va (VaSet
8841vasetType 3
8842)
8843xt "94000,87000,111000,87000"
8844pts [
8845"94000,87000"
8846"111000,87000"
8847]
8848)
8849start &200
8850end &132
8851ss 0
8852sat 32
8853eat 32
8854stc 0
8855st 0
8856sf 1
8857si 0
8858tg (WTG
8859uid 3031,0
8860ps "ConnStartEndStrategy"
8861stg "STSignalDisplayStrategy"
8862f (Text
8863uid 3032,0
8864va (VaSet
8865isHidden 1
8866)
8867xt "95000,86000,98600,87000"
8868st "DAC_CS"
8869blo "95000,86800"
8870tm "WireNameMgr"
8871)
8872)
8873on &86
8874)
8875*292 (Wire
8876uid 3218,0
8877shape (OrthoPolyLine
8878uid 3219,0
8879va (VaSet
8880vasetType 3
8881)
8882xt "22000,78000,51250,78000"
8883pts [
8884"22000,78000"
8885"51250,78000"
8886]
8887)
8888start &66
8889end &15
8890sat 32
8891eat 32
8892stc 0
8893st 0
8894sf 1
8895si 0
8896tg (WTG
8897uid 3220,0
8898ps "ConnStartEndStrategy"
8899stg "STSignalDisplayStrategy"
8900f (Text
8901uid 3221,0
8902va (VaSet
8903isHidden 1
8904)
8905xt "33000,77000,35100,78000"
8906st "TRG"
8907blo "33000,77800"
8908tm "WireNameMgr"
8909)
8910)
8911on &89
8912)
8913*293 (Wire
8914uid 3260,0
8915shape (OrthoPolyLine
8916uid 3261,0
8917va (VaSet
8918vasetType 3
8919lineWidth 2
8920)
8921xt "21000,70000,24000,70000"
8922pts [
8923"21000,70000"
8924"24000,70000"
8925]
8926)
8927start &87
8928end &90
8929sat 32
8930eat 2
8931sty 1
8932stc 0
8933st 0
8934sf 1
8935si 0
8936tg (WTG
8937uid 3264,0
8938ps "ConnStartEndStrategy"
8939stg "STSignalDisplayStrategy"
8940f (Text
8941uid 3265,0
8942va (VaSet
8943isHidden 1
8944)
8945xt "23000,69000,25800,70000"
8946st "A_CLK"
8947blo "23000,69800"
8948tm "WireNameMgr"
8949)
8950)
8951on &94
8952)
8953*294 (Wire
8954uid 3270,0
8955shape (OrthoPolyLine
8956uid 3271,0
8957va (VaSet
8958vasetType 3
8959)
8960xt "29000,70000,43000,72000"
8961pts [
8962"43000,72000"
8963"43000,70000"
8964"32000,70000"
8965"29000,70000"
8966]
8967)
8968start &213
8969end &90
8970sat 32
8971eat 1
8972st 0
8973sf 1
8974si 0
8975tg (WTG
8976uid 3274,0
8977ps "ConnStartEndStrategy"
8978stg "STSignalDisplayStrategy"
8979f (Text
8980uid 3275,0
8981va (VaSet
8982)
8983xt "35000,69000,39500,70000"
8984st "CLK_25_PS"
8985blo "35000,69800"
8986tm "WireNameMgr"
8987)
8988)
8989on &95
8990)
8991*295 (Wire
8992uid 3318,0
8993shape (OrthoPolyLine
8994uid 3319,0
8995va (VaSet
8996vasetType 3
8997lineWidth 2
8998)
8999xt "21000,95000,24000,95000"
9000pts [
9001"21000,95000"
9002"24000,95000"
9003]
9004)
9005start &104
9006end &100
9007sat 32
9008eat 1
9009sty 1
9010stc 0
9011st 0
9012sf 1
9013si 0
9014tg (WTG
9015uid 3322,0
9016ps "ConnStartEndStrategy"
9017stg "STSignalDisplayStrategy"
9018f (Text
9019uid 3323,0
9020va (VaSet
9021isHidden 1
9022)
9023xt "23000,94000,25300,95000"
9024st "A0_D"
9025blo "23000,94800"
9026tm "WireNameMgr"
9027)
9028)
9029on &108
9030)
9031*296 (Wire
9032uid 3352,0
9033shape (OrthoPolyLine
9034uid 3353,0
9035va (VaSet
9036vasetType 3
9037lineWidth 2
9038)
9039xt "21000,96000,24000,96000"
9040pts [
9041"21000,96000"
9042"24000,96000"
9043]
9044)
9045start &105
9046end &100
9047sat 32
9048eat 1
9049sty 1
9050stc 0
9051st 0
9052sf 1
9053si 0
9054tg (WTG
9055uid 3356,0
9056ps "ConnStartEndStrategy"
9057stg "STSignalDisplayStrategy"
9058f (Text
9059uid 3357,0
9060va (VaSet
9061isHidden 1
9062)
9063xt "23000,95000,25300,96000"
9064st "A1_D"
9065blo "23000,95800"
9066tm "WireNameMgr"
9067)
9068)
9069on &109
9070)
9071*297 (Wire
9072uid 3360,0
9073shape (OrthoPolyLine
9074uid 3361,0
9075va (VaSet
9076vasetType 3
9077lineWidth 2
9078)
9079xt "21000,97000,24000,97000"
9080pts [
9081"21000,97000"
9082"24000,97000"
9083]
9084)
9085start &106
9086end &100
9087sat 32
9088eat 1
9089sty 1
9090stc 0
9091st 0
9092sf 1
9093si 0
9094tg (WTG
9095uid 3364,0
9096ps "ConnStartEndStrategy"
9097stg "STSignalDisplayStrategy"
9098f (Text
9099uid 3365,0
9100va (VaSet
9101isHidden 1
9102)
9103xt "23000,96000,25300,97000"
9104st "A2_D"
9105blo "23000,96800"
9106tm "WireNameMgr"
9107)
9108)
9109on &110
9110)
9111*298 (Wire
9112uid 3368,0
9113shape (OrthoPolyLine
9114uid 3369,0
9115va (VaSet
9116vasetType 3
9117lineWidth 2
9118)
9119xt "21000,98000,24000,98000"
9120pts [
9121"21000,98000"
9122"24000,98000"
9123]
9124)
9125start &107
9126end &100
9127sat 32
9128eat 1
9129sty 1
9130stc 0
9131st 0
9132sf 1
9133si 0
9134tg (WTG
9135uid 3372,0
9136ps "ConnStartEndStrategy"
9137stg "STSignalDisplayStrategy"
9138f (Text
9139uid 3373,0
9140va (VaSet
9141isHidden 1
9142)
9143xt "23000,97000,25300,98000"
9144st "A3_D"
9145blo "23000,97800"
9146tm "WireNameMgr"
9147)
9148)
9149on &111
9150)
9151*299 (Wire
9152uid 3430,0
9153shape (OrthoPolyLine
9154uid 3431,0
9155va (VaSet
9156vasetType 3
9157)
9158xt "21000,113000,24000,113000"
9159pts [
9160"21000,113000"
9161"24000,113000"
9162]
9163)
9164start &176
9165end &112
9166sat 32
9167eat 2
9168stc 0
9169st 0
9170sf 1
9171si 0
9172tg (WTG
9173uid 3434,0
9174ps "ConnStartEndStrategy"
9175stg "STSignalDisplayStrategy"
9176f (Text
9177uid 3435,0
9178va (VaSet
9179isHidden 1
9180)
9181xt "23000,112000,27400,113000"
9182st "D0_SRCLK"
9183blo "23000,112800"
9184tm "WireNameMgr"
9185)
9186)
9187on &116
9188)
9189*300 (Wire
9190uid 3438,0
9191shape (OrthoPolyLine
9192uid 3439,0
9193va (VaSet
9194vasetType 3
9195)
9196xt "21000,114000,24000,114000"
9197pts [
9198"21000,114000"
9199"24000,114000"
9200]
9201)
9202start &177
9203end &112
9204sat 32
9205eat 2
9206stc 0
9207st 0
9208sf 1
9209si 0
9210tg (WTG
9211uid 3442,0
9212ps "ConnStartEndStrategy"
9213stg "STSignalDisplayStrategy"
9214f (Text
9215uid 3443,0
9216va (VaSet
9217isHidden 1
9218)
9219xt "23000,113000,27400,114000"
9220st "D1_SRCLK"
9221blo "23000,113800"
9222tm "WireNameMgr"
9223)
9224)
9225on &117
9226)
9227*301 (Wire
9228uid 3446,0
9229shape (OrthoPolyLine
9230uid 3447,0
9231va (VaSet
9232vasetType 3
9233)
9234xt "21000,115000,24000,115000"
9235pts [
9236"21000,115000"
9237"24000,115000"
9238]
9239)
9240start &178
9241end &112
9242sat 32
9243eat 2
9244stc 0
9245st 0
9246sf 1
9247si 0
9248tg (WTG
9249uid 3450,0
9250ps "ConnStartEndStrategy"
9251stg "STSignalDisplayStrategy"
9252f (Text
9253uid 3451,0
9254va (VaSet
9255isHidden 1
9256)
9257xt "23000,114000,27400,115000"
9258st "D2_SRCLK"
9259blo "23000,114800"
9260tm "WireNameMgr"
9261)
9262)
9263on &118
9264)
9265*302 (Wire
9266uid 3454,0
9267shape (OrthoPolyLine
9268uid 3455,0
9269va (VaSet
9270vasetType 3
9271)
9272xt "21000,116000,24000,116000"
9273pts [
9274"21000,116000"
9275"24000,116000"
9276]
9277)
9278start &179
9279end &112
9280sat 32
9281eat 2
9282stc 0
9283st 0
9284sf 1
9285si 0
9286tg (WTG
9287uid 3458,0
9288ps "ConnStartEndStrategy"
9289stg "STSignalDisplayStrategy"
9290f (Text
9291uid 3459,0
9292va (VaSet
9293isHidden 1
9294)
9295xt "23000,115000,27400,116000"
9296st "D3_SRCLK"
9297blo "23000,115800"
9298tm "WireNameMgr"
9299)
9300)
9301on &119
9302)
9303*303 (Wire
9304uid 3574,0
9305shape (OrthoPolyLine
9306uid 3575,0
9307va (VaSet
9308vasetType 3
9309)
9310xt "108000,89000,111000,89000"
9311pts [
9312"111000,89000"
9313"108000,89000"
9314]
9315)
9316start &137
9317end &133
9318sat 32
9319eat 2
9320stc 0
9321st 0
9322sf 1
9323si 0
9324tg (WTG
9325uid 3578,0
9326ps "ConnStartEndStrategy"
9327stg "STSignalDisplayStrategy"
9328f (Text
9329uid 3579,0
9330va (VaSet
9331isHidden 1
9332)
9333xt "108000,88000,110800,89000"
9334st "T0_CS"
9335blo "108000,88800"
9336tm "WireNameMgr"
9337)
9338)
9339on &141
9340)
9341*304 (Wire
9342uid 3582,0
9343shape (OrthoPolyLine
9344uid 3583,0
9345va (VaSet
9346vasetType 3
9347)
9348xt "108000,90000,111000,90000"
9349pts [
9350"111000,90000"
9351"108000,90000"
9352]
9353)
9354start &138
9355end &133
9356sat 32
9357eat 2
9358stc 0
9359st 0
9360sf 1
9361si 0
9362tg (WTG
9363uid 3586,0
9364ps "ConnStartEndStrategy"
9365stg "STSignalDisplayStrategy"
9366f (Text
9367uid 3587,0
9368va (VaSet
9369isHidden 1
9370)
9371xt "108000,89000,110800,90000"
9372st "T1_CS"
9373blo "108000,89800"
9374tm "WireNameMgr"
9375)
9376)
9377on &142
9378)
9379*305 (Wire
9380uid 3590,0
9381shape (OrthoPolyLine
9382uid 3591,0
9383va (VaSet
9384vasetType 3
9385)
9386xt "108000,91000,111000,91000"
9387pts [
9388"111000,91000"
9389"108000,91000"
9390]
9391)
9392start &139
9393end &133
9394sat 32
9395eat 2
9396stc 0
9397st 0
9398sf 1
9399si 0
9400tg (WTG
9401uid 3594,0
9402ps "ConnStartEndStrategy"
9403stg "STSignalDisplayStrategy"
9404f (Text
9405uid 3595,0
9406va (VaSet
9407isHidden 1
9408)
9409xt "108000,90000,110800,91000"
9410st "T2_CS"
9411blo "108000,90800"
9412tm "WireNameMgr"
9413)
9414)
9415on &143
9416)
9417*306 (Wire
9418uid 3598,0
9419shape (OrthoPolyLine
9420uid 3599,0
9421va (VaSet
9422vasetType 3
9423)
9424xt "108000,92000,111000,92000"
9425pts [
9426"111000,92000"
9427"108000,92000"
9428]
9429)
9430start &140
9431end &133
9432sat 32
9433eat 2
9434stc 0
9435st 0
9436sf 1
9437si 0
9438tg (WTG
9439uid 3602,0
9440ps "ConnStartEndStrategy"
9441stg "STSignalDisplayStrategy"
9442f (Text
9443uid 3603,0
9444va (VaSet
9445isHidden 1
9446)
9447xt "108000,91000,110800,92000"
9448st "T3_CS"
9449blo "108000,91800"
9450tm "WireNameMgr"
9451)
9452)
9453on &144
9454)
9455*307 (Wire
9456uid 3682,0
9457shape (OrthoPolyLine
9458uid 3683,0
9459va (VaSet
9460vasetType 3
9461)
9462xt "80750,100000,111000,100000"
9463pts [
9464"80750,100000"
9465"111000,100000"
9466]
9467)
9468start &42
9469end &156
9470sat 32
9471eat 32
9472stc 0
9473st 0
9474sf 1
9475si 0
9476tg (WTG
9477uid 3686,0
9478ps "ConnStartEndStrategy"
9479stg "STSignalDisplayStrategy"
9480f (Text
9481uid 3687,0
9482va (VaSet
9483isHidden 1
9484)
9485xt "82000,99000,84400,100000"
9486st "MOSI"
9487blo "82000,99800"
9488tm "WireNameMgr"
9489)
9490)
9491on &155
9492)
9493*308 (Wire
9494uid 3778,0
9495shape (OrthoPolyLine
9496uid 3779,0
9497va (VaSet
9498vasetType 3
9499)
9500xt "108000,103000,111000,103000"
9501pts [
9502"111000,103000"
9503"108000,103000"
9504]
9505)
9506start &162
9507end &158
9508sat 32
9509eat 2
9510stc 0
9511st 0
9512sf 1
9513si 0
9514tg (WTG
9515uid 3782,0
9516ps "ConnStartEndStrategy"
9517stg "STSignalDisplayStrategy"
9518f (Text
9519uid 3783,0
9520va (VaSet
9521isHidden 1
9522)
9523xt "108000,102000,111000,103000"
9524st "TRG_V"
9525blo "108000,102800"
9526tm "WireNameMgr"
9527)
9528)
9529on &169
9530)
9531*309 (Wire
9532uid 3786,0
9533shape (OrthoPolyLine
9534uid 3787,0
9535va (VaSet
9536vasetType 3
9537)
9538xt "108000,104000,111000,104000"
9539pts [
9540"111000,104000"
9541"108000,104000"
9542]
9543)
9544start &163
9545end &158
9546sat 32
9547eat 2
9548stc 0
9549st 0
9550sf 1
9551si 0
9552tg (WTG
9553uid 3790,0
9554ps "ConnStartEndStrategy"
9555stg "STSignalDisplayStrategy"
9556f (Text
9557uid 3791,0
9558va (VaSet
9559isHidden 1
9560)
9561xt "108000,103000,113600,104000"
9562st "RS485_C_RE"
9563blo "108000,103800"
9564tm "WireNameMgr"
9565)
9566)
9567on &170
9568)
9569*310 (Wire
9570uid 3794,0
9571shape (OrthoPolyLine
9572uid 3795,0
9573va (VaSet
9574vasetType 3
9575)
9576xt "108000,105000,111000,105000"
9577pts [
9578"111000,105000"
9579"108000,105000"
9580]
9581)
9582start &164
9583end &158
9584sat 32
9585eat 2
9586stc 0
9587st 0
9588sf 1
9589si 0
9590tg (WTG
9591uid 3798,0
9592ps "ConnStartEndStrategy"
9593stg "STSignalDisplayStrategy"
9594f (Text
9595uid 3799,0
9596va (VaSet
9597isHidden 1
9598)
9599xt "108000,104000,113600,105000"
9600st "RS485_C_DE"
9601blo "108000,104800"
9602tm "WireNameMgr"
9603)
9604)
9605on &171
9606)
9607*311 (Wire
9608uid 3802,0
9609shape (OrthoPolyLine
9610uid 3803,0
9611va (VaSet
9612vasetType 3
9613)
9614xt "108000,106000,111000,106000"
9615pts [
9616"111000,106000"
9617"108000,106000"
9618]
9619)
9620start &165
9621end &158
9622sat 32
9623eat 2
9624stc 0
9625st 0
9626sf 1
9627si 0
9628tg (WTG
9629uid 3806,0
9630ps "ConnStartEndStrategy"
9631stg "STSignalDisplayStrategy"
9632f (Text
9633uid 3807,0
9634va (VaSet
9635isHidden 1
9636)
9637xt "108000,105000,113500,106000"
9638st "RS485_E_RE"
9639blo "108000,105800"
9640tm "WireNameMgr"
9641)
9642)
9643on &172
9644)
9645*312 (Wire
9646uid 3810,0
9647shape (OrthoPolyLine
9648uid 3811,0
9649va (VaSet
9650vasetType 3
9651)
9652xt "108000,107000,111000,107000"
9653pts [
9654"111000,107000"
9655"108000,107000"
9656]
9657)
9658start &166
9659end &158
9660sat 32
9661eat 2
9662stc 0
9663st 0
9664sf 1
9665si 0
9666tg (WTG
9667uid 3814,0
9668ps "ConnStartEndStrategy"
9669stg "STSignalDisplayStrategy"
9670f (Text
9671uid 3815,0
9672va (VaSet
9673isHidden 1
9674)
9675xt "108000,106000,113500,107000"
9676st "RS485_E_DE"
9677blo "108000,106800"
9678tm "WireNameMgr"
9679)
9680)
9681on &173
9682)
9683*313 (Wire
9684uid 3834,0
9685shape (OrthoPolyLine
9686uid 3835,0
9687va (VaSet
9688vasetType 3
9689)
9690xt "108000,110000,111000,110000"
9691pts [
9692"111000,110000"
9693"108000,110000"
9694]
9695)
9696start &168
9697end &158
9698sat 32
9699eat 2
9700stc 0
9701st 0
9702sf 1
9703si 0
9704tg (WTG
9705uid 3838,0
9706ps "ConnStartEndStrategy"
9707stg "STSignalDisplayStrategy"
9708f (Text
9709uid 3839,0
9710va (VaSet
9711isHidden 1
9712)
9713xt "108000,109000,110900,110000"
9714st "EE_CS"
9715blo "108000,109800"
9716tm "WireNameMgr"
9717)
9718)
9719on &175
9720)
9721*314 (Wire
9722uid 4942,0
9723shape (OrthoPolyLine
9724uid 4943,0
9725va (VaSet
9726vasetType 3
9727lineWidth 2
9728)
9729xt "80750,120000,111000,120000"
9730pts [
9731"80750,120000"
9732"111000,120000"
9733]
9734)
9735start &14
9736end &180
9737sat 32
9738eat 32
9739sty 1
9740stc 0
9741st 0
9742sf 1
9743si 0
9744tg (WTG
9745uid 4948,0
9746ps "ConnStartEndStrategy"
9747stg "STSignalDisplayStrategy"
9748f (Text
9749uid 4949,0
9750va (VaSet
9751isHidden 1
9752)
9753xt "82750,117000,84650,118000"
9754st "D_T"
9755blo "82750,117800"
9756tm "WireNameMgr"
9757)
9758)
9759on &181
9760)
9761*315 (Wire
9762uid 6431,0
9763shape (OrthoPolyLine
9764uid 6432,0
9765va (VaSet
9766vasetType 3
9767)
9768xt "80750,121000,111000,121000"
9769pts [
9770"80750,121000"
9771"111000,121000"
9772]
9773)
9774start &43
9775end &167
9776sat 32
9777eat 32
9778stc 0
9779st 0
9780sf 1
9781si 0
9782tg (WTG
9783uid 6435,0
9784ps "ConnStartEndStrategy"
9785stg "STSignalDisplayStrategy"
9786f (Text
9787uid 6436,0
9788va (VaSet
9789isHidden 1
9790)
9791xt "92000,120000,96000,121000"
9792st "DENABLE"
9793blo "92000,120800"
9794tm "WireNameMgr"
9795)
9796)
9797on &174
9798)
9799*316 (Wire
9800uid 6787,0
9801shape (OrthoPolyLine
9802uid 6788,0
9803va (VaSet
9804vasetType 3
9805lineWidth 2
9806)
9807xt "59000,157000,65000,157000"
9808pts [
9809"59000,157000"
9810"65000,157000"
9811]
9812)
9813start &182
9814end &186
9815sat 32
9816eat 1
9817sty 1
9818st 0
9819sf 1
9820si 0
9821tg (WTG
9822uid 6791,0
9823ps "ConnStartEndStrategy"
9824stg "STSignalDisplayStrategy"
9825f (Text
9826uid 6792,0
9827va (VaSet
9828isHidden 1
9829)
9830xt "61000,156000,67800,157000"
9831st "D_PLLLCK : (3:0)"
9832blo "61000,156800"
9833tm "WireNameMgr"
9834)
9835)
9836on &183
9837)
9838*317 (Wire
9839uid 6880,0
9840shape (OrthoPolyLine
9841uid 6881,0
9842va (VaSet
9843vasetType 3
9844lineWidth 2
9845)
9846xt "68000,157000,75000,157000"
9847pts [
9848"68000,157000"
9849"75000,157000"
9850]
9851)
9852start &186
9853end &184
9854sat 2
9855eat 32
9856sty 1
9857st 0
9858sf 1
9859si 0
9860tg (WTG
9861uid 6884,0
9862ps "ConnStartEndStrategy"
9863stg "STSignalDisplayStrategy"
9864f (Text
9865uid 6885,0
9866va (VaSet
9867isHidden 1
9868)
9869xt "70000,156000,74900,157000"
9870st "D_T2 : (3:0)"
9871blo "70000,156800"
9872tm "WireNameMgr"
9873)
9874)
9875on &185
9876)
9877*318 (Wire
9878uid 7144,0
9879shape (OrthoPolyLine
9880uid 7145,0
9881va (VaSet
9882vasetType 3
9883lineWidth 2
9884)
9885xt "122000,126000,132000,126000"
9886pts [
9887"122000,126000"
9888"132000,126000"
9889]
9890)
9891end &194
9892sat 16
9893eat 32
9894sty 1
9895st 0
9896sf 1
9897si 0
9898tg (WTG
9899uid 7148,0
9900ps "ConnStartEndStrategy"
9901stg "STSignalDisplayStrategy"
9902f (Text
9903uid 7149,0
9904va (VaSet
9905isHidden 1
9906)
9907xt "124000,125000,128800,126000"
9908st "A1_T : (7:0)"
9909blo "124000,125800"
9910tm "WireNameMgr"
9911)
9912)
9913on &195
9914)
9915*319 (Wire
9916uid 7477,0
9917shape (OrthoPolyLine
9918uid 7478,0
9919va (VaSet
9920vasetType 3
9921)
9922xt "80750,87000,91000,87000"
9923pts [
9924"80750,87000"
9925"91000,87000"
9926]
9927)
9928start &38
9929end &198
9930es 0
9931sat 32
9932eat 32
9933st 0
9934sf 1
9935si 0
9936tg (WTG
9937uid 7483,0
9938ps "ConnStartEndStrategy"
9939stg "STSignalDisplayStrategy"
9940f (Text
9941uid 7484,0
9942va (VaSet
9943)
9944xt "83000,86000,85700,87000"
9945st "dummy"
9946blo "83000,86800"
9947tm "WireNameMgr"
9948)
9949)
9950on &196
9951)
9952*320 (Wire
9953uid 8853,0
9954shape (OrthoPolyLine
9955uid 8854,0
9956va (VaSet
9957vasetType 3
9958lineWidth 2
9959)
9960xt "18000,109000,51250,124000"
9961pts [
9962"51250,109000"
9963"18000,109000"
9964"18000,124000"
9965"21000,124000"
9966]
9967)
9968start &30
9969end &190
9970sat 32
9971eat 1
9972sty 1
9973st 0
9974sf 1
9975si 0
9976tg (WTG
9977uid 8857,0
9978ps "ConnStartEndStrategy"
9979stg "STSignalDisplayStrategy"
9980f (Text
9981uid 8858,0
9982va (VaSet
9983)
9984xt "42000,108000,50500,109000"
9985st "drs_channel_id : (3:0)"
9986blo "42000,108800"
9987tm "WireNameMgr"
9988)
9989)
9990on &210
9991)
9992*321 (Wire
9993uid 9502,0
9994shape (OrthoPolyLine
9995uid 9503,0
9996va (VaSet
9997vasetType 3
9998)
9999xt "46000,69000,51250,69000"
10000pts [
10001"51250,69000"
10002"46000,69000"
10003]
10004)
10005start &26
10006sat 32
10007eat 16
10008st 0
10009sf 1
10010si 0
10011tg (WTG
10012uid 9506,0
10013ps "ConnStartEndStrategy"
10014stg "STSignalDisplayStrategy"
10015f (Text
10016uid 9507,0
10017va (VaSet
10018)
10019xt "47000,68000,50100,69000"
10020st "CLK_50"
10021blo "47000,68800"
10022tm "WireNameMgr"
10023)
10024)
10025on &211
10026)
10027*322 (Wire
10028uid 10034,0
10029shape (OrthoPolyLine
10030uid 10035,0
10031va (VaSet
10032vasetType 3
10033)
10034xt "49000,70000,51250,71000"
10035pts [
10036"51250,70000"
10037"49000,70000"
10038"49000,71000"
10039]
10040)
10041start &25
10042end &218
10043sat 32
10044eat 32
10045st 0
10046sf 1
10047si 0
10048tg (WTG
10049uid 10036,0
10050ps "ConnStartEndStrategy"
10051stg "STSignalDisplayStrategy"
10052f (Text
10053uid 10037,0
10054va (VaSet
10055isHidden 1
10056)
10057xt "45250,69000,50550,70000"
10058st "CLK_25_PS1"
10059blo "45250,69800"
10060tm "WireNameMgr"
10061)
10062)
10063on &230
10064)
10065*323 (Wire
10066uid 10052,0
10067shape (OrthoPolyLine
10068uid 10053,0
10069va (VaSet
10070vasetType 3
10071)
10072xt "49000,73000,51250,73000"
10073pts [
10074"51250,73000"
10075"49000,73000"
10076]
10077)
10078start &44
10079end &216
10080sat 32
10081eat 32
10082st 0
10083sf 1
10084si 0
10085tg (WTG
10086uid 10054,0
10087ps "ConnStartEndStrategy"
10088stg "STSignalDisplayStrategy"
10089f (Text
10090uid 10055,0
10091va (VaSet
10092isHidden 1
10093)
10094xt "47000,72000,51500,73000"
10095st "adc_clk_en"
10096blo "47000,72800"
10097tm "WireNameMgr"
10098)
10099)
10100on &231
10101)
10102*324 (Wire
10103uid 10302,0
10104shape (OrthoPolyLine
10105uid 10303,0
10106va (VaSet
10107vasetType 3
10108lineWidth 2
10109)
10110xt "122000,128000,132000,128000"
10111pts [
10112"122000,128000"
10113"132000,128000"
10114]
10115)
10116end &232
10117sat 16
10118eat 32
10119sty 1
10120st 0
10121sf 1
10122si 0
10123tg (WTG
10124uid 10306,0
10125ps "ConnStartEndStrategy"
10126stg "STSignalDisplayStrategy"
10127f (Text
10128uid 10307,0
10129va (VaSet
10130isHidden 1
10131)
10132xt "124000,127000,128800,128000"
10133st "A0_T : (7:0)"
10134blo "124000,127800"
10135tm "WireNameMgr"
10136)
10137)
10138on &233
10139)
10140*325 (Wire
10141uid 10452,0
10142shape (OrthoPolyLine
10143uid 10453,0
10144va (VaSet
10145vasetType 3
10146lineWidth 2
10147)
10148xt "112000,126000,122000,126000"
10149pts [
10150"112000,126000"
10151"122000,126000"
10152]
10153)
10154start &234
10155sat 2
10156eat 16
10157sty 1
10158st 0
10159sf 1
10160si 0
10161tg (WTG
10162uid 10458,0
10163ps "ConnStartEndStrategy"
10164stg "STSignalDisplayStrategy"
10165f (Text
10166uid 10459,0
10167va (VaSet
10168)
10169xt "114000,125000,118800,126000"
10170st "A0_T : (7:0)"
10171blo "114000,125800"
10172tm "WireNameMgr"
10173)
10174)
10175on &233
10176)
10177*326 (Wire
10178uid 10460,0
10179shape (OrthoPolyLine
10180uid 10461,0
10181va (VaSet
10182vasetType 3
10183lineWidth 2
10184)
10185xt "112000,127000,122000,127000"
10186pts [
10187"112000,127000"
10188"122000,127000"
10189]
10190)
10191start &234
10192sat 2
10193eat 16
10194sty 1
10195st 0
10196sf 1
10197si 0
10198tg (WTG
10199uid 10466,0
10200ps "ConnStartEndStrategy"
10201stg "STSignalDisplayStrategy"
10202f (Text
10203uid 10467,0
10204va (VaSet
10205)
10206xt "114000,126000,118800,127000"
10207st "A1_T : (7:0)"
10208blo "114000,126800"
10209tm "WireNameMgr"
10210)
10211)
10212on &195
10213)
10214*327 (Wire
10215uid 10498,0
10216shape (OrthoPolyLine
10217uid 10499,0
10218va (VaSet
10219vasetType 3
10220)
10221xt "80750,123000,88000,123000"
10222pts [
10223"80750,123000"
10224"88000,123000"
10225]
10226)
10227start &58
10228sat 32
10229eat 16
10230st 0
10231sf 1
10232si 0
10233tg (WTG
10234uid 10502,0
10235ps "ConnStartEndStrategy"
10236stg "STSignalDisplayStrategy"
10237f (Text
10238uid 10503,0
10239va (VaSet
10240)
10241xt "82000,122000,86800,123000"
10242st "CLK50_OUT"
10243blo "82000,122800"
10244tm "WireNameMgr"
10245)
10246)
10247on &238
10248)
10249*328 (Wire
10250uid 10506,0
10251shape (OrthoPolyLine
10252uid 10507,0
10253va (VaSet
10254vasetType 3
10255)
10256xt "80750,124000,88000,124000"
10257pts [
10258"80750,124000"
10259"88000,124000"
10260]
10261)
10262start &56
10263sat 32
10264eat 16
10265st 0
10266sf 1
10267si 0
10268tg (WTG
10269uid 10510,0
10270ps "ConnStartEndStrategy"
10271stg "STSignalDisplayStrategy"
10272f (Text
10273uid 10511,0
10274va (VaSet
10275)
10276xt "82000,123000,86800,124000"
10277st "CLK25_OUT"
10278blo "82000,123800"
10279tm "WireNameMgr"
10280)
10281)
10282on &239
10283)
10284*329 (Wire
10285uid 10514,0
10286shape (OrthoPolyLine
10287uid 10515,0
10288va (VaSet
10289vasetType 3
10290)
10291xt "80750,125000,89000,125000"
10292pts [
10293"80750,125000"
10294"89000,125000"
10295]
10296)
10297start &57
10298sat 32
10299eat 16
10300st 0
10301sf 1
10302si 0
10303tg (WTG
10304uid 10518,0
10305ps "ConnStartEndStrategy"
10306stg "STSignalDisplayStrategy"
10307f (Text
10308uid 10519,0
10309va (VaSet
10310)
10311xt "82000,124000,88200,125000"
10312st "CLK25_PSOUT"
10313blo "82000,124800"
10314tm "WireNameMgr"
10315)
10316)
10317on &240
10318)
10319*330 (Wire
10320uid 10522,0
10321shape (OrthoPolyLine
10322uid 10523,0
10323va (VaSet
10324vasetType 3
10325)
10326xt "80750,126000,87000,126000"
10327pts [
10328"80750,126000"
10329"87000,126000"
10330]
10331)
10332start &48
10333sat 32
10334eat 16
10335st 0
10336sf 1
10337si 0
10338tg (WTG
10339uid 10526,0
10340ps "ConnStartEndStrategy"
10341stg "STSignalDisplayStrategy"
10342f (Text
10343uid 10527,0
10344va (VaSet
10345)
10346xt "82000,125000,86400,126000"
10347st "PS_DIR_IN"
10348blo "82000,125800"
10349tm "WireNameMgr"
10350)
10351)
10352on &241
10353)
10354*331 (Wire
10355uid 10530,0
10356shape (OrthoPolyLine
10357uid 10531,0
10358va (VaSet
10359vasetType 3
10360)
10361xt "80750,127000,87000,127000"
10362pts [
10363"80750,127000"
10364"87000,127000"
10365]
10366)
10367start &49
10368sat 32
10369eat 16
10370st 0
10371sf 1
10372si 0
10373tg (WTG
10374uid 10534,0
10375ps "ConnStartEndStrategy"
10376stg "STSignalDisplayStrategy"
10377f (Text
10378uid 10535,0
10379va (VaSet
10380)
10381xt "82000,126000,86200,127000"
10382st "PS_DO_IN"
10383blo "82000,126800"
10384tm "WireNameMgr"
10385)
10386)
10387on &242
10388)
10389*332 (Wire
10390uid 10538,0
10391shape (OrthoPolyLine
10392uid 10539,0
10393va (VaSet
10394vasetType 3
10395)
10396xt "80750,129000,88000,129000"
10397pts [
10398"80750,129000"
10399"88000,129000"
10400]
10401)
10402start &52
10403sat 32
10404eat 16
10405st 0
10406sf 1
10407si 0
10408tg (WTG
10409uid 10542,0
10410ps "ConnStartEndStrategy"
10411stg "STSignalDisplayStrategy"
10412f (Text
10413uid 10543,0
10414va (VaSet
10415)
10416xt "82000,128000,86600,129000"
10417st "PSEN_OUT"
10418blo "82000,128800"
10419tm "WireNameMgr"
10420)
10421)
10422on &243
10423)
10424*333 (Wire
10425uid 10546,0
10426shape (OrthoPolyLine
10427uid 10547,0
10428va (VaSet
10429vasetType 3
10430)
10431xt "80750,128000,90000,128000"
10432pts [
10433"80750,128000"
10434"90000,128000"
10435]
10436)
10437start &53
10438sat 32
10439eat 16
10440st 0
10441sf 1
10442si 0
10443tg (WTG
10444uid 10550,0
10445ps "ConnStartEndStrategy"
10446stg "STSignalDisplayStrategy"
10447f (Text
10448uid 10551,0
10449va (VaSet
10450)
10451xt "82000,127000,89000,128000"
10452st "PSINCDEC_OUT"
10453blo "82000,127800"
10454tm "WireNameMgr"
10455)
10456)
10457on &244
10458)
10459*334 (Wire
10460uid 10554,0
10461shape (OrthoPolyLine
10462uid 10555,0
10463va (VaSet
10464vasetType 3
10465)
10466xt "80750,130000,88000,130000"
10467pts [
10468"80750,130000"
10469"88000,130000"
10470]
10471)
10472start &45
10473sat 32
10474eat 16
10475st 0
10476sf 1
10477si 0
10478tg (WTG
10479uid 10558,0
10480ps "ConnStartEndStrategy"
10481stg "STSignalDisplayStrategy"
10482f (Text
10483uid 10559,0
10484va (VaSet
10485)
10486xt "82000,129000,87200,130000"
10487st "DCM_locked"
10488blo "82000,129800"
10489tm "WireNameMgr"
10490)
10491)
10492on &245
10493)
10494*335 (Wire
10495uid 10562,0
10496shape (OrthoPolyLine
10497uid 10563,0
10498va (VaSet
10499vasetType 3
10500)
10501xt "80750,132000,85000,132000"
10502pts [
10503"80750,132000"
10504"85000,132000"
10505]
10506)
10507start &54
10508sat 32
10509eat 16
10510st 0
10511sf 1
10512si 0
10513tg (WTG
10514uid 10566,0
10515ps "ConnStartEndStrategy"
10516stg "STSignalDisplayStrategy"
10517f (Text
10518uid 10567,0
10519va (VaSet
10520)
10521xt "82000,131000,84200,132000"
10522st "ready"
10523blo "82000,131800"
10524tm "WireNameMgr"
10525)
10526)
10527on &246
10528)
10529*336 (Wire
10530uid 10570,0
10531shape (OrthoPolyLine
10532uid 10571,0
10533va (VaSet
10534vasetType 3
10535)
10536xt "80750,133000,86000,133000"
10537pts [
10538"80750,133000"
10539"86000,133000"
10540]
10541)
10542start &55
10543sat 32
10544eat 16
10545st 0
10546sf 1
10547si 0
10548tg (WTG
10549uid 10574,0
10550ps "ConnStartEndStrategy"
10551stg "STSignalDisplayStrategy"
10552f (Text
10553uid 10575,0
10554va (VaSet
10555)
10556xt "82000,132000,84900,133000"
10557st "shifting"
10558blo "82000,132800"
10559tm "WireNameMgr"
10560)
10561)
10562on &247
10563)
10564*337 (Wire
10565uid 10578,0
10566shape (OrthoPolyLine
10567uid 10579,0
10568va (VaSet
10569vasetType 3
10570)
10571xt "80750,134000,91000,134000"
10572pts [
10573"80750,134000"
10574"91000,134000"
10575]
10576)
10577start &51
10578sat 32
10579eat 16
10580st 0
10581sf 1
10582si 0
10583tg (WTG
10584uid 10582,0
10585ps "ConnStartEndStrategy"
10586stg "STSignalDisplayStrategy"
10587f (Text
10588uid 10583,0
10589va (VaSet
10590)
10591xt "82000,133000,89800,134000"
10592st "PSDONE_extraOUT"
10593blo "82000,133800"
10594tm "WireNameMgr"
10595)
10596)
10597on &248
10598)
10599*338 (Wire
10600uid 10586,0
10601shape (OrthoPolyLine
10602uid 10587,0
10603va (VaSet
10604vasetType 3
10605)
10606xt "80750,135000,88000,135000"
10607pts [
10608"80750,135000"
10609"88000,135000"
10610]
10611)
10612start &50
10613sat 32
10614eat 16
10615st 0
10616sf 1
10617si 0
10618tg (WTG
10619uid 10590,0
10620ps "ConnStartEndStrategy"
10621stg "STSignalDisplayStrategy"
10622f (Text
10623uid 10591,0
10624va (VaSet
10625)
10626xt "82000,134000,87000,135000"
10627st "PSCLK_OUT"
10628blo "82000,134800"
10629tm "WireNameMgr"
10630)
10631)
10632on &249
10633)
10634*339 (Wire
10635uid 10594,0
10636shape (OrthoPolyLine
10637uid 10595,0
10638va (VaSet
10639vasetType 3
10640)
10641xt "80750,136000,91000,136000"
10642pts [
10643"80750,136000"
10644"91000,136000"
10645]
10646)
10647start &46
10648sat 32
10649eat 16
10650st 0
10651sf 1
10652si 0
10653tg (WTG
10654uid 10598,0
10655ps "ConnStartEndStrategy"
10656stg "STSignalDisplayStrategy"
10657f (Text
10658uid 10599,0
10659va (VaSet
10660)
10661xt "82000,135000,89700,136000"
10662st "LOCKED_extraOUT"
10663blo "82000,135800"
10664tm "WireNameMgr"
10665)
10666)
10667on &250
10668)
10669*340 (Wire
10670uid 10600,0
10671shape (OrthoPolyLine
10672uid 10601,0
10673va (VaSet
10674vasetType 3
10675)
10676xt "96000,123000,106000,123000"
10677pts [
10678"96000,123000"
10679"106000,123000"
10680]
10681)
10682end &234
10683sat 16
10684eat 1
10685st 0
10686sf 1
10687si 0
10688tg (WTG
10689uid 10606,0
10690ps "ConnStartEndStrategy"
10691stg "STSignalDisplayStrategy"
10692f (Text
10693uid 10607,0
10694va (VaSet
10695)
10696xt "98000,122000,102800,123000"
10697st "CLK25_OUT"
10698blo "98000,122800"
10699tm "WireNameMgr"
10700)
10701)
10702on &239
10703)
10704*341 (Wire
10705uid 10608,0
10706shape (OrthoPolyLine
10707uid 10609,0
10708va (VaSet
10709vasetType 3
10710)
10711xt "96000,124000,106000,124000"
10712pts [
10713"96000,124000"
10714"106000,124000"
10715]
10716)
10717end &234
10718sat 16
10719eat 1
10720st 0
10721sf 1
10722si 0
10723tg (WTG
10724uid 10614,0
10725ps "ConnStartEndStrategy"
10726stg "STSignalDisplayStrategy"
10727f (Text
10728uid 10615,0
10729va (VaSet
10730)
10731xt "98000,123000,104200,124000"
10732st "CLK25_PSOUT"
10733blo "98000,123800"
10734tm "WireNameMgr"
10735)
10736)
10737on &240
10738)
10739*342 (Wire
10740uid 10616,0
10741shape (OrthoPolyLine
10742uid 10617,0
10743va (VaSet
10744vasetType 3
10745)
10746xt "96000,125000,106000,125000"
10747pts [
10748"96000,125000"
10749"106000,125000"
10750]
10751)
10752end &234
10753sat 16
10754eat 1
10755st 0
10756sf 1
10757si 0
10758tg (WTG
10759uid 10622,0
10760ps "ConnStartEndStrategy"
10761stg "STSignalDisplayStrategy"
10762f (Text
10763uid 10623,0
10764va (VaSet
10765)
10766xt "98000,124000,102800,125000"
10767st "CLK50_OUT"
10768blo "98000,124800"
10769tm "WireNameMgr"
10770)
10771)
10772on &238
10773)
10774*343 (Wire
10775uid 10624,0
10776shape (OrthoPolyLine
10777uid 10625,0
10778va (VaSet
10779vasetType 3
10780)
10781xt "96000,126000,106000,126000"
10782pts [
10783"96000,126000"
10784"106000,126000"
10785]
10786)
10787end &234
10788sat 16
10789eat 1
10790st 0
10791sf 1
10792si 0
10793tg (WTG
10794uid 10630,0
10795ps "ConnStartEndStrategy"
10796stg "STSignalDisplayStrategy"
10797f (Text
10798uid 10631,0
10799va (VaSet
10800)
10801xt "98000,125000,103200,126000"
10802st "DCM_locked"
10803blo "98000,125800"
10804tm "WireNameMgr"
10805)
10806)
10807on &245
10808)
10809*344 (Wire
10810uid 10632,0
10811shape (OrthoPolyLine
10812uid 10633,0
10813va (VaSet
10814vasetType 3
10815)
10816xt "96000,127000,106000,127000"
10817pts [
10818"96000,127000"
10819"106000,127000"
10820]
10821)
10822end &234
10823sat 16
10824eat 1
10825st 0
10826sf 1
10827si 0
10828tg (WTG
10829uid 10638,0
10830ps "ConnStartEndStrategy"
10831stg "STSignalDisplayStrategy"
10832f (Text
10833uid 10639,0
10834va (VaSet
10835)
10836xt "98000,126000,105700,127000"
10837st "LOCKED_extraOUT"
10838blo "98000,126800"
10839tm "WireNameMgr"
10840)
10841)
10842on &250
10843)
10844*345 (Wire
10845uid 10640,0
10846shape (OrthoPolyLine
10847uid 10641,0
10848va (VaSet
10849vasetType 3
10850)
10851xt "96000,128000,106000,128000"
10852pts [
10853"96000,128000"
10854"106000,128000"
10855]
10856)
10857end &234
10858sat 16
10859eat 1
10860st 0
10861sf 1
10862si 0
10863tg (WTG
10864uid 10646,0
10865ps "ConnStartEndStrategy"
10866stg "STSignalDisplayStrategy"
10867f (Text
10868uid 10647,0
10869va (VaSet
10870)
10871xt "98000,127000,103000,128000"
10872st "PSCLK_OUT"
10873blo "98000,127800"
10874tm "WireNameMgr"
10875)
10876)
10877on &249
10878)
10879*346 (Wire
10880uid 10648,0
10881shape (OrthoPolyLine
10882uid 10649,0
10883va (VaSet
10884vasetType 3
10885)
10886xt "96000,129000,106000,129000"
10887pts [
10888"96000,129000"
10889"106000,129000"
10890]
10891)
10892end &234
10893sat 16
10894eat 1
10895st 0
10896sf 1
10897si 0
10898tg (WTG
10899uid 10654,0
10900ps "ConnStartEndStrategy"
10901stg "STSignalDisplayStrategy"
10902f (Text
10903uid 10655,0
10904va (VaSet
10905)
10906xt "98000,128000,105800,129000"
10907st "PSDONE_extraOUT"
10908blo "98000,128800"
10909tm "WireNameMgr"
10910)
10911)
10912on &248
10913)
10914*347 (Wire
10915uid 10656,0
10916shape (OrthoPolyLine
10917uid 10657,0
10918va (VaSet
10919vasetType 3
10920)
10921xt "96000,130000,106000,130000"
10922pts [
10923"96000,130000"
10924"106000,130000"
10925]
10926)
10927end &234
10928sat 16
10929eat 1
10930st 0
10931sf 1
10932si 0
10933tg (WTG
10934uid 10662,0
10935ps "ConnStartEndStrategy"
10936stg "STSignalDisplayStrategy"
10937f (Text
10938uid 10663,0
10939va (VaSet
10940)
10941xt "98000,129000,102600,130000"
10942st "PSEN_OUT"
10943blo "98000,129800"
10944tm "WireNameMgr"
10945)
10946)
10947on &243
10948)
10949*348 (Wire
10950uid 10664,0
10951shape (OrthoPolyLine
10952uid 10665,0
10953va (VaSet
10954vasetType 3
10955)
10956xt "96000,131000,106000,131000"
10957pts [
10958"96000,131000"
10959"106000,131000"
10960]
10961)
10962end &234
10963sat 16
10964eat 1
10965st 0
10966sf 1
10967si 0
10968tg (WTG
10969uid 10670,0
10970ps "ConnStartEndStrategy"
10971stg "STSignalDisplayStrategy"
10972f (Text
10973uid 10671,0
10974va (VaSet
10975)
10976xt "98000,130000,105000,131000"
10977st "PSINCDEC_OUT"
10978blo "98000,130800"
10979tm "WireNameMgr"
10980)
10981)
10982on &244
10983)
10984*349 (Wire
10985uid 10672,0
10986shape (OrthoPolyLine
10987uid 10673,0
10988va (VaSet
10989vasetType 3
10990)
10991xt "96000,132000,106000,132000"
10992pts [
10993"96000,132000"
10994"106000,132000"
10995]
10996)
10997end &234
10998sat 16
10999eat 1
11000st 0
11001sf 1
11002si 0
11003tg (WTG
11004uid 10678,0
11005ps "ConnStartEndStrategy"
11006stg "STSignalDisplayStrategy"
11007f (Text
11008uid 10679,0
11009va (VaSet
11010)
11011xt "98000,131000,102400,132000"
11012st "PS_DIR_IN"
11013blo "98000,131800"
11014tm "WireNameMgr"
11015)
11016)
11017on &241
11018)
11019*350 (Wire
11020uid 10680,0
11021shape (OrthoPolyLine
11022uid 10681,0
11023va (VaSet
11024vasetType 3
11025)
11026xt "96000,133000,106000,133000"
11027pts [
11028"96000,133000"
11029"106000,133000"
11030]
11031)
11032end &234
11033sat 16
11034eat 1
11035st 0
11036sf 1
11037si 0
11038tg (WTG
11039uid 10686,0
11040ps "ConnStartEndStrategy"
11041stg "STSignalDisplayStrategy"
11042f (Text
11043uid 10687,0
11044va (VaSet
11045)
11046xt "98000,132000,102200,133000"
11047st "PS_DO_IN"
11048blo "98000,132800"
11049tm "WireNameMgr"
11050)
11051)
11052on &242
11053)
11054*351 (Wire
11055uid 10688,0
11056shape (OrthoPolyLine
11057uid 10689,0
11058va (VaSet
11059vasetType 3
11060)
11061xt "96000,134000,106000,134000"
11062pts [
11063"96000,134000"
11064"106000,134000"
11065]
11066)
11067end &234
11068sat 16
11069eat 1
11070st 0
11071sf 1
11072si 0
11073tg (WTG
11074uid 10694,0
11075ps "ConnStartEndStrategy"
11076stg "STSignalDisplayStrategy"
11077f (Text
11078uid 10695,0
11079va (VaSet
11080)
11081xt "98000,133000,100200,134000"
11082st "ready"
11083blo "98000,133800"
11084tm "WireNameMgr"
11085)
11086)
11087on &246
11088)
11089*352 (Wire
11090uid 10696,0
11091shape (OrthoPolyLine
11092uid 10697,0
11093va (VaSet
11094vasetType 3
11095)
11096xt "96000,135000,106000,135000"
11097pts [
11098"96000,135000"
11099"106000,135000"
11100]
11101)
11102end &234
11103sat 16
11104eat 1
11105st 0
11106sf 1
11107si 0
11108tg (WTG
11109uid 10702,0
11110ps "ConnStartEndStrategy"
11111stg "STSignalDisplayStrategy"
11112f (Text
11113uid 10703,0
11114va (VaSet
11115)
11116xt "98000,134000,100900,135000"
11117st "shifting"
11118blo "98000,134800"
11119tm "WireNameMgr"
11120)
11121)
11122on &247
11123)
11124*353 (Wire
11125uid 11096,0
11126shape (OrthoPolyLine
11127uid 11097,0
11128va (VaSet
11129vasetType 3
11130)
11131xt "96000,103000,100000,103000"
11132pts [
11133"96000,103000"
11134"100000,103000"
11135]
11136)
11137start &251
11138end &158
11139sat 32
11140eat 1
11141st 0
11142sf 1
11143si 0
11144tg (WTG
11145uid 11100,0
11146ps "ConnStartEndStrategy"
11147stg "STSignalDisplayStrategy"
11148f (Text
11149uid 11101,0
11150va (VaSet
11151isHidden 1
11152)
11153xt "126000,96000,131300,97000"
11154st "RS485_C_DI"
11155blo "126000,96800"
11156tm "WireNameMgr"
11157)
11158)
11159on &252
11160)
11161*354 (Wire
11162uid 11110,0
11163shape (OrthoPolyLine
11164uid 11111,0
11165va (VaSet
11166vasetType 3
11167)
11168xt "108000,112000,111000,112000"
11169pts [
11170"108000,112000"
11171"111000,112000"
11172]
11173)
11174start &158
11175end &253
11176sat 2
11177eat 32
11178st 0
11179sf 1
11180si 0
11181tg (WTG
11182uid 11114,0
11183ps "ConnStartEndStrategy"
11184stg "STSignalDisplayStrategy"
11185f (Text
11186uid 11115,0
11187va (VaSet
11188isHidden 1
11189)
11190xt "110000,111000,115700,112000"
11191st "RS485_C_DO"
11192blo "110000,111800"
11193tm "WireNameMgr"
11194)
11195)
11196on &254
11197)
11198*355 (Wire
11199uid 11514,0
11200shape (OrthoPolyLine
11201uid 11515,0
11202va (VaSet
11203vasetType 3
11204)
11205xt "123000,116000,127000,116000"
11206pts [
11207"123000,116000"
11208"127000,116000"
11209]
11210)
11211start &255
11212sat 32
11213eat 16
11214st 0
11215sf 1
11216si 0
11217tg (WTG
11218uid 11518,0
11219ps "ConnStartEndStrategy"
11220stg "STSignalDisplayStrategy"
11221f (Text
11222uid 11519,0
11223va (VaSet
11224isHidden 1
11225)
11226xt "125000,115000,130200,116000"
11227st "RS485_E_DI"
11228blo "125000,115800"
11229tm "WireNameMgr"
11230)
11231)
11232on &256
11233)
11234*356 (Wire
11235uid 11528,0
11236shape (OrthoPolyLine
11237uid 11529,0
11238va (VaSet
11239vasetType 3
11240)
11241xt "123000,114000,126000,114000"
11242pts [
11243"123000,114000"
11244"126000,114000"
11245]
11246)
11247end &258
11248sat 16
11249eat 32
11250st 0
11251sf 1
11252si 0
11253tg (WTG
11254uid 11532,0
11255ps "ConnStartEndStrategy"
11256stg "STSignalDisplayStrategy"
11257f (Text
11258uid 11533,0
11259va (VaSet
11260isHidden 1
11261)
11262xt "125000,113000,130600,114000"
11263st "RS485_E_DO"
11264blo "125000,113800"
11265tm "WireNameMgr"
11266)
11267)
11268on &257
11269)
11270*357 (Wire
11271uid 12320,0
11272shape (OrthoPolyLine
11273uid 12321,0
11274va (VaSet
11275vasetType 3
11276)
11277xt "80750,140000,87000,140000"
11278pts [
11279"80750,140000"
11280"87000,140000"
11281]
11282)
11283start &59
11284end &259
11285sat 32
11286eat 32
11287stc 0
11288st 0
11289sf 1
11290si 0
11291tg (WTG
11292uid 12324,0
11293ps "ConnStartEndStrategy"
11294stg "STSignalDisplayStrategy"
11295f (Text
11296uid 12325,0
11297va (VaSet
11298isHidden 1
11299)
11300xt "82000,139000,84300,140000"
11301st "SRIN"
11302blo "82000,139800"
11303tm "WireNameMgr"
11304)
11305)
11306on &260
11307)
11308*358 (Wire
11309uid 12545,0
11310shape (OrthoPolyLine
11311uid 12546,0
11312va (VaSet
11313vasetType 3
11314)
11315xt "80750,141000,87000,141000"
11316pts [
11317"80750,141000"
11318"87000,141000"
11319]
11320)
11321start &60
11322end &261
11323ss 0
11324sat 32
11325eat 32
11326st 0
11327sf 1
11328si 0
11329tg (WTG
11330uid 12549,0
11331ps "ConnStartEndStrategy"
11332stg "STSignalDisplayStrategy"
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11399eat 32
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11401sf 1
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11420*361 (Wire
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12228eat 32
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12272blo "0,800"
12273tm "WireNameMgr"
12274)
12275)
12276)
12277defaultBundle (Bundle
12278shape (OrthoPolyLine
12279va (VaSet
12280vasetType 3
12281lineColor "32768,0,0"
12282lineWidth 2
12283)
12284pts [
12285"0,0"
12286"0,0"
12287]
12288)
12289ss 0
12290es 0
12291sat 32
12292eat 32
12293textGroup (BiTextGroup
12294ps "ConnStartEndStrategy"
12295stg "VerticalLayoutStrategy"
12296first (Text
12297va (VaSet
12298)
12299xt "0,0,3000,1000"
12300st "bundle0"
12301blo "0,800"
12302tm "BundleNameMgr"
12303)
12304second (MLText
12305va (VaSet
12306)
12307xt "0,1000,1000,2000"
12308st "()"
12309tm "BundleContentsMgr"
12310)
12311)
12312bundleNet &0
12313)
12314defaultPortMapFrame (PortMapFrame
12315ps "PortMapFrameStrategy"
12316shape (RectFrame
12317va (VaSet
12318vasetType 1
12319fg "65535,65535,65535"
12320lineColor "0,0,32768"
12321lineWidth 2
12322)
12323xt "0,0,10000,12000"
12324)
12325portMapText (BiTextGroup
12326ps "BottomRightOffsetStrategy"
12327stg "VerticalLayoutStrategy"
12328first (MLText
12329va (VaSet
12330)
12331)
12332second (MLText
12333va (VaSet
12334)
12335tm "PortMapTextMgr"
12336)
12337)
12338)
12339defaultGenFrame (Frame
12340shape (RectFrame
12341va (VaSet
12342vasetType 1
12343fg "65535,65535,65535"
12344lineColor "26368,26368,26368"
12345lineStyle 2
12346lineWidth 2
12347)
12348xt "0,0,20000,20000"
12349)
12350title (TextAssociate
12351ps "TopLeftStrategy"
12352text (MLText
12353va (VaSet
12354)
12355xt "0,-1100,12600,-100"
12356st "g0: FOR i IN 0 TO n GENERATE"
12357tm "FrameTitleTextMgr"
12358)
12359)
12360seqNum (FrameSequenceNumber
12361ps "TopLeftStrategy"
12362shape (Rectangle
12363va (VaSet
12364vasetType 1
12365fg "65535,65535,65535"
12366)
12367xt "50,50,1250,1450"
12368)
12369num (Text
12370va (VaSet
12371)
12372xt "250,250,1050,1250"
12373st "1"
12374blo "250,1050"
12375tm "FrameSeqNumMgr"
12376)
12377)
12378decls (MlTextGroup
12379ps "BottomRightOffsetStrategy"
12380stg "VerticalLayoutStrategy"
12381textVec [
12382*389 (Text
12383va (VaSet
12384font "Arial,8,1"
12385)
12386xt "14100,20000,22000,21000"
12387st "Frame Declarations"
12388blo "14100,20800"
12389)
12390*390 (MLText
12391va (VaSet
12392)
12393xt "14100,21000,14100,21000"
12394tm "BdFrameDeclTextMgr"
12395)
12396]
12397)
12398)
12399defaultBlockFrame (Frame
12400shape (RectFrame
12401va (VaSet
12402vasetType 1
12403fg "65535,65535,65535"
12404lineColor "26368,26368,26368"
12405lineStyle 1
12406lineWidth 2
12407)
12408xt "0,0,20000,20000"
12409)
12410title (TextAssociate
12411ps "TopLeftStrategy"
12412text (MLText
12413va (VaSet
12414)
12415xt "0,-1100,7400,-100"
12416st "b0: BLOCK (guard)"
12417tm "FrameTitleTextMgr"
12418)
12419)
12420seqNum (FrameSequenceNumber
12421ps "TopLeftStrategy"
12422shape (Rectangle
12423va (VaSet
12424vasetType 1
12425fg "65535,65535,65535"
12426)
12427xt "50,50,1250,1450"
12428)
12429num (Text
12430va (VaSet
12431)
12432xt "250,250,1050,1250"
12433st "1"
12434blo "250,1050"
12435tm "FrameSeqNumMgr"
12436)
12437)
12438decls (MlTextGroup
12439ps "BottomRightOffsetStrategy"
12440stg "VerticalLayoutStrategy"
12441textVec [
12442*391 (Text
12443va (VaSet
12444font "Arial,8,1"
12445)
12446xt "14100,20000,22000,21000"
12447st "Frame Declarations"
12448blo "14100,20800"
12449)
12450*392 (MLText
12451va (VaSet
12452)
12453xt "14100,21000,14100,21000"
12454tm "BdFrameDeclTextMgr"
12455)
12456]
12457)
12458style 3
12459)
12460defaultSaCptPort (CptPort
12461ps "OnEdgeStrategy"
12462shape (Triangle
12463ro 90
12464va (VaSet
12465vasetType 1
12466fg "0,65535,0"
12467)
12468xt "0,0,750,750"
12469)
12470tg (CPTG
12471ps "CptPortTextPlaceStrategy"
12472stg "VerticalLayoutStrategy"
12473f (Text
12474va (VaSet
12475)
12476xt "0,750,1800,1750"
12477st "Port"
12478blo "0,1550"
12479)
12480)
12481thePort (LogicalPort
12482decl (Decl
12483n "Port"
12484t ""
12485o 0
12486)
12487)
12488)
12489defaultSaCptPortBuffer (CptPort
12490ps "OnEdgeStrategy"
12491shape (Diamond
12492va (VaSet
12493vasetType 1
12494fg "65535,65535,65535"
12495)
12496xt "0,0,750,750"
12497)
12498tg (CPTG
12499ps "CptPortTextPlaceStrategy"
12500stg "VerticalLayoutStrategy"
12501f (Text
12502va (VaSet
12503)
12504xt "0,750,1800,1750"
12505st "Port"
12506blo "0,1550"
12507)
12508)
12509thePort (LogicalPort
12510m 3
12511decl (Decl
12512n "Port"
12513t ""
12514o 0
12515)
12516)
12517)
12518defaultDeclText (MLText
12519va (VaSet
12520font "Courier New,8,0"
12521)
12522)
12523archDeclarativeBlock (BdArchDeclBlock
12524uid 1,0
12525stg "BdArchDeclBlockLS"
12526declLabel (Text
12527uid 2,0
12528va (VaSet
12529font "Arial,8,1"
12530)
12531xt "37000,1800,42400,2800"
12532st "Declarations"
12533blo "37000,2600"
12534)
12535portLabel (Text
12536uid 3,0
12537va (VaSet
12538font "Arial,8,1"
12539)
12540xt "37000,2800,39700,3800"
12541st "Ports:"
12542blo "37000,3600"
12543)
12544preUserLabel (Text
12545uid 4,0
12546va (VaSet
12547isHidden 1
12548font "Arial,8,1"
12549)
12550xt "37000,1800,40800,2800"
12551st "Pre User:"
12552blo "37000,2600"
12553)
12554preUserText (MLText
12555uid 5,0
12556va (VaSet
12557isHidden 1
12558font "Courier New,8,0"
12559)
12560xt "37000,1800,37000,1800"
12561tm "BdDeclarativeTextMgr"
12562)
12563diagSignalLabel (Text
12564uid 6,0
12565va (VaSet
12566font "Arial,8,1"
12567)
12568xt "37000,47800,44100,48800"
12569st "Diagram Signals:"
12570blo "37000,48600"
12571)
12572postUserLabel (Text
12573uid 7,0
12574va (VaSet
12575isHidden 1
12576font "Arial,8,1"
12577)
12578xt "37000,1800,41700,2800"
12579st "Post User:"
12580blo "37000,2600"
12581)
12582postUserText (MLText
12583uid 8,0
12584va (VaSet
12585isHidden 1
12586font "Courier New,8,0"
12587)
12588xt "37000,1800,37000,1800"
12589tm "BdDeclarativeTextMgr"
12590)
12591)
12592commonDM (CommonDM
12593ldm (LogicalDM
12594suid 209,0
12595usingSuid 1
12596emptyRow *393 (LEmptyRow
12597)
12598uid 54,0
12599optionalChildren [
12600*394 (RefLabelRowHdr
12601)
12602*395 (TitleRowHdr
12603)
12604*396 (FilterRowHdr
12605)
12606*397 (RefLabelColHdr
12607tm "RefLabelColHdrMgr"
12608)
12609*398 (RowExpandColHdr
12610tm "RowExpandColHdrMgr"
12611)
12612*399 (GroupColHdr
12613tm "GroupColHdrMgr"
12614)
12615*400 (NameColHdr
12616tm "BlockDiagramNameColHdrMgr"
12617)
12618*401 (ModeColHdr
12619tm "BlockDiagramModeColHdrMgr"
12620)
12621*402 (TypeColHdr
12622tm "BlockDiagramTypeColHdrMgr"
12623)
12624*403 (BoundsColHdr
12625tm "BlockDiagramBoundsColHdrMgr"
12626)
12627*404 (InitColHdr
12628tm "BlockDiagramInitColHdrMgr"
12629)
12630*405 (EolColHdr
12631tm "BlockDiagramEolColHdrMgr"
12632)
12633*406 (LeafLogPort
12634port (LogicalPort
12635m 4
12636decl (Decl
12637n "board_id"
12638t "std_logic_vector"
12639b "(3 downto 0)"
12640preAdd 0
12641posAdd 0
12642o 73
12643suid 5,0
12644)
12645)
12646uid 327,0
12647)
12648*407 (LeafLogPort
12649port (LogicalPort
12650m 4
12651decl (Decl
12652n "crate_id"
12653t "std_logic_vector"
12654b "(1 downto 0)"
12655o 74
12656suid 6,0
12657)
12658)
12659uid 329,0
12660)
12661*408 (LeafLogPort
12662port (LogicalPort
12663m 4
12664decl (Decl
12665n "adc_data_array"
12666t "adc_data_array_type"
12667o 72
12668suid 29,0
12669)
12670)
12671uid 1491,0
12672)
12673*409 (LeafLogPort
12674port (LogicalPort
12675m 1
12676decl (Decl
12677n "RSRLOAD"
12678t "std_logic"
12679o 41
12680suid 57,0
12681i "'0'"
12682)
12683)
12684uid 2435,0
12685)
12686*410 (LeafLogPort
12687port (LogicalPort
12688m 4
12689decl (Decl
12690n "SRCLK"
12691t "std_logic"
12692o 70
12693suid 58,0
12694i "'0'"
12695)
12696)
12697uid 2437,0
12698)
12699*411 (LeafLogPort
12700port (LogicalPort
12701m 4
12702decl (Decl
12703n "sensor_cs"
12704t "std_logic_vector"
12705b "(3 DOWNTO 0)"
12706o 78
12707suid 65,0
12708)
12709)
12710uid 3037,0
12711)
12712*412 (LeafLogPort
12713port (LogicalPort
12714m 1
12715decl (Decl
12716n "DAC_CS"
12717t "std_logic"
12718o 24
12719suid 66,0
12720)
12721)
12722uid 3039,0
12723)
12724*413 (LeafLogPort
12725port (LogicalPort
12726decl (Decl
12727n "X_50M"
12728t "STD_LOGIC"
12729preAdd 0
12730posAdd 0
12731o 16
12732suid 67,0
12733)
12734)
12735uid 3276,0
12736)
12737*414 (LeafLogPort
12738port (LogicalPort
12739decl (Decl
12740n "TRG"
12741t "STD_LOGIC"
12742o 14
12743suid 68,0
12744)
12745)
12746uid 3278,0
12747)
12748*415 (LeafLogPort
12749port (LogicalPort
12750m 1
12751decl (Decl
12752n "A_CLK"
12753t "std_logic_vector"
12754b "(3 downto 0)"
12755o 19
12756suid 71,0
12757)
12758)
12759uid 3280,0
12760)
12761*416 (LeafLogPort
12762port (LogicalPort
12763m 4
12764decl (Decl
12765n "CLK_25_PS"
12766t "std_logic"
12767o 59
12768suid 72,0
12769)
12770)
12771uid 3282,0
12772)
12773*417 (LeafLogPort
12774port (LogicalPort
12775m 1
12776decl (Decl
12777n "OE_ADC"
12778t "STD_LOGIC"
12779preAdd 0
12780posAdd 0
12781o 35
12782suid 73,0
12783)
12784)
12785uid 3382,0
12786)
12787*418 (LeafLogPort
12788port (LogicalPort
12789decl (Decl
12790n "A_OTR"
12791t "std_logic_vector"
12792b "(3 DOWNTO 0)"
12793o 5
12794suid 74,0
12795)
12796)
12797uid 3384,0
12798)
12799*419 (LeafLogPort
12800port (LogicalPort
12801decl (Decl
12802n "A0_D"
12803t "std_logic_vector"
12804b "(11 DOWNTO 0)"
12805o 1
12806suid 79,0
12807)
12808)
12809uid 3386,0
12810)
12811*420 (LeafLogPort
12812port (LogicalPort
12813decl (Decl
12814n "A1_D"
12815t "std_logic_vector"
12816b "(11 DOWNTO 0)"
12817o 2
12818suid 80,0
12819)
12820)
12821uid 3388,0
12822)
12823*421 (LeafLogPort
12824port (LogicalPort
12825decl (Decl
12826n "A2_D"
12827t "std_logic_vector"
12828b "(11 DOWNTO 0)"
12829o 3
12830suid 81,0
12831)
12832)
12833uid 3390,0
12834)
12835*422 (LeafLogPort
12836port (LogicalPort
12837decl (Decl
12838n "A3_D"
12839t "std_logic_vector"
12840b "(11 DOWNTO 0)"
12841o 4
12842suid 82,0
12843)
12844)
12845uid 3392,0
12846)
12847*423 (LeafLogPort
12848port (LogicalPort
12849m 1
12850decl (Decl
12851n "D0_SRCLK"
12852t "STD_LOGIC"
12853o 20
12854suid 87,0
12855)
12856)
12857uid 3468,0
12858)
12859*424 (LeafLogPort
12860port (LogicalPort
12861m 1
12862decl (Decl
12863n "D1_SRCLK"
12864t "STD_LOGIC"
12865o 21
12866suid 88,0
12867)
12868)
12869uid 3470,0
12870)
12871*425 (LeafLogPort
12872port (LogicalPort
12873m 1
12874decl (Decl
12875n "D2_SRCLK"
12876t "STD_LOGIC"
12877o 22
12878suid 89,0
12879)
12880)
12881uid 3472,0
12882)
12883*426 (LeafLogPort
12884port (LogicalPort
12885m 1
12886decl (Decl
12887n "D3_SRCLK"
12888t "STD_LOGIC"
12889o 23
12890suid 90,0
12891)
12892)
12893uid 3474,0
12894)
12895*427 (LeafLogPort
12896port (LogicalPort
12897decl (Decl
12898n "D0_SROUT"
12899t "std_logic"
12900o 6
12901suid 91,0
12902)
12903)
12904uid 3524,0
12905)
12906*428 (LeafLogPort
12907port (LogicalPort
12908decl (Decl
12909n "D1_SROUT"
12910t "std_logic"
12911o 7
12912suid 92,0
12913)
12914)
12915uid 3526,0
12916)
12917*429 (LeafLogPort
12918port (LogicalPort
12919decl (Decl
12920n "D2_SROUT"
12921t "std_logic"
12922o 8
12923suid 93,0
12924)
12925)
12926uid 3528,0
12927)
12928*430 (LeafLogPort
12929port (LogicalPort
12930decl (Decl
12931n "D3_SROUT"
12932t "std_logic"
12933o 9
12934suid 94,0
12935)
12936)
12937uid 3530,0
12938)
12939*431 (LeafLogPort
12940port (LogicalPort
12941m 1
12942decl (Decl
12943n "D_A"
12944t "std_logic_vector"
12945b "(3 DOWNTO 0)"
12946o 27
12947suid 95,0
12948i "(others => '0')"
12949)
12950)
12951uid 3532,0
12952)
12953*432 (LeafLogPort
12954port (LogicalPort
12955m 1
12956decl (Decl
12957n "DWRITE"
12958t "std_logic"
12959o 26
12960suid 96,0
12961i "'0'"
12962)
12963)
12964uid 3534,0
12965)
12966*433 (LeafLogPort
12967port (LogicalPort
12968m 1
12969decl (Decl
12970n "T0_CS"
12971t "std_logic"
12972o 44
12973suid 101,0
12974)
12975)
12976uid 3646,0
12977)
12978*434 (LeafLogPort
12979port (LogicalPort
12980m 1
12981decl (Decl
12982n "T1_CS"
12983t "std_logic"
12984o 45
12985suid 102,0
12986)
12987)
12988uid 3648,0
12989)
12990*435 (LeafLogPort
12991port (LogicalPort
12992m 1
12993decl (Decl
12994n "T2_CS"
12995t "std_logic"
12996o 46
12997suid 103,0
12998)
12999)
13000uid 3650,0
13001)
13002*436 (LeafLogPort
13003port (LogicalPort
13004m 1
13005decl (Decl
13006n "T3_CS"
13007t "std_logic"
13008o 47
13009suid 104,0
13010)
13011)
13012uid 3652,0
13013)
13014*437 (LeafLogPort
13015port (LogicalPort
13016m 1
13017decl (Decl
13018n "S_CLK"
13019t "std_logic"
13020o 43
13021suid 105,0
13022)
13023)
13024uid 3654,0
13025)
13026*438 (LeafLogPort
13027port (LogicalPort
13028m 1
13029decl (Decl
13030n "W_A"
13031t "std_logic_vector"
13032b "(9 DOWNTO 0)"
13033o 49
13034suid 106,0
13035)
13036)
13037uid 3656,0
13038)
13039*439 (LeafLogPort
13040port (LogicalPort
13041m 2
13042decl (Decl
13043n "W_D"
13044t "std_logic_vector"
13045b "(15 DOWNTO 0)"
13046o 55
13047suid 107,0
13048)
13049)
13050uid 3658,0
13051)
13052*440 (LeafLogPort
13053port (LogicalPort
13054m 1
13055decl (Decl
13056n "W_RES"
13057t "std_logic"
13058o 52
13059suid 108,0
13060i "'1'"
13061)
13062)
13063uid 3660,0
13064)
13065*441 (LeafLogPort
13066port (LogicalPort
13067m 1
13068decl (Decl
13069n "W_RD"
13070t "std_logic"
13071o 51
13072suid 109,0
13073i "'1'"
13074)
13075)
13076uid 3662,0
13077)
13078*442 (LeafLogPort
13079port (LogicalPort
13080m 1
13081decl (Decl
13082n "W_WR"
13083t "std_logic"
13084o 53
13085suid 110,0
13086i "'1'"
13087)
13088)
13089uid 3664,0
13090)
13091*443 (LeafLogPort
13092port (LogicalPort
13093decl (Decl
13094n "W_INT"
13095t "std_logic"
13096o 15
13097suid 111,0
13098)
13099)
13100uid 3666,0
13101)
13102*444 (LeafLogPort
13103port (LogicalPort
13104m 1
13105decl (Decl
13106n "W_CS"
13107t "std_logic"
13108o 50
13109suid 112,0
13110i "'1'"
13111)
13112)
13113uid 3668,0
13114)
13115*445 (LeafLogPort
13116port (LogicalPort
13117m 1
13118decl (Decl
13119n "MOSI"
13120t "std_logic"
13121o 34
13122suid 113,0
13123i "'0'"
13124)
13125)
13126uid 3696,0
13127)
13128*446 (LeafLogPort
13129port (LogicalPort
13130m 2
13131decl (Decl
13132n "MISO"
13133t "std_logic"
13134preAdd 0
13135posAdd 0
13136o 54
13137suid 114,0
13138)
13139)
13140uid 3698,0
13141)
13142*447 (LeafLogPort
13143port (LogicalPort
13144m 1
13145decl (Decl
13146n "TRG_V"
13147t "std_logic"
13148o 48
13149suid 126,0
13150)
13151)
13152uid 3886,0
13153)
13154*448 (LeafLogPort
13155port (LogicalPort
13156m 1
13157decl (Decl
13158n "RS485_C_RE"
13159t "std_logic"
13160o 38
13161suid 127,0
13162)
13163)
13164uid 3888,0
13165)
13166*449 (LeafLogPort
13167port (LogicalPort
13168m 1
13169decl (Decl
13170n "RS485_C_DE"
13171t "std_logic"
13172o 36
13173suid 128,0
13174)
13175)
13176uid 3890,0
13177)
13178*450 (LeafLogPort
13179port (LogicalPort
13180m 1
13181decl (Decl
13182n "RS485_E_RE"
13183t "std_logic"
13184o 40
13185suid 129,0
13186)
13187)
13188uid 3892,0
13189)
13190*451 (LeafLogPort
13191port (LogicalPort
13192m 1
13193decl (Decl
13194n "RS485_E_DE"
13195t "std_logic"
13196o 39
13197suid 130,0
13198)
13199)
13200uid 3894,0
13201)
13202*452 (LeafLogPort
13203port (LogicalPort
13204m 1
13205decl (Decl
13206n "DENABLE"
13207t "std_logic"
13208o 25
13209suid 131,0
13210i "'0'"
13211)
13212)
13213uid 3896,0
13214)
13215*453 (LeafLogPort
13216port (LogicalPort
13217m 1
13218decl (Decl
13219n "EE_CS"
13220t "std_logic"
13221o 30
13222suid 133,0
13223)
13224)
13225uid 3900,0
13226)
13227*454 (LeafLogPort
13228port (LogicalPort
13229m 1
13230decl (Decl
13231n "D_T"
13232t "std_logic_vector"
13233b "(7 DOWNTO 0)"
13234o 28
13235suid 141,0
13236i "(OTHERS => '0')"
13237)
13238)
13239uid 5322,0
13240)
13241*455 (LeafLogPort
13242port (LogicalPort
13243decl (Decl
13244n "D_PLLLCK"
13245t "std_logic_vector"
13246b "(3 DOWNTO 0)"
13247o 10
13248suid 152,0
13249)
13250)
13251uid 6777,0
13252scheme 0
13253)
13254*456 (LeafLogPort
13255port (LogicalPort
13256m 1
13257decl (Decl
13258n "D_T2"
13259t "std_logic_vector"
13260b "(3 DOWNTO 0)"
13261o 29
13262suid 154,0
13263i "(others => '0')"
13264)
13265)
13266uid 6872,0
13267scheme 0
13268)
13269*457 (LeafLogPort
13270port (LogicalPort
13271m 1
13272decl (Decl
13273n "A1_T"
13274t "std_logic_vector"
13275b "(7 DOWNTO 0)"
13276o 18
13277suid 155,0
13278i "(OTHERS => '0')"
13279)
13280)
13281uid 7134,0
13282scheme 0
13283)
13284*458 (LeafLogPort
13285port (LogicalPort
13286m 4
13287decl (Decl
13288n "dummy"
13289t "std_logic"
13290o 76
13291suid 157,0
13292)
13293)
13294uid 7473,0
13295scheme 0
13296)
13297*459 (LeafLogPort
13298port (LogicalPort
13299m 4
13300decl (Decl
13301n "drs_channel_id"
13302t "std_logic_vector"
13303b "(3 downto 0)"
13304o 75
13305suid 159,0
13306i "(others => '0')"
13307)
13308)
13309uid 8875,0
13310)
13311*460 (LeafLogPort
13312port (LogicalPort
13313m 4
13314decl (Decl
13315n "CLK_50"
13316t "std_logic"
13317o 61
13318suid 163,0
13319)
13320)
13321uid 9516,0
13322)
13323*461 (LeafLogPort
13324port (LogicalPort
13325m 4
13326decl (Decl
13327n "CLK_25_PS1"
13328t "std_logic"
13329o 60
13330suid 164,0
13331)
13332)
13333uid 10056,0
13334)
13335*462 (LeafLogPort
13336port (LogicalPort
13337m 4
13338decl (Decl
13339n "adc_clk_en"
13340t "std_logic"
13341o 71
13342suid 165,0
13343i "'0'"
13344)
13345)
13346uid 10058,0
13347)
13348*463 (LeafLogPort
13349port (LogicalPort
13350m 1
13351decl (Decl
13352n "A0_T"
13353t "std_logic_vector"
13354b "(7 DOWNTO 0)"
13355o 17
13356suid 166,0
13357i "(others => '0')"
13358)
13359)
13360uid 10294,0
13361scheme 0
13362)
13363*464 (LeafLogPort
13364port (LogicalPort
13365m 4
13366decl (Decl
13367n "CLK50_OUT"
13368t "std_logic"
13369o 58
13370suid 184,0
13371)
13372)
13373uid 10704,0
13374)
13375*465 (LeafLogPort
13376port (LogicalPort
13377m 4
13378decl (Decl
13379n "CLK25_OUT"
13380t "std_logic"
13381o 56
13382suid 185,0
13383)
13384)
13385uid 10706,0
13386)
13387*466 (LeafLogPort
13388port (LogicalPort
13389m 4
13390decl (Decl
13391n "CLK25_PSOUT"
13392t "std_logic"
13393o 57
13394suid 186,0
13395)
13396)
13397uid 10708,0
13398)
13399*467 (LeafLogPort
13400port (LogicalPort
13401m 4
13402decl (Decl
13403n "PS_DIR_IN"
13404t "std_logic"
13405o 68
13406suid 187,0
13407)
13408)
13409uid 10710,0
13410)
13411*468 (LeafLogPort
13412port (LogicalPort
13413m 4
13414decl (Decl
13415n "PS_DO_IN"
13416t "std_logic"
13417o 69
13418suid 188,0
13419)
13420)
13421uid 10712,0
13422)
13423*469 (LeafLogPort
13424port (LogicalPort
13425m 4
13426decl (Decl
13427n "PSEN_OUT"
13428t "std_logic"
13429o 66
13430suid 189,0
13431)
13432)
13433uid 10714,0
13434)
13435*470 (LeafLogPort
13436port (LogicalPort
13437m 4
13438decl (Decl
13439n "PSINCDEC_OUT"
13440t "std_logic"
13441o 67
13442suid 190,0
13443)
13444)
13445uid 10716,0
13446)
13447*471 (LeafLogPort
13448port (LogicalPort
13449m 4
13450decl (Decl
13451n "DCM_locked"
13452t "std_logic"
13453preAdd 0
13454posAdd 0
13455o 62
13456suid 191,0
13457)
13458)
13459uid 10718,0
13460)
13461*472 (LeafLogPort
13462port (LogicalPort
13463m 4
13464decl (Decl
13465n "ready"
13466t "std_logic"
13467preAdd 0
13468posAdd 0
13469o 77
13470suid 192,0
13471i "'0'"
13472)
13473)
13474uid 10720,0
13475)
13476*473 (LeafLogPort
13477port (LogicalPort
13478m 4
13479decl (Decl
13480n "shifting"
13481t "std_logic"
13482prec "-- status:"
13483preAdd 0
13484posAdd 0
13485o 79
13486suid 193,0
13487i "'0'"
13488)
13489)
13490uid 10722,0
13491)
13492*474 (LeafLogPort
13493port (LogicalPort
13494m 4
13495decl (Decl
13496n "PSDONE_extraOUT"
13497t "std_logic"
13498o 65
13499suid 194,0
13500)
13501)
13502uid 10724,0
13503)
13504*475 (LeafLogPort