source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd @ 10073

Last change on this file since 10073 was 10073, checked in by neise, 9 years ago
File size: 174.1 KB
Line 
1DocumentHdrVersion "1.1"
2Header (DocumentHdr
3version 2
4dmPackageRefs [
5(DmPackageRef
6library "ieee"
7unitName "std_logic_1164"
8)
9(DmPackageRef
10library "ieee"
11unitName "std_logic_arith"
12)
13(DmPackageRef
14library "IEEE"
15unitName "NUMERIC_STD"
16)
17(DmPackageRef
18library "ieee"
19unitName "std_logic_unsigned"
20)
21(DmPackageRef
22library "FACT_FAD_lib"
23unitName "fad_definitions"
24)
25]
26instances [
27(Instance
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30duName "FAD_main"
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35value "LOG2_OF_RAM_SIZE_64B"
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63number "1"
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69(EmbeddedInstance
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71number "3"
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73(EmbeddedInstance
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75number "4"
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100"FACT_FAD_lib"
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103version "29.1"
104appVersion "2009.2 (Build 10)"
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112)
113(vvPair
114variable "HDSDir"
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120)
121(vvPair
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124)
125(vvPair
126variable "SourceDir"
127value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
128)
129(vvPair
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133(vvPair
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214variable "library_downstream_ModelSimCompiler"
215value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
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267value "<TBD>"
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286variable "this_ext"
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295value "struct"
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298variable "time"
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315value "struct"
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998fg "0,65535,0"
999)
1000xt "80000,73625,80750,74375"
1001)
1002tg (CPTG
1003uid 193,0
1004ps "CptPortTextPlaceStrategy"
1005stg "RightVerticalLayoutStrategy"
1006f (Text
1007uid 194,0
1008va (VaSet
1009)
1010xt "76300,73500,79000,74500"
1011st "wiz_int"
1012ju 2
1013blo "79000,74300"
1014)
1015)
1016thePort (LogicalPort
1017decl (Decl
1018n "wiz_int"
1019t "std_logic"
1020o 11
1021suid 31,0
1022)
1023)
1024)
1025*23 (CptPort
1026uid 195,0
1027ps "OnEdgeStrategy"
1028shape (Triangle
1029uid 196,0
1030ro 90
1031va (VaSet
1032vasetType 1
1033fg "0,65535,0"
1034)
1035xt "80000,71625,80750,72375"
1036)
1037tg (CPTG
1038uid 197,0
1039ps "CptPortTextPlaceStrategy"
1040stg "RightVerticalLayoutStrategy"
1041f (Text
1042uid 198,0
1043va (VaSet
1044)
1045xt "76400,71500,79000,72500"
1046st "wiz_rd"
1047ju 2
1048blo "79000,72300"
1049)
1050)
1051thePort (LogicalPort
1052m 1
1053decl (Decl
1054n "wiz_rd"
1055t "std_logic"
1056o 43
1057suid 30,0
1058i "'1'"
1059)
1060)
1061)
1062*24 (CptPort
1063uid 199,0
1064ps "OnEdgeStrategy"
1065shape (Triangle
1066uid 200,0
1067ro 90
1068va (VaSet
1069vasetType 1
1070fg "0,65535,0"
1071)
1072xt "80000,72625,80750,73375"
1073)
1074tg (CPTG
1075uid 201,0
1076ps "CptPortTextPlaceStrategy"
1077stg "RightVerticalLayoutStrategy"
1078f (Text
1079uid 202,0
1080va (VaSet
1081)
1082xt "76300,72500,79000,73500"
1083st "wiz_wr"
1084ju 2
1085blo "79000,73300"
1086)
1087)
1088thePort (LogicalPort
1089m 1
1090decl (Decl
1091n "wiz_wr"
1092t "std_logic"
1093o 45
1094suid 29,0
1095i "'1'"
1096)
1097)
1098)
1099*25 (CptPort
1100uid 1304,0
1101ps "OnEdgeStrategy"
1102shape (Triangle
1103uid 1305,0
1104ro 270
1105va (VaSet
1106vasetType 1
1107fg "0,65535,0"
1108)
1109xt "51250,69625,52000,70375"
1110)
1111tg (CPTG
1112uid 1306,0
1113ps "CptPortTextPlaceStrategy"
1114stg "VerticalLayoutStrategy"
1115f (Text
1116uid 1307,0
1117va (VaSet
1118)
1119xt "53000,69500,57500,70500"
1120st "CLK_25_PS"
1121blo "53000,70300"
1122)
1123)
1124thePort (LogicalPort
1125m 1
1126decl (Decl
1127n "CLK_25_PS"
1128t "std_logic"
1129o 15
1130suid 35,0
1131)
1132)
1133)
1134*26 (CptPort
1135uid 1369,0
1136ps "OnEdgeStrategy"
1137shape (Triangle
1138uid 1370,0
1139ro 270
1140va (VaSet
1141vasetType 1
1142fg "0,65535,0"
1143)
1144xt "51250,68625,52000,69375"
1145)
1146tg (CPTG
1147uid 1371,0
1148ps "CptPortTextPlaceStrategy"
1149stg "VerticalLayoutStrategy"
1150f (Text
1151uid 1372,0
1152va (VaSet
1153)
1154xt "53000,68500,56100,69500"
1155st "CLK_50"
1156blo "53000,69300"
1157)
1158)
1159thePort (LogicalPort
1160m 1
1161decl (Decl
1162n "CLK_50"
1163t "std_logic"
1164o 16
1165suid 37,0
1166)
1167)
1168)
1169*27 (CptPort
1170uid 1385,0
1171ps "OnEdgeStrategy"
1172shape (Triangle
1173uid 1386,0
1174ro 90
1175va (VaSet
1176vasetType 1
1177fg "0,65535,0"
1178)
1179xt "51250,67625,52000,68375"
1180)
1181tg (CPTG
1182uid 1387,0
1183ps "CptPortTextPlaceStrategy"
1184stg "VerticalLayoutStrategy"
1185f (Text
1186uid 1388,0
1187va (VaSet
1188)
1189xt "53000,67500,54900,68500"
1190st "CLK"
1191blo "53000,68300"
1192)
1193)
1194thePort (LogicalPort
1195decl (Decl
1196n "CLK"
1197t "std_logic"
1198o 1
1199suid 38,0
1200)
1201)
1202)
1203*28 (CptPort
1204uid 1389,0
1205ps "OnEdgeStrategy"
1206shape (Triangle
1207uid 1390,0
1208ro 90
1209va (VaSet
1210vasetType 1
1211fg "0,65535,0"
1212)
1213xt "51250,94625,52000,95375"
1214)
1215tg (CPTG
1216uid 1391,0
1217ps "CptPortTextPlaceStrategy"
1218stg "VerticalLayoutStrategy"
1219f (Text
1220uid 1392,0
1221va (VaSet
1222)
1223xt "53000,94500,58900,95500"
1224st "adc_data_array"
1225blo "53000,95300"
1226)
1227)
1228thePort (LogicalPort
1229decl (Decl
1230n "adc_data_array"
1231t "adc_data_array_type"
1232o 6
1233suid 39,0
1234)
1235)
1236)
1237*29 (CptPort
1238uid 1511,0
1239ps "OnEdgeStrategy"
1240shape (Triangle
1241uid 1512,0
1242ro 90
1243va (VaSet
1244vasetType 1
1245fg "0,65535,0"
1246)
1247xt "51250,88625,52000,89375"
1248)
1249tg (CPTG
1250uid 1513,0
1251ps "CptPortTextPlaceStrategy"
1252stg "VerticalLayoutStrategy"
1253f (Text
1254uid 1514,0
1255va (VaSet
1256)
1257xt "53000,88500,61000,89500"
1258st "adc_otr_array : (3:0)"
1259blo "53000,89300"
1260)
1261)
1262thePort (LogicalPort
1263decl (Decl
1264n "adc_otr_array"
1265t "std_logic_vector"
1266b "(3 DOWNTO 0)"
1267o 7
1268suid 40,0
1269)
1270)
1271)
1272*30 (CptPort
1273uid 1572,0
1274ps "OnEdgeStrategy"
1275shape (Triangle
1276uid 1573,0
1277ro 270
1278va (VaSet
1279vasetType 1
1280fg "0,65535,0"
1281)
1282xt "51250,108625,52000,109375"
1283)
1284tg (CPTG
1285uid 1574,0
1286ps "CptPortTextPlaceStrategy"
1287stg "VerticalLayoutStrategy"
1288f (Text
1289uid 1575,0
1290va (VaSet
1291)
1292xt "53000,108500,61500,109500"
1293st "drs_channel_id : (3:0)"
1294blo "53000,109300"
1295)
1296)
1297thePort (LogicalPort
1298m 1
1299decl (Decl
1300n "drs_channel_id"
1301t "std_logic_vector"
1302b "(3 downto 0)"
1303o 32
1304suid 48,0
1305i "(others => '0')"
1306)
1307)
1308)
1309*31 (CptPort
1310uid 1576,0
1311ps "OnEdgeStrategy"
1312shape (Triangle
1313uid 1577,0
1314ro 270
1315va (VaSet
1316vasetType 1
1317fg "0,65535,0"
1318)
1319xt "51250,109625,52000,110375"
1320)
1321tg (CPTG
1322uid 1578,0
1323ps "CptPortTextPlaceStrategy"
1324stg "VerticalLayoutStrategy"
1325f (Text
1326uid 1579,0
1327va (VaSet
1328)
1329xt "53000,109500,57300,110500"
1330st "drs_dwrite"
1331blo "53000,110300"
1332)
1333)
1334thePort (LogicalPort
1335m 1
1336decl (Decl
1337n "drs_dwrite"
1338t "std_logic"
1339o 33
1340suid 49,0
1341i "'1'"
1342)
1343)
1344)
1345*32 (CptPort
1346uid 1588,0
1347ps "OnEdgeStrategy"
1348shape (Triangle
1349uid 1589,0
1350ro 90
1351va (VaSet
1352vasetType 1
1353fg "0,65535,0"
1354)
1355xt "51250,104625,52000,105375"
1356)
1357tg (CPTG
1358uid 1590,0
1359ps "CptPortTextPlaceStrategy"
1360stg "VerticalLayoutStrategy"
1361f (Text
1362uid 1591,0
1363va (VaSet
1364)
1365xt "53000,104500,58400,105500"
1366st "SROUT_in_0"
1367blo "53000,105300"
1368)
1369)
1370thePort (LogicalPort
1371decl (Decl
1372n "SROUT_in_0"
1373t "std_logic"
1374o 2
1375suid 42,0
1376)
1377)
1378)
1379*33 (CptPort
1380uid 1592,0
1381ps "OnEdgeStrategy"
1382shape (Triangle
1383uid 1593,0
1384ro 90
1385va (VaSet
1386vasetType 1
1387fg "0,65535,0"
1388)
1389xt "51250,105625,52000,106375"
1390)
1391tg (CPTG
1392uid 1594,0
1393ps "CptPortTextPlaceStrategy"
1394stg "VerticalLayoutStrategy"
1395f (Text
1396uid 1595,0
1397va (VaSet
1398)
1399xt "53000,105500,58400,106500"
1400st "SROUT_in_1"
1401blo "53000,106300"
1402)
1403)
1404thePort (LogicalPort
1405decl (Decl
1406n "SROUT_in_1"
1407t "std_logic"
1408o 3
1409suid 43,0
1410)
1411)
1412)
1413*34 (CptPort
1414uid 1596,0
1415ps "OnEdgeStrategy"
1416shape (Triangle
1417uid 1597,0
1418ro 90
1419va (VaSet
1420vasetType 1
1421fg "0,65535,0"
1422)
1423xt "51250,106625,52000,107375"
1424)
1425tg (CPTG
1426uid 1598,0
1427ps "CptPortTextPlaceStrategy"
1428stg "VerticalLayoutStrategy"
1429f (Text
1430uid 1599,0
1431va (VaSet
1432)
1433xt "53000,106500,58400,107500"
1434st "SROUT_in_2"
1435blo "53000,107300"
1436)
1437)
1438thePort (LogicalPort
1439decl (Decl
1440n "SROUT_in_2"
1441t "std_logic"
1442o 4
1443suid 44,0
1444)
1445)
1446)
1447*35 (CptPort
1448uid 1600,0
1449ps "OnEdgeStrategy"
1450shape (Triangle
1451uid 1601,0
1452ro 90
1453va (VaSet
1454vasetType 1
1455fg "0,65535,0"
1456)
1457xt "51250,107625,52000,108375"
1458)
1459tg (CPTG
1460uid 1602,0
1461ps "CptPortTextPlaceStrategy"
1462stg "VerticalLayoutStrategy"
1463f (Text
1464uid 1603,0
1465va (VaSet
1466)
1467xt "53000,107500,58400,108500"
1468st "SROUT_in_3"
1469blo "53000,108300"
1470)
1471)
1472thePort (LogicalPort
1473decl (Decl
1474n "SROUT_in_3"
1475t "std_logic"
1476o 5
1477suid 45,0
1478)
1479)
1480)
1481*36 (CptPort
1482uid 2379,0
1483ps "OnEdgeStrategy"
1484shape (Triangle
1485uid 2380,0
1486ro 270
1487va (VaSet
1488vasetType 1
1489fg "0,65535,0"
1490)
1491xt "51250,110625,52000,111375"
1492)
1493tg (CPTG
1494uid 2381,0
1495ps "CptPortTextPlaceStrategy"
1496stg "VerticalLayoutStrategy"
1497f (Text
1498uid 2382,0
1499va (VaSet
1500)
1501xt "53000,110500,57200,111500"
1502st "RSRLOAD"
1503blo "53000,111300"
1504)
1505)
1506thePort (LogicalPort
1507m 1
1508decl (Decl
1509n "RSRLOAD"
1510t "std_logic"
1511o 25
1512suid 56,0
1513i "'0'"
1514)
1515)
1516)
1517*37 (CptPort
1518uid 2383,0
1519ps "OnEdgeStrategy"
1520shape (Triangle
1521uid 2384,0
1522ro 270
1523va (VaSet
1524vasetType 1
1525fg "0,65535,0"
1526)
1527xt "51250,112625,52000,113375"
1528)
1529tg (CPTG
1530uid 2385,0
1531ps "CptPortTextPlaceStrategy"
1532stg "VerticalLayoutStrategy"
1533f (Text
1534uid 2386,0
1535va (VaSet
1536)
1537xt "53000,112500,56000,113500"
1538st "SRCLK"
1539blo "53000,113300"
1540)
1541)
1542thePort (LogicalPort
1543m 1
1544decl (Decl
1545n "SRCLK"
1546t "std_logic"
1547o 26
1548suid 57,0
1549i "'0'"
1550)
1551)
1552)
1553*38 (CptPort
1554uid 2969,0
1555ps "OnEdgeStrategy"
1556shape (Triangle
1557uid 2970,0
1558ro 90
1559va (VaSet
1560vasetType 1
1561fg "0,65535,0"
1562)
1563xt "80000,86625,80750,87375"
1564)
1565tg (CPTG
1566uid 2971,0
1567ps "CptPortTextPlaceStrategy"
1568stg "RightVerticalLayoutStrategy"
1569f (Text
1570uid 2972,0
1571va (VaSet
1572)
1573xt "76200,86500,79000,87500"
1574st "dac_cs"
1575ju 2
1576blo "79000,87300"
1577)
1578)
1579thePort (LogicalPort
1580m 1
1581decl (Decl
1582n "dac_cs"
1583t "std_logic"
1584o 30
1585suid 64,0
1586)
1587)
1588)
1589*39 (CptPort
1590uid 2973,0
1591ps "OnEdgeStrategy"
1592shape (Triangle
1593uid 2974,0
1594ro 90
1595va (VaSet
1596vasetType 1
1597fg "0,65535,0"
1598)
1599xt "80000,97625,80750,98375"
1600)
1601tg (CPTG
1602uid 2975,0
1603ps "CptPortTextPlaceStrategy"
1604stg "RightVerticalLayoutStrategy"
1605f (Text
1606uid 2976,0
1607va (VaSet
1608)
1609xt "77300,97500,79000,98500"
1610st "sclk"
1611ju 2
1612blo "79000,98300"
1613)
1614)
1615thePort (LogicalPort
1616m 1
1617decl (Decl
1618n "sclk"
1619t "std_logic"
1620o 38
1621suid 62,0
1622)
1623)
1624)
1625*40 (CptPort
1626uid 2977,0
1627ps "OnEdgeStrategy"
1628shape (Triangle
1629uid 2978,0
1630ro 90
1631va (VaSet
1632vasetType 1
1633fg "0,65535,0"
1634)
1635xt "80000,88625,80750,89375"
1636)
1637tg (CPTG
1638uid 2979,0
1639ps "CptPortTextPlaceStrategy"
1640stg "RightVerticalLayoutStrategy"
1641f (Text
1642uid 2980,0
1643va (VaSet
1644)
1645xt "72500,88500,79000,89500"
1646st "sensor_cs : (3:0)"
1647ju 2
1648blo "79000,89300"
1649)
1650)
1651thePort (LogicalPort
1652m 1
1653decl (Decl
1654n "sensor_cs"
1655t "std_logic_vector"
1656b "(3 DOWNTO 0)"
1657o 39
1658suid 65,0
1659)
1660)
1661)
1662*41 (CptPort
1663uid 2981,0
1664ps "OnEdgeStrategy"
1665shape (Diamond
1666uid 2982,0
1667ro 90
1668va (VaSet
1669vasetType 1
1670fg "0,65535,0"
1671)
1672xt "80000,98625,80750,99375"
1673)
1674tg (CPTG
1675uid 2983,0
1676ps "CptPortTextPlaceStrategy"
1677stg "RightVerticalLayoutStrategy"
1678f (Text
1679uid 2984,0
1680va (VaSet
1681)
1682xt "77600,98500,79000,99500"
1683st "sio"
1684ju 2
1685blo "79000,99300"
1686)
1687)
1688thePort (LogicalPort
1689m 2
1690decl (Decl
1691n "sio"
1692t "std_logic"
1693preAdd 0
1694posAdd 0
1695o 46
1696suid 63,0
1697)
1698)
1699)
1700*42 (CptPort
1701uid 3670,0
1702ps "OnEdgeStrategy"
1703shape (Triangle
1704uid 3671,0
1705ro 90
1706va (VaSet
1707vasetType 1
1708fg "0,65535,0"
1709)
1710xt "80000,99625,80750,100375"
1711)
1712tg (CPTG
1713uid 3672,0
1714ps "CptPortTextPlaceStrategy"
1715stg "RightVerticalLayoutStrategy"
1716f (Text
1717uid 3673,0
1718va (VaSet
1719)
1720xt "77000,99500,79000,100500"
1721st "mosi"
1722ju 2
1723blo "79000,100300"
1724)
1725)
1726thePort (LogicalPort
1727m 1
1728decl (Decl
1729n "mosi"
1730t "std_logic"
1731o 35
1732suid 66,0
1733i "'0'"
1734)
1735)
1736)
1737*43 (CptPort
1738uid 6427,0
1739ps "OnEdgeStrategy"
1740shape (Triangle
1741uid 6428,0
1742ro 90
1743va (VaSet
1744vasetType 1
1745fg "0,65535,0"
1746)
1747xt "80000,120625,80750,121375"
1748)
1749tg (CPTG
1750uid 6429,0
1751ps "CptPortTextPlaceStrategy"
1752stg "RightVerticalLayoutStrategy"
1753f (Text
1754uid 6430,0
1755va (VaSet
1756)
1757xt "76000,120500,79000,121500"
1758st "denable"
1759ju 2
1760blo "79000,121300"
1761)
1762)
1763thePort (LogicalPort
1764m 1
1765decl (Decl
1766n "denable"
1767t "std_logic"
1768eolc "-- default domino wave off"
1769posAdd 0
1770o 31
1771suid 67,0
1772i "'0'"
1773)
1774)
1775)
1776*44 (CptPort
1777uid 10046,0
1778ps "OnEdgeStrategy"
1779shape (Triangle
1780uid 10047,0
1781ro 270
1782va (VaSet
1783vasetType 1
1784fg "0,65535,0"
1785)
1786xt "51250,72625,52000,73375"
1787)
1788tg (CPTG
1789uid 10048,0
1790ps "CptPortTextPlaceStrategy"
1791stg "VerticalLayoutStrategy"
1792f (Text
1793uid 10049,0
1794va (VaSet
1795)
1796xt "53000,72500,57500,73500"
1797st "adc_clk_en"
1798blo "53000,73300"
1799)
1800)
1801thePort (LogicalPort
1802m 1
1803decl (Decl
1804n "adc_clk_en"
1805t "std_logic"
1806o 28
1807suid 69,0
1808i "'0'"
1809)
1810)
1811)
1812*45 (CptPort
1813uid 10246,0
1814ps "OnEdgeStrategy"
1815shape (Triangle
1816uid 10247,0
1817ro 90
1818va (VaSet
1819vasetType 1
1820fg "0,65535,0"
1821)
1822xt "80000,129625,80750,130375"
1823)
1824tg (CPTG
1825uid 10248,0
1826ps "CptPortTextPlaceStrategy"
1827stg "RightVerticalLayoutStrategy"
1828f (Text
1829uid 10249,0
1830va (VaSet
1831)
1832xt "73800,129500,79000,130500"
1833st "DCM_locked"
1834ju 2
1835blo "79000,130300"
1836)
1837)
1838thePort (LogicalPort
1839m 1
1840decl (Decl
1841n "DCM_locked"
1842t "std_logic"
1843preAdd 0
1844posAdd 0
1845o 17
1846suid 76,0
1847)
1848)
1849)
1850*46 (CptPort
1851uid 10254,0
1852ps "OnEdgeStrategy"
1853shape (Triangle
1854uid 10255,0
1855ro 90
1856va (VaSet
1857vasetType 1
1858fg "0,65535,0"
1859)
1860xt "80000,135625,80750,136375"
1861)
1862tg (CPTG
1863uid 10256,0
1864ps "CptPortTextPlaceStrategy"
1865stg "RightVerticalLayoutStrategy"
1866f (Text
1867uid 10257,0
1868va (VaSet
1869)
1870xt "71300,135500,79000,136500"
1871st "LOCKED_extraOUT"
1872ju 2
1873blo "79000,136300"
1874)
1875)
1876thePort (LogicalPort
1877m 1
1878decl (Decl
1879n "LOCKED_extraOUT"
1880t "std_logic"
1881o 18
1882suid 70,0
1883)
1884)
1885)
1886*47 (CptPort
1887uid 10258,0
1888ps "OnEdgeStrategy"
1889shape (Triangle
1890uid 10259,0
1891ro 90
1892va (VaSet
1893vasetType 1
1894fg "0,65535,0"
1895)
1896xt "80000,138625,80750,139375"
1897)
1898tg (CPTG
1899uid 10260,0
1900ps "CptPortTextPlaceStrategy"
1901stg "RightVerticalLayoutStrategy"
1902f (Text
1903uid 10261,0
1904va (VaSet
1905)
1906xt "74200,138500,79000,139500"
1907st "offset : (7:0)"
1908ju 2
1909blo "79000,139300"
1910)
1911)
1912thePort (LogicalPort
1913m 1
1914decl (Decl
1915n "offset"
1916t "std_logic_vector"
1917b "(7 downto 0)"
1918preAdd 0
1919posAdd 0
1920o 36
1921suid 77,0
1922i "(OTHERS => '0')"
1923)
1924)
1925)
1926*48 (CptPort
1927uid 10262,0
1928ps "OnEdgeStrategy"
1929shape (Triangle
1930uid 10263,0
1931ro 90
1932va (VaSet
1933vasetType 1
1934fg "0,65535,0"
1935)
1936xt "80000,125625,80750,126375"
1937)
1938tg (CPTG
1939uid 10264,0
1940ps "CptPortTextPlaceStrategy"
1941stg "RightVerticalLayoutStrategy"
1942f (Text
1943uid 10265,0
1944va (VaSet
1945)
1946xt "74600,125500,79000,126500"
1947st "PS_DIR_IN"
1948ju 2
1949blo "79000,126300"
1950)
1951)
1952thePort (LogicalPort
1953m 1
1954decl (Decl
1955n "PS_DIR_IN"
1956t "std_logic"
1957o 23
1958suid 80,0
1959)
1960)
1961)
1962*49 (CptPort
1963uid 10266,0
1964ps "OnEdgeStrategy"
1965shape (Triangle
1966uid 10267,0
1967ro 90
1968va (VaSet
1969vasetType 1
1970fg "0,65535,0"
1971)
1972xt "80000,126625,80750,127375"
1973)
1974tg (CPTG
1975uid 10268,0
1976ps "CptPortTextPlaceStrategy"
1977stg "RightVerticalLayoutStrategy"
1978f (Text
1979uid 10269,0
1980va (VaSet
1981)
1982xt "74800,126500,79000,127500"
1983st "PS_DO_IN"
1984ju 2
1985blo "79000,127300"
1986)
1987)
1988thePort (LogicalPort
1989m 1
1990decl (Decl
1991n "PS_DO_IN"
1992t "std_logic"
1993o 24
1994suid 81,0
1995)
1996)
1997)
1998*50 (CptPort
1999uid 10270,0
2000ps "OnEdgeStrategy"
2001shape (Triangle
2002uid 10271,0
2003ro 90
2004va (VaSet
2005vasetType 1
2006fg "0,65535,0"
2007)
2008xt "80000,134625,80750,135375"
2009)
2010tg (CPTG
2011uid 10272,0
2012ps "CptPortTextPlaceStrategy"
2013stg "RightVerticalLayoutStrategy"
2014f (Text
2015uid 10273,0
2016va (VaSet
2017)
2018xt "74000,134500,79000,135500"
2019st "PSCLK_OUT"
2020ju 2
2021blo "79000,135300"
2022)
2023)
2024thePort (LogicalPort
2025m 1
2026decl (Decl
2027n "PSCLK_OUT"
2028t "std_logic"
2029o 19
2030suid 74,0
2031)
2032)
2033)
2034*51 (CptPort
2035uid 10274,0
2036ps "OnEdgeStrategy"
2037shape (Triangle
2038uid 10275,0
2039ro 90
2040va (VaSet
2041vasetType 1
2042fg "0,65535,0"
2043)
2044xt "80000,133625,80750,134375"
2045)
2046tg (CPTG
2047uid 10276,0
2048ps "CptPortTextPlaceStrategy"
2049stg "RightVerticalLayoutStrategy"
2050f (Text
2051uid 10277,0
2052va (VaSet
2053)
2054xt "71200,133500,79000,134500"
2055st "PSDONE_extraOUT"
2056ju 2
2057blo "79000,134300"
2058)
2059)
2060thePort (LogicalPort
2061m 1
2062decl (Decl
2063n "PSDONE_extraOUT"
2064t "std_logic"
2065o 20
2066suid 71,0
2067)
2068)
2069)
2070*52 (CptPort
2071uid 10278,0
2072ps "OnEdgeStrategy"
2073shape (Triangle
2074uid 10279,0
2075ro 90
2076va (VaSet
2077vasetType 1
2078fg "0,65535,0"
2079)
2080xt "80000,128625,80750,129375"
2081)
2082tg (CPTG
2083uid 10280,0
2084ps "CptPortTextPlaceStrategy"
2085stg "RightVerticalLayoutStrategy"
2086f (Text
2087uid 10281,0
2088va (VaSet
2089)
2090xt "74400,128500,79000,129500"
2091st "PSEN_OUT"
2092ju 2
2093blo "79000,129300"
2094)
2095)
2096thePort (LogicalPort
2097m 1
2098decl (Decl
2099n "PSEN_OUT"
2100t "std_logic"
2101o 21
2102suid 73,0
2103)
2104)
2105)
2106*53 (CptPort
2107uid 10282,0
2108ps "OnEdgeStrategy"
2109shape (Triangle
2110uid 10283,0
2111ro 90
2112va (VaSet
2113vasetType 1
2114fg "0,65535,0"
2115)
2116xt "80000,127625,80750,128375"
2117)
2118tg (CPTG
2119uid 10284,0
2120ps "CptPortTextPlaceStrategy"
2121stg "RightVerticalLayoutStrategy"
2122f (Text
2123uid 10285,0
2124va (VaSet
2125)
2126xt "72000,127500,79000,128500"
2127st "PSINCDEC_OUT"
2128ju 2
2129blo "79000,128300"
2130)
2131)
2132thePort (LogicalPort
2133m 1
2134decl (Decl
2135n "PSINCDEC_OUT"
2136t "std_logic"
2137o 22
2138suid 72,0
2139)
2140)
2141)
2142*54 (CptPort
2143uid 10286,0
2144ps "OnEdgeStrategy"
2145shape (Triangle
2146uid 10287,0
2147ro 90
2148va (VaSet
2149vasetType 1
2150fg "0,65535,0"
2151)
2152xt "80000,131625,80750,132375"
2153)
2154tg (CPTG
2155uid 10288,0
2156ps "CptPortTextPlaceStrategy"
2157stg "RightVerticalLayoutStrategy"
2158f (Text
2159uid 10289,0
2160va (VaSet
2161)
2162xt "76800,131500,79000,132500"
2163st "ready"
2164ju 2
2165blo "79000,132300"
2166)
2167)
2168thePort (LogicalPort
2169m 1
2170decl (Decl
2171n "ready"
2172t "std_logic"
2173preAdd 0
2174posAdd 0
2175o 37
2176suid 79,0
2177i "'0'"
2178)
2179)
2180)
2181*55 (CptPort
2182uid 10290,0
2183ps "OnEdgeStrategy"
2184shape (Triangle
2185uid 10291,0
2186ro 90
2187va (VaSet
2188vasetType 1
2189fg "0,65535,0"
2190)
2191xt "80000,132625,80750,133375"
2192)
2193tg (CPTG
2194uid 10292,0
2195ps "CptPortTextPlaceStrategy"
2196stg "RightVerticalLayoutStrategy"
2197f (Text
2198uid 10293,0
2199va (VaSet
2200)
2201xt "76100,132500,79000,133500"
2202st "shifting"
2203ju 2
2204blo "79000,133300"
2205)
2206)
2207thePort (LogicalPort
2208m 1
2209decl (Decl
2210n "shifting"
2211t "std_logic"
2212prec "-- status:"
2213preAdd 0
2214posAdd 0
2215o 40
2216suid 78,0
2217i "'0'"
2218)
2219)
2220)
2221*56 (CptPort
2222uid 10320,0
2223ps "OnEdgeStrategy"
2224shape (Triangle
2225uid 10321,0
2226ro 90
2227va (VaSet
2228vasetType 1
2229fg "0,65535,0"
2230)
2231xt "80000,123625,80750,124375"
2232)
2233tg (CPTG
2234uid 10322,0
2235ps "CptPortTextPlaceStrategy"
2236stg "RightVerticalLayoutStrategy"
2237f (Text
2238uid 10323,0
2239va (VaSet
2240)
2241xt "74200,123500,79000,124500"
2242st "CLK25_OUT"
2243ju 2
2244blo "79000,124300"
2245)
2246)
2247thePort (LogicalPort
2248m 1
2249decl (Decl
2250n "CLK25_OUT"
2251t "std_logic"
2252o 12
2253suid 83,0
2254)
2255)
2256)
2257*57 (CptPort
2258uid 10324,0
2259ps "OnEdgeStrategy"
2260shape (Triangle
2261uid 10325,0
2262ro 90
2263va (VaSet
2264vasetType 1
2265fg "0,65535,0"
2266)
2267xt "80000,124625,80750,125375"
2268)
2269tg (CPTG
2270uid 10326,0
2271ps "CptPortTextPlaceStrategy"
2272stg "RightVerticalLayoutStrategy"
2273f (Text
2274uid 10327,0
2275va (VaSet
2276)
2277xt "72800,124500,79000,125500"
2278st "CLK25_PSOUT"
2279ju 2
2280blo "79000,125300"
2281)
2282)
2283thePort (LogicalPort
2284m 1
2285decl (Decl
2286n "CLK25_PSOUT"
2287t "std_logic"
2288o 13
2289suid 84,0
2290)
2291)
2292)
2293*58 (CptPort
2294uid 10328,0
2295ps "OnEdgeStrategy"
2296shape (Triangle
2297uid 10329,0
2298ro 90
2299va (VaSet
2300vasetType 1
2301fg "0,65535,0"
2302)
2303xt "80000,122625,80750,123375"
2304)
2305tg (CPTG
2306uid 10330,0
2307ps "CptPortTextPlaceStrategy"
2308stg "RightVerticalLayoutStrategy"
2309f (Text
2310uid 10331,0
2311va (VaSet
2312)
2313xt "74200,122500,79000,123500"
2314st "CLK50_OUT"
2315ju 2
2316blo "79000,123300"
2317)
2318)
2319thePort (LogicalPort
2320m 1
2321decl (Decl
2322n "CLK50_OUT"
2323t "std_logic"
2324o 14
2325suid 82,0
2326)
2327)
2328)
2329*59 (CptPort
2330uid 12314,0
2331ps "OnEdgeStrategy"
2332shape (Triangle
2333uid 12315,0
2334ro 90
2335va (VaSet
2336vasetType 1
2337fg "0,65535,0"
2338)
2339xt "80000,139625,80750,140375"
2340)
2341tg (CPTG
2342uid 12316,0
2343ps "CptPortTextPlaceStrategy"
2344stg "RightVerticalLayoutStrategy"
2345f (Text
2346uid 12317,0
2347va (VaSet
2348)
2349xt "75300,139500,79000,140500"
2350st "SRIN_out"
2351ju 2
2352blo "79000,140300"
2353)
2354)
2355thePort (LogicalPort
2356m 1
2357decl (Decl
2358n "SRIN_out"
2359t "std_logic"
2360o 27
2361suid 85,0
2362i "'0'"
2363)
2364)
2365)
2366]
2367shape (Rectangle
2368uid 170,0
2369va (VaSet
2370vasetType 1
2371fg "0,65535,0"
2372lineColor "0,32896,0"
2373lineWidth 2
2374)
2375xt "52000,66000,80000,141000"
2376)
2377oxt "15000,-1000,43000,27000"
2378ttg (MlTextGroup
2379uid 171,0
2380ps "CenterOffsetStrategy"
2381stg "VerticalLayoutStrategy"
2382textVec [
2383*60 (Text
2384uid 172,0
2385va (VaSet
2386font "Arial,8,1"
2387)
2388xt "52200,123000,58400,124000"
2389st "FACT_FAD_lib"
2390blo "52200,123800"
2391tm "BdLibraryNameMgr"
2392)
2393*61 (Text
2394uid 173,0
2395va (VaSet
2396font "Arial,8,1"
2397)
2398xt "52200,124000,56400,125000"
2399st "FAD_main"
2400blo "52200,124800"
2401tm "CptNameMgr"
2402)
2403*62 (Text
2404uid 174,0
2405va (VaSet
2406font "Arial,8,1"
2407)
2408xt "52200,125000,58000,126000"
2409st "I_board_main"
2410blo "52200,125800"
2411tm "InstanceNameMgr"
2412)
2413]
2414)
2415ga (GenericAssociation
2416uid 175,0
2417ps "EdgeToEdgeStrategy"
2418matrix (Matrix
2419uid 176,0
2420text (MLText
2421uid 177,0
2422va (VaSet
2423font "Courier New,8,0"
2424)
2425xt "52000,65200,81500,66000"
2426st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B    ( integer )  "
2427)
2428header ""
2429)
2430elements [
2431(GiElement
2432name "RAMADDRWIDTH64b"
2433type "integer"
2434value "LOG2_OF_RAM_SIZE_64B"
2435)
2436]
2437)
2438viewicon (ZoomableIcon
2439uid 178,0
2440sl 0
2441va (VaSet
2442vasetType 1
2443fg "49152,49152,49152"
2444)
2445xt "52250,139250,53750,140750"
2446iconName "BlockDiagram.png"
2447iconMaskName "BlockDiagram.msk"
2448ftype 1
2449)
2450viewiconposition 0
2451portVis (PortSigDisplay
2452)
2453archFileType "UNKNOWN"
2454)
2455*63 (PortIoIn
2456uid 231,0
2457shape (CompositeShape
2458uid 232,0
2459va (VaSet
2460vasetType 1
2461fg "0,0,32768"
2462)
2463optionalChildren [
2464(Pentagon
2465uid 233,0
2466sl 0
2467ro 270
2468xt "20000,77625,21500,78375"
2469)
2470(Line
2471uid 234,0
2472sl 0
2473ro 270
2474xt "21500,78000,22000,78000"
2475pts [
2476"21500,78000"
2477"22000,78000"
2478]
2479)
2480]
2481)
2482stc 0
2483sf 1
2484tg (WTG
2485uid 235,0
2486ps "PortIoTextPlaceStrategy"
2487stg "STSignalDisplayStrategy"
2488f (Text
2489uid 236,0
2490va (VaSet
2491)
2492xt "16900,77500,19000,78500"
2493st "TRG"
2494ju 2
2495blo "19000,78300"
2496tm "WireNameMgr"
2497)
2498)
2499)
2500*64 (PortIoIn
2501uid 251,0
2502shape (CompositeShape
2503uid 252,0
2504va (VaSet
2505vasetType 1
2506fg "0,0,32768"
2507)
2508optionalChildren [
2509(Pentagon
2510uid 253,0
2511sl 0
2512ro 270
2513xt "19000,67625,20500,68375"
2514)
2515(Line
2516uid 254,0
2517sl 0
2518ro 270
2519xt "20500,68000,21000,68000"
2520pts [
2521"20500,68000"
2522"21000,68000"
2523]
2524)
2525]
2526)
2527stc 0
2528sf 1
2529tg (WTG
2530uid 255,0
2531ps "PortIoTextPlaceStrategy"
2532stg "STSignalDisplayStrategy"
2533f (Text
2534uid 256,0
2535va (VaSet
2536)
2537xt "15200,67500,18000,68500"
2538st "X_50M"
2539ju 2
2540blo "18000,68300"
2541tm "WireNameMgr"
2542)
2543)
2544)
2545*65 (HdlText
2546uid 265,0
2547optionalChildren [
2548*66 (EmbeddedText
2549uid 271,0
2550commentText (CommentText
2551uid 272,0
2552ps "CenterOffsetStrategy"
2553shape (Rectangle
2554uid 273,0
2555va (VaSet
2556vasetType 1
2557fg "65535,65535,65535"
2558lineColor "0,0,32768"
2559lineWidth 2
2560)
2561xt "32000,83000,44000,87000"
2562)
2563oxt "12000,27000,20000,31000"
2564text (MLText
2565uid 274,0
2566va (VaSet
2567)
2568xt "32200,83200,39700,86200"
2569st "
2570-- hard-wired IDs
2571board_id <= \"0101\";
2572crate_id <= \"01\";
2573"
2574tm "HdlTextMgr"
2575wrapOption 3
2576visibleHeight 4000
2577visibleWidth 12000
2578)
2579)
2580)
2581]
2582shape (Rectangle
2583uid 266,0
2584va (VaSet
2585vasetType 1
2586fg "65535,65535,37120"
2587lineColor "0,0,32768"
2588lineWidth 2
2589)
2590xt "24000,80000,32000,87000"
2591)
2592oxt "12000,23000,17000,27000"
2593ttg (MlTextGroup
2594uid 267,0
2595ps "CenterOffsetStrategy"
2596stg "VerticalLayoutStrategy"
2597textVec [
2598*67 (Text
2599uid 268,0
2600va (VaSet
2601font "Arial,8,1"
2602)
2603xt "26150,81000,28650,82000"
2604st "eb_ID"
2605blo "26150,81800"
2606tm "HdlTextNameMgr"
2607)
2608*68 (Text
2609uid 269,0
2610va (VaSet
2611font "Arial,8,1"
2612)
2613xt "26150,82000,26950,83000"
2614st "1"
2615blo "26150,82800"
2616tm "HdlTextNumberMgr"
2617)
2618]
2619)
2620viewicon (ZoomableIcon
2621uid 270,0
2622sl 0
2623va (VaSet
2624vasetType 1
2625fg "49152,49152,49152"
2626)
2627xt "24250,85250,25750,86750"
2628iconName "TextFile.png"
2629iconMaskName "TextFile.msk"
2630ftype 21
2631)
2632viewiconposition 0
2633)
2634*69 (Net
2635uid 275,0
2636decl (Decl
2637n "board_id"
2638t "std_logic_vector"
2639b "(3 downto 0)"
2640preAdd 0
2641posAdd 0
2642o 69
2643suid 5,0
2644)
2645declText (MLText
2646uid 276,0
2647va (VaSet
2648font "Courier New,8,0"
2649)
2650xt "39000,60800,67500,61600"
2651st "SIGNAL board_id        : std_logic_vector(3 downto 0)
2652"
2653)
2654)
2655*70 (Net
2656uid 283,0
2657decl (Decl
2658n "crate_id"
2659t "std_logic_vector"
2660b "(1 downto 0)"
2661o 70
2662suid 6,0
2663)
2664declText (MLText
2665uid 284,0
2666va (VaSet
2667font "Courier New,8,0"
2668)
2669xt "39000,61600,67500,62400"
2670st "SIGNAL crate_id        : std_logic_vector(1 downto 0)
2671"
2672)
2673)
2674*71 (PortIoOut
2675uid 472,0
2676shape (CompositeShape
2677uid 473,0
2678va (VaSet
2679vasetType 1
2680fg "0,0,32768"
2681)
2682optionalChildren [
2683(Pentagon
2684uid 474,0
2685sl 0
2686ro 270
2687xt "111500,70625,113000,71375"
2688)
2689(Line
2690uid 475,0
2691sl 0
2692ro 270
2693xt "111000,71000,111500,71000"
2694pts [
2695"111000,71000"
2696"111500,71000"
2697]
2698)
2699]
2700)
2701stc 0
2702sf 1
2703tg (WTG
2704uid 476,0
2705ps "PortIoTextPlaceStrategy"
2706stg "STSignalDisplayStrategy"
2707f (Text
2708uid 477,0
2709va (VaSet
2710)
2711xt "114000,70500,117100,71500"
2712st "W_RES"
2713blo "114000,71300"
2714tm "WireNameMgr"
2715)
2716)
2717)
2718*72 (PortIoOut
2719uid 478,0
2720shape (CompositeShape
2721uid 479,0
2722va (VaSet
2723vasetType 1
2724fg "0,0,32768"
2725)
2726optionalChildren [
2727(Pentagon
2728uid 480,0
2729sl 0
2730ro 270
2731xt "111500,67625,113000,68375"
2732)
2733(Line
2734uid 481,0
2735sl 0
2736ro 270
2737xt "111000,68000,111500,68000"
2738pts [
2739"111000,68000"
2740"111500,68000"
2741]
2742)
2743]
2744)
2745stc 0
2746sf 1
2747tg (WTG
2748uid 482,0
2749ps "PortIoTextPlaceStrategy"
2750stg "STSignalDisplayStrategy"
2751f (Text
2752uid 483,0
2753va (VaSet
2754)
2755xt "114000,67500,116000,68500"
2756st "W_A"
2757blo "114000,68300"
2758tm "WireNameMgr"
2759)
2760)
2761)
2762*73 (PortIoOut
2763uid 484,0
2764shape (CompositeShape
2765uid 485,0
2766va (VaSet
2767vasetType 1
2768fg "0,0,32768"
2769)
2770optionalChildren [
2771(Pentagon
2772uid 486,0
2773sl 0
2774ro 270
2775xt "111500,74625,113000,75375"
2776)
2777(Line
2778uid 487,0
2779sl 0
2780ro 270
2781xt "111000,75000,111500,75000"
2782pts [
2783"111000,75000"
2784"111500,75000"
2785]
2786)
2787]
2788)
2789stc 0
2790sf 1
2791tg (WTG
2792uid 488,0
2793ps "PortIoTextPlaceStrategy"
2794stg "STSignalDisplayStrategy"
2795f (Text
2796uid 489,0
2797va (VaSet
2798)
2799xt "114000,74500,116600,75500"
2800st "W_CS"
2801blo "114000,75300"
2802tm "WireNameMgr"
2803)
2804)
2805)
2806*74 (PortIoInOut
2807uid 490,0
2808shape (CompositeShape
2809uid 491,0
2810va (VaSet
2811vasetType 1
2812fg "0,0,32768"
2813)
2814optionalChildren [
2815(Hexagon
2816uid 492,0
2817sl 0
2818xt "111500,68625,113000,69375"
2819)
2820(Line
2821uid 493,0
2822sl 0
2823xt "111000,69000,111500,69000"
2824pts [
2825"111000,69000"
2826"111500,69000"
2827]
2828)
2829]
2830)
2831stc 0
2832sf 1
2833tg (WTG
2834uid 494,0
2835ps "PortIoTextPlaceStrategy"
2836stg "STSignalDisplayStrategy"
2837f (Text
2838uid 495,0
2839va (VaSet
2840)
2841xt "114000,68500,116100,69500"
2842st "W_D"
2843blo "114000,69300"
2844tm "WireNameMgr"
2845)
2846)
2847)
2848*75 (PortIoIn
2849uid 496,0
2850shape (CompositeShape
2851uid 497,0
2852va (VaSet
2853vasetType 1
2854fg "0,0,32768"
2855)
2856optionalChildren [
2857(Pentagon
2858uid 498,0
2859sl 0
2860ro 90
2861xt "111500,73625,113000,74375"
2862)
2863(Line
2864uid 499,0
2865sl 0
2866ro 90
2867xt "111000,74000,111500,74000"
2868pts [
2869"111500,74000"
2870"111000,74000"
2871]
2872)
2873]
2874)
2875stc 0
2876sf 1
2877tg (WTG
2878uid 500,0
2879ps "PortIoTextPlaceStrategy"
2880stg "STSignalDisplayStrategy"
2881f (Text
2882uid 501,0
2883va (VaSet
2884)
2885xt "114000,73500,116800,74500"
2886st "W_INT"
2887blo "114000,74300"
2888tm "WireNameMgr"
2889)
2890)
2891)
2892*76 (PortIoOut
2893uid 502,0
2894shape (CompositeShape
2895uid 503,0
2896va (VaSet
2897vasetType 1
2898fg "0,0,32768"
2899)
2900optionalChildren [
2901(Pentagon
2902uid 504,0
2903sl 0
2904ro 270
2905xt "111500,71625,113000,72375"
2906)
2907(Line
2908uid 505,0
2909sl 0
2910ro 270
2911xt "111000,72000,111500,72000"
2912pts [
2913"111000,72000"
2914"111500,72000"
2915]
2916)
2917]
2918)
2919stc 0
2920sf 1
2921tg (WTG
2922uid 506,0
2923ps "PortIoTextPlaceStrategy"
2924stg "STSignalDisplayStrategy"
2925f (Text
2926uid 507,0
2927va (VaSet
2928)
2929xt "114000,71500,116700,72500"
2930st "W_RD"
2931blo "114000,72300"
2932tm "WireNameMgr"
2933)
2934)
2935)
2936*77 (PortIoOut
2937uid 508,0
2938shape (CompositeShape
2939uid 509,0
2940va (VaSet
2941vasetType 1
2942fg "0,0,32768"
2943)
2944optionalChildren [
2945(Pentagon
2946uid 510,0
2947sl 0
2948ro 270
2949xt "111500,72625,113000,73375"
2950)
2951(Line
2952uid 511,0
2953sl 0
2954ro 270
2955xt "111000,73000,111500,73000"
2956pts [
2957"111000,73000"
2958"111500,73000"
2959]
2960)
2961]
2962)
2963stc 0
2964sf 1
2965tg (WTG
2966uid 512,0
2967ps "PortIoTextPlaceStrategy"
2968stg "STSignalDisplayStrategy"
2969f (Text
2970uid 513,0
2971va (VaSet
2972)
2973xt "114000,72500,116800,73500"
2974st "W_WR"
2975blo "114000,73300"
2976tm "WireNameMgr"
2977)
2978)
2979)
2980*78 (Net
2981uid 1465,0
2982decl (Decl
2983n "adc_data_array"
2984t "adc_data_array_type"
2985o 68
2986suid 29,0
2987)
2988declText (MLText
2989uid 1466,0
2990va (VaSet
2991font "Courier New,8,0"
2992)
2993xt "39000,60000,63000,60800"
2994st "SIGNAL adc_data_array  : adc_data_array_type
2995"
2996)
2997)
2998*79 (Net
2999uid 2407,0
3000decl (Decl
3001n "RSRLOAD"
3002t "std_logic"
3003o 37
3004suid 57,0
3005i "'0'"
3006)
3007declText (MLText
3008uid 2408,0
3009va (VaSet
3010font "Courier New,8,0"
3011)
3012xt "39000,34200,68500,35000"
3013st "RSRLOAD         : std_logic                      := '0'
3014"
3015)
3016)
3017*80 (PortIoOut
3018uid 2415,0
3019shape (CompositeShape
3020uid 2416,0
3021va (VaSet
3022vasetType 1
3023fg "0,0,32768"
3024)
3025optionalChildren [
3026(Pentagon
3027uid 2417,0
3028sl 0
3029ro 90
3030xt "19000,110625,20500,111375"
3031)
3032(Line
3033uid 2418,0
3034sl 0
3035ro 90
3036xt "20500,111000,21000,111000"
3037pts [
3038"21000,111000"
3039"20500,111000"
3040]
3041)
3042]
3043)
3044stc 0
3045sf 1
3046tg (WTG
3047uid 2419,0
3048ps "PortIoTextPlaceStrategy"
3049stg "STSignalDisplayStrategy"
3050f (Text
3051uid 2420,0
3052va (VaSet
3053)
3054xt "13800,110500,18000,111500"
3055st "RSRLOAD"
3056ju 2
3057blo "18000,111300"
3058tm "WireNameMgr"
3059)
3060)
3061)
3062*81 (Net
3063uid 2421,0
3064decl (Decl
3065n "SRCLK"
3066t "std_logic"
3067o 66
3068suid 58,0
3069i "'0'"
3070)
3071declText (MLText
3072uid 2422,0
3073va (VaSet
3074font "Courier New,8,0"
3075)
3076xt "39000,58400,72000,59200"
3077st "SIGNAL SRCLK           : std_logic                      := '0'
3078"
3079)
3080)
3081*82 (Net
3082uid 3019,0
3083decl (Decl
3084n "sensor_cs"
3085t "std_logic_vector"
3086b "(3 DOWNTO 0)"
3087o 74
3088suid 65,0
3089)
3090declText (MLText
3091uid 3020,0
3092va (VaSet
3093font "Courier New,8,0"
3094)
3095xt "39000,64800,67500,65600"
3096st "SIGNAL sensor_cs       : std_logic_vector(3 DOWNTO 0)
3097"
3098)
3099)
3100*83 (Net
3101uid 3025,0
3102decl (Decl
3103n "DAC_CS"
3104t "std_logic"
3105o 22
3106suid 66,0
3107)
3108declText (MLText
3109uid 3026,0
3110va (VaSet
3111font "Courier New,8,0"
3112)
3113xt "39000,22200,54000,23000"
3114st "DAC_CS          : std_logic
3115"
3116)
3117)
3118*84 (PortIoOut
3119uid 3153,0
3120shape (CompositeShape
3121uid 3154,0
3122va (VaSet
3123vasetType 1
3124fg "0,0,32768"
3125)
3126optionalChildren [
3127(Pentagon
3128uid 3155,0
3129sl 0
3130ro 90
3131xt "19000,69625,20500,70375"
3132)
3133(Line
3134uid 3156,0
3135sl 0
3136ro 90
3137xt "20500,70000,21000,70000"
3138pts [
3139"21000,70000"
3140"20500,70000"
3141]
3142)
3143]
3144)
3145stc 0
3146sf 1
3147tg (WTG
3148uid 3157,0
3149ps "PortIoTextPlaceStrategy"
3150stg "STSignalDisplayStrategy"
3151f (Text
3152uid 3158,0
3153va (VaSet
3154)
3155xt "15200,69500,18000,70500"
3156st "A_CLK"
3157ju 2
3158blo "18000,70300"
3159tm "WireNameMgr"
3160)
3161)
3162)
3163*85 (Net
3164uid 3216,0
3165decl (Decl
3166n "X_50M"
3167t "STD_LOGIC"
3168preAdd 0
3169posAdd 0
3170o 14
3171suid 67,0
3172)
3173declText (MLText
3174uid 3217,0
3175va (VaSet
3176font "Courier New,8,0"
3177)
3178xt "39000,15800,54000,16600"
3179st "X_50M           : STD_LOGIC
3180"
3181)
3182)
3183*86 (Net
3184uid 3226,0
3185decl (Decl
3186n "TRG"
3187t "STD_LOGIC"
3188o 12
3189suid 68,0
3190)
3191declText (MLText
3192uid 3227,0
3193va (VaSet
3194font "Courier New,8,0"
3195)
3196xt "39000,14200,54000,15000"
3197st "TRG             : STD_LOGIC
3198"
3199)
3200)
3201*87 (HdlText
3202uid 3248,0
3203optionalChildren [
3204*88 (EmbeddedText
3205uid 3254,0
3206commentText (CommentText
3207uid 3255,0
3208ps "CenterOffsetStrategy"
3209shape (Rectangle
3210uid 3256,0
3211va (VaSet
3212vasetType 1
3213fg "65535,65535,65535"
3214lineColor "0,0,32768"
3215lineWidth 2
3216)
3217xt "29000,71000,41000,77000"
3218)
3219oxt "0,0,18000,5000"
3220text (MLText
3221uid 3257,0
3222va (VaSet
3223)
3224xt "29200,71200,41100,77200"
3225st "
3226-- ADC_CLK 2
3227A_CLK (0) <= CLK_25_PS;
3228A_CLK (1) <= CLK_25_PS;
3229A_CLK (2) <= CLK_25_PS;
3230A_CLK (3) <= CLK_25_PS;                                       
3231"
3232tm "HdlTextMgr"
3233wrapOption 3
3234visibleHeight 6000
3235visibleWidth 12000
3236)
3237)
3238)
3239]
3240shape (Rectangle
3241uid 3249,0
3242va (VaSet
3243vasetType 1
3244fg "65535,65535,37120"
3245lineColor "0,0,32768"
3246lineWidth 2
3247)
3248xt "24000,69000,29000,77000"
3249)
3250oxt "0,0,8000,10000"
3251ttg (MlTextGroup
3252uid 3250,0
3253ps "CenterOffsetStrategy"
3254stg "VerticalLayoutStrategy"
3255textVec [
3256*89 (Text
3257uid 3251,0
3258va (VaSet
3259font "Arial,8,1"
3260)
3261xt "24150,73000,28350,74000"
3262st "ADC_CLK"
3263blo "24150,73800"
3264tm "HdlTextNameMgr"
3265)
3266*90 (Text
3267uid 3252,0
3268va (VaSet
3269font "Arial,8,1"
3270)
3271xt "24150,74000,24950,75000"
3272st "2"
3273blo "24150,74800"
3274tm "HdlTextNumberMgr"
3275)
3276]
3277)
3278viewicon (ZoomableIcon
3279uid 3253,0
3280sl 0
3281va (VaSet
3282vasetType 1
3283fg "49152,49152,49152"
3284)
3285xt "24250,75250,25750,76750"
3286iconName "TextFile.png"
3287iconMaskName "TextFile.msk"
3288ftype 21
3289)
3290viewiconposition 0
3291)
3292*91 (Net
3293uid 3266,0
3294decl (Decl
3295n "A_CLK"
3296t "std_logic_vector"
3297b "(3 downto 0)"
3298o 17
3299suid 71,0
3300)
3301declText (MLText
3302uid 3267,0
3303va (VaSet
3304font "Courier New,8,0"
3305)
3306xt "39000,18200,64000,19000"
3307st "A_CLK           : std_logic_vector(3 downto 0)
3308"
3309)
3310)
3311*92 (Net
3312uid 3268,0
3313decl (Decl
3314n "CLK_25_PS"
3315t "std_logic"
3316o 55
3317suid 72,0
3318)
3319declText (MLText
3320uid 3269,0
3321va (VaSet
3322font "Courier New,8,0"
3323)
3324xt "39000,49600,57500,50400"
3325st "SIGNAL CLK_25_PS       : std_logic
3326"
3327)
3328)
3329*93 (PortIoOut
3330uid 3284,0
3331shape (CompositeShape
3332uid 3285,0
3333va (VaSet
3334vasetType 1
3335fg "0,0,32768"
3336)
3337optionalChildren [
3338(Pentagon
3339uid 3286,0
3340sl 0
3341ro 90
3342xt "19000,89625,20500,90375"
3343)
3344(Line
3345uid 3287,0
3346sl 0
3347ro 90
3348xt "20500,90000,21000,90000"
3349pts [
3350"21000,90000"
3351"20500,90000"
3352]
3353)
3354]
3355)
3356stc 0
3357sf 1
3358tg (WTG
3359uid 3288,0
3360ps "PortIoTextPlaceStrategy"
3361stg "STSignalDisplayStrategy"
3362f (Text
3363uid 3289,0
3364va (VaSet
3365)
3366xt "14400,89500,18000,90500"
3367st "OE_ADC"
3368ju 2
3369blo "18000,90300"
3370tm "WireNameMgr"
3371)
3372)
3373)
3374*94 (Net
3375uid 3290,0
3376decl (Decl
3377n "OE_ADC"
3378t "STD_LOGIC"
3379preAdd 0
3380posAdd 0
3381o 31
3382suid 73,0
3383)
3384declText (MLText
3385uid 3291,0
3386va (VaSet
3387font "Courier New,8,0"
3388)
3389xt "39000,29400,54000,30200"
3390st "OE_ADC          : STD_LOGIC
3391"
3392)
3393)
3394*95 (PortIoIn
3395uid 3292,0
3396shape (CompositeShape
3397uid 3293,0
3398va (VaSet
3399vasetType 1
3400fg "0,0,32768"
3401)
3402optionalChildren [
3403(Pentagon
3404uid 3294,0
3405sl 0
3406ro 270
3407xt "19000,88625,20500,89375"
3408)
3409(Line
3410uid 3295,0
3411sl 0
3412ro 270
3413xt "20500,89000,21000,89000"
3414pts [
3415"20500,89000"
3416"21000,89000"
3417]
3418)
3419]
3420)
3421stc 0
3422sf 1
3423tg (WTG
3424uid 3296,0
3425ps "PortIoTextPlaceStrategy"
3426stg "STSignalDisplayStrategy"
3427f (Text
3428uid 3297,0
3429va (VaSet
3430)
3431xt "15000,88500,18000,89500"
3432st "A_OTR"
3433ju 2
3434blo "18000,89300"
3435tm "WireNameMgr"
3436)
3437)
3438)
3439*96 (Net
3440uid 3298,0
3441decl (Decl
3442n "A_OTR"
3443t "std_logic_vector"
3444b "(3 DOWNTO 0)"
3445o 5
3446suid 74,0
3447)
3448declText (MLText
3449uid 3299,0
3450va (VaSet
3451font "Courier New,8,0"
3452)
3453xt "39000,7000,64000,7800"
3454st "A_OTR           : std_logic_vector(3 DOWNTO 0)
3455"
3456)
3457)
3458*97 (HdlText
3459uid 3300,0
3460optionalChildren [
3461*98 (EmbeddedText
3462uid 3306,0
3463commentText (CommentText
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3465ps "CenterOffsetStrategy"
3466shape (Rectangle
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3468va (VaSet
3469vasetType 1
3470fg "65535,65535,65535"
3471lineColor "0,0,32768"
3472lineWidth 2
3473)
3474xt "32000,96000,44000,102000"
3475)
3476oxt "0,0,18000,5000"
3477text (MLText
3478uid 3309,0
3479va (VaSet
3480)
3481xt "32200,96200,44200,102200"
3482st "
3483-- ADC_DATA 3
3484adc_data_array (0) <= A0_D;
3485adc_data_array (1) <= A1_D;
3486adc_data_array (2) <= A2_D;
3487adc_data_array (3) <= A3_D;                                       
3488"
3489tm "HdlTextMgr"
3490wrapOption 3
3491visibleHeight 6000
3492visibleWidth 12000
3493)
3494)
3495)
3496]
3497shape (Rectangle
3498uid 3301,0
3499va (VaSet
3500vasetType 1
3501fg "65535,65535,37120"
3502lineColor "0,0,32768"
3503lineWidth 2
3504)
3505xt "24000,94000,32000,102000"
3506)
3507oxt "0,0,8000,10000"
3508ttg (MlTextGroup
3509uid 3302,0
3510ps "CenterOffsetStrategy"
3511stg "VerticalLayoutStrategy"
3512textVec [
3513*99 (Text
3514uid 3303,0
3515va (VaSet
3516font "Arial,8,1"
3517)
3518xt "27150,95000,31750,96000"
3519st "ADC_DATA"
3520blo "27150,95800"
3521tm "HdlTextNameMgr"
3522)
3523*100 (Text
3524uid 3304,0
3525va (VaSet
3526font "Arial,8,1"
3527)
3528xt "27150,96000,27950,97000"
3529st "3"
3530blo "27150,96800"
3531tm "HdlTextNumberMgr"
3532)
3533]
3534)
3535viewicon (ZoomableIcon
3536uid 3305,0
3537sl 0
3538va (VaSet
3539vasetType 1
3540fg "49152,49152,49152"
3541)
3542xt "24250,100250,25750,101750"
3543iconName "TextFile.png"
3544iconMaskName "TextFile.msk"
3545ftype 21
3546)
3547viewiconposition 0
3548)
3549*101 (PortIoIn
3550uid 3310,0
3551shape (CompositeShape
3552uid 3311,0
3553va (VaSet
3554vasetType 1
3555fg "0,0,32768"
3556)
3557optionalChildren [
3558(Pentagon
3559uid 3312,0
3560sl 0
3561ro 270
3562xt "19000,94625,20500,95375"
3563)
3564(Line
3565uid 3313,0
3566sl 0
3567ro 270
3568xt "20500,95000,21000,95000"
3569pts [
3570"20500,95000"
3571"21000,95000"
3572]
3573)
3574]
3575)
3576stc 0
3577sf 1
3578tg (WTG
3579uid 3314,0
3580ps "PortIoTextPlaceStrategy"
3581stg "STSignalDisplayStrategy"
3582f (Text
3583uid 3315,0
3584va (VaSet
3585)
3586xt "15700,94500,18000,95500"
3587st "A0_D"
3588ju 2
3589blo "18000,95300"
3590tm "WireNameMgr"
3591)
3592)
3593)
3594*102 (PortIoIn
3595uid 3332,0
3596shape (CompositeShape
3597uid 3333,0
3598va (VaSet
3599vasetType 1
3600fg "0,0,32768"
3601)
3602optionalChildren [
3603(Pentagon
3604uid 3334,0
3605sl 0
3606ro 270
3607xt "19000,95625,20500,96375"
3608)
3609(Line
3610uid 3335,0
3611sl 0
3612ro 270
3613xt "20500,96000,21000,96000"
3614pts [
3615"20500,96000"
3616"21000,96000"
3617]
3618)
3619]
3620)
3621stc 0
3622sf 1
3623tg (WTG
3624uid 3336,0
3625ps "PortIoTextPlaceStrategy"
3626stg "STSignalDisplayStrategy"
3627f (Text
3628uid 3337,0
3629va (VaSet
3630)
3631xt "15700,95500,18000,96500"
3632st "A1_D"
3633ju 2
3634blo "18000,96300"
3635tm "WireNameMgr"
3636)
3637)
3638)
3639*103 (PortIoIn
3640uid 3338,0
3641shape (CompositeShape
3642uid 3339,0
3643va (VaSet
3644vasetType 1
3645fg "0,0,32768"
3646)
3647optionalChildren [
3648(Pentagon
3649uid 3340,0
3650sl 0
3651ro 270
3652xt "19000,96625,20500,97375"
3653)
3654(Line
3655uid 3341,0
3656sl 0
3657ro 270
3658xt "20500,97000,21000,97000"
3659pts [
3660"20500,97000"
3661"21000,97000"
3662]
3663)
3664]
3665)
3666stc 0
3667sf 1
3668tg (WTG
3669uid 3342,0
3670ps "PortIoTextPlaceStrategy"
3671stg "STSignalDisplayStrategy"
3672f (Text
3673uid 3343,0
3674va (VaSet
3675)
3676xt "15700,96500,18000,97500"
3677st "A2_D"
3678ju 2
3679blo "18000,97300"
3680tm "WireNameMgr"
3681)
3682)
3683)
3684*104 (PortIoIn
3685uid 3344,0
3686shape (CompositeShape
3687uid 3345,0
3688va (VaSet
3689vasetType 1
3690fg "0,0,32768"
3691)
3692optionalChildren [
3693(Pentagon
3694uid 3346,0
3695sl 0
3696ro 270
3697xt "19000,97625,20500,98375"
3698)
3699(Line
3700uid 3347,0
3701sl 0
3702ro 270
3703xt "20500,98000,21000,98000"
3704pts [
3705"20500,98000"
3706"21000,98000"
3707]
3708)
3709]
3710)
3711stc 0
3712sf 1
3713tg (WTG
3714uid 3348,0
3715ps "PortIoTextPlaceStrategy"
3716stg "STSignalDisplayStrategy"
3717f (Text
3718uid 3349,0
3719va (VaSet
3720)
3721xt "15700,97500,18000,98500"
3722st "A3_D"
3723ju 2
3724blo "18000,98300"
3725tm "WireNameMgr"
3726)
3727)
3728)
3729*105 (Net
3730uid 3374,0
3731decl (Decl
3732n "A0_D"
3733t "std_logic_vector"
3734b "(11 DOWNTO 0)"
3735o 1
3736suid 79,0
3737)
3738declText (MLText
3739uid 3375,0
3740va (VaSet
3741font "Courier New,8,0"
3742)
3743xt "39000,3800,64500,4600"
3744st "A0_D            : std_logic_vector(11 DOWNTO 0)
3745"
3746)
3747)
3748*106 (Net
3749uid 3376,0
3750decl (Decl
3751n "A1_D"
3752t "std_logic_vector"
3753b "(11 DOWNTO 0)"
3754o 2
3755suid 80,0
3756)
3757declText (MLText
3758uid 3377,0
3759va (VaSet
3760font "Courier New,8,0"
3761)
3762xt "39000,4600,64500,5400"
3763st "A1_D            : std_logic_vector(11 DOWNTO 0)
3764"
3765)
3766)
3767*107 (Net
3768uid 3378,0
3769decl (Decl
3770n "A2_D"
3771t "std_logic_vector"
3772b "(11 DOWNTO 0)"
3773o 3
3774suid 81,0
3775)
3776declText (MLText
3777uid 3379,0
3778va (VaSet
3779font "Courier New,8,0"
3780)
3781xt "39000,5400,64500,6200"
3782st "A2_D            : std_logic_vector(11 DOWNTO 0)
3783"
3784)
3785)
3786*108 (Net
3787uid 3380,0
3788decl (Decl
3789n "A3_D"
3790t "std_logic_vector"
3791b "(11 DOWNTO 0)"
3792o 4
3793suid 82,0
3794)
3795declText (MLText
3796uid 3381,0
3797va (VaSet
3798font "Courier New,8,0"
3799)
3800xt "39000,6200,64500,7000"
3801st "A3_D            : std_logic_vector(11 DOWNTO 0)
3802"
3803)
3804)
3805*109 (HdlText
3806uid 3394,0
3807optionalChildren [
3808*110 (EmbeddedText
3809uid 3400,0
3810commentText (CommentText
3811uid 3401,0
3812ps "CenterOffsetStrategy"
3813shape (Rectangle
3814uid 3402,0
3815va (VaSet
3816vasetType 1
3817fg "65535,65535,65535"
3818lineColor "0,0,32768"
3819lineWidth 2
3820)
3821xt "32000,114000,44000,120000"
3822)
3823oxt "0,0,18000,5000"
3824text (MLText
3825uid 3403,0
3826va (VaSet
3827)
3828xt "32200,114200,44200,120200"
3829st "
3830-- SRCLK 4         
3831D0_SRCLK <= SRCLK;
3832D1_SRCLK <= SRCLK;
3833D2_SRCLK <= SRCLK;
3834D3_SRCLK <= SRCLK;                               
3835"
3836tm "HdlTextMgr"
3837wrapOption 3
3838visibleHeight 6000
3839visibleWidth 12000
3840)
3841)
3842)
3843]
3844shape (Rectangle
3845uid 3395,0
3846va (VaSet
3847vasetType 1
3848fg "65535,65535,37120"
3849lineColor "0,0,32768"
3850lineWidth 2
3851)
3852xt "24000,112000,32000,120000"
3853)
3854oxt "0,0,8000,10000"
3855ttg (MlTextGroup
3856uid 3396,0
3857ps "CenterOffsetStrategy"
3858stg "VerticalLayoutStrategy"
3859textVec [
3860*111 (Text
3861uid 3397,0
3862va (VaSet
3863font "Arial,8,1"
3864)
3865xt "27150,113000,30350,114000"
3866st "SRCLK"
3867blo "27150,113800"
3868tm "HdlTextNameMgr"
3869)
3870*112 (Text
3871uid 3398,0
3872va (VaSet
3873font "Arial,8,1"
3874)
3875xt "27150,114000,27950,115000"
3876st "4"
3877blo "27150,114800"
3878tm "HdlTextNumberMgr"
3879)
3880]
3881)
3882viewicon (ZoomableIcon
3883uid 3399,0
3884sl 0
3885va (VaSet
3886vasetType 1
3887fg "49152,49152,49152"
3888)
3889xt "24250,118250,25750,119750"
3890iconName "TextFile.png"
3891iconMaskName "TextFile.msk"
3892ftype 21
3893)
3894viewiconposition 0
3895)
3896*113 (Net
3897uid 3460,0
3898decl (Decl
3899n "D0_SRCLK"
3900t "STD_LOGIC"
3901o 18
3902suid 87,0
3903)
3904declText (MLText
3905uid 3461,0
3906va (VaSet
3907font "Courier New,8,0"
3908)
3909xt "39000,19000,54000,19800"
3910st "D0_SRCLK        : STD_LOGIC
3911"
3912)
3913)
3914*114 (Net
3915uid 3462,0
3916decl (Decl
3917n "D1_SRCLK"
3918t "STD_LOGIC"
3919o 19
3920suid 88,0
3921)
3922declText (MLText
3923uid 3463,0
3924va (VaSet
3925font "Courier New,8,0"
3926)
3927xt "39000,19800,54000,20600"
3928st "D1_SRCLK        : STD_LOGIC
3929"
3930)
3931)
3932*115 (Net
3933uid 3464,0
3934decl (Decl
3935n "D2_SRCLK"
3936t "STD_LOGIC"
3937o 20
3938suid 89,0
3939)
3940declText (MLText
3941uid 3465,0
3942va (VaSet
3943font "Courier New,8,0"
3944)
3945xt "39000,20600,54000,21400"
3946st "D2_SRCLK        : STD_LOGIC
3947"
3948)
3949)
3950*116 (Net
3951uid 3466,0
3952decl (Decl
3953n "D3_SRCLK"
3954t "STD_LOGIC"
3955o 21
3956suid 90,0
3957)
3958declText (MLText
3959uid 3467,0
3960va (VaSet
3961font "Courier New,8,0"
3962)
3963xt "39000,21400,54000,22200"
3964st "D3_SRCLK        : STD_LOGIC
3965"
3966)
3967)
3968*117 (PortIoIn
3969uid 3476,0
3970shape (CompositeShape
3971uid 3477,0
3972va (VaSet
3973vasetType 1
3974fg "0,0,32768"
3975)
3976optionalChildren [
3977(Pentagon
3978uid 3478,0
3979sl 0
3980ro 270
3981xt "19000,104625,20500,105375"
3982)
3983(Line
3984uid 3479,0
3985sl 0
3986ro 270
3987xt "20500,105000,21000,105000"
3988pts [
3989"20500,105000"
3990"21000,105000"
3991]
3992)
3993]
3994)
3995stc 0
3996sf 1
3997tg (WTG
3998uid 3480,0
3999ps "PortIoTextPlaceStrategy"
4000stg "STSignalDisplayStrategy"
4001f (Text
4002uid 3481,0
4003va (VaSet
4004)
4005xt "13400,104500,18000,105500"
4006st "D0_SROUT"
4007ju 2
4008blo "18000,105300"
4009tm "WireNameMgr"
4010)
4011)
4012)
4013*118 (PortIoIn
4014uid 3482,0
4015shape (CompositeShape
4016uid 3483,0
4017va (VaSet
4018vasetType 1
4019fg "0,0,32768"
4020)
4021optionalChildren [
4022(Pentagon
4023uid 3484,0
4024sl 0
4025ro 270
4026xt "19000,105625,20500,106375"
4027)
4028(Line
4029uid 3485,0
4030sl 0
4031ro 270
4032xt "20500,106000,21000,106000"
4033pts [
4034"20500,106000"
4035"21000,106000"
4036]
4037)
4038]
4039)
4040stc 0
4041sf 1
4042tg (WTG
4043uid 3486,0
4044ps "PortIoTextPlaceStrategy"
4045stg "STSignalDisplayStrategy"
4046f (Text
4047uid 3487,0
4048va (VaSet
4049)
4050xt "13400,105500,18000,106500"
4051st "D1_SROUT"
4052ju 2
4053blo "18000,106300"
4054tm "WireNameMgr"
4055)
4056)
4057)
4058*119 (PortIoIn
4059uid 3488,0
4060shape (CompositeShape
4061uid 3489,0
4062va (VaSet
4063vasetType 1
4064fg "0,0,32768"
4065)
4066optionalChildren [
4067(Pentagon
4068uid 3490,0
4069sl 0
4070ro 270
4071xt "19000,106625,20500,107375"
4072)
4073(Line
4074uid 3491,0
4075sl 0
4076ro 270
4077xt "20500,107000,21000,107000"
4078pts [
4079"20500,107000"
4080"21000,107000"
4081]
4082)
4083]
4084)
4085stc 0
4086sf 1
4087tg (WTG
4088uid 3492,0
4089ps "PortIoTextPlaceStrategy"
4090stg "STSignalDisplayStrategy"
4091f (Text
4092uid 3493,0
4093va (VaSet
4094)
4095xt "13400,106500,18000,107500"
4096st "D2_SROUT"
4097ju 2
4098blo "18000,107300"
4099tm "WireNameMgr"
4100)
4101)
4102)
4103*120 (PortIoIn
4104uid 3494,0
4105shape (CompositeShape
4106uid 3495,0
4107va (VaSet
4108vasetType 1
4109fg "0,0,32768"
4110)
4111optionalChildren [
4112(Pentagon
4113uid 3496,0
4114sl 0
4115ro 270
4116xt "19000,107625,20500,108375"
4117)
4118(Line
4119uid 3497,0
4120sl 0
4121ro 270
4122xt "20500,108000,21000,108000"
4123pts [
4124"20500,108000"
4125"21000,108000"
4126]
4127)
4128]
4129)
4130stc 0
4131sf 1
4132tg (WTG
4133uid 3498,0
4134ps "PortIoTextPlaceStrategy"
4135stg "STSignalDisplayStrategy"
4136f (Text
4137uid 3499,0
4138va (VaSet
4139)
4140xt "13400,107500,18000,108500"
4141st "D3_SROUT"
4142ju 2
4143blo "18000,108300"
4144tm "WireNameMgr"
4145)
4146)
4147)
4148*121 (Net
4149uid 3500,0
4150decl (Decl
4151n "D0_SROUT"
4152t "std_logic"
4153o 6
4154suid 91,0
4155)
4156declText (MLText
4157uid 3501,0
4158va (VaSet
4159font "Courier New,8,0"
4160)
4161xt "39000,7800,54000,8600"
4162st "D0_SROUT        : std_logic
4163"
4164)
4165)
4166*122 (Net
4167uid 3502,0
4168decl (Decl
4169n "D1_SROUT"
4170t "std_logic"
4171o 7
4172suid 92,0
4173)
4174declText (MLText
4175uid 3503,0
4176va (VaSet
4177font "Courier New,8,0"
4178)
4179xt "39000,8600,54000,9400"
4180st "D1_SROUT        : std_logic
4181"
4182)
4183)
4184*123 (Net
4185uid 3504,0
4186decl (Decl
4187n "D2_SROUT"
4188t "std_logic"
4189o 8
4190suid 93,0
4191)
4192declText (MLText
4193uid 3505,0
4194va (VaSet
4195font "Courier New,8,0"
4196)
4197xt "39000,9400,54000,10200"
4198st "D2_SROUT        : std_logic
4199"
4200)
4201)
4202*124 (Net
4203uid 3506,0
4204decl (Decl
4205n "D3_SROUT"
4206t "std_logic"
4207o 9
4208suid 94,0
4209)
4210declText (MLText
4211uid 3507,0
4212va (VaSet
4213font "Courier New,8,0"
4214)
4215xt "39000,10200,54000,11000"
4216st "D3_SROUT        : std_logic
4217"
4218)
4219)
4220*125 (PortIoOut
4221uid 3508,0
4222shape (CompositeShape
4223uid 3509,0
4224va (VaSet
4225vasetType 1
4226fg "0,0,32768"
4227)
4228optionalChildren [
4229(Pentagon
4230uid 3510,0
4231sl 0
4232ro 90
4233xt "10000,125625,11500,126375"
4234)
4235(Line
4236uid 3511,0
4237sl 0
4238ro 90
4239xt "11500,126000,12000,126000"
4240pts [
4241"12000,126000"
4242"11500,126000"
4243]
4244)
4245]
4246)
4247stc 0
4248sf 1
4249tg (WTG
4250uid 3512,0
4251ps "PortIoTextPlaceStrategy"
4252stg "STSignalDisplayStrategy"
4253f (Text
4254uid 3513,0
4255va (VaSet
4256)
4257xt "7100,125500,9000,126500"
4258st "D_A"
4259ju 2
4260blo "9000,126300"
4261tm "WireNameMgr"
4262)
4263)
4264)
4265*126 (Net
4266uid 3514,0
4267decl (Decl
4268n "D_A"
4269t "std_logic_vector"
4270b "(3 DOWNTO 0)"
4271o 25
4272suid 95,0
4273i "(others => '0')"
4274)
4275declText (MLText
4276uid 3515,0
4277va (VaSet
4278font "Courier New,8,0"
4279)
4280xt "39000,24600,74500,25400"
4281st "D_A             : std_logic_vector(3 DOWNTO 0)   := (others => '0')
4282"
4283)
4284)
4285*127 (PortIoOut
4286uid 3516,0
4287shape (CompositeShape
4288uid 3517,0
4289va (VaSet
4290vasetType 1
4291fg "0,0,32768"
4292)
4293optionalChildren [
4294(Pentagon
4295uid 3518,0
4296sl 0
4297ro 90
4298xt "19000,109625,20500,110375"
4299)
4300(Line
4301uid 3519,0
4302sl 0
4303ro 90
4304xt "20500,110000,21000,110000"
4305pts [
4306"21000,110000"
4307"20500,110000"
4308]
4309)
4310]
4311)
4312stc 0
4313sf 1
4314tg (WTG
4315uid 3520,0
4316ps "PortIoTextPlaceStrategy"
4317stg "STSignalDisplayStrategy"
4318f (Text
4319uid 3521,0
4320va (VaSet
4321)
4322xt "14500,109500,18000,110500"
4323st "DWRITE"
4324ju 2
4325blo "18000,110300"
4326tm "WireNameMgr"
4327)
4328)
4329)
4330*128 (Net
4331uid 3522,0
4332decl (Decl
4333n "DWRITE"
4334t "std_logic"
4335o 24
4336suid 96,0
4337i "'0'"
4338)
4339declText (MLText
4340uid 3523,0
4341va (VaSet
4342font "Courier New,8,0"
4343)
4344xt "39000,23800,68500,24600"
4345st "DWRITE          : std_logic                      := '0'
4346"
4347)
4348)
4349*129 (PortIoOut
4350uid 3536,0
4351shape (CompositeShape
4352uid 3537,0
4353va (VaSet
4354vasetType 1
4355fg "0,0,32768"
4356)
4357optionalChildren [
4358(Pentagon
4359uid 3538,0
4360sl 0
4361ro 270
4362xt "111500,86625,113000,87375"
4363)
4364(Line
4365uid 3539,0
4366sl 0
4367ro 270
4368xt "111000,87000,111500,87000"
4369pts [
4370"111000,87000"
4371"111500,87000"
4372]
4373)
4374]
4375)
4376stc 0
4377sf 1
4378tg (WTG
4379uid 3540,0
4380ps "PortIoTextPlaceStrategy"
4381stg "STSignalDisplayStrategy"
4382f (Text
4383uid 3541,0
4384va (VaSet
4385)
4386xt "114000,86500,117600,87500"
4387st "DAC_CS"
4388blo "114000,87300"
4389tm "WireNameMgr"
4390)
4391)
4392)
4393*130 (HdlText
4394uid 3542,0
4395optionalChildren [
4396*131 (EmbeddedText
4397uid 3612,0
4398commentText (CommentText
4399uid 3613,0
4400ps "CenterOffsetStrategy"
4401shape (Rectangle
4402uid 3614,0
4403va (VaSet
4404vasetType 1
4405fg "65535,65535,65535"
4406lineColor "0,0,32768"
4407lineWidth 2
4408)
4409xt "88000,90000,100000,96000"
4410)
4411oxt "0,0,18000,5000"
4412text (MLText
4413uid 3615,0
4414va (VaSet
4415)
4416xt "88200,90200,100100,96200"
4417st "
4418-- T_CS 5
4419T0_CS <= sensor_cs (0);
4420T1_CS <= sensor_cs (1);
4421T2_CS <= sensor_cs (2);
4422T3_CS <= sensor_cs (3);                                     
4423"
4424tm "HdlTextMgr"
4425wrapOption 3
4426visibleHeight 6000
4427visibleWidth 12000
4428)
4429)
4430)
4431]
4432shape (Rectangle
4433uid 3543,0
4434va (VaSet
4435vasetType 1
4436fg "65535,65535,37120"
4437lineColor "0,0,32768"
4438lineWidth 2
4439)
4440xt "100000,88000,108000,96000"
4441)
4442oxt "0,0,8000,10000"
4443ttg (MlTextGroup
4444uid 3544,0
4445ps "CenterOffsetStrategy"
4446stg "VerticalLayoutStrategy"
4447textVec [
4448*132 (Text
4449uid 3545,0
4450va (VaSet
4451font "Arial,8,1"
4452)
4453xt "103150,89000,105550,90000"
4454st "T_CS"
4455blo "103150,89800"
4456tm "HdlTextNameMgr"
4457)
4458*133 (Text
4459uid 3546,0
4460va (VaSet
4461font "Arial,8,1"
4462)
4463xt "103150,90000,103950,91000"
4464st "5"
4465blo "103150,90800"
4466tm "HdlTextNumberMgr"
4467)
4468]
4469)
4470viewicon (ZoomableIcon
4471uid 3547,0
4472sl 0
4473va (VaSet
4474vasetType 1
4475fg "49152,49152,49152"
4476)
4477xt "100250,94250,101750,95750"
4478iconName "TextFile.png"
4479iconMaskName "TextFile.msk"
4480ftype 21
4481)
4482viewiconposition 0
4483)
4484*134 (PortIoOut
4485uid 3548,0
4486shape (CompositeShape
4487uid 3549,0
4488va (VaSet
4489vasetType 1
4490fg "0,0,32768"
4491)
4492optionalChildren [
4493(Pentagon
4494uid 3550,0
4495sl 0
4496ro 270
4497xt "111500,88625,113000,89375"
4498)
4499(Line
4500uid 3551,0
4501sl 0
4502ro 270
4503xt "111000,89000,111500,89000"
4504pts [
4505"111000,89000"
4506"111500,89000"
4507]
4508)
4509]
4510)
4511stc 0
4512sf 1
4513tg (WTG
4514uid 3552,0
4515ps "PortIoTextPlaceStrategy"
4516stg "STSignalDisplayStrategy"
4517f (Text
4518uid 3553,0
4519va (VaSet
4520)
4521xt "114000,88500,116800,89500"
4522st "T0_CS"
4523blo "114000,89300"
4524tm "WireNameMgr"
4525)
4526)
4527)
4528*135 (PortIoOut
4529uid 3554,0
4530shape (CompositeShape
4531uid 3555,0
4532va (VaSet
4533vasetType 1
4534fg "0,0,32768"
4535)
4536optionalChildren [
4537(Pentagon
4538uid 3556,0
4539sl 0
4540ro 270
4541xt "111500,89625,113000,90375"
4542)
4543(Line
4544uid 3557,0
4545sl 0
4546ro 270
4547xt "111000,90000,111500,90000"
4548pts [
4549"111000,90000"
4550"111500,90000"
4551]
4552)
4553]
4554)
4555stc 0
4556sf 1
4557tg (WTG
4558uid 3558,0
4559ps "PortIoTextPlaceStrategy"
4560stg "STSignalDisplayStrategy"
4561f (Text
4562uid 3559,0
4563va (VaSet
4564)
4565xt "114000,89500,116800,90500"
4566st "T1_CS"
4567blo "114000,90300"
4568tm "WireNameMgr"
4569)
4570)
4571)
4572*136 (PortIoOut
4573uid 3560,0
4574shape (CompositeShape
4575uid 3561,0
4576va (VaSet
4577vasetType 1
4578fg "0,0,32768"
4579)
4580optionalChildren [
4581(Pentagon
4582uid 3562,0
4583sl 0
4584ro 270
4585xt "111500,90625,113000,91375"
4586)
4587(Line
4588uid 3563,0
4589sl 0
4590ro 270
4591xt "111000,91000,111500,91000"
4592pts [
4593"111000,91000"
4594"111500,91000"
4595]
4596)
4597]
4598)
4599stc 0
4600sf 1
4601tg (WTG
4602uid 3564,0
4603ps "PortIoTextPlaceStrategy"
4604stg "STSignalDisplayStrategy"
4605f (Text
4606uid 3565,0
4607va (VaSet
4608)
4609xt "114000,90500,116800,91500"
4610st "T2_CS"
4611blo "114000,91300"
4612tm "WireNameMgr"
4613)
4614)
4615)
4616*137 (PortIoOut
4617uid 3566,0
4618shape (CompositeShape
4619uid 3567,0
4620va (VaSet
4621vasetType 1
4622fg "0,0,32768"
4623)
4624optionalChildren [
4625(Pentagon
4626uid 3568,0
4627sl 0
4628ro 270
4629xt "111500,91625,113000,92375"
4630)
4631(Line
4632uid 3569,0
4633sl 0
4634ro 270
4635xt "111000,92000,111500,92000"
4636pts [
4637"111000,92000"
4638"111500,92000"
4639]
4640)
4641]
4642)
4643stc 0
4644sf 1
4645tg (WTG
4646uid 3570,0
4647ps "PortIoTextPlaceStrategy"
4648stg "STSignalDisplayStrategy"
4649f (Text
4650uid 3571,0
4651va (VaSet
4652)
4653xt "114000,91500,116800,92500"
4654st "T3_CS"
4655blo "114000,92300"
4656tm "WireNameMgr"
4657)
4658)
4659)
4660*138 (Net
4661uid 3604,0
4662decl (Decl
4663n "T0_CS"
4664t "std_logic"
4665o 40
4666suid 101,0
4667)
4668declText (MLText
4669uid 3605,0
4670va (VaSet
4671font "Courier New,8,0"
4672)
4673xt "39000,36600,54000,37400"
4674st "T0_CS           : std_logic
4675"
4676)
4677)
4678*139 (Net
4679uid 3606,0
4680decl (Decl
4681n "T1_CS"
4682t "std_logic"
4683o 41
4684suid 102,0
4685)
4686declText (MLText
4687uid 3607,0
4688va (VaSet
4689font "Courier New,8,0"
4690)
4691xt "39000,37400,54000,38200"
4692st "T1_CS           : std_logic
4693"
4694)
4695)
4696*140 (Net
4697uid 3608,0
4698decl (Decl
4699n "T2_CS"
4700t "std_logic"
4701o 42
4702suid 103,0
4703)
4704declText (MLText
4705uid 3609,0
4706va (VaSet
4707font "Courier New,8,0"
4708)
4709xt "39000,38200,54000,39000"
4710st "T2_CS           : std_logic
4711"
4712)
4713)
4714*141 (Net
4715uid 3610,0
4716decl (Decl
4717n "T3_CS"
4718t "std_logic"
4719o 43
4720suid 104,0
4721)
4722declText (MLText
4723uid 3611,0
4724va (VaSet
4725font "Courier New,8,0"
4726)
4727xt "39000,39000,54000,39800"
4728st "T3_CS           : std_logic
4729"
4730)
4731)
4732*142 (PortIoOut
4733uid 3624,0
4734shape (CompositeShape
4735uid 3625,0
4736va (VaSet
4737vasetType 1
4738fg "0,0,32768"
4739)
4740optionalChildren [
4741(Pentagon
4742uid 3626,0
4743sl 0
4744ro 270
4745xt "111500,97625,113000,98375"
4746)
4747(Line
4748uid 3627,0
4749sl 0
4750ro 270
4751xt "111000,98000,111500,98000"
4752pts [
4753"111000,98000"
4754"111500,98000"
4755]
4756)
4757]
4758)
4759stc 0
4760sf 1
4761tg (WTG
4762uid 3628,0
4763ps "PortIoTextPlaceStrategy"
4764stg "STSignalDisplayStrategy"
4765f (Text
4766uid 3629,0
4767va (VaSet
4768)
4769xt "113750,97500,116550,98500"
4770st "S_CLK"
4771blo "113750,98300"
4772tm "WireNameMgr"
4773)
4774)
4775)
4776*143 (Net
4777uid 3630,0
4778decl (Decl
4779n "S_CLK"
4780t "std_logic"
4781o 39
4782suid 105,0
4783)
4784declText (MLText
4785uid 3631,0
4786va (VaSet
4787font "Courier New,8,0"
4788)
4789xt "39000,35800,54000,36600"
4790st "S_CLK           : std_logic
4791"
4792)
4793)
4794*144 (Net
4795uid 3632,0
4796decl (Decl
4797n "W_A"
4798t "std_logic_vector"
4799b "(9 DOWNTO 0)"
4800o 45
4801suid 106,0
4802)
4803declText (MLText
4804uid 3633,0
4805va (VaSet
4806font "Courier New,8,0"
4807)
4808xt "39000,40600,64000,41400"
4809st "W_A             : std_logic_vector(9 DOWNTO 0)
4810"
4811)
4812)
4813*145 (Net
4814uid 3634,0
4815decl (Decl
4816n "W_D"
4817t "std_logic_vector"
4818b "(15 DOWNTO 0)"
4819o 51
4820suid 107,0
4821)
4822declText (MLText
4823uid 3635,0
4824va (VaSet
4825font "Courier New,8,0"
4826)
4827xt "39000,45400,64500,46200"
4828st "W_D             : std_logic_vector(15 DOWNTO 0)
4829"
4830)
4831)
4832*146 (Net
4833uid 3636,0
4834decl (Decl
4835n "W_RES"
4836t "std_logic"
4837o 48
4838suid 108,0
4839i "'1'"
4840)
4841declText (MLText
4842uid 3637,0
4843va (VaSet
4844font "Courier New,8,0"
4845)
4846xt "39000,43000,68500,43800"
4847st "W_RES           : std_logic                      := '1'
4848"
4849)
4850)
4851*147 (Net
4852uid 3638,0
4853decl (Decl
4854n "W_RD"
4855t "std_logic"
4856o 47
4857suid 109,0
4858i "'1'"
4859)
4860declText (MLText
4861uid 3639,0
4862va (VaSet
4863font "Courier New,8,0"
4864)
4865xt "39000,42200,68500,43000"
4866st "W_RD            : std_logic                      := '1'
4867"
4868)
4869)
4870*148 (Net
4871uid 3640,0
4872decl (Decl
4873n "W_WR"
4874t "std_logic"
4875o 49
4876suid 110,0
4877i "'1'"
4878)
4879declText (MLText
4880uid 3641,0
4881va (VaSet
4882font "Courier New,8,0"
4883)
4884xt "39000,43800,68500,44600"
4885st "W_WR            : std_logic                      := '1'
4886"
4887)
4888)
4889*149 (Net
4890uid 3642,0
4891decl (Decl
4892n "W_INT"
4893t "std_logic"
4894o 13
4895suid 111,0
4896)
4897declText (MLText
4898uid 3643,0
4899va (VaSet
4900font "Courier New,8,0"
4901)
4902xt "39000,15000,54000,15800"
4903st "W_INT           : std_logic
4904"
4905)
4906)
4907*150 (Net
4908uid 3644,0
4909decl (Decl
4910n "W_CS"
4911t "std_logic"
4912o 46
4913suid 112,0
4914i "'1'"
4915)
4916declText (MLText
4917uid 3645,0
4918va (VaSet
4919font "Courier New,8,0"
4920)
4921xt "39000,41400,68500,42200"
4922st "W_CS            : std_logic                      := '1'
4923"
4924)
4925)
4926*151 (PortIoInOut
4927uid 3674,0
4928shape (CompositeShape
4929uid 3675,0
4930va (VaSet
4931vasetType 1
4932fg "0,0,32768"
4933)
4934optionalChildren [
4935(Hexagon
4936uid 3676,0
4937sl 0
4938xt "111500,98625,113000,99375"
4939)
4940(Line
4941uid 3677,0
4942sl 0
4943xt "111000,99000,111500,99000"
4944pts [
4945"111000,99000"
4946"111500,99000"
4947]
4948)
4949]
4950)
4951stc 0
4952sf 1
4953tg (WTG
4954uid 3678,0
4955ps "PortIoTextPlaceStrategy"
4956stg "STSignalDisplayStrategy"
4957f (Text
4958uid 3679,0
4959va (VaSet
4960)
4961xt "114000,98500,116400,99500"
4962st "MISO"
4963blo "114000,99300"
4964tm "WireNameMgr"
4965)
4966)
4967)
4968*152 (Net
4969uid 3680,0
4970decl (Decl
4971n "MOSI"
4972t "std_logic"
4973o 30
4974suid 113,0
4975i "'0'"
4976)
4977declText (MLText
4978uid 3681,0
4979va (VaSet
4980font "Courier New,8,0"
4981)
4982xt "39000,28600,68500,29400"
4983st "MOSI            : std_logic                      := '0'
4984"
4985)
4986)
4987*153 (PortIoOut
4988uid 3688,0
4989shape (CompositeShape
4990uid 3689,0
4991va (VaSet
4992vasetType 1
4993fg "0,0,32768"
4994)
4995optionalChildren [
4996(Pentagon
4997uid 3690,0
4998sl 0
4999ro 270
5000xt "111500,99625,113000,100375"
5001)
5002(Line
5003uid 3691,0
5004sl 0
5005ro 270
5006xt "111000,100000,111500,100000"
5007pts [
5008"111000,100000"
5009"111500,100000"
5010]
5011)
5012]
5013)
5014stc 0
5015sf 1
5016tg (WTG
5017uid 3692,0
5018ps "PortIoTextPlaceStrategy"
5019stg "STSignalDisplayStrategy"
5020f (Text
5021uid 3693,0
5022va (VaSet
5023)
5024xt "114000,99500,116400,100500"
5025st "MOSI"
5026blo "114000,100300"
5027tm "WireNameMgr"
5028)
5029)
5030)
5031*154 (Net
5032uid 3694,0
5033decl (Decl
5034n "MISO"
5035t "std_logic"
5036preAdd 0
5037posAdd 0
5038o 50
5039suid 114,0
5040)
5041declText (MLText
5042uid 3695,0
5043va (VaSet
5044font "Courier New,8,0"
5045)
5046xt "39000,44600,54000,45400"
5047st "MISO            : std_logic
5048"
5049)
5050)
5051*155 (HdlText
5052uid 3700,0
5053optionalChildren [
5054*156 (EmbeddedText
5055uid 3706,0
5056commentText (CommentText
5057uid 3707,0
5058ps "CenterOffsetStrategy"
5059shape (Rectangle
5060uid 3708,0
5061va (VaSet
5062vasetType 1
5063fg "65535,65535,65535"
5064lineColor "0,0,32768"
5065lineWidth 2
5066)
5067xt "82000,106000,99000,118000"
5068)
5069oxt "0,0,18000,5000"
5070text (MLText
5071uid 3709,0
5072va (VaSet
5073)
5074xt "82200,106200,98600,118200"
5075st "
5076-- MISC 6     
5077TRG_V <= '0';
5078RS485_C_RE <= '0';
5079RS485_C_DE <= '0';   
5080RS485_C_DO <= RS485_C_DI;
5081
5082RS485_E_RE <= '0';     
5083RS485_E_DE <= '0';
5084--RS485_E_DO <= RS485_E_DI;
5085
5086-- DENABLE <= '0'; -- domino wave stopped
5087-- DENABLE <= '1'; -- domino wave running
5088
5089
5090EE_CS <= '1';
5091-- LEDs are low active
5092LED(0) <= '1';
5093LED(1) <= '0'; -- on
5094LED(2) <= '1';
5095                             
5096
5097
5098
5099"
5100tm "HdlTextMgr"
5101wrapOption 3
5102visibleHeight 12000
5103visibleWidth 17000
5104)
5105)
5106)
5107]
5108shape (Rectangle
5109uid 3701,0
5110va (VaSet
5111vasetType 1
5112fg "65535,65535,37120"
5113lineColor "0,0,32768"
5114lineWidth 2
5115)
5116xt "100000,102000,108000,115000"
5117)
5118oxt "0,0,8000,10000"
5119ttg (MlTextGroup
5120uid 3702,0
5121ps "CenterOffsetStrategy"
5122stg "VerticalLayoutStrategy"
5123textVec [
5124*157 (Text
5125uid 3703,0
5126va (VaSet
5127font "Arial,8,1"
5128)
5129xt "103150,106000,105550,107000"
5130st "MISC"
5131blo "103150,106800"
5132tm "HdlTextNameMgr"
5133)
5134*158 (Text
5135uid 3704,0
5136va (VaSet
5137font "Arial,8,1"
5138)
5139xt "103150,107000,103950,108000"
5140st "6"
5141blo "103150,107800"
5142tm "HdlTextNumberMgr"
5143)
5144]
5145)
5146viewicon (ZoomableIcon
5147uid 3705,0
5148sl 0
5149va (VaSet
5150vasetType 1
5151fg "49152,49152,49152"
5152)
5153xt "100250,113250,101750,114750"
5154iconName "TextFile.png"
5155iconMaskName "TextFile.msk"
5156ftype 21
5157)
5158viewiconposition 0
5159)
5160*159 (PortIoOut
5161uid 3710,0
5162shape (CompositeShape
5163uid 3711,0
5164va (VaSet
5165vasetType 1
5166fg "0,0,32768"
5167)
5168optionalChildren [
5169(Pentagon
5170uid 3712,0
5171sl 0
5172ro 270
5173xt "111500,102625,113000,103375"
5174)
5175(Line
5176uid 3713,0
5177sl 0
5178ro 270
5179xt "111000,103000,111500,103000"
5180pts [
5181"111000,103000"
5182"111500,103000"
5183]
5184)
5185]
5186)
5187stc 0
5188sf 1
5189tg (WTG
5190uid 3714,0
5191ps "PortIoTextPlaceStrategy"
5192stg "STSignalDisplayStrategy"
5193f (Text
5194uid 3715,0
5195va (VaSet
5196)
5197xt "114000,102500,117000,103500"
5198st "TRG_V"
5199blo "114000,103300"
5200tm "WireNameMgr"
5201)
5202)
5203)
5204*160 (PortIoOut
5205uid 3716,0
5206shape (CompositeShape
5207uid 3717,0
5208va (VaSet
5209vasetType 1
5210fg "0,0,32768"
5211)
5212optionalChildren [
5213(Pentagon
5214uid 3718,0
5215sl 0
5216ro 270
5217xt "111500,103625,113000,104375"
5218)
5219(Line
5220uid 3719,0
5221sl 0
5222ro 270
5223xt "111000,104000,111500,104000"
5224pts [
5225"111000,104000"
5226"111500,104000"
5227]
5228)
5229]
5230)
5231stc 0
5232sf 1
5233tg (WTG
5234uid 3720,0
5235ps "PortIoTextPlaceStrategy"
5236stg "STSignalDisplayStrategy"
5237f (Text
5238uid 3721,0
5239va (VaSet
5240)
5241xt "114000,103500,119600,104500"
5242st "RS485_C_RE"
5243blo "114000,104300"
5244tm "WireNameMgr"
5245)
5246)
5247)
5248*161 (PortIoOut
5249uid 3722,0
5250shape (CompositeShape
5251uid 3723,0
5252va (VaSet
5253vasetType 1
5254fg "0,0,32768"
5255)
5256optionalChildren [
5257(Pentagon
5258uid 3724,0
5259sl 0
5260ro 270
5261xt "111500,104625,113000,105375"
5262)
5263(Line
5264uid 3725,0
5265sl 0
5266ro 270
5267xt "111000,105000,111500,105000"
5268pts [
5269"111000,105000"
5270"111500,105000"
5271]
5272)
5273]
5274)
5275stc 0
5276sf 1
5277tg (WTG
5278uid 3726,0
5279ps "PortIoTextPlaceStrategy"
5280stg "STSignalDisplayStrategy"
5281f (Text
5282uid 3727,0
5283va (VaSet
5284)
5285xt "114000,104500,119600,105500"
5286st "RS485_C_DE"
5287blo "114000,105300"
5288tm "WireNameMgr"
5289)
5290)
5291)
5292*162 (PortIoOut
5293uid 3728,0
5294shape (CompositeShape
5295uid 3729,0
5296va (VaSet
5297vasetType 1
5298fg "0,0,32768"
5299)
5300optionalChildren [
5301(Pentagon
5302uid 3730,0
5303sl 0
5304ro 270
5305xt "111500,105625,113000,106375"
5306)
5307(Line
5308uid 3731,0
5309sl 0
5310ro 270
5311xt "111000,106000,111500,106000"
5312pts [
5313"111000,106000"
5314"111500,106000"
5315]
5316)
5317]
5318)
5319stc 0
5320sf 1
5321tg (WTG
5322uid 3732,0
5323ps "PortIoTextPlaceStrategy"
5324stg "STSignalDisplayStrategy"
5325f (Text
5326uid 3733,0
5327va (VaSet
5328)
5329xt "114000,105500,119500,106500"
5330st "RS485_E_RE"
5331blo "114000,106300"
5332tm "WireNameMgr"
5333)
5334)
5335)
5336*163 (PortIoOut
5337uid 3734,0
5338shape (CompositeShape
5339uid 3735,0
5340va (VaSet
5341vasetType 1
5342fg "0,0,32768"
5343)
5344optionalChildren [
5345(Pentagon
5346uid 3736,0
5347sl 0
5348ro 270
5349xt "111500,106625,113000,107375"
5350)
5351(Line
5352uid 3737,0
5353sl 0
5354ro 270
5355xt "111000,107000,111500,107000"
5356pts [
5357"111000,107000"
5358"111500,107000"
5359]
5360)
5361]
5362)
5363stc 0
5364sf 1
5365tg (WTG
5366uid 3738,0
5367ps "PortIoTextPlaceStrategy"
5368stg "STSignalDisplayStrategy"
5369f (Text
5370uid 3739,0
5371va (VaSet
5372)
5373xt "114000,106500,119500,107500"
5374st "RS485_E_DE"
5375blo "114000,107300"
5376tm "WireNameMgr"
5377)
5378)
5379)
5380*164 (PortIoOut
5381uid 3740,0
5382shape (CompositeShape
5383uid 3741,0
5384va (VaSet
5385vasetType 1
5386fg "0,0,32768"
5387)
5388optionalChildren [
5389(Pentagon
5390uid 3742,0
5391sl 0
5392ro 270
5393xt "111500,120625,113000,121375"
5394)
5395(Line
5396uid 3743,0
5397sl 0
5398ro 270
5399xt "111000,121000,111500,121000"
5400pts [
5401"111000,121000"
5402"111500,121000"
5403]
5404)
5405]
5406)
5407stc 0
5408sf 1
5409tg (WTG
5410uid 3744,0
5411ps "PortIoTextPlaceStrategy"
5412stg "STSignalDisplayStrategy"
5413f (Text
5414uid 3745,0
5415va (VaSet
5416)
5417xt "114000,120500,118000,121500"
5418st "DENABLE"
5419blo "114000,121300"
5420tm "WireNameMgr"
5421)
5422)
5423)
5424*165 (PortIoOut
5425uid 3752,0
5426shape (CompositeShape
5427uid 3753,0
5428va (VaSet
5429vasetType 1
5430fg "0,0,32768"
5431)
5432optionalChildren [
5433(Pentagon
5434uid 3754,0
5435sl 0
5436ro 270
5437xt "111500,109625,113000,110375"
5438)
5439(Line
5440uid 3755,0
5441sl 0
5442ro 270
5443xt "111000,110000,111500,110000"
5444pts [
5445"111000,110000"
5446"111500,110000"
5447]
5448)
5449]
5450)
5451stc 0
5452sf 1
5453tg (WTG
5454uid 3756,0
5455ps "PortIoTextPlaceStrategy"
5456stg "STSignalDisplayStrategy"
5457f (Text
5458uid 3757,0
5459va (VaSet
5460)
5461xt "114000,109500,116900,110500"
5462st "EE_CS"
5463blo "114000,110300"
5464tm "WireNameMgr"
5465)
5466)
5467)
5468*166 (PortIoOut
5469uid 3758,0
5470shape (CompositeShape
5471uid 3759,0
5472va (VaSet
5473vasetType 1
5474fg "0,0,32768"
5475)
5476optionalChildren [
5477(Pentagon
5478uid 3760,0
5479sl 0
5480ro 270
5481xt "111500,110625,113000,111375"
5482)
5483(Line
5484uid 3761,0
5485sl 0
5486ro 270
5487xt "111000,111000,111500,111000"
5488pts [
5489"111000,111000"
5490"111500,111000"
5491]
5492)
5493]
5494)
5495stc 0
5496sf 1
5497tg (WTG
5498uid 3762,0
5499ps "PortIoTextPlaceStrategy"
5500stg "STSignalDisplayStrategy"
5501f (Text
5502uid 3763,0
5503va (VaSet
5504)
5505xt "114000,110500,115900,111500"
5506st "LED"
5507blo "114000,111300"
5508tm "WireNameMgr"
5509)
5510)
5511)
5512*167 (Net
5513uid 3864,0
5514decl (Decl
5515n "TRG_V"
5516t "std_logic"
5517o 44
5518suid 126,0
5519)
5520declText (MLText
5521uid 3865,0
5522va (VaSet
5523font "Courier New,8,0"
5524)
5525xt "39000,39800,54000,40600"
5526st "TRG_V           : std_logic
5527"
5528)
5529)
5530*168 (Net
5531uid 3866,0
5532decl (Decl
5533n "RS485_C_RE"
5534t "std_logic"
5535o 34
5536suid 127,0
5537)
5538declText (MLText
5539uid 3867,0
5540va (VaSet
5541font "Courier New,8,0"
5542)
5543xt "39000,31800,54000,32600"
5544st "RS485_C_RE      : std_logic
5545"
5546)
5547)
5548*169 (Net
5549uid 3868,0
5550decl (Decl
5551n "RS485_C_DE"
5552t "std_logic"
5553o 32
5554suid 128,0
5555)
5556declText (MLText
5557uid 3869,0
5558va (VaSet
5559font "Courier New,8,0"
5560)
5561xt "39000,30200,54000,31000"
5562st "RS485_C_DE      : std_logic
5563"
5564)
5565)
5566*170 (Net
5567uid 3870,0
5568decl (Decl
5569n "RS485_E_RE"
5570t "std_logic"
5571o 36
5572suid 129,0
5573)
5574declText (MLText
5575uid 3871,0
5576va (VaSet
5577font "Courier New,8,0"
5578)
5579xt "39000,33400,54000,34200"
5580st "RS485_E_RE      : std_logic
5581"
5582)
5583)
5584*171 (Net
5585uid 3872,0
5586decl (Decl
5587n "RS485_E_DE"
5588t "std_logic"
5589o 35
5590suid 130,0
5591)
5592declText (MLText
5593uid 3873,0
5594va (VaSet
5595font "Courier New,8,0"
5596)
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7137-- eb3 9                         
7138A0_T(0) <= CLK50_OUT;
7139A0_T(1)  <= CLK25_OUT;
7140A0_T(2) <= CLK25_PSOUT;
7141A0_T(3) <= PS_DIR_IN;
7142A0_T(4) <= PS_DO_IN;
7143A0_T(5) <= PSINCDEC_OUT;
7144A0_T(6) <= PSEN_OUT;
7145A0_T(7) <= DCM_locked;
7146
7147A1_T(0) <= ready;
7148A1_T(1) <= shifting;
7149A1_T(2) <= PSDONE_extraOUT;
7150A1_T(3) <= PSCLK_OUT;
7151A1_T(4) <= LOCKED_extraOUT;
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7398va (VaSet
7399font "Courier New,8,0"
7400)
7401xt "39000,65600,72000,67200"
7402st "-- status:
7403SIGNAL shifting        : std_logic                      := '0'
7404"
7405)
7406)
7407*247 (Net
7408uid 10576,0
7409decl (Decl
7410n "PSDONE_extraOUT"
7411t "std_logic"
7412o 61
7413suid 194,0
7414)
7415declText (MLText
7416uid 10577,0
7417va (VaSet
7418font "Courier New,8,0"
7419)
7420xt "39000,54400,57500,55200"
7421st "SIGNAL PSDONE_extraOUT : std_logic
7422"
7423)
7424)
7425*248 (Net
7426uid 10584,0
7427decl (Decl
7428n "PSCLK_OUT"
7429t "std_logic"
7430o 60
7431suid 195,0
7432)
7433declText (MLText
7434uid 10585,0
7435va (VaSet
7436font "Courier New,8,0"
7437)
7438xt "39000,53600,57500,54400"
7439st "SIGNAL PSCLK_OUT       : std_logic
7440"
7441)
7442)
7443*249 (Net
7444uid 10592,0
7445decl (Decl
7446n "LOCKED_extraOUT"
7447t "std_logic"
7448o 59
7449suid 196,0
7450)
7451declText (MLText
7452uid 10593,0
7453va (VaSet
7454font "Courier New,8,0"
7455)
7456xt "39000,52800,57500,53600"
7457st "SIGNAL LOCKED_extraOUT : std_logic
7458"
7459)
7460)
7461*250 (PortIoIn
7462uid 11090,0
7463shape (CompositeShape
7464uid 11091,0
7465va (VaSet
7466vasetType 1
7467fg "0,0,32768"
7468)
7469optionalChildren [
7470(Pentagon
7471uid 11092,0
7472sl 0
7473ro 270
7474xt "94000,102625,95500,103375"
7475)
7476(Line
7477uid 11093,0
7478sl 0
7479ro 270
7480xt "95500,103000,96000,103000"
7481pts [
7482"95500,103000"
7483"96000,103000"
7484]
7485)
7486]
7487)
7488stc 0
7489sf 1
7490tg (WTG
7491uid 11094,0
7492ps "PortIoTextPlaceStrategy"
7493stg "STSignalDisplayStrategy"
7494f (Text
7495uid 11095,0
7496va (VaSet
7497)
7498xt "87700,102500,93000,103500"
7499st "RS485_C_DI"
7500ju 2
7501blo "93000,103300"
7502tm "WireNameMgr"
7503)
7504)
7505)
7506*251 (Net
7507uid 11102,0
7508decl (Decl
7509n "RS485_C_DI"
7510t "std_logic"
7511o 74
7512suid 197,0
7513)
7514declText (MLText
7515uid 11103,0
7516va (VaSet
7517font "Courier New,8,0"
7518)
7519xt "39000,11800,54000,12600"
7520st "RS485_C_DI      : std_logic
7521"
7522)
7523)
7524*252 (PortIoOut
7525uid 11104,0
7526shape (CompositeShape
7527uid 11105,0
7528va (VaSet
7529vasetType 1
7530fg "0,0,32768"
7531)
7532optionalChildren [
7533(Pentagon
7534uid 11106,0
7535sl 0
7536ro 270
7537xt "111500,111625,113000,112375"
7538)
7539(Line
7540uid 11107,0
7541sl 0
7542ro 270
7543xt "111000,112000,111500,112000"
7544pts [
7545"111000,112000"
7546"111500,112000"
7547]
7548)
7549]
7550)
7551stc 0
7552sf 1
7553tg (WTG
7554uid 11108,0
7555ps "PortIoTextPlaceStrategy"
7556stg "STSignalDisplayStrategy"
7557f (Text
7558uid 11109,0
7559va (VaSet
7560)
7561xt "114000,111500,119700,112500"
7562st "RS485_C_DO"
7563blo "114000,112300"
7564tm "WireNameMgr"
7565)
7566)
7567)
7568*253 (Net
7569uid 11116,0
7570decl (Decl
7571n "RS485_C_DO"
7572t "std_logic"
7573o 75
7574suid 198,0
7575)
7576declText (MLText
7577uid 11117,0
7578va (VaSet
7579font "Courier New,8,0"
7580)
7581xt "39000,31000,54000,31800"
7582st "RS485_C_DO      : std_logic
7583"
7584)
7585)
7586*254 (PortIoIn
7587uid 11508,0
7588shape (CompositeShape
7589uid 11509,0
7590va (VaSet
7591vasetType 1
7592fg "0,0,32768"
7593)
7594optionalChildren [
7595(Pentagon
7596uid 11510,0
7597sl 0
7598ro 270
7599xt "121000,115625,122500,116375"
7600)
7601(Line
7602uid 11511,0
7603sl 0
7604ro 270
7605xt "122500,116000,123000,116000"
7606pts [
7607"122500,116000"
7608"123000,116000"
7609]
7610)
7611]
7612)
7613stc 0
7614sf 1
7615tg (WTG
7616uid 11512,0
7617ps "PortIoTextPlaceStrategy"
7618stg "STSignalDisplayStrategy"
7619f (Text
7620uid 11513,0
7621va (VaSet
7622)
7623xt "114800,115500,120000,116500"
7624st "RS485_E_DI"
7625ju 2
7626blo "120000,116300"
7627tm "WireNameMgr"
7628)
7629)
7630)
7631*255 (Net
7632uid 11520,0
7633decl (Decl
7634n "RS485_E_DI"
7635t "std_logic"
7636o 76
7637suid 200,0
7638)
7639declText (MLText
7640uid 11521,0
7641va (VaSet
7642font "Courier New,8,0"
7643)
7644xt "39000,12600,54000,13400"
7645st "RS485_E_DI      : std_logic
7646"
7647)
7648)
7649*256 (Net
7650uid 11534,0
7651decl (Decl
7652n "RS485_E_DO"
7653t "std_logic"
7654o 77
7655suid 201,0
7656)
7657declText (MLText
7658uid 11535,0
7659va (VaSet
7660font "Courier New,8,0"
7661)
7662xt "39000,13400,54000,14200"
7663st "RS485_E_DO      : std_logic
7664"
7665)
7666)
7667*257 (PortIoIn
7668uid 11922,0
7669shape (CompositeShape
7670uid 11923,0
7671va (VaSet
7672vasetType 1
7673fg "0,0,32768"
7674)
7675optionalChildren [
7676(Pentagon
7677uid 11924,0
7678sl 0
7679ro 90
7680xt "126500,113625,128000,114375"
7681)
7682(Line
7683uid 11925,0
7684sl 0
7685ro 90
7686xt "126000,114000,126500,114000"
7687pts [
7688"126500,114000"
7689"126000,114000"
7690]
7691)
7692]
7693)
7694stc 0
7695sf 1
7696tg (WTG
7697uid 11926,0
7698ps "PortIoTextPlaceStrategy"
7699stg "STSignalDisplayStrategy"
7700f (Text
7701uid 11927,0
7702va (VaSet
7703)
7704xt "129000,113500,134600,114500"
7705st "RS485_E_DO"
7706blo "129000,114300"
7707tm "WireNameMgr"
7708)
7709)
7710)
7711*258 (PortIoOut
7712uid 12326,0
7713shape (CompositeShape
7714uid 12327,0
7715va (VaSet
7716vasetType 1
7717fg "0,0,32768"
7718)
7719optionalChildren [
7720(Pentagon
7721uid 12328,0
7722sl 0
7723ro 270
7724xt "87500,139625,89000,140375"
7725)
7726(Line
7727uid 12329,0
7728sl 0
7729ro 270
7730xt "87000,140000,87500,140000"
7731pts [
7732"87000,140000"
7733"87500,140000"
7734]
7735)
7736]
7737)
7738stc 0
7739sf 1
7740tg (WTG
7741uid 12330,0
7742ps "PortIoTextPlaceStrategy"
7743stg "STSignalDisplayStrategy"
7744f (Text
7745uid 12331,0
7746va (VaSet
7747)
7748xt "90000,139500,92300,140500"
7749st "SRIN"
7750blo "90000,140300"
7751tm "WireNameMgr"
7752)
7753)
7754)
7755*259 (Net
7756uid 12334,0
7757decl (Decl
7758n "SRIN"
7759t "std_logic"
7760o 78
7761suid 203,0
7762i "'0'"
7763)
7764declText (MLText
7765uid 12335,0
7766va (VaSet
7767font "Courier New,8,0"
7768)
7769xt "39000,35000,68500,35800"
7770st "SRIN            : std_logic                      := '0'
7771"
7772)
7773)
7774*260 (Wire
7775uid 245,0
7776shape (OrthoPolyLine
7777uid 246,0
7778va (VaSet
7779vasetType 3
7780)
7781xt "21000,68000,51250,68000"
7782pts [
7783"51250,68000"
7784"21000,68000"
7785]
7786)
7787start &27
7788end &64
7789ss 0
7790sat 32
7791eat 32
7792stc 0
7793st 0
7794sf 1
7795si 0
7796tg (WTG
7797uid 249,0
7798ps "ConnStartEndStrategy"
7799stg "STSignalDisplayStrategy"
7800f (Text
7801uid 250,0
7802va (VaSet
7803isHidden 1
7804)
7805xt "53250,67000,56050,68000"
7806st "X_50M"
7807blo "53250,67800"
7808tm "WireNameMgr"
7809)
7810)
7811on &85
7812)
7813*261 (Wire
7814uid 277,0
7815shape (OrthoPolyLine
7816uid 278,0
7817va (VaSet
7818vasetType 3
7819lineWidth 2
7820)
7821xt "32000,81000,51250,81000"
7822pts [
7823"51250,81000"
7824"32000,81000"
7825]
7826)
7827start &17
7828end &65
7829sat 32
7830eat 2
7831sty 1
7832st 0
7833sf 1
7834si 0
7835tg (WTG
7836uid 281,0
7837ps "ConnStartEndStrategy"
7838stg "STSignalDisplayStrategy"
7839f (Text
7840uid 282,0
7841va (VaSet
7842)
7843xt "44000,80000,49900,81000"
7844st "board_id : (3:0)"
7845blo "44000,80800"
7846tm "WireNameMgr"
7847)
7848)
7849on &69
7850)
7851*262 (Wire
7852uid 285,0
7853shape (OrthoPolyLine
7854uid 286,0
7855va (VaSet
7856vasetType 3
7857lineWidth 2
7858)
7859xt "32000,82000,51250,82000"
7860pts [
7861"51250,82000"
7862"32000,82000"
7863]
7864)
7865start &18
7866end &65
7867sat 32
7868eat 2
7869sty 1
7870st 0
7871sf 1
7872si 0
7873tg (WTG
7874uid 289,0
7875ps "ConnStartEndStrategy"
7876stg "STSignalDisplayStrategy"
7877f (Text
7878uid 290,0
7879va (VaSet
7880)
7881xt "45000,81000,50700,82000"
7882st "crate_id : (1:0)"
7883blo "45000,81800"
7884tm "WireNameMgr"
7885)
7886)
7887on &70
7888)
7889*263 (Wire
7890uid 362,0
7891shape (OrthoPolyLine
7892uid 363,0
7893va (VaSet
7894vasetType 3
7895)
7896xt "21000,90000,51250,90000"
7897pts [
7898"21000,90000"
7899"51250,90000"
7900]
7901)
7902start &93
7903end &16
7904sat 32
7905eat 32
7906stc 0
7907st 0
7908sf 1
7909si 0
7910tg (WTG
7911uid 364,0
7912ps "ConnStartEndStrategy"
7913stg "STSignalDisplayStrategy"
7914f (Text
7915uid 365,0
7916va (VaSet
7917isHidden 1
7918)
7919xt "22000,89000,25600,90000"
7920st "OE_ADC"
7921blo "22000,89800"
7922tm "WireNameMgr"
7923)
7924)
7925on &94
7926)
7927*264 (Wire
7928uid 418,0
7929shape (OrthoPolyLine
7930uid 419,0
7931va (VaSet
7932vasetType 3
7933)
7934xt "80750,71000,111000,71000"
7935pts [
7936"80750,71000"
7937"111000,71000"
7938]
7939)
7940start &13
7941end &71
7942sat 32
7943eat 32
7944stc 0
7945st 0
7946sf 1
7947si 0
7948tg (WTG
7949uid 422,0
7950ps "ConnStartEndStrategy"
7951stg "STSignalDisplayStrategy"
7952f (Text
7953uid 423,0
7954va (VaSet
7955isHidden 1
7956)
7957xt "82000,70000,85100,71000"
7958st "W_RES"
7959blo "82000,70800"
7960tm "WireNameMgr"
7961)
7962)
7963on &146
7964)
7965*265 (Wire
7966uid 426,0
7967shape (OrthoPolyLine
7968uid 427,0
7969va (VaSet
7970vasetType 3
7971lineWidth 2
7972)
7973xt "80750,68000,111000,68000"
7974pts [
7975"80750,68000"
7976"111000,68000"
7977]
7978)
7979start &19
7980end &72
7981sat 32
7982eat 32
7983sty 1
7984stc 0
7985st 0
7986sf 1
7987si 0
7988tg (WTG
7989uid 430,0
7990ps "ConnStartEndStrategy"
7991stg "STSignalDisplayStrategy"
7992f (Text
7993uid 431,0
7994va (VaSet
7995isHidden 1
7996)
7997xt "82000,67000,84000,68000"
7998st "W_A"
7999blo "82000,67800"
8000tm "WireNameMgr"
8001)
8002)
8003on &144
8004)
8005*266 (Wire
8006uid 434,0
8007shape (OrthoPolyLine
8008uid 435,0
8009va (VaSet
8010vasetType 3
8011)
8012xt "80750,75000,111000,75000"
8013pts [
8014"80750,75000"
8015"111000,75000"
8016]
8017)
8018start &20
8019end &73
8020sat 32
8021eat 32
8022stc 0
8023st 0
8024sf 1
8025si 0
8026tg (WTG
8027uid 438,0
8028ps "ConnStartEndStrategy"
8029stg "STSignalDisplayStrategy"
8030f (Text
8031uid 439,0
8032va (VaSet
8033isHidden 1
8034)
8035xt "82000,74000,84600,75000"
8036st "W_CS"
8037blo "82000,74800"
8038tm "WireNameMgr"
8039)
8040)
8041on &150
8042)
8043*267 (Wire
8044uid 442,0
8045shape (OrthoPolyLine
8046uid 443,0
8047va (VaSet
8048vasetType 3
8049lineWidth 2
8050)
8051xt "80750,69000,111000,69000"
8052pts [
8053"80750,69000"
8054"111000,69000"
8055]
8056)
8057start &21
8058end &74
8059sat 32
8060eat 32
8061sty 1
8062stc 0
8063st 0
8064sf 1
8065si 0
8066tg (WTG
8067uid 446,0
8068ps "ConnStartEndStrategy"
8069stg "STSignalDisplayStrategy"
8070f (Text
8071uid 447,0
8072va (VaSet
8073isHidden 1
8074)
8075xt "82000,68000,84100,69000"
8076st "W_D"
8077blo "82000,68800"
8078tm "WireNameMgr"
8079)
8080)
8081on &145
8082)
8083*268 (Wire
8084uid 450,0
8085shape (OrthoPolyLine
8086uid 451,0
8087va (VaSet
8088vasetType 3
8089)
8090xt "80750,74000,111000,74000"
8091pts [
8092"111000,74000"
8093"80750,74000"
8094]
8095)
8096start &75
8097end &22
8098sat 32
8099eat 32
8100stc 0
8101st 0
8102sf 1
8103si 0
8104tg (WTG
8105uid 454,0
8106ps "ConnStartEndStrategy"
8107stg "STSignalDisplayStrategy"
8108f (Text
8109uid 455,0
8110va (VaSet
8111isHidden 1
8112)
8113xt "82000,73000,84800,74000"
8114st "W_INT"
8115blo "82000,73800"
8116tm "WireNameMgr"
8117)
8118)
8119on &149
8120)
8121*269 (Wire
8122uid 458,0
8123shape (OrthoPolyLine
8124uid 459,0
8125va (VaSet
8126vasetType 3
8127)
8128xt "80750,72000,111000,72000"
8129pts [
8130"80750,72000"
8131"111000,72000"
8132]
8133)
8134start &23
8135end &76
8136sat 32
8137eat 32
8138stc 0
8139st 0
8140sf 1
8141si 0
8142tg (WTG
8143uid 462,0
8144ps "ConnStartEndStrategy"
8145stg "STSignalDisplayStrategy"
8146f (Text
8147uid 463,0
8148va (VaSet
8149isHidden 1
8150)
8151xt "82000,71000,84700,72000"
8152st "W_RD"
8153blo "82000,71800"
8154tm "WireNameMgr"
8155)
8156)
8157on &147
8158)
8159*270 (Wire
8160uid 466,0
8161shape (OrthoPolyLine
8162uid 467,0
8163va (VaSet
8164vasetType 3
8165)
8166xt "80750,73000,111000,73000"
8167pts [
8168"80750,73000"
8169"111000,73000"
8170]
8171)
8172start &24
8173end &77
8174sat 32
8175eat 32
8176stc 0
8177st 0
8178sf 1
8179si 0
8180tg (WTG
8181uid 470,0
8182ps "ConnStartEndStrategy"
8183stg "STSignalDisplayStrategy"
8184f (Text
8185uid 471,0
8186va (VaSet
8187isHidden 1
8188)
8189xt "82000,72000,84800,73000"
8190st "W_WR"
8191blo "82000,72800"
8192tm "WireNameMgr"
8193)
8194)
8195on &148
8196)
8197*271 (Wire
8198uid 1467,0
8199shape (OrthoPolyLine
8200uid 1468,0
8201va (VaSet
8202vasetType 3
8203)
8204xt "32000,95000,51250,95000"
8205pts [
8206"32000,95000"
8207"51250,95000"
8208]
8209)
8210start &97
8211end &28
8212sat 2
8213eat 32
8214st 0
8215sf 1
8216si 0
8217tg (WTG
8218uid 1471,0
8219ps "ConnStartEndStrategy"
8220stg "STSignalDisplayStrategy"
8221f (Text
8222uid 1472,0
8223va (VaSet
8224)
8225xt "34000,94000,39900,95000"
8226st "adc_data_array"
8227blo "34000,94800"
8228tm "WireNameMgr"
8229)
8230)
8231on &78
8232)
8233*272 (Wire
8234uid 1730,0
8235shape (OrthoPolyLine
8236uid 1731,0
8237va (VaSet
8238vasetType 3
8239lineWidth 2
8240)
8241xt "21000,89000,51250,89000"
8242pts [
8243"21000,89000"
8244"51250,89000"
8245]
8246)
8247start &95
8248end &29
8249sat 32
8250eat 32
8251sty 1
8252stc 0
8253st 0
8254sf 1
8255si 0
8256tg (WTG
8257uid 1734,0
8258ps "ConnStartEndStrategy"
8259stg "STSignalDisplayStrategy"
8260f (Text
8261uid 1735,0
8262va (VaSet
8263isHidden 1
8264)
8265xt "22000,88000,25000,89000"
8266st "A_OTR"
8267blo "22000,88800"
8268tm "WireNameMgr"
8269)
8270)
8271on &96
8272)
8273*273 (Wire
8274uid 1833,0
8275shape (OrthoPolyLine
8276uid 1834,0
8277va (VaSet
8278vasetType 3
8279lineWidth 2
8280)
8281xt "12000,126000,21000,126000"
8282pts [
8283"21000,126000"
8284"12000,126000"
8285]
8286)
8287start &189
8288end &125
8289sat 2
8290eat 32
8291sty 1
8292stc 0
8293st 0
8294sf 1
8295si 0
8296tg (WTG
8297uid 1837,0
8298ps "ConnStartEndStrategy"
8299stg "STSignalDisplayStrategy"
8300f (Text
8301uid 1838,0
8302va (VaSet
8303isHidden 1
8304)
8305xt "13000,125000,14900,126000"
8306st "D_A"
8307blo "13000,125800"
8308tm "WireNameMgr"
8309)
8310)
8311on &126
8312)
8313*274 (Wire
8314uid 1841,0
8315shape (OrthoPolyLine
8316uid 1842,0
8317va (VaSet
8318vasetType 3
8319)
8320xt "21000,110000,51250,110000"
8321pts [
8322"51250,110000"
8323"21000,110000"
8324]
8325)
8326start &31
8327end &127
8328sat 32
8329eat 32
8330stc 0
8331st 0
8332sf 1
8333si 0
8334tg (WTG
8335uid 1845,0
8336ps "ConnStartEndStrategy"
8337stg "STSignalDisplayStrategy"
8338f (Text
8339uid 1846,0
8340va (VaSet
8341isHidden 1
8342)
8343xt "22000,109000,25500,110000"
8344st "DWRITE"
8345blo "22000,109800"
8346tm "WireNameMgr"
8347)
8348)
8349on &128
8350)
8351*275 (Wire
8352uid 1865,0
8353shape (OrthoPolyLine
8354uid 1866,0
8355va (VaSet
8356vasetType 3
8357)
8358xt "21000,105000,51250,105000"
8359pts [
8360"21000,105000"
8361"51250,105000"
8362]
8363)
8364start &117
8365end &32
8366sat 32
8367eat 32
8368stc 0
8369st 0
8370sf 1
8371si 0
8372tg (WTG
8373uid 1869,0
8374ps "ConnStartEndStrategy"
8375stg "STSignalDisplayStrategy"
8376f (Text
8377uid 1870,0
8378va (VaSet
8379isHidden 1
8380)
8381xt "22000,104000,26600,105000"
8382st "D0_SROUT"
8383blo "22000,104800"
8384tm "WireNameMgr"
8385)
8386)
8387on &121
8388)
8389*276 (Wire
8390uid 1873,0
8391shape (OrthoPolyLine
8392uid 1874,0
8393va (VaSet
8394vasetType 3
8395)
8396xt "21000,106000,51250,106000"
8397pts [
8398"21000,106000"
8399"51250,106000"
8400]
8401)
8402start &118
8403end &33
8404sat 32
8405eat 32
8406stc 0
8407st 0
8408sf 1
8409si 0
8410tg (WTG
8411uid 1877,0
8412ps "ConnStartEndStrategy"
8413stg "STSignalDisplayStrategy"
8414f (Text
8415uid 1878,0
8416va (VaSet
8417isHidden 1
8418)
8419xt "22000,105000,26600,106000"
8420st "D1_SROUT"
8421blo "22000,105800"
8422tm "WireNameMgr"
8423)
8424)
8425on &122
8426)
8427*277 (Wire
8428uid 1881,0
8429shape (OrthoPolyLine
8430uid 1882,0
8431va (VaSet
8432vasetType 3
8433)
8434xt "21000,107000,51250,107000"
8435pts [
8436"21000,107000"
8437"51250,107000"
8438]
8439)
8440start &119
8441end &34
8442sat 32
8443eat 32
8444stc 0
8445st 0
8446sf 1
8447si 0
8448tg (WTG
8449uid 1885,0
8450ps "ConnStartEndStrategy"
8451stg "STSignalDisplayStrategy"
8452f (Text
8453uid 1886,0
8454va (VaSet
8455isHidden 1
8456)
8457xt "22000,106000,26600,107000"
8458st "D2_SROUT"
8459blo "22000,106800"
8460tm "WireNameMgr"
8461)
8462)
8463on &123
8464)
8465*278 (Wire
8466uid 1889,0
8467shape (OrthoPolyLine
8468uid 1890,0
8469va (VaSet
8470vasetType 3
8471)
8472xt "21000,108000,51250,108000"
8473pts [
8474"21000,108000"
8475"51250,108000"
8476]
8477)
8478start &120
8479end &35
8480sat 32
8481eat 32
8482stc 0
8483st 0
8484sf 1
8485si 0
8486tg (WTG
8487uid 1893,0
8488ps "ConnStartEndStrategy"
8489stg "STSignalDisplayStrategy"
8490f (Text
8491uid 1894,0
8492va (VaSet
8493isHidden 1
8494)
8495xt "22000,107000,26600,108000"
8496st "D3_SROUT"
8497blo "22000,107800"
8498tm "WireNameMgr"
8499)
8500)
8501on &124
8502)
8503*279 (Wire
8504uid 2409,0
8505shape (OrthoPolyLine
8506uid 2410,0
8507va (VaSet
8508vasetType 3
8509)
8510xt "21000,111000,51250,111000"
8511pts [
8512"51250,111000"
8513"21000,111000"
8514]
8515)
8516start &36
8517end &80
8518sat 32
8519eat 32
8520stc 0
8521st 0
8522sf 1
8523si 0
8524tg (WTG
8525uid 2413,0
8526ps "ConnStartEndStrategy"
8527stg "STSignalDisplayStrategy"
8528f (Text
8529uid 2414,0
8530va (VaSet
8531isHidden 1
8532)
8533xt "22000,110000,26200,111000"
8534st "RSRLOAD"
8535blo "22000,110800"
8536tm "WireNameMgr"
8537)
8538)
8539on &79
8540)
8541*280 (Wire
8542uid 2423,0
8543shape (OrthoPolyLine
8544uid 2424,0
8545va (VaSet
8546vasetType 3
8547)
8548xt "32000,113000,51250,113000"
8549pts [
8550"51250,113000"
8551"32000,113000"
8552]
8553)
8554start &37
8555end &109
8556sat 32
8557eat 1
8558stc 0
8559st 0
8560sf 1
8561si 0
8562tg (WTG
8563uid 2427,0
8564ps "ConnStartEndStrategy"
8565stg "STSignalDisplayStrategy"
8566f (Text
8567uid 2428,0
8568va (VaSet
8569isHidden 1
8570)
8571xt "66250,109000,69250,110000"
8572st "SRCLK"
8573blo "66250,109800"
8574tm "WireNameMgr"
8575)
8576)
8577on &81
8578)
8579*281 (Wire
8580uid 3009,0
8581shape (OrthoPolyLine
8582uid 3010,0
8583va (VaSet
8584vasetType 3
8585)
8586xt "80750,98000,111000,98000"
8587pts [
8588"80750,98000"
8589"111000,98000"
8590]
8591)
8592start &39
8593end &142
8594sat 32
8595eat 32
8596stc 0
8597st 0
8598sf 1
8599si 0
8600tg (WTG
8601uid 3011,0
8602ps "ConnStartEndStrategy"
8603stg "STSignalDisplayStrategy"
8604f (Text
8605uid 3012,0
8606va (VaSet
8607isHidden 1
8608)
8609xt "82000,97000,84800,98000"
8610st "S_CLK"
8611blo "82000,97800"
8612tm "WireNameMgr"
8613)
8614)
8615on &143
8616)
8617*282 (Wire
8618uid 3015,0
8619shape (OrthoPolyLine
8620uid 3016,0
8621va (VaSet
8622vasetType 3
8623)
8624xt "80750,99000,111000,99000"
8625pts [
8626"80750,99000"
8627"111000,99000"
8628]
8629)
8630start &41
8631end &151
8632sat 32
8633eat 32
8634stc 0
8635st 0
8636sf 1
8637si 0
8638tg (WTG
8639uid 3017,0
8640ps "ConnStartEndStrategy"
8641stg "STSignalDisplayStrategy"
8642f (Text
8643uid 3018,0
8644va (VaSet
8645isHidden 1
8646)
8647xt "82750,98000,85150,99000"
8648st "MISO"
8649blo "82750,98800"
8650tm "WireNameMgr"
8651)
8652)
8653on &154
8654)
8655*283 (Wire
8656uid 3021,0
8657shape (OrthoPolyLine
8658uid 3022,0
8659va (VaSet
8660vasetType 3
8661lineWidth 2
8662)
8663xt "80750,89000,100000,89000"
8664pts [
8665"80750,89000"
8666"100000,89000"
8667]
8668)
8669start &40
8670end &130
8671sat 32
8672eat 1
8673sty 1
8674st 0
8675sf 1
8676si 0
8677tg (WTG
8678uid 3023,0
8679ps "ConnStartEndStrategy"
8680stg "STSignalDisplayStrategy"
8681f (Text
8682uid 3024,0
8683va (VaSet
8684)
8685xt "92000,88000,98500,89000"
8686st "sensor_cs : (3:0)"
8687blo "92000,88800"
8688tm "WireNameMgr"
8689)
8690)
8691on &82
8692)
8693*284 (Wire
8694uid 3027,0
8695shape (OrthoPolyLine
8696uid 3028,0
8697va (VaSet
8698vasetType 3
8699)
8700xt "94000,87000,111000,87000"
8701pts [
8702"94000,87000"
8703"111000,87000"
8704]
8705)
8706start &199
8707end &129
8708ss 0
8709sat 32
8710eat 32
8711stc 0
8712st 0
8713sf 1
8714si 0
8715tg (WTG
8716uid 3031,0
8717ps "ConnStartEndStrategy"
8718stg "STSignalDisplayStrategy"
8719f (Text
8720uid 3032,0
8721va (VaSet
8722isHidden 1
8723)
8724xt "95000,86000,98600,87000"
8725st "DAC_CS"
8726blo "95000,86800"
8727tm "WireNameMgr"
8728)
8729)
8730on &83
8731)
8732*285 (Wire
8733uid 3218,0
8734shape (OrthoPolyLine
8735uid 3219,0
8736va (VaSet
8737vasetType 3
8738)
8739xt "22000,78000,51250,78000"
8740pts [
8741"22000,78000"
8742"51250,78000"
8743]
8744)
8745start &63
8746end &15
8747sat 32
8748eat 32
8749stc 0
8750st 0
8751sf 1
8752si 0
8753tg (WTG
8754uid 3220,0
8755ps "ConnStartEndStrategy"
8756stg "STSignalDisplayStrategy"
8757f (Text
8758uid 3221,0
8759va (VaSet
8760isHidden 1
8761)
8762xt "33000,77000,35100,78000"
8763st "TRG"
8764blo "33000,77800"
8765tm "WireNameMgr"
8766)
8767)
8768on &86
8769)
8770*286 (Wire
8771uid 3260,0
8772shape (OrthoPolyLine
8773uid 3261,0
8774va (VaSet
8775vasetType 3
8776lineWidth 2
8777)
8778xt "21000,70000,24000,70000"
8779pts [
8780"21000,70000"
8781"24000,70000"
8782]
8783)
8784start &84
8785end &87
8786sat 32
8787eat 2
8788sty 1
8789stc 0
8790st 0
8791sf 1
8792si 0
8793tg (WTG
8794uid 3264,0
8795ps "ConnStartEndStrategy"
8796stg "STSignalDisplayStrategy"
8797f (Text
8798uid 3265,0
8799va (VaSet
8800isHidden 1
8801)
8802xt "23000,69000,25800,70000"
8803st "A_CLK"
8804blo "23000,69800"
8805tm "WireNameMgr"
8806)
8807)
8808on &91
8809)
8810*287 (Wire
8811uid 3270,0
8812shape (OrthoPolyLine
8813uid 3271,0
8814va (VaSet
8815vasetType 3
8816)
8817xt "29000,70000,43000,72000"
8818pts [
8819"43000,72000"
8820"43000,70000"
8821"32000,70000"
8822"29000,70000"
8823]
8824)
8825start &212
8826end &87
8827sat 32
8828eat 1
8829st 0
8830sf 1
8831si 0
8832tg (WTG
8833uid 3274,0
8834ps "ConnStartEndStrategy"
8835stg "STSignalDisplayStrategy"
8836f (Text
8837uid 3275,0
8838va (VaSet
8839)
8840xt "35000,69000,39500,70000"
8841st "CLK_25_PS"
8842blo "35000,69800"
8843tm "WireNameMgr"
8844)
8845)
8846on &92
8847)
8848*288 (Wire
8849uid 3318,0
8850shape (OrthoPolyLine
8851uid 3319,0
8852va (VaSet
8853vasetType 3
8854lineWidth 2
8855)
8856xt "21000,95000,24000,95000"
8857pts [
8858"21000,95000"
8859"24000,95000"
8860]
8861)
8862start &101
8863end &97
8864sat 32
8865eat 1
8866sty 1
8867stc 0
8868st 0
8869sf 1
8870si 0
8871tg (WTG
8872uid 3322,0
8873ps "ConnStartEndStrategy"
8874stg "STSignalDisplayStrategy"
8875f (Text
8876uid 3323,0
8877va (VaSet
8878isHidden 1
8879)
8880xt "23000,94000,25300,95000"
8881st "A0_D"
8882blo "23000,94800"
8883tm "WireNameMgr"
8884)
8885)
8886on &105
8887)
8888*289 (Wire
8889uid 3352,0
8890shape (OrthoPolyLine
8891uid 3353,0
8892va (VaSet
8893vasetType 3
8894lineWidth 2
8895)
8896xt "21000,96000,24000,96000"
8897pts [
8898"21000,96000"
8899"24000,96000"
8900]
8901)
8902start &102
8903end &97
8904sat 32
8905eat 1
8906sty 1
8907stc 0
8908st 0
8909sf 1
8910si 0
8911tg (WTG
8912uid 3356,0
8913ps "ConnStartEndStrategy"
8914stg "STSignalDisplayStrategy"
8915f (Text
8916uid 3357,0
8917va (VaSet
8918isHidden 1
8919)
8920xt "23000,95000,25300,96000"
8921st "A1_D"
8922blo "23000,95800"
8923tm "WireNameMgr"
8924)
8925)
8926on &106
8927)
8928*290 (Wire
8929uid 3360,0
8930shape (OrthoPolyLine
8931uid 3361,0
8932va (VaSet
8933vasetType 3
8934lineWidth 2
8935)
8936xt "21000,97000,24000,97000"
8937pts [
8938"21000,97000"
8939"24000,97000"
8940]
8941)
8942start &103
8943end &97
8944sat 32
8945eat 1
8946sty 1
8947stc 0
8948st 0
8949sf 1
8950si 0
8951tg (WTG
8952uid 3364,0
8953ps "ConnStartEndStrategy"
8954stg "STSignalDisplayStrategy"
8955f (Text
8956uid 3365,0
8957va (VaSet
8958isHidden 1
8959)
8960xt "23000,96000,25300,97000"
8961st "A2_D"
8962blo "23000,96800"
8963tm "WireNameMgr"
8964)
8965)
8966on &107
8967)
8968*291 (Wire
8969uid 3368,0
8970shape (OrthoPolyLine
8971uid 3369,0
8972va (VaSet
8973vasetType 3
8974lineWidth 2
8975)
8976xt "21000,98000,24000,98000"
8977pts [
8978"21000,98000"
8979"24000,98000"
8980]
8981)
8982start &104
8983end &97
8984sat 32
8985eat 1
8986sty 1
8987stc 0
8988st 0
8989sf 1
8990si 0
8991tg (WTG
8992uid 3372,0
8993ps "ConnStartEndStrategy"
8994stg "STSignalDisplayStrategy"
8995f (Text
8996uid 3373,0
8997va (VaSet
8998isHidden 1
8999)
9000xt "23000,97000,25300,98000"
9001st "A3_D"
9002blo "23000,97800"
9003tm "WireNameMgr"
9004)
9005)
9006on &108
9007)
9008*292 (Wire
9009uid 3430,0
9010shape (OrthoPolyLine
9011uid 3431,0
9012va (VaSet
9013vasetType 3
9014)
9015xt "21000,113000,24000,113000"
9016pts [
9017"21000,113000"
9018"24000,113000"
9019]
9020)
9021start &175
9022end &109
9023sat 32
9024eat 2
9025stc 0
9026st 0
9027sf 1
9028si 0
9029tg (WTG
9030uid 3434,0
9031ps "ConnStartEndStrategy"
9032stg "STSignalDisplayStrategy"
9033f (Text
9034uid 3435,0
9035va (VaSet
9036isHidden 1
9037)
9038xt "23000,112000,27400,113000"
9039st "D0_SRCLK"
9040blo "23000,112800"
9041tm "WireNameMgr"
9042)
9043)
9044on &113
9045)
9046*293 (Wire
9047uid 3438,0
9048shape (OrthoPolyLine
9049uid 3439,0
9050va (VaSet
9051vasetType 3
9052)
9053xt "21000,114000,24000,114000"
9054pts [
9055"21000,114000"
9056"24000,114000"
9057]
9058)
9059start &176
9060end &109
9061sat 32
9062eat 2
9063stc 0
9064st 0
9065sf 1
9066si 0
9067tg (WTG
9068uid 3442,0
9069ps "ConnStartEndStrategy"
9070stg "STSignalDisplayStrategy"
9071f (Text
9072uid 3443,0
9073va (VaSet
9074isHidden 1
9075)
9076xt "23000,113000,27400,114000"
9077st "D1_SRCLK"
9078blo "23000,113800"
9079tm "WireNameMgr"
9080)
9081)
9082on &114
9083)
9084*294 (Wire
9085uid 3446,0
9086shape (OrthoPolyLine
9087uid 3447,0
9088va (VaSet
9089vasetType 3
9090)
9091xt "21000,115000,24000,115000"
9092pts [
9093"21000,115000"
9094"24000,115000"
9095]
9096)
9097start &177
9098end &109
9099sat 32
9100eat 2
9101stc 0
9102st 0
9103sf 1
9104si 0
9105tg (WTG
9106uid 3450,0
9107ps "ConnStartEndStrategy"
9108stg "STSignalDisplayStrategy"
9109f (Text
9110uid 3451,0
9111va (VaSet
9112isHidden 1
9113)
9114xt "23000,114000,27400,115000"
9115st "D2_SRCLK"
9116blo "23000,114800"
9117tm "WireNameMgr"
9118)
9119)
9120on &115
9121)
9122*295 (Wire
9123uid 3454,0
9124shape (OrthoPolyLine
9125uid 3455,0
9126va (VaSet
9127vasetType 3
9128)
9129xt "21000,116000,24000,116000"
9130pts [
9131"21000,116000"
9132"24000,116000"
9133]
9134)
9135start &178
9136end &109
9137sat 32
9138eat 2
9139stc 0
9140st 0
9141sf 1
9142si 0
9143tg (WTG
9144uid 3458,0
9145ps "ConnStartEndStrategy"
9146stg "STSignalDisplayStrategy"
9147f (Text
9148uid 3459,0
9149va (VaSet
9150isHidden 1
9151)
9152xt "23000,115000,27400,116000"
9153st "D3_SRCLK"
9154blo "23000,115800"
9155tm "WireNameMgr"
9156)
9157)
9158on &116
9159)
9160*296 (Wire
9161uid 3574,0
9162shape (OrthoPolyLine
9163uid 3575,0
9164va (VaSet
9165vasetType 3
9166)
9167xt "108000,89000,111000,89000"
9168pts [
9169"111000,89000"
9170"108000,89000"
9171]
9172)
9173start &134
9174end &130
9175sat 32
9176eat 2
9177stc 0
9178st 0
9179sf 1
9180si 0
9181tg (WTG
9182uid 3578,0
9183ps "ConnStartEndStrategy"
9184stg "STSignalDisplayStrategy"
9185f (Text
9186uid 3579,0
9187va (VaSet
9188isHidden 1
9189)
9190xt "108000,88000,110800,89000"
9191st "T0_CS"
9192blo "108000,88800"
9193tm "WireNameMgr"
9194)
9195)
9196on &138
9197)
9198*297 (Wire
9199uid 3582,0
9200shape (OrthoPolyLine
9201uid 3583,0
9202va (VaSet
9203vasetType 3
9204)
9205xt "108000,90000,111000,90000"
9206pts [
9207"111000,90000"
9208"108000,90000"
9209]
9210)
9211start &135
9212end &130
9213sat 32
9214eat 2
9215stc 0
9216st 0
9217sf 1
9218si 0
9219tg (WTG
9220uid 3586,0
9221ps "ConnStartEndStrategy"
9222stg "STSignalDisplayStrategy"
9223f (Text
9224uid 3587,0
9225va (VaSet
9226isHidden 1
9227)
9228xt "108000,89000,110800,90000"
9229st "T1_CS"
9230blo "108000,89800"
9231tm "WireNameMgr"
9232)
9233)
9234on &139
9235)
9236*298 (Wire
9237uid 3590,0
9238shape (OrthoPolyLine
9239uid 3591,0
9240va (VaSet
9241vasetType 3
9242)
9243xt "108000,91000,111000,91000"
9244pts [
9245"111000,91000"
9246"108000,91000"
9247]
9248)
9249start &136
9250end &130
9251sat 32
9252eat 2
9253stc 0
9254st 0
9255sf 1
9256si 0
9257tg (WTG
9258uid 3594,0
9259ps "ConnStartEndStrategy"
9260stg "STSignalDisplayStrategy"
9261f (Text
9262uid 3595,0
9263va (VaSet
9264isHidden 1
9265)
9266xt "108000,90000,110800,91000"
9267st "T2_CS"
9268blo "108000,90800"
9269tm "WireNameMgr"
9270)
9271)
9272on &140
9273)
9274*299 (Wire
9275uid 3598,0
9276shape (OrthoPolyLine
9277uid 3599,0
9278va (VaSet
9279vasetType 3
9280)
9281xt "108000,92000,111000,92000"
9282pts [
9283"111000,92000"
9284"108000,92000"
9285]
9286)
9287start &137
9288end &130
9289sat 32
9290eat 2
9291stc 0
9292st 0
9293sf 1
9294si 0
9295tg (WTG
9296uid 3602,0
9297ps "ConnStartEndStrategy"
9298stg "STSignalDisplayStrategy"
9299f (Text
9300uid 3603,0
9301va (VaSet
9302isHidden 1
9303)
9304xt "108000,91000,110800,92000"
9305st "T3_CS"
9306blo "108000,91800"
9307tm "WireNameMgr"
9308)
9309)
9310on &141
9311)
9312*300 (Wire
9313uid 3682,0
9314shape (OrthoPolyLine
9315uid 3683,0
9316va (VaSet
9317vasetType 3
9318)
9319xt "80750,100000,111000,100000"
9320pts [
9321"80750,100000"
9322"111000,100000"
9323]
9324)
9325start &42
9326end &153
9327sat 32
9328eat 32
9329stc 0
9330st 0
9331sf 1
9332si 0
9333tg (WTG
9334uid 3686,0
9335ps "ConnStartEndStrategy"
9336stg "STSignalDisplayStrategy"
9337f (Text
9338uid 3687,0
9339va (VaSet
9340isHidden 1
9341)
9342xt "82000,99000,84400,100000"
9343st "MOSI"
9344blo "82000,99800"
9345tm "WireNameMgr"
9346)
9347)
9348on &152
9349)
9350*301 (Wire
9351uid 3778,0
9352shape (OrthoPolyLine
9353uid 3779,0
9354va (VaSet
9355vasetType 3
9356)
9357xt "108000,103000,111000,103000"
9358pts [
9359"111000,103000"
9360"108000,103000"
9361]
9362)
9363start &159
9364end &155
9365sat 32
9366eat 2
9367stc 0
9368st 0
9369sf 1
9370si 0
9371tg (WTG
9372uid 3782,0
9373ps "ConnStartEndStrategy"
9374stg "STSignalDisplayStrategy"
9375f (Text
9376uid 3783,0
9377va (VaSet
9378isHidden 1
9379)
9380xt "108000,102000,111000,103000"
9381st "TRG_V"
9382blo "108000,102800"
9383tm "WireNameMgr"
9384)
9385)
9386on &167
9387)
9388*302 (Wire
9389uid 3786,0
9390shape (OrthoPolyLine
9391uid 3787,0
9392va (VaSet
9393vasetType 3
9394)
9395xt "108000,104000,111000,104000"
9396pts [
9397"111000,104000"
9398"108000,104000"
9399]
9400)
9401start &160
9402end &155
9403sat 32
9404eat 2
9405stc 0
9406st 0
9407sf 1
9408si 0
9409tg (WTG
9410uid 3790,0
9411ps "ConnStartEndStrategy"
9412stg "STSignalDisplayStrategy"
9413f (Text
9414uid 3791,0
9415va (VaSet
9416isHidden 1
9417)
9418xt "108000,103000,113600,104000"
9419st "RS485_C_RE"
9420blo "108000,103800"
9421tm "WireNameMgr"
9422)
9423)
9424on &168
9425)
9426*303 (Wire
9427uid 3794,0
9428shape (OrthoPolyLine
9429uid 3795,0
9430va (VaSet
9431vasetType 3
9432)
9433xt "108000,105000,111000,105000"
9434pts [
9435"111000,105000"
9436"108000,105000"
9437]
9438)
9439start &161
9440end &155
9441sat 32
9442eat 2
9443stc 0
9444st 0
9445sf 1
9446si 0
9447tg (WTG
9448uid 3798,0
9449ps "ConnStartEndStrategy"
9450stg "STSignalDisplayStrategy"
9451f (Text
9452uid 3799,0
9453va (VaSet
9454isHidden 1
9455)
9456xt "108000,104000,113600,105000"
9457st "RS485_C_DE"
9458blo "108000,104800"
9459tm "WireNameMgr"
9460)
9461)
9462on &169
9463)
9464*304 (Wire
9465uid 3802,0
9466shape (OrthoPolyLine
9467uid 3803,0
9468va (VaSet
9469vasetType 3
9470)
9471xt "108000,106000,111000,106000"
9472pts [
9473"111000,106000"
9474"108000,106000"
9475]
9476)
9477start &162
9478end &155
9479sat 32
9480eat 2
9481stc 0
9482st 0
9483sf 1
9484si 0
9485tg (WTG
9486uid 3806,0
9487ps "ConnStartEndStrategy"
9488stg "STSignalDisplayStrategy"
9489f (Text
9490uid 3807,0
9491va (VaSet
9492isHidden 1
9493)
9494xt "108000,105000,113500,106000"
9495st "RS485_E_RE"
9496blo "108000,105800"
9497tm "WireNameMgr"
9498)
9499)
9500on &170
9501)
9502*305 (Wire
9503uid 3810,0
9504shape (OrthoPolyLine
9505uid 3811,0
9506va (VaSet
9507vasetType 3
9508)
9509xt "108000,107000,111000,107000"
9510pts [
9511"111000,107000"
9512"108000,107000"
9513]
9514)
9515start &163
9516end &155
9517sat 32
9518eat 2
9519stc 0
9520st 0
9521sf 1
9522si 0
9523tg (WTG
9524uid 3814,0
9525ps "ConnStartEndStrategy"
9526stg "STSignalDisplayStrategy"
9527f (Text
9528uid 3815,0
9529va (VaSet
9530isHidden 1
9531)
9532xt "108000,106000,113500,107000"
9533st "RS485_E_DE"
9534blo "108000,106800"
9535tm "WireNameMgr"
9536)
9537)
9538on &171
9539)
9540*306 (Wire
9541uid 3834,0
9542shape (OrthoPolyLine
9543uid 3835,0
9544va (VaSet
9545vasetType 3
9546)
9547xt "108000,110000,111000,110000"
9548pts [
9549"111000,110000"
9550"108000,110000"
9551]
9552)
9553start &165
9554end &155
9555sat 32
9556eat 2
9557stc 0
9558st 0
9559sf 1
9560si 0
9561tg (WTG
9562uid 3838,0
9563ps "ConnStartEndStrategy"
9564stg "STSignalDisplayStrategy"
9565f (Text
9566uid 3839,0
9567va (VaSet
9568isHidden 1
9569)
9570xt "108000,109000,110900,110000"
9571st "EE_CS"
9572blo "108000,109800"
9573tm "WireNameMgr"
9574)
9575)
9576on &173
9577)
9578*307 (Wire
9579uid 3842,0
9580shape (OrthoPolyLine
9581uid 3843,0
9582va (VaSet
9583vasetType 3
9584lineWidth 2
9585)
9586xt "108000,111000,111000,111000"
9587pts [
9588"111000,111000"
9589"108000,111000"
9590]
9591)
9592start &166
9593end &155
9594sat 32
9595eat 2
9596sty 1
9597stc 0
9598st 0
9599sf 1
9600si 0
9601tg (WTG
9602uid 3846,0
9603ps "ConnStartEndStrategy"
9604stg "STSignalDisplayStrategy"
9605f (Text
9606uid 3847,0
9607va (VaSet
9608isHidden 1
9609)
9610xt "108000,110000,109900,111000"
9611st "LED"
9612blo "108000,110800"
9613tm "WireNameMgr"
9614)
9615)
9616on &174
9617)
9618*308 (Wire
9619uid 4942,0
9620shape (OrthoPolyLine
9621uid 4943,0
9622va (VaSet
9623vasetType 3
9624lineWidth 2
9625)
9626xt "80750,120000,111000,120000"
9627pts [
9628"80750,120000"
9629"111000,120000"
9630]
9631)
9632start &14
9633end &179
9634sat 32
9635eat 32
9636sty 1
9637stc 0
9638st 0
9639sf 1
9640si 0
9641tg (WTG
9642uid 4948,0
9643ps "ConnStartEndStrategy"
9644stg "STSignalDisplayStrategy"
9645f (Text
9646uid 4949,0
9647va (VaSet
9648isHidden 1
9649)
9650xt "82750,117000,84650,118000"
9651st "D_T"
9652blo "82750,117800"
9653tm "WireNameMgr"
9654)
9655)
9656on &180
9657)
9658*309 (Wire
9659uid 6431,0
9660shape (OrthoPolyLine
9661uid 6432,0
9662va (VaSet
9663vasetType 3
9664)
9665xt "80750,121000,111000,121000"
9666pts [
9667"80750,121000"
9668"111000,121000"
9669]
9670)
9671start &43
9672end &164
9673sat 32
9674eat 32
9675stc 0
9676st 0
9677sf 1
9678si 0
9679tg (WTG
9680uid 6435,0
9681ps "ConnStartEndStrategy"
9682stg "STSignalDisplayStrategy"
9683f (Text
9684uid 6436,0
9685va (VaSet
9686isHidden 1
9687)
9688xt "92000,120000,96000,121000"
9689st "DENABLE"
9690blo "92000,120800"
9691tm "WireNameMgr"
9692)
9693)
9694on &172
9695)
9696*310 (Wire
9697uid 6787,0
9698shape (OrthoPolyLine
9699uid 6788,0
9700va (VaSet
9701vasetType 3
9702lineWidth 2
9703)
9704xt "59000,145000,65000,145000"
9705pts [
9706"59000,145000"
9707"65000,145000"
9708]
9709)
9710start &181
9711end &185
9712sat 32
9713eat 1
9714sty 1
9715st 0
9716sf 1
9717si 0
9718tg (WTG
9719uid 6791,0
9720ps "ConnStartEndStrategy"
9721stg "STSignalDisplayStrategy"
9722f (Text
9723uid 6792,0
9724va (VaSet
9725isHidden 1
9726)
9727xt "61000,144000,67800,145000"
9728st "D_PLLLCK : (3:0)"
9729blo "61000,144800"
9730tm "WireNameMgr"
9731)
9732)
9733on &182
9734)
9735*311 (Wire
9736uid 6880,0
9737shape (OrthoPolyLine
9738uid 6881,0
9739va (VaSet
9740vasetType 3
9741lineWidth 2
9742)
9743xt "68000,145000,75000,145000"
9744pts [
9745"68000,145000"
9746"75000,145000"
9747]
9748)
9749start &185
9750end &183
9751sat 2
9752eat 32
9753sty 1
9754st 0
9755sf 1
9756si 0
9757tg (WTG
9758uid 6884,0
9759ps "ConnStartEndStrategy"
9760stg "STSignalDisplayStrategy"
9761f (Text
9762uid 6885,0
9763va (VaSet
9764isHidden 1
9765)
9766xt "70000,144000,74900,145000"
9767st "D_T2 : (3:0)"
9768blo "70000,144800"
9769tm "WireNameMgr"
9770)
9771)
9772on &184
9773)
9774*312 (Wire
9775uid 7144,0
9776shape (OrthoPolyLine
9777uid 7145,0
9778va (VaSet
9779vasetType 3
9780lineWidth 2
9781)
9782xt "122000,126000,132000,126000"
9783pts [
9784"122000,126000"
9785"132000,126000"
9786]
9787)
9788end &193
9789sat 16
9790eat 32
9791sty 1
9792st 0
9793sf 1
9794si 0
9795tg (WTG
9796uid 7148,0
9797ps "ConnStartEndStrategy"
9798stg "STSignalDisplayStrategy"
9799f (Text
9800uid 7149,0
9801va (VaSet
9802isHidden 1
9803)
9804xt "124000,125000,128800,126000"
9805st "A1_T : (7:0)"
9806blo "124000,125800"
9807tm "WireNameMgr"
9808)
9809)
9810on &194
9811)
9812*313 (Wire
9813uid 7477,0
9814shape (OrthoPolyLine
9815uid 7478,0
9816va (VaSet
9817vasetType 3
9818)
9819xt "80750,87000,91000,87000"
9820pts [
9821"80750,87000"
9822"91000,87000"
9823]
9824)
9825start &38
9826end &197
9827es 0
9828sat 32
9829eat 32
9830st 0
9831sf 1
9832si 0
9833tg (WTG
9834uid 7483,0
9835ps "ConnStartEndStrategy"
9836stg "STSignalDisplayStrategy"
9837f (Text
9838uid 7484,0
9839va (VaSet
9840)
9841xt "83000,86000,85700,87000"
9842st "dummy"
9843blo "83000,86800"
9844tm "WireNameMgr"
9845)
9846)
9847on &195
9848)
9849*314 (Wire
9850uid 8853,0
9851shape (OrthoPolyLine
9852uid 8854,0
9853va (VaSet
9854vasetType 3
9855lineWidth 2
9856)
9857xt "18000,109000,51250,124000"
9858pts [
9859"51250,109000"
9860"18000,109000"
9861"18000,124000"
9862"21000,124000"
9863]
9864)
9865start &30
9866end &189
9867sat 32
9868eat 1
9869sty 1
9870st 0
9871sf 1
9872si 0
9873tg (WTG
9874uid 8857,0
9875ps "ConnStartEndStrategy"
9876stg "STSignalDisplayStrategy"
9877f (Text
9878uid 8858,0
9879va (VaSet
9880)
9881xt "42000,108000,50500,109000"
9882st "drs_channel_id : (3:0)"
9883blo "42000,108800"
9884tm "WireNameMgr"
9885)
9886)
9887on &209
9888)
9889*315 (Wire
9890uid 9502,0
9891shape (OrthoPolyLine
9892uid 9503,0
9893va (VaSet
9894vasetType 3
9895)
9896xt "46000,69000,51250,69000"
9897pts [
9898"51250,69000"
9899"46000,69000"
9900]
9901)
9902start &26
9903sat 32
9904eat 16
9905st 0
9906sf 1
9907si 0
9908tg (WTG
9909uid 9506,0
9910ps "ConnStartEndStrategy"
9911stg "STSignalDisplayStrategy"
9912f (Text
9913uid 9507,0
9914va (VaSet
9915)
9916xt "47000,68000,50100,69000"
9917st "CLK_50"
9918blo "47000,68800"
9919tm "WireNameMgr"
9920)
9921)
9922on &210
9923)
9924*316 (Wire
9925uid 10034,0
9926shape (OrthoPolyLine
9927uid 10035,0
9928va (VaSet
9929vasetType 3
9930)
9931xt "49000,70000,51250,71000"
9932pts [
9933"51250,70000"
9934"49000,70000"
9935"49000,71000"
9936]
9937)
9938start &25
9939end &217
9940sat 32
9941eat 32
9942st 0
9943sf 1
9944si 0
9945tg (WTG
9946uid 10036,0
9947ps "ConnStartEndStrategy"
9948stg "STSignalDisplayStrategy"
9949f (Text
9950uid 10037,0
9951va (VaSet
9952isHidden 1
9953)
9954xt "45250,69000,50550,70000"
9955st "CLK_25_PS1"
9956blo "45250,69800"
9957tm "WireNameMgr"
9958)
9959)
9960on &229
9961)
9962*317 (Wire
9963uid 10052,0
9964shape (OrthoPolyLine
9965uid 10053,0
9966va (VaSet
9967vasetType 3
9968)
9969xt "49000,73000,51250,73000"
9970pts [
9971"51250,73000"
9972"49000,73000"
9973]
9974)
9975start &44
9976end &215
9977sat 32
9978eat 32
9979st 0
9980sf 1
9981si 0
9982tg (WTG
9983uid 10054,0
9984ps "ConnStartEndStrategy"
9985stg "STSignalDisplayStrategy"
9986f (Text
9987uid 10055,0
9988va (VaSet
9989isHidden 1
9990)
9991xt "47000,72000,51500,73000"
9992st "adc_clk_en"
9993blo "47000,72800"
9994tm "WireNameMgr"
9995)
9996)
9997on &230
9998)
9999*318 (Wire
10000uid 10302,0
10001shape (OrthoPolyLine
10002uid 10303,0
10003va (VaSet
10004vasetType 3
10005lineWidth 2
10006)
10007xt "122000,128000,132000,128000"
10008pts [
10009"122000,128000"
10010"132000,128000"
10011]
10012)
10013end &231
10014sat 16
10015eat 32
10016sty 1
10017st 0
10018sf 1
10019si 0
10020tg (WTG
10021uid 10306,0
10022ps "ConnStartEndStrategy"
10023stg "STSignalDisplayStrategy"
10024f (Text
10025uid 10307,0
10026va (VaSet
10027isHidden 1
10028)
10029xt "124000,127000,128800,128000"
10030st "A0_T : (7:0)"
10031blo "124000,127800"
10032tm "WireNameMgr"
10033)
10034)
10035on &232
10036)
10037*319 (Wire
10038uid 10452,0
10039shape (OrthoPolyLine
10040uid 10453,0
10041va (VaSet
10042vasetType 3
10043lineWidth 2
10044)
10045xt "112000,126000,122000,126000"
10046pts [
10047"112000,126000"
10048"122000,126000"
10049]
10050)
10051start &233
10052sat 2
10053eat 16
10054sty 1
10055st 0
10056sf 1
10057si 0
10058tg (WTG
10059uid 10458,0
10060ps "ConnStartEndStrategy"
10061stg "STSignalDisplayStrategy"
10062f (Text
10063uid 10459,0
10064va (VaSet
10065)
10066xt "114000,125000,118800,126000"
10067st "A0_T : (7:0)"
10068blo "114000,125800"
10069tm "WireNameMgr"
10070)
10071)
10072on &232
10073)
10074*320 (Wire
10075uid 10460,0
10076shape (OrthoPolyLine
10077uid 10461,0
10078va (VaSet
10079vasetType 3
10080lineWidth 2
10081)
10082xt "112000,127000,122000,127000"
10083pts [
10084"112000,127000"
10085"122000,127000"
10086]
10087)
10088start &233
10089sat 2
10090eat 16
10091sty 1
10092st 0
10093sf 1
10094si 0
10095tg (WTG
10096uid 10466,0
10097ps "ConnStartEndStrategy"
10098stg "STSignalDisplayStrategy"
10099f (Text
10100uid 10467,0
10101va (VaSet
10102)
10103xt "114000,126000,118800,127000"
10104st "A1_T : (7:0)"
10105blo "114000,126800"
10106tm "WireNameMgr"
10107)
10108)
10109on &194
10110)
10111*321 (Wire
10112uid 10498,0
10113shape (OrthoPolyLine
10114uid 10499,0
10115va (VaSet
10116vasetType 3
10117)
10118xt "80750,123000,88000,123000"
10119pts [
10120"80750,123000"
10121"88000,123000"
10122]
10123)
10124start &58
10125sat 32
10126eat 16
10127st 0
10128sf 1
10129si 0
10130tg (WTG
10131uid 10502,0
10132ps "ConnStartEndStrategy"
10133stg "STSignalDisplayStrategy"
10134f (Text
10135uid 10503,0
10136va (VaSet
10137)
10138xt "82000,122000,86800,123000"
10139st "CLK50_OUT"
10140blo "82000,122800"
10141tm "WireNameMgr"
10142)
10143)
10144on &237
10145)
10146*322 (Wire
10147uid 10506,0
10148shape (OrthoPolyLine
10149uid 10507,0
10150va (VaSet
10151vasetType 3
10152)
10153xt "80750,124000,88000,124000"
10154pts [
10155"80750,124000"
10156"88000,124000"
10157]
10158)
10159start &56
10160sat 32
10161eat 16
10162st 0
10163sf 1
10164si 0
10165tg (WTG
10166uid 10510,0
10167ps "ConnStartEndStrategy"
10168stg "STSignalDisplayStrategy"
10169f (Text
10170uid 10511,0
10171va (VaSet
10172)
10173xt "82000,123000,86800,124000"
10174st "CLK25_OUT"
10175blo "82000,123800"
10176tm "WireNameMgr"
10177)
10178)
10179on &238
10180)
10181*323 (Wire
10182uid 10514,0
10183shape (OrthoPolyLine
10184uid 10515,0
10185va (VaSet
10186vasetType 3
10187)
10188xt "80750,125000,89000,125000"
10189pts [
10190"80750,125000"
10191"89000,125000"
10192]
10193)
10194start &57
10195sat 32
10196eat 16
10197st 0
10198sf 1
10199si 0
10200tg (WTG
10201uid 10518,0
10202ps "ConnStartEndStrategy"
10203stg "STSignalDisplayStrategy"
10204f (Text
10205uid 10519,0
10206va (VaSet
10207)
10208xt "82000,124000,88200,125000"
10209st "CLK25_PSOUT"
10210blo "82000,124800"
10211tm "WireNameMgr"
10212)
10213)
10214on &239
10215)
10216*324 (Wire
10217uid 10522,0
10218shape (OrthoPolyLine
10219uid 10523,0
10220va (VaSet
10221vasetType 3
10222)
10223xt "80750,126000,87000,126000"
10224pts [
10225"80750,126000"
10226"87000,126000"
10227]
10228)
10229start &48
10230sat 32
10231eat 16
10232st 0
10233sf 1
10234si 0
10235tg (WTG
10236uid 10526,0
10237ps "ConnStartEndStrategy"
10238stg "STSignalDisplayStrategy"
10239f (Text
10240uid 10527,0
10241va (VaSet
10242)
10243xt "82000,125000,86400,126000"
10244st "PS_DIR_IN"
10245blo "82000,125800"
10246tm "WireNameMgr"
10247)
10248)
10249on &240
10250)
10251*325 (Wire
10252uid 10530,0
10253shape (OrthoPolyLine
10254uid 10531,0
10255va (VaSet
10256vasetType 3
10257)
10258xt "80750,127000,87000,127000"
10259pts [
10260"80750,127000"
10261"87000,127000"
10262]
10263)
10264start &49
10265sat 32
10266eat 16
10267st 0
10268sf 1
10269si 0
10270tg (WTG
10271uid 10534,0
10272ps "ConnStartEndStrategy"
10273stg "STSignalDisplayStrategy"
10274f (Text
10275uid 10535,0
10276va (VaSet
10277)
10278xt "82000,126000,86200,127000"
10279st "PS_DO_IN"
10280blo "82000,126800"
10281tm "WireNameMgr"
10282)
10283)
10284on &241
10285)
10286*326 (Wire
10287uid 10538,0
10288shape (OrthoPolyLine
10289uid 10539,0
10290va (VaSet
10291vasetType 3
10292)
10293xt "80750,129000,88000,129000"
10294pts [
10295"80750,129000"
10296"88000,129000"
10297]
10298)
10299start &52
10300sat 32
10301eat 16
10302st 0
10303sf 1
10304si 0
10305tg (WTG
10306uid 10542,0
10307ps "ConnStartEndStrategy"
10308stg "STSignalDisplayStrategy"
10309f (Text
10310uid 10543,0
10311va (VaSet
10312)
10313xt "82000,128000,86600,129000"
10314st "PSEN_OUT"
10315blo "82000,128800"
10316tm "WireNameMgr"
10317)
10318)
10319on &242
10320)
10321*327 (Wire
10322uid 10546,0
10323shape (OrthoPolyLine
10324uid 10547,0
10325va (VaSet
10326vasetType 3
10327)
10328xt "80750,128000,90000,128000"
10329pts [
10330"80750,128000"
10331"90000,128000"
10332]
10333)
10334start &53
10335sat 32
10336eat 16
10337st 0
10338sf 1
10339si 0
10340tg (WTG
10341uid 10550,0
10342ps "ConnStartEndStrategy"
10343stg "STSignalDisplayStrategy"
10344f (Text
10345uid 10551,0
10346va (VaSet
10347)
10348xt "82000,127000,89000,128000"
10349st "PSINCDEC_OUT"
10350blo "82000,127800"
10351tm "WireNameMgr"
10352)
10353)
10354on &243
10355)
10356*328 (Wire
10357uid 10554,0
10358shape (OrthoPolyLine
10359uid 10555,0
10360va (VaSet
10361vasetType 3
10362)
10363xt "80750,130000,88000,130000"
10364pts [
10365"80750,130000"
10366"88000,130000"
10367]
10368)
10369start &45
10370sat 32
10371eat 16
10372st 0
10373sf 1
10374si 0
10375tg (WTG
10376uid 10558,0
10377ps "ConnStartEndStrategy"
10378stg "STSignalDisplayStrategy"
10379f (Text
10380uid 10559,0
10381va (VaSet
10382)
10383xt "82000,129000,87200,130000"
10384st "DCM_locked"
10385blo "82000,129800"
10386tm "WireNameMgr"
10387)
10388)
10389on &244
10390)
10391*329 (Wire
10392uid 10562,0
10393shape (OrthoPolyLine
10394uid 10563,0
10395va (VaSet
10396vasetType 3
10397)
10398xt "80750,132000,85000,132000"
10399pts [
10400"80750,132000"
10401"85000,132000"
10402]
10403)
10404start &54
10405sat 32
10406eat 16
10407st 0
10408sf 1
10409si 0
10410tg (WTG
10411uid 10566,0
10412ps "ConnStartEndStrategy"
10413stg "STSignalDisplayStrategy"
10414f (Text
10415uid 10567,0
10416va (VaSet
10417)
10418xt "82000,131000,84200,132000"
10419st "ready"
10420blo "82000,131800"
10421tm "WireNameMgr"
10422)
10423)
10424on &245
10425)
10426*330 (Wire
10427uid 10570,0
10428shape (OrthoPolyLine
10429uid 10571,0
10430va (VaSet
10431vasetType 3
10432)
10433xt "80750,133000,86000,133000"
10434pts [
10435"80750,133000"
10436"86000,133000"
10437]
10438)
10439start &55
10440sat 32
10441eat 16
10442st 0
10443sf 1
10444si 0
10445tg (WTG
10446uid 10574,0
10447ps "ConnStartEndStrategy"
10448stg "STSignalDisplayStrategy"
10449f (Text
10450uid 10575,0
10451va (VaSet
10452)
10453xt "82000,132000,84900,133000"
10454st "shifting"
10455blo "82000,132800"
10456tm "WireNameMgr"
10457)
10458)
10459on &246
10460)
10461*331 (Wire
10462uid 10578,0
10463shape (OrthoPolyLine
10464uid 10579,0
10465va (VaSet
10466vasetType 3
10467)
10468xt "80750,134000,91000,134000"
10469pts [
10470"80750,134000"
10471"91000,134000"
10472]
10473)
10474start &51
10475sat 32
10476eat 16
10477st 0
10478sf 1
10479si 0
10480tg (WTG
10481uid 10582,0
10482ps "ConnStartEndStrategy"
10483stg "STSignalDisplayStrategy"
10484f (Text
10485uid 10583,0
10486va (VaSet
10487)
10488xt "82000,133000,89800,134000"
10489st "PSDONE_extraOUT"
10490blo "82000,133800"
10491tm "WireNameMgr"
10492)
10493)
10494on &247
10495)
10496*332 (Wire
10497uid 10586,0
10498shape (OrthoPolyLine
10499uid 10587,0
10500va (VaSet
10501vasetType 3
10502)
10503xt "80750,135000,88000,135000"
10504pts [
10505"80750,135000"
10506"88000,135000"
10507]
10508)
10509start &50
10510sat 32
10511eat 16
10512st 0
10513sf 1
10514si 0
10515tg (WTG
10516uid 10590,0
10517ps "ConnStartEndStrategy"
10518stg "STSignalDisplayStrategy"
10519f (Text
10520uid 10591,0
10521va (VaSet
10522)
10523xt "82000,134000,87000,135000"
10524st "PSCLK_OUT"
10525blo "82000,134800"
10526tm "WireNameMgr"
10527)
10528)
10529on &248
10530)
10531*333 (Wire
10532uid 10594,0
10533shape (OrthoPolyLine
10534uid 10595,0
10535va (VaSet
10536vasetType 3
10537)
10538xt "80750,136000,91000,136000"
10539pts [
10540"80750,136000"
10541"91000,136000"
10542]
10543)
10544start &46
10545sat 32
10546eat 16
10547st 0
10548sf 1
10549si 0
10550tg (WTG
10551uid 10598,0
10552ps "ConnStartEndStrategy"
10553stg "STSignalDisplayStrategy"
10554f (Text
10555uid 10599,0
10556va (VaSet
10557)
10558xt "82000,135000,89700,136000"
10559st "LOCKED_extraOUT"
10560blo "82000,135800"
10561tm "WireNameMgr"
10562)
10563)
10564on &249
10565)
10566*334 (Wire
10567uid 10600,0
10568shape (OrthoPolyLine
10569uid 10601,0
10570va (VaSet
10571vasetType 3
10572)
10573xt "96000,123000,106000,123000"
10574pts [
10575"96000,123000"
10576"106000,123000"
10577]
10578)
10579end &233
10580sat 16
10581eat 1
10582st 0
10583sf 1
10584si 0
10585tg (WTG
10586uid 10606,0
10587ps "ConnStartEndStrategy"
10588stg "STSignalDisplayStrategy"
10589f (Text
10590uid 10607,0
10591va (VaSet
10592)
10593xt "98000,122000,102800,123000"
10594st "CLK25_OUT"
10595blo "98000,122800"
10596tm "WireNameMgr"
10597)
10598)
10599on &238
10600)
10601*335 (Wire
10602uid 10608,0
10603shape (OrthoPolyLine
10604uid 10609,0
10605va (VaSet
10606vasetType 3
10607)
10608xt "96000,124000,106000,124000"
10609pts [
10610"96000,124000"
10611"106000,124000"
10612]
10613)
10614end &233
10615sat 16
10616eat 1
10617st 0
10618sf 1
10619si 0
10620tg (WTG
10621uid 10614,0
10622ps "ConnStartEndStrategy"
10623stg "STSignalDisplayStrategy"
10624f (Text
10625uid 10615,0
10626va (VaSet
10627)
10628xt "98000,123000,104200,124000"
10629st "CLK25_PSOUT"
10630blo "98000,123800"
10631tm "WireNameMgr"
10632)
10633)
10634on &239
10635)
10636*336 (Wire
10637uid 10616,0
10638shape (OrthoPolyLine
10639uid 10617,0
10640va (VaSet
10641vasetType 3
10642)
10643xt "96000,125000,106000,125000"
10644pts [
10645"96000,125000"
10646"106000,125000"
10647]
10648)
10649end &233
10650sat 16
10651eat 1
10652st 0
10653sf 1
10654si 0
10655tg (WTG
10656uid 10622,0
10657ps "ConnStartEndStrategy"
10658stg "STSignalDisplayStrategy"
10659f (Text
10660uid 10623,0
10661va (VaSet
10662)
10663xt "98000,124000,102800,125000"
10664st "CLK50_OUT"
10665blo "98000,124800"
10666tm "WireNameMgr"
10667)
10668)
10669on &237
10670)
10671*337 (Wire
10672uid 10624,0
10673shape (OrthoPolyLine
10674uid 10625,0
10675va (VaSet
10676vasetType 3
10677)
10678xt "96000,126000,106000,126000"
10679pts [
10680"96000,126000"
10681"106000,126000"
10682]
10683)
10684end &233
10685sat 16
10686eat 1
10687st 0
10688sf 1
10689si 0
10690tg (WTG
10691uid 10630,0
10692ps "ConnStartEndStrategy"
10693stg "STSignalDisplayStrategy"
10694f (Text
10695uid 10631,0
10696va (VaSet
10697)
10698xt "98000,125000,103200,126000"
10699st "DCM_locked"
10700blo "98000,125800"
10701tm "WireNameMgr"
10702)
10703)
10704on &244
10705)
10706*338 (Wire
10707uid 10632,0
10708shape (OrthoPolyLine
10709uid 10633,0
10710va (VaSet
10711vasetType 3
10712)
10713xt "96000,127000,106000,127000"
10714pts [
10715"96000,127000"
10716"106000,127000"
10717]
10718)
10719end &233
10720sat 16
10721eat 1
10722st 0
10723sf 1
10724si 0
10725tg (WTG
10726uid 10638,0
10727ps "ConnStartEndStrategy"
10728stg "STSignalDisplayStrategy"
10729f (Text
10730uid 10639,0
10731va (VaSet
10732)
10733xt "98000,126000,105700,127000"
10734st "LOCKED_extraOUT"
10735blo "98000,126800"
10736tm "WireNameMgr"
10737)
10738)
10739on &249
10740)
10741*339 (Wire
10742uid 10640,0
10743shape (OrthoPolyLine
10744uid 10641,0
10745va (VaSet
10746vasetType 3
10747)
10748xt "96000,128000,106000,128000"
10749pts [
10750"96000,128000"
10751"106000,128000"
10752]
10753)
10754end &233
10755sat 16
10756eat 1
10757st 0
10758sf 1
10759si 0
10760tg (WTG
10761uid 10646,0
10762ps "ConnStartEndStrategy"
10763stg "STSignalDisplayStrategy"
10764f (Text
10765uid 10647,0
10766va (VaSet
10767)
10768xt "98000,127000,103000,128000"
10769st "PSCLK_OUT"
10770blo "98000,127800"
10771tm "WireNameMgr"
10772)
10773)
10774on &248
10775)
10776*340 (Wire
10777uid 10648,0
10778shape (OrthoPolyLine
10779uid 10649,0
10780va (VaSet
10781vasetType 3
10782)
10783xt "96000,129000,106000,129000"
10784pts [
10785"96000,129000"
10786"106000,129000"
10787]
10788)
10789end &233
10790sat 16
10791eat 1
10792st 0
10793sf 1
10794si 0
10795tg (WTG
10796uid 10654,0
10797ps "ConnStartEndStrategy"
10798stg "STSignalDisplayStrategy"
10799f (Text
10800uid 10655,0
10801va (VaSet
10802)
10803xt "98000,128000,105800,129000"
10804st "PSDONE_extraOUT"
10805blo "98000,128800"
10806tm "WireNameMgr"
10807)
10808)
10809on &247
10810)
10811*341 (Wire
10812uid 10656,0
10813shape (OrthoPolyLine
10814uid 10657,0
10815va (VaSet
10816vasetType 3
10817)
10818xt "96000,130000,106000,130000"
10819pts [
10820"96000,130000"
10821"106000,130000"
10822]
10823)
10824end &233
10825sat 16
10826eat 1
10827st 0
10828sf 1
10829si 0
10830tg (WTG
10831uid 10662,0
10832ps "ConnStartEndStrategy"
10833stg "STSignalDisplayStrategy"
10834f (Text
10835uid 10663,0
10836va (VaSet
10837)
10838xt "98000,129000,102600,130000"
10839st "PSEN_OUT"
10840blo "98000,129800"
10841tm "WireNameMgr"
10842)
10843)
10844on &242
10845)
10846*342 (Wire
10847uid 10664,0
10848shape (OrthoPolyLine
10849uid 10665,0
10850va (VaSet
10851vasetType 3
10852)
10853xt "96000,131000,106000,131000"
10854pts [
10855"96000,131000"
10856"106000,131000"
10857]
10858)
10859end &233
10860sat 16
10861eat 1
10862st 0
10863sf 1
10864si 0
10865tg (WTG
10866uid 10670,0
10867ps "ConnStartEndStrategy"
10868stg "STSignalDisplayStrategy"
10869f (Text
10870uid 10671,0
10871va (VaSet
10872)
10873xt "98000,130000,105000,131000"
10874st "PSINCDEC_OUT"
10875blo "98000,130800"
10876tm "WireNameMgr"
10877)
10878)
10879on &243
10880)
10881*343 (Wire
10882uid 10672,0
10883shape (OrthoPolyLine
10884uid 10673,0
10885va (VaSet
10886vasetType 3
10887)
10888xt "96000,132000,106000,132000"
10889pts [
10890"96000,132000"
10891"106000,132000"
10892]
10893)
10894end &233
10895sat 16
10896eat 1
10897st 0
10898sf 1
10899si 0
10900tg (WTG
10901uid 10678,0
10902ps "ConnStartEndStrategy"
10903stg "STSignalDisplayStrategy"
10904f (Text
10905uid 10679,0
10906va (VaSet
10907)
10908xt "98000,131000,102400,132000"
10909st "PS_DIR_IN"
10910blo "98000,131800"
10911tm "WireNameMgr"
10912)
10913)
10914on &240
10915)
10916*344 (Wire
10917uid 10680,0
10918shape (OrthoPolyLine
10919uid 10681,0
10920va (VaSet
10921vasetType 3
10922)
10923xt "96000,133000,106000,133000"
10924pts [
10925"96000,133000"
10926"106000,133000"
10927]
10928)
10929end &233
10930sat 16
10931eat 1
10932st 0
10933sf 1
10934si 0
10935tg (WTG
10936uid 10686,0
10937ps "ConnStartEndStrategy"
10938stg "STSignalDisplayStrategy"
10939f (Text
10940uid 10687,0
10941va (VaSet
10942)
10943xt "98000,132000,102200,133000"
10944st "PS_DO_IN"
10945blo "98000,132800"
10946tm "WireNameMgr"
10947)
10948)
10949on &241
10950)
10951*345 (Wire
10952uid 10688,0
10953shape (OrthoPolyLine
10954uid 10689,0
10955va (VaSet
10956vasetType 3
10957)
10958xt "96000,134000,106000,134000"
10959pts [
10960"96000,134000"
10961"106000,134000"
10962]
10963)
10964end &233
10965sat 16
10966eat 1
10967st 0
10968sf 1
10969si 0
10970tg (WTG
10971uid 10694,0
10972ps "ConnStartEndStrategy"
10973stg "STSignalDisplayStrategy"
10974f (Text
10975uid 10695,0
10976va (VaSet
10977)
10978xt "98000,133000,100200,134000"
10979st "ready"
10980blo "98000,133800"
10981tm "WireNameMgr"
10982)
10983)
10984on &245
10985)
10986*346 (Wire
10987uid 10696,0
10988shape (OrthoPolyLine
10989uid 10697,0
10990va (VaSet
10991vasetType 3
10992)
10993xt "96000,135000,106000,135000"
10994pts [
10995"96000,135000"
10996"106000,135000"
10997]
10998)
10999end &233
11000sat 16
11001eat 1
11002st 0
11003sf 1
11004si 0
11005tg (WTG
11006uid 10702,0
11007ps "ConnStartEndStrategy"
11008stg "STSignalDisplayStrategy"
11009f (Text
11010uid 10703,0
11011va (VaSet
11012)
11013xt "98000,134000,100900,135000"
11014st "shifting"
11015blo "98000,134800"
11016tm "WireNameMgr"
11017)
11018)
11019on &246
11020)
11021*347 (Wire
11022uid 11096,0
11023shape (OrthoPolyLine
11024uid 11097,0
11025va (VaSet
11026vasetType 3
11027)
11028xt "96000,103000,100000,103000"
11029pts [
11030"96000,103000"
11031"100000,103000"
11032]
11033)
11034start &250
11035end &155
11036sat 32
11037eat 1
11038st 0
11039sf 1
11040si 0
11041tg (WTG
11042uid 11100,0
11043ps "ConnStartEndStrategy"
11044stg "STSignalDisplayStrategy"
11045f (Text
11046uid 11101,0
11047va (VaSet
11048isHidden 1
11049)
11050xt "126000,96000,131300,97000"
11051st "RS485_C_DI"
11052blo "126000,96800"
11053tm "WireNameMgr"
11054)
11055)
11056on &251
11057)
11058*348 (Wire
11059uid 11110,0
11060shape (OrthoPolyLine
11061uid 11111,0
11062va (VaSet
11063vasetType 3
11064)
11065xt "108000,112000,111000,112000"
11066pts [
11067"108000,112000"
11068"111000,112000"
11069]
11070)
11071start &155
11072end &252
11073sat 2
11074eat 32
11075st 0
11076sf 1
11077si 0
11078tg (WTG
11079uid 11114,0
11080ps "ConnStartEndStrategy"
11081stg "STSignalDisplayStrategy"
11082f (Text
11083uid 11115,0
11084va (VaSet
11085isHidden 1
11086)
11087xt "110000,111000,115700,112000"
11088st "RS485_C_DO"
11089blo "110000,111800"
11090tm "WireNameMgr"
11091)
11092)
11093on &253
11094)
11095*349 (Wire
11096uid 11514,0
11097shape (OrthoPolyLine
11098uid 11515,0
11099va (VaSet
11100vasetType 3
11101)
11102xt "123000,116000,127000,116000"
11103pts [
11104"123000,116000"
11105"127000,116000"
11106]
11107)
11108start &254
11109sat 32
11110eat 16
11111st 0
11112sf 1
11113si 0
11114tg (WTG
11115uid 11518,0
11116ps "ConnStartEndStrategy"
11117stg "STSignalDisplayStrategy"
11118f (Text
11119uid 11519,0
11120va (VaSet
11121isHidden 1
11122)
11123xt "125000,115000,130200,116000"
11124st "RS485_E_DI"
11125blo "125000,115800"
11126tm "WireNameMgr"
11127)
11128)
11129on &255
11130)
11131*350 (Wire
11132uid 11528,0
11133shape (OrthoPolyLine
11134uid 11529,0
11135va (VaSet
11136vasetType 3
11137)
11138xt "123000,114000,126000,114000"
11139pts [
11140"123000,114000"
11141"126000,114000"
11142]
11143)
11144end &257
11145sat 16
11146eat 32
11147st 0
11148sf 1
11149si 0
11150tg (WTG
11151uid 11532,0
11152ps "ConnStartEndStrategy"
11153stg "STSignalDisplayStrategy"
11154f (Text
11155uid 11533,0
11156va (VaSet
11157isHidden 1
11158)
11159xt "125000,113000,130600,114000"
11160st "RS485_E_DO"
11161blo "125000,113800"
11162tm "WireNameMgr"
11163)
11164)
11165on &256
11166)
11167*351 (Wire
11168uid 12320,0
11169shape (OrthoPolyLine
11170uid 12321,0
11171va (VaSet
11172vasetType 3
11173)
11174xt "80750,140000,87000,140000"
11175pts [
11176"80750,140000"
11177"87000,140000"
11178]
11179)
11180start &59
11181end &258
11182sat 32
11183eat 32
11184stc 0
11185st 0
11186sf 1
11187si 0
11188tg (WTG
11189uid 12324,0
11190ps "ConnStartEndStrategy"
11191stg "STSignalDisplayStrategy"
11192f (Text
11193uid 12325,0
11194va (VaSet
11195isHidden 1
11196)
11197xt "82000,139000,84300,140000"
11198st "SRIN"
11199blo "82000,139800"
11200tm "WireNameMgr"
11201)
11202)
11203on &259
11204)
11205]
11206bg "65535,65535,65535"
11207grid (Grid
11208origin "0,0"
11209isVisible 1
11210isActive 1
11211xSpacing 1000
11212xySpacing 1000
11213xShown 1
11214yShown 1
11215color "26368,26368,26368"
11216)
11217packageList *352 (PackageList
11218uid 41,0
11219stg "VerticalLayoutStrategy"
11220textVec [
11221*353 (Text
11222uid 42,0
11223va (VaSet
11224font "arial,8,1"
11225)
11226xt "0,0,5400,1000"
11227st "Package List"
11228blo "0,800"
11229)
11230*354 (MLText
11231uid 43,0
11232va (VaSet
11233)
11234xt "0,1000,14500,9000"
11235st "LIBRARY ieee;
11236USE ieee.std_logic_1164.all;
11237USE ieee.std_logic_arith.all;
11238USE IEEE.NUMERIC_STD.all;
11239USE ieee.std_logic_unsigned.all;
11240
11241LIBRARY FACT_FAD_lib;
11242USE FACT_FAD_lib.fad_definitions.all;"
11243tm "PackageList"
11244)
11245]
11246)
11247compDirBlock (MlTextGroup
11248uid 44,0
11249stg "VerticalLayoutStrategy"
11250textVec [
11251*355 (Text
11252uid 45,0
11253va (VaSet
11254isHidden 1
11255font "Arial,8,1"
11256)
11257xt "20000,0,28100,1000"
11258st "Compiler Directives"
11259blo "20000,800"
11260)
11261*356 (Text
11262uid 46,0
11263va (VaSet
11264isHidden 1
11265font "Arial,8,1"
11266)
11267xt "20000,1000,29600,2000"
11268st "Pre-module directives:"
11269blo "20000,1800"
11270)
11271*357 (MLText
11272uid 47,0
11273va (VaSet
11274isHidden 1
11275)
11276xt "20000,2000,27500,4000"
11277st "`resetall
11278`timescale 1ns/10ps"
11279tm "BdCompilerDirectivesTextMgr"
11280)
11281*358 (Text
11282uid 48,0
11283va (VaSet
11284isHidden 1
11285font "Arial,8,1"
11286)
11287xt "20000,4000,30100,5000"
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12226xt "0,750,1800,1750"
12227st "Port"
12228blo "0,1550"
12229)
12230)
12231thePort (LogicalPort
12232decl (Decl
12233n "Port"
12234t ""
12235o 0
12236)
12237)
12238)
12239defaultSaCptPortBuffer (CptPort
12240ps "OnEdgeStrategy"
12241shape (Diamond
12242va (VaSet
12243vasetType 1
12244fg "65535,65535,65535"
12245)
12246xt "0,0,750,750"
12247)
12248tg (CPTG
12249ps "CptPortTextPlaceStrategy"
12250stg "VerticalLayoutStrategy"
12251f (Text
12252va (VaSet
12253)
12254xt "0,750,1800,1750"
12255st "Port"
12256blo "0,1550"
12257)
12258)
12259thePort (LogicalPort
12260m 3
12261decl (Decl
12262n "Port"
12263t ""
12264o 0
12265)
12266)
12267)
12268defaultDeclText (MLText
12269va (VaSet
12270font "Courier New,8,0"
12271)
12272)
12273archDeclarativeBlock (BdArchDeclBlock
12274uid 1,0
12275stg "BdArchDeclBlockLS"
12276declLabel (Text
12277uid 2,0
12278va (VaSet
12279font "Arial,8,1"
12280)
12281xt "37000,1800,42400,2800"
12282st "Declarations"
12283blo "37000,2600"
12284)
12285portLabel (Text
12286uid 3,0
12287va (VaSet
12288font "Arial,8,1"
12289)
12290xt "37000,2800,39700,3800"
12291st "Ports:"
12292blo "37000,3600"
12293)
12294preUserLabel (Text
12295uid 4,0
12296va (VaSet
12297isHidden 1
12298font "Arial,8,1"
12299)
12300xt "37000,1800,40800,2800"
12301st "Pre User:"
12302blo "37000,2600"
12303)
12304preUserText (MLText
12305uid 5,0
12306va (VaSet
12307isHidden 1
12308font "Courier New,8,0"
12309)
12310xt "37000,1800,37000,1800"
12311tm "BdDeclarativeTextMgr"
12312)
12313diagSignalLabel (Text
12314uid 6,0
12315va (VaSet
12316font "Arial,8,1"
12317)
12318xt "37000,46200,44100,47200"
12319st "Diagram Signals:"
12320blo "37000,47000"
12321)
12322postUserLabel (Text
12323uid 7,0
12324va (VaSet
12325isHidden 1
12326font "Arial,8,1"
12327)
12328xt "37000,1800,41700,2800"
12329st "Post User:"
12330blo "37000,2600"
12331)
12332postUserText (MLText
12333uid 8,0
12334va (VaSet
12335isHidden 1
12336font "Courier New,8,0"
12337)
12338xt "37000,1800,37000,1800"
12339tm "BdDeclarativeTextMgr"
12340)
12341)
12342commonDM (CommonDM
12343ldm (LogicalDM
12344suid 203,0
12345usingSuid 1
12346emptyRow *383 (LEmptyRow
12347)
12348uid 54,0
12349optionalChildren [
12350*384 (RefLabelRowHdr
12351)
12352*385 (TitleRowHdr
12353)
12354*386 (FilterRowHdr
12355)
12356*387 (RefLabelColHdr
12357tm "RefLabelColHdrMgr"
12358)
12359*388 (RowExpandColHdr
12360tm "RowExpandColHdrMgr"
12361)
12362*389 (GroupColHdr
12363tm "GroupColHdrMgr"
12364)
12365*390 (NameColHdr
12366tm "BlockDiagramNameColHdrMgr"
12367)
12368*391 (ModeColHdr
12369tm "BlockDiagramModeColHdrMgr"
12370)
12371*392 (TypeColHdr
12372tm "BlockDiagramTypeColHdrMgr"
12373)
12374*393 (BoundsColHdr
12375tm "BlockDiagramBoundsColHdrMgr"
12376)
12377*394 (InitColHdr
12378tm "BlockDiagramInitColHdrMgr"
12379)
12380*395 (EolColHdr
12381tm "BlockDiagramEolColHdrMgr"
12382)
12383*396 (LeafLogPort
12384port (LogicalPort
12385m 4
12386decl (Decl
12387n "board_id"
12388t "std_logic_vector"
12389b "(3 downto 0)"
12390preAdd 0
12391posAdd 0
12392o 69
12393suid 5,0
12394)
12395)
12396uid 327,0
12397)
12398*397 (LeafLogPort
12399port (LogicalPort
12400m 4
12401decl (Decl
12402n "crate_id"
12403t "std_logic_vector"
12404b "(1 downto 0)"
12405o 70
12406suid 6,0
12407)
12408)
12409uid 329,0
12410)
12411*398 (LeafLogPort
12412port (LogicalPort
12413m 4
12414decl (Decl
12415n "adc_data_array"
12416t "adc_data_array_type"
12417o 68
12418suid 29,0
12419)
12420)
12421uid 1491,0
12422)
12423*399 (LeafLogPort
12424port (LogicalPort
12425m 1
12426decl (Decl
12427n "RSRLOAD"
12428t "std_logic"
12429o 37
12430suid 57,0
12431i "'0'"
12432)
12433)
12434uid 2435,0
12435)
12436*400 (LeafLogPort
12437port (LogicalPort
12438m 4
12439decl (Decl
12440n "SRCLK"
12441t "std_logic"
12442o 66
12443suid 58,0
12444i "'0'"
12445)
12446)
12447uid 2437,0
12448)
12449*401 (LeafLogPort
12450port (LogicalPort
12451m 4
12452decl (Decl
12453n "sensor_cs"
12454t "std_logic_vector"
12455b "(3 DOWNTO 0)"
12456o 74
12457suid 65,0
12458)
12459)
12460uid 3037,0
12461)
12462*402 (LeafLogPort
12463port (LogicalPort
12464m 1
12465decl (Decl
12466n "DAC_CS"
12467t "std_logic"
12468o 22
12469suid 66,0
12470)
12471)
12472uid 3039,0
12473)
12474*403 (LeafLogPort
12475port (LogicalPort
12476decl (Decl
12477n "X_50M"
12478t "STD_LOGIC"
12479preAdd 0
12480posAdd 0
12481o 14
12482suid 67,0
12483)
12484)
12485uid 3276,0
12486)
12487*404 (LeafLogPort
12488port (LogicalPort
12489decl (Decl
12490n "TRG"
12491t "STD_LOGIC"
12492o 12
12493suid 68,0
12494)
12495)
12496uid 3278,0
12497)
12498*405 (LeafLogPort
12499port (LogicalPort
12500m 1
12501decl (Decl
12502n "A_CLK"
12503t "std_logic_vector"
12504b "(3 downto 0)"
12505o 17
12506suid 71,0
12507)
12508)
12509uid 3280,0
12510)
12511*406 (LeafLogPort
12512port (LogicalPort
12513m 4
12514decl (Decl
12515n "CLK_25_PS"
12516t "std_logic"
12517o 55
12518suid 72,0
12519)
12520)
12521uid 3282,0
12522)
12523*407 (LeafLogPort
12524port (LogicalPort
12525m 1
12526decl (Decl
12527n "OE_ADC"
12528t "STD_LOGIC"
12529preAdd 0
12530posAdd 0
12531o 31
12532suid 73,0
12533)
12534)
12535uid 3382,0
12536)
12537*408 (LeafLogPort
12538port (LogicalPort
12539decl (Decl
12540n "A_OTR"
12541t "std_logic_vector"
12542b "(3 DOWNTO 0)"
12543o 5
12544suid 74,0
12545)
12546)
12547uid 3384,0
12548)
12549*409 (LeafLogPort
12550port (LogicalPort
12551decl (Decl
12552n "A0_D"
12553t "std_logic_vector"
12554b "(11 DOWNTO 0)"
12555o 1
12556suid 79,0
12557)
12558)
12559uid 3386,0
12560)
12561*410 (LeafLogPort
12562port (LogicalPort
12563decl (Decl
12564n "A1_D"
12565t "std_logic_vector"
12566b "(11 DOWNTO 0)"
12567o 2
12568suid 80,0
12569)
12570)
12571uid 3388,0
12572)
12573*411 (LeafLogPort
12574port (LogicalPort
12575decl (Decl
12576n "A2_D"
12577t "std_logic_vector"
12578b "(11 DOWNTO 0)"
12579o 3
12580suid 81,0
12581)
12582)
12583uid 3390,0
12584)
12585*412 (LeafLogPort
12586port (LogicalPort
12587decl (Decl
12588n "A3_D"
12589t "std_logic_vector"
12590b "(11 DOWNTO 0)"
12591o 4
12592suid 82,0
12593)
12594)
12595uid 3392,0
12596)
12597*413 (LeafLogPort
12598port (LogicalPort
12599m 1
12600decl (Decl
12601n "D0_SRCLK"
12602t "STD_LOGIC"
12603o 18
12604suid 87,0
12605)
12606)
12607uid 3468,0
12608)
12609*414 (LeafLogPort
12610port (LogicalPort
12611m 1
12612decl (Decl
12613n "D1_SRCLK"
12614t "STD_LOGIC"
12615o 19
12616suid 88,0
12617)
12618)
12619uid 3470,0
12620)
12621*415 (LeafLogPort
12622port (LogicalPort
12623m 1
12624decl (Decl
12625n "D2_SRCLK"
12626t "STD_LOGIC"
12627o 20
12628suid 89,0
12629)
12630)
12631uid 3472,0
12632)
12633*416 (LeafLogPort
12634port (LogicalPort
12635m 1
12636decl (Decl
12637n "D3_SRCLK"
12638t "STD_LOGIC"
12639o 21
12640suid 90,0
12641)
12642)
12643uid 3474,0
12644)
12645*417 (LeafLogPort
12646port (LogicalPort
12647decl (Decl
12648n "D0_SROUT"
12649t "std_logic"
12650o 6
12651suid 91,0
12652)
12653)
12654uid 3524,0
12655)
12656*418 (LeafLogPort
12657port (LogicalPort
12658decl (Decl
12659n "D1_SROUT"
12660t "std_logic"
12661o 7
12662suid 92,0
12663)
12664)
12665uid 3526,0
12666)
12667*419 (LeafLogPort
12668port (LogicalPort
12669decl (Decl
12670n "D2_SROUT"
12671t "std_logic"
12672o 8
12673suid 93,0
12674)
12675)
12676uid 3528,0
12677)
12678*420 (LeafLogPort
12679port (LogicalPort
12680decl (Decl
12681n "D3_SROUT"
12682t "std_logic"
12683o 9
12684suid 94,0
12685)
12686)
12687uid 3530,0
12688)
12689*421 (LeafLogPort
12690port (LogicalPort
12691m 1
12692decl (Decl
12693n "D_A"
12694t "std_logic_vector"
12695b "(3 DOWNTO 0)"
12696o 25
12697suid 95,0
12698i "(others => '0')"
12699)
12700)
12701uid 3532,0
12702)
12703*422 (LeafLogPort
12704port (LogicalPort
12705m 1
12706decl (Decl
12707n "DWRITE"
12708t "std_logic"
12709o 24
12710suid 96,0
12711i "'0'"
12712)
12713)
12714uid 3534,0
12715)
12716*423 (LeafLogPort
12717port (LogicalPort
12718m 1
12719decl (Decl
12720n "T0_CS"
12721t "std_logic"
12722o 40
12723suid 101,0
12724)
12725)
12726uid 3646,0
12727)
12728*424 (LeafLogPort
12729port (LogicalPort
12730m 1
12731decl (Decl
12732n "T1_CS"
12733t "std_logic"
12734o 41
12735suid 102,0
12736)
12737)
12738uid 3648,0
12739)
12740*425 (LeafLogPort
12741port (LogicalPort
12742m 1
12743decl (Decl
12744n "T2_CS"
12745t "std_logic"
12746o 42
12747suid 103,0
12748)
12749)
12750uid 3650,0
12751)
12752*426 (LeafLogPort
12753port (LogicalPort
12754m 1
12755decl (Decl
12756n "T3_CS"
12757t "std_logic"
12758o 43
12759suid 104,0
12760)
12761)
12762uid 3652,0
12763)
12764*427 (LeafLogPort
12765port (LogicalPort
12766m 1
12767decl (Decl
12768n "S_CLK"
12769t "std_logic"
12770o 39
12771suid 105,0
12772)
12773)
12774uid 3654,0
12775)
12776*428 (LeafLogPort
12777port (LogicalPort
12778m 1
12779decl (Decl
12780n "W_A"
12781t "std_logic_vector"
12782b "(9 DOWNTO 0)"
12783o 45
12784suid 106,0
12785)
12786)
12787uid 3656,0
12788)
12789*429 (LeafLogPort
12790port (LogicalPort
12791m 2
12792decl (Decl
12793n "W_D"
12794t "std_logic_vector"
12795b "(15 DOWNTO 0)"
12796o 51
12797suid 107,0
12798)
12799)
12800uid 3658,0
12801)
12802*430 (LeafLogPort
12803port (LogicalPort
12804m 1
12805decl (Decl
12806n "W_RES"
12807t "std_logic"
12808o 48
12809suid 108,0
12810i "'1'"
12811)
12812)
12813uid 3660,0
12814)
12815*431 (LeafLogPort
12816port (LogicalPort
12817m 1
12818decl (Decl
12819n "W_RD"
12820t "std_logic"
12821o 47
12822suid 109,0
12823i "'1'"
12824)
12825)
12826uid 3662,0
12827)
12828*432 (LeafLogPort
12829port (LogicalPort
12830m 1
12831decl (Decl
12832n "W_WR"
12833t "std_logic"
12834o 49
12835suid 110,0
12836i "'1'"
12837)
12838)
12839uid 3664,0
12840)
12841*433 (LeafLogPort
12842port (LogicalPort
12843decl (Decl
12844n "W_INT"
12845t "std_logic"
12846o 13
12847suid 111,0
12848)
12849)
12850uid 3666,0
12851)
12852*434 (LeafLogPort
12853port (LogicalPort
12854m 1
12855decl (Decl
12856n "W_CS"
12857t "std_logic"
12858o 46
12859suid 112,0
12860i "'1'"
12861)
12862)
12863uid 3668,0
12864)
12865*435 (LeafLogPort
12866port (LogicalPort
12867m 1
12868decl (Decl
12869n "MOSI"
12870t "std_logic"
12871o 30
12872suid 113,0
12873i "'0'"
12874)
12875)
12876uid 3696,0
12877)
12878*436 (LeafLogPort
12879port (LogicalPort
12880m 2
12881decl (Decl
12882n "MISO"
12883t "std_logic"
12884preAdd 0
12885posAdd 0
12886o 50
12887suid 114,0
12888)
12889)
12890uid 3698,0
12891)
12892*437 (LeafLogPort
12893port (LogicalPort
12894m 1
12895decl (Decl
12896n "TRG_V"
12897t "std_logic"
12898o 44
12899suid 126,0
12900)
12901)
12902uid 3886,0
12903)
12904*438 (LeafLogPort
12905port (LogicalPort
12906m 1
12907decl (Decl
12908n "RS485_C_RE"
12909t "std_logic"
12910o 34
12911suid 127,0
12912)
12913)
12914uid 3888,0
12915)
12916*439 (LeafLogPort
12917port (LogicalPort
12918m 1
12919decl (Decl
12920n "RS485_C_DE"
12921t "std_logic"
12922o 32
12923suid 128,0
12924)
12925)
12926uid 3890,0
12927)
12928*440 (LeafLogPort
12929port (LogicalPort
12930m 1
12931decl (Decl
12932n "RS485_E_RE"
12933t "std_logic"
12934o 36
12935suid 129,0
12936)
12937)
12938uid 3892,0
12939)
12940*441 (LeafLogPort
12941port (LogicalPort
12942m 1
12943decl (Decl
12944n "RS485_E_DE"
12945t "std_logic"
12946o 35
12947suid 130,0
12948)
12949)
12950uid 3894,0
12951)
12952*442 (LeafLogPort
12953port (LogicalPort
12954m 1
12955decl (Decl
12956n "DENABLE"
12957t "std_logic"
12958o 23
12959suid 131,0
12960i "'0'"
12961)
12962)
12963uid 3896,0
12964)
12965*443 (LeafLogPort
12966port (LogicalPort
12967m 1
12968decl (Decl
12969n "EE_CS"
12970t "std_logic"
12971o 28
12972suid 133,0
12973)
12974)
12975uid 3900,0
12976)
12977*444 (LeafLogPort
12978port (LogicalPort
12979m 1
12980decl (Decl
12981n "LED"
12982t "std_logic_vector"
12983b "( 2 DOWNTO 0 )"
12984o 29
12985suid 134,0
12986i "(others => '1')"
12987)
12988)
12989uid 3902,0
12990)
12991*445 (LeafLogPort
12992port (LogicalPort
12993m 1
12994decl (Decl
12995n "D_T"
12996t "std_logic_vector"
12997b "(7 DOWNTO 0)"
12998o 26
12999suid 141,0
13000i "(OTHERS => '0')"
13001)
13002)
13003uid 5322,0
13004)
13005*446 (LeafLogPort
13006port (LogicalPort
13007decl (Decl
13008n "D_PLLLCK"
13009t "std_logic_vector"
13010b "(3 DOWNTO 0)"
13011o 10
13012suid 152,0
13013)
13014)
13015uid 6777,0
13016scheme 0
13017)
13018*447 (LeafLogPort
13019port (LogicalPort
13020m 1
13021decl (Decl
13022n "D_T2"
13023t "std_logic_vector"
13024b "(3 DOWNTO 0)"
13025o 27
13026suid 154,0
13027i "(others => '0')"
13028)
13029)
13030uid 6872,0
13031scheme 0
13032)
13033*448 (LeafLogPort
13034port (LogicalPort
13035m 1
13036decl (Decl
13037n "A1_T"
13038t "std_logic_vector"
13039b "(7 DOWNTO 0)"
13040o 16
13041suid 155,0
13042i "(OTHERS => '0')"
13043)
13044)
13045uid 7134,0
13046scheme 0
13047)
13048*449 (LeafLogPort
13049port (LogicalPort
13050m 4
13051decl (Decl
13052n "dummy"
13053t "std_logic"
13054o 72
13055suid 157,0
13056)
13057)
13058uid 7473,0
13059scheme 0
13060)
13061*450 (LeafLogPort
13062port (LogicalPort
13063m 4
13064decl (Decl
13065n "drs_channel_id"
13066t "std_logic_vector"
13067b "(3 downto 0)"
13068o 71
13069suid 159,0
13070i "(others => '0')"
13071)
13072)
13073uid 8875,0
13074)
13075*451 (LeafLogPort
13076port (LogicalPort
13077m 4
13078decl (Decl
13079n "CLK_50"
13080t "std_logic"
13081o 57
13082suid 163,0
13083)
13084)
13085uid 9516,0
13086)
13087*452 (LeafLogPort
13088port (LogicalPort
13089m 4
13090decl (Decl
13091n "CLK_25_PS1"
13092t "std_logic"
13093o 56
13094suid 164,0
13095)
13096)
13097uid 10056,0
13098)
13099*453 (LeafLogPort
13100port (LogicalPort
13101m 4
13102decl (Decl
13103n "adc_clk_en"
13104t "std_logic"
13105o 67
13106suid 165,0
13107i "'0'"
13108)
13109)
13110uid 10058,0
13111)
13112*454 (LeafLogPort
13113port (LogicalPort
13114m 1
13115decl (Decl
13116n "A0_T"
13117t "std_logic_vector"
13118b "(7 DOWNTO 0)"
13119o 15
13120suid 166,0
13121i "(others => '0')"
13122)
13123)
13124uid 10294,0
13125scheme 0
13126)
13127*455 (LeafLogPort
13128port (LogicalPort
13129m 4
13130decl (Decl
13131n "CLK50_OUT"
13132t "std_logic"
13133o 54
13134suid 184,0
13135)
13136)
13137uid 10704,0
13138)
13139*456 (LeafLogPort
13140port (LogicalPort
13141m 4
13142decl (Decl
13143n "CLK25_OUT"
13144t "std_logic"
13145o 52
13146suid 185,0
13147)
13148)
13149uid 10706,0
13150)
13151*457 (LeafLogPort
13152port (LogicalPort
13153m 4
13154decl (Decl
13155n "CLK25_PSOUT"
13156t "std_logic"
13157o 53
13158suid 186,0
13159)
13160)
13161uid 10708,0
13162)
13163*458 (LeafLogPort
13164port (LogicalPort
13165m 4
13166decl (Decl
13167n "PS_DIR_IN"
13168t "std_logic"
13169o 64
13170suid 187,0
13171)
13172)
13173uid 10710,0
13174)
13175*459 (LeafLogPort
13176port (LogicalPort
13177m 4
13178decl (Decl
13179n "PS_DO_IN"
13180t "std_logic"
13181o 65
13182suid 188,0
13183)
13184)
13185uid 10712,0
13186)
13187*460 (LeafLogPort
13188port (LogicalPort
13189m 4
13190decl (Decl
13191n "PSEN_OUT"
13192t "std_logic"
13193o 62
13194suid 189,0
13195)
13196)
13197uid 10714,0
13198)
13199*461 (LeafLogPort
13200port (LogicalPort
13201m 4
13202decl (Decl
13203n "PSINCDEC_OUT"
13204t "std_logic"
13205o 63
13206suid 190,0
13207)
13208)
13209uid 10716,0
13210)
13211*462 (LeafLogPort
13212port (LogicalPort
13213m 4
13214decl (Decl
13215n "DCM_locked"
13216t "std_logic"
13217preAdd 0
13218posAdd 0
13219o 58
13220suid 191,0
13221)
13222)
13223uid 10718,0
13224)
13225*463 (LeafLogPort
13226port (LogicalPort
13227m 4
13228decl (Decl
13229n "ready"
13230t "std_logic"
13231preAdd 0
13232posAdd 0
13233o 73
13234suid 192,0
13235i "'0'"
13236)
13237)
13238uid 10720,0
13239)
13240*464 (LeafLogPort
13241port (LogicalPort
13242m 4
13243decl (Decl
13244n "shifting"
13245t "std_logic"
13246prec "-- status:"
13247preAdd 0
13248posAdd 0
13249o 75
13250suid 193,0
13251i "'0'"
13252)
13253)
13254uid 10722,0
13255)
13256*465 (LeafLogPort
13257port (LogicalPort
13258m 4
13259decl (Decl
13260n "PSDONE_extraOUT"
13261t "std_logic"
13262o 61
13263suid 194,0
13264)
13265)
13266uid 10724,0
13267)
13268*466 (LeafLogPort
13269port (LogicalPort
13270m 4
13271decl (Decl
13272n "PSCLK_OUT"
13273t "std_logic"
13274o 60
13275suid 195,0
13276)
13277)
13278uid 10726,0
13279)
13280*467 (LeafLogPort
13281port (LogicalPort
13282m 4
13283decl (Decl
13284n "LOCKED_extraOUT"
13285t "std_logic"
13286o 59
13287suid 196,0
13288)
13289)
13290uid 10728,0
13291)
13292*468 (LeafLogPort
13293port (LogicalPort
13294decl (Decl
13295n "RS485_C_DI"
13296t "std_logic"
13297o 74
13298suid 197,0
13299)
13300)
13301uid 11084,0
13302scheme 0
13303)
13304*469 (LeafLogPort
13305port (LogicalPort
13306m 1
13307decl (Decl
13308n "RS485_C_DO"
13309t "std_logic"
13310o 75
13311suid 198,0
13312)
13313)
13314uid 11086,0
13315scheme 0
13316)
13317*470 (LeafLogPort
13318port (LogicalPort
13319decl (Decl
13320n "RS485_E_DI"
13321t "std_logic"
13322o 76
13323suid 200,0
13324)
13325)
13326uid 11504,0
13327scheme 0
13328)
13329*471 (LeafLogPort
13330port (LogicalPort
13331decl (Decl
13332n "RS485_E_DO"
13333t "std_logic"
13334o 77
13335suid 201,0
13336)
13337)
13338uid 11506,0
13339scheme 0
13340)
13341*472 (LeafLogPort
13342port (LogicalPort
13343m 1
13344decl (Decl
13345n "SRIN"
13346t "std_logic"
13347o 78
13348suid 203,0
13349i "'0'"
13350)
13351)
13352uid 12336,0
13353)
13354]
13355)
13356pdm (PhysicalDM
13357displayShortBounds 1
13358editShortBounds 1
13359uid 67,0
13360optionalChildren [
13361*473 (Sheet
13362sheetRow (SheetRow
13363headerVa (MVa
13364cellColor "49152,49152,49152"
13365fontColor "0,0,0"
13366font "Tahoma,10,0"
13367)
13368cellVa (MVa
13369cellColor "65535,65535,65535"
13370fontColor "0,0,0"
13371font "Tahoma,10,0"
13372)
13373groupVa (MVa
13374cellColor "39936,56832,65280"
13375fontColor "0,0,0"
13376font "Tahoma,10,0"
13377)
13378emptyMRCItem *474 (MRCItem
13379litem &383
13380pos 77
13381dimension 20
13382)
13383uid 69,0
13384optionalChildren [
13385*475 (MRCItem
13386litem &384
13387pos 0
13388dimension 20
13389uid 70,0
13390)
13391*476 (MRCItem
13392litem &385
13393pos 1
13394dimension 23
13395uid 71,0
13396)
13397*477 (MRCItem
13398litem &386
13399pos 2
13400hidden 1
13401dimension 20
13402uid 72,0
13403)
13404*478 (MRCItem
13405litem &396
13406pos 47
13407dimension 20
13408uid 328,0
13409)
13410*479 (MRCItem
13411litem &397
13412pos 48
13413dimension 20
13414uid 330,0
13415)
13416*480 (MRCItem
13417litem &398
13418pos 49
13419dimension 20
13420uid 1492,0
13421)
13422*481 (MRCItem
13423litem &399
13424pos 0
13425dimension 20
13426uid 2436,0
13427)
13428*482 (MRCItem
13429litem &400
13430pos 50
13431dimension 20
13432uid 2438,0
13433)
13434*483 (MRCItem
13435litem &401
13436pos 51
13437dimension 20
13438uid 3038,0
13439)
13440*484 (MRCItem
13441litem &402
13442pos 1
13443dimension 20
13444uid 3040,0
13445)
13446*485 (MRCItem
13447litem &403
13448pos 2
13449dimension 20
13450uid 3277,0
13451)
13452*486 (MRCItem
13453litem &404
13454pos 3
13455dimension 20
13456uid 3279,0
13457)
13458*487 (MRCItem
13459litem &405
13460pos 4
13461dimension 20
13462uid 3281,0
13463)
13464*488 (MRCItem
13465litem &406
13466pos 52
13467dimension 20
13468uid 3283,0
13469)
13470*489 (MRCItem
13471litem &407
13472pos 5
13473dimension 20
13474uid 3383,0
13475)
13476*490 (MRCItem
13477litem &408
13478pos 6
13479dimension 20
13480uid 3385,0
13481)
13482*491 (MRCItem
13483litem &409
13484pos 7
13485dimension 20
13486uid 3387,0
13487)
13488*492 (MRCItem
13489litem &410
13490pos 8
13491dimension 20
13492uid 3389,0
13493)
13494*493 (MRCItem
13495litem &411
13496pos 9
13497dimension 20
13498uid 3391,0
13499)
13500*494 (MRCItem
13501litem &412
13502pos 10
13503dimension 20
13504uid 3393,0
13505)
13506*495 (MRCItem
13507litem &413
13508pos 11
13509dimension 20
13510uid 3469,0
13511)
13512*496 (MRCItem
13513litem &414
13514pos 12
13515dimension 20
13516uid 3471,0
13517)
13518*497 (MRCItem
13519litem &415
13520pos 13
13521dimension 20
13522uid 3473,0
13523)
13524*498 (MRCItem
13525litem &416
13526pos 14
13527dimension 20
13528uid 3475,0
13529)
13530*499 (MRCItem
13531litem &417
13532pos 15
13533dimension 20
13534uid 3525,0
13535)
13536*500 (MRCItem
13537litem &418
13538pos 16
13539dimension 20
13540uid 3527,0
13541)
13542*501 (MRCItem
13543litem &419
13544pos 17
13545dimension 20
13546uid 3529,0
13547)
13548*502 (MRCItem
13549litem &420
13550pos 18
13551dimension 20
13552uid 3531,0
13553)
13554*503 (MRCItem
13555litem &421
13556pos 19
13557dimension 20
13558uid 3533,0
13559)
13560*504 (MRCItem
13561litem &422
13562pos 20
13563dimension 20
13564uid 3535,0
13565)
13566*505 (MRCItem
13567litem &423
13568pos 21
13569dimension 20
13570uid 3647,0
13571)
13572*506 (MRCItem
13573litem &424
13574pos 22
13575dimension 20
13576uid 3649,0
13577)
13578*507 (MRCItem
13579litem &425
13580pos 23
13581dimension 20
13582uid 3651,0
13583)
13584*508 (MRCItem
13585litem &426
13586pos 24
13587dimension 20
13588uid 3653,0
13589)
13590*509 (MRCItem
13591litem &427
13592pos 25
13593dimension 20
13594uid 3655,0
13595)
13596*510 (MRCItem
13597litem &428
13598pos 26
13599dimension 20
13600uid 3657,0
13601)
13602*511 (MRCItem
13603litem &429
13604pos 27
13605dimension 20
13606uid 3659,0
13607)
13608*512 (MRCItem
13609litem &430
13610pos 28
13611dimension 20
13612uid 3661,0
13613)
13614*513 (MRCItem
13615litem &431
13616pos 29
13617dimension 20
13618uid 3663,0
13619)
13620*514 (MRCItem
13621litem &432
13622pos 30
13623dimension 20
13624uid 3665,0
13625)
13626*515 (MRCItem
13627litem &433
13628pos 31
13629dimension 20
13630uid 3667,0
13631)
13632*516 (MRCItem
13633litem &434
13634pos 32
13635dimension 20
13636uid 3669,0
13637)
13638*517 (MRCItem
13639litem &435
13640pos 33
13641dimension 20
13642uid 3697,0
13643)
13644*518 (MRCItem
13645litem &436
13646pos 34
13647dimension 20
13648uid 3699,0
13649)
13650*519 (MRCItem
13651litem &437
13652pos 35
13653dimension 20
13654uid 3887,0
13655)
13656*520 (MRCItem
13657litem &438
13658pos 36
13659dimension 20
13660uid 3889,0
13661)
13662*521 (MRCItem
13663litem &439
13664pos 37
13665dimension 20
13666uid 3891,0
13667)
13668*522 (MRCItem
13669litem &440
13670pos 38
13671dimension 20
13672uid 3893,0
13673)
13674*523 (MRCItem
13675litem &441
13676pos 39
13677dimension 20
13678uid 3895,0
13679)
13680*524 (MRCItem
13681litem &442
13682pos 40
13683dimension 20
13684uid 3897,0
13685)
13686*525 (MRCItem
13687litem &443
13688pos 41
13689dimension 20
13690uid 3901,0
13691)
13692*526 (MRCItem
13693litem &444
13694pos 42
13695dimension 20
13696uid 3903,0
13697)
13698*527 (MRCItem
13699litem &445
13700pos 43
13701dimension 20
13702uid 5323,0
13703)
13704*528 (MRCItem
13705litem &446
13706pos 44
13707dimension 20
13708uid 6778,0
13709)
13710*529 (MRCItem
13711litem &447
13712pos 45
13713dimension 20
13714uid 6873,0
13715)
13716*530 (MRCItem
13717litem &448
13718pos 46
13719dimension 20
13720uid 7135,0
13721)
13722*531 (MRCItem
13723litem &449
13724pos 53
13725dimension 20
13726uid 7474,0
13727)
13728*532 (MRCItem
13729litem &450
13730pos 54
13731dimension 20
13732uid 8876,0
13733)
13734*533 (MRCItem
13735litem &451
13736pos 55
13737dimension 20
13738uid 9517,0
13739)
13740*534 (MRCItem
13741litem &452
13742pos 56
13743dimension 20
13744uid 10057,0
13745)
13746*535 (MRCItem
13747litem &453
13748pos 57
13749dimension 20
13750uid 10059,0
13751)
13752*536 (MRCItem
13753litem &454
13754pos 58
13755dimension 20
13756uid 10295,0
13757)
13758*537 (MRCItem
13759litem &455
13760pos 59
13761dimension 20
13762uid 10705,0
13763)
13764*538 (MRCItem
13765litem &456
13766pos 60
13767dimension 20
13768uid 10707,0
13769)
13770*539 (MRCItem
13771litem &457
13772pos 61
13773dimension 20
13774uid 10709,0
13775)
13776*540 (MRCItem
13777litem &458
13778pos 62
13779dimension 20
13780uid 10711,0
13781)
13782*541 (MRCItem
13783litem &459
13784pos 63
13785dimension 20
13786uid 10713,0
13787)
13788*542 (MRCItem
13789litem &460
13790pos 64
13791dimension 20
13792uid 10715,0
13793)
13794*543 (MRCItem
13795litem &461
13796pos 65
13797dimension 20
13798uid 10717,0
13799)
13800*544 (MRCItem
13801litem &462
13802pos 66
13803dimension 20
13804uid 10719,0
13805)
13806*545 (MRCItem
13807litem &463
13808pos 67
13809dimension 20
13810uid 10721,0
13811)
13812*546 (MRCItem
13813litem &464
13814pos 68
13815dimension 20
13816uid 10723,0
13817)
13818*547 (MRCItem
13819litem &465
13820pos 69
13821dimension 20
13822uid 10725,0
13823)
13824*548 (MRCItem
13825litem &466
13826pos 70
13827dimension 20
13828uid 10727,0
13829)
13830*549 (MRCItem
13831litem &467
13832pos 71
13833dimension 20
13834uid 10729,0
13835)
13836*550 (MRCItem
13837litem &468
13838pos 72
13839dimension 20
13840uid 11085,0
13841)
13842*551 (MRCItem
13843litem &469
13844pos 73
13845dimension 20
13846uid 11087,0
13847)
13848*552 (MRCItem
13849litem &470
13850pos 74
13851dimension 20
13852uid 11505,0
13853)
13854*553 (MRCItem
13855litem &471
13856pos 75
13857dimension 20
13858uid 11507,0
13859)
13860*554 (MRCItem
13861litem &472
13862pos 76
13863dimension 20
13864uid 12337,0
13865)
13866]
13867)
13868sheetCol (SheetCol
13869propVa (MVa
13870cellColor "0,49152,49152"
13871fontColor "0,0,0"
13872font "Tahoma,10,0"
13873textAngle 90
13874)
13875uid 73,0
13876optionalChildren [
13877*555 (MRCItem
13878litem &387
13879pos 0
13880dimension 20
13881uid 74,0
13882)
13883*556 (MRCItem
13884litem &389
13885pos 1
13886dimension 50
13887uid 75,0
13888)
13889*557 (MRCItem
13890litem &390
13891pos 2
13892dimension