source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd@ 10075

DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
(DmPackageRef
library "ieee"
unitName "std_logic_arith"
)
(DmPackageRef
library "IEEE"
unitName "NUMERIC_STD"
)
(DmPackageRef
library "ieee"
unitName "std_logic_unsigned"
)
(DmPackageRef
library "FACT_FAD_lib"
unitName "fad_definitions"
)
]
instances [
(Instance
name "I_board_main"
duLibraryName "FACT_FAD_lib"
duName "FAD_main"
elements [
(GiElement
name "RAMADDRWIDTH64b"
type "integer"
value "LOG2_OF_RAM_SIZE_64B"
)
]
mwi 0
uid 169,0
)
(Instance
name "I3"
duLibraryName "moduleware"
duName "assignment"
elements [
]
mwi 1
uid 7652,0
)
(Instance
name "I0"
duLibraryName "moduleware"
duName "and"
elements [
]
mwi 1
uid 10023,0
)
]
embeddedInstances [
(EmbeddedInstance
name "eb_ID"
number "1"
)
(EmbeddedInstance
name "ADC_CLK"
number "2"
)
(EmbeddedInstance
name "ADC_DATA"
number "3"
)
(EmbeddedInstance
name "SRCLK"
number "4"
)
(EmbeddedInstance
name "T_CS"
number "5"
)
(EmbeddedInstance
name "MISC"
number "6"
)
(EmbeddedInstance
name "eb1"
number "7"
)
(EmbeddedInstance
name "eb2"
number "8"
)
(EmbeddedInstance
name "eb3"
number "9"
)
]
libraryRefs [
"ieee"
"FACT_FAD_lib"
]
)
version "29.1"
appVersion "2009.2 (Build 10)"
noEmbeddedEditors 1
model (BlockDiag
VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "struct"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board"
)
(vvPair
variable "d_logical"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_Board"
)
(vvPair
variable "date"
value "04.01.2011"
)
(vvPair
variable "day"
value "Di"
)
(vvPair
variable "day_long"
value "Dienstag"
)
(vvPair
variable "dd"
value "04"
)
(vvPair
variable "entity_name"
value "FAD_Board"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "struct.bd"
)
(vvPair
variable "f_logical"
value "struct.bd"
)
(vvPair
variable "f_noext"
value "struct"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "E5B-LABOR6"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "FACT_FAD_lib"
)
(vvPair
variable "library_downstream_HdsLintPlugin"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/designcheck"
)
(vvPair
variable "library_downstream_ISEPARInvoke"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
)
(vvPair
variable "library_downstream_ImpactInvoke"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
)
(vvPair
variable "library_downstream_XSTDataPrep"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
)
(vvPair
variable "mm"
value "01"
)
(vvPair
variable "module_name"
value "FAD_Board"
)
(vvPair
variable "month"
value "Jan"
)
(vvPair
variable "month_long"
value "Januar"
)
(vvPair
variable "p"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd"
)
(vvPair
variable "p_logical"
value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_Board\\struct.bd"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "FACT_FAD"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "<TBD>"
)
(vvPair
variable "task_NC-SimPath"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "<TBD>"
)
(vvPair
variable "task_QuestaSimPath"
value "<TBD>"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "this_ext"
value "bd"
)
(vvPair
variable "this_file"
value "struct"
)
(vvPair
variable "this_file_logical"
value "struct"
)
(vvPair
variable "time"
value "18:14:31"
)
(vvPair
variable "unit"
value "FAD_Board"
)
(vvPair
variable "user"
value "dneise"
)
(vvPair
variable "version"
value "2009.2 (Build 10)"
)
(vvPair
variable "view"
value "struct"
)
(vvPair
variable "year"
value "2011"
)
(vvPair
variable "yy"
value "11"
)
]
)
LanguageMgr "VhdlLangMgr"
uid 52,0
optionalChildren [
*1 (Grouping
uid 9,0
optionalChildren [
*2 (CommentText
uid 11,0
shape (Rectangle
uid 12,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "99000,4000,116000,5000"
)
oxt "18000,70000,35000,71000"
text (MLText
uid 13,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "99200,4000,108700,5000"
st "
by %user on %dd %month %year
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*3 (CommentText
uid 14,0
shape (Rectangle
uid 15,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "116000,0,120000,1000"
)
oxt "35000,66000,39000,67000"
text (MLText
uid 16,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "116200,0,119200,1000"
st "
Project:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*4 (CommentText
uid 17,0
shape (Rectangle
uid 18,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "99000,2000,116000,3000"
)
oxt "18000,68000,35000,69000"
text (MLText
uid 19,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "99200,2000,109200,3000"
st "
<enter diagram title here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*5 (CommentText
uid 20,0
shape (Rectangle
uid 21,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "95000,2000,99000,3000"
)
oxt "14000,68000,18000,69000"
text (MLText
uid 22,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "95200,2000,97300,3000"
st "
Title:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*6 (CommentText
uid 23,0
shape (Rectangle
uid 24,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "116000,1000,136000,5000"
)
oxt "35000,67000,55000,71000"
text (MLText
uid 25,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "116200,1200,125400,2200"
st "
<enter comments here>
"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 20000
)
ignorePrefs 1
titleBlock 1
)
*7 (CommentText
uid 26,0
shape (Rectangle
uid 27,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "120000,0,136000,1000"
)
oxt "39000,66000,55000,67000"
text (MLText
uid 28,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "120200,0,124700,1000"
st "
%project_name
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 16000
)
position 1
ignorePrefs 1
titleBlock 1
)
*8 (CommentText
uid 29,0
shape (Rectangle
uid 30,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "95000,0,116000,2000"
)
oxt "14000,66000,35000,68000"
text (MLText
uid 31,0
va (VaSet
fg "32768,0,0"
)
xt "102700,0,108300,2000"
st "
TU Dortmund 
Physik / EE
"
ju 0
tm "CommentText"
wrapOption 3
visibleHeight 2000
visibleWidth 21000
)
position 1
ignorePrefs 1
titleBlock 1
)
*9 (CommentText
uid 32,0
shape (Rectangle
uid 33,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "95000,3000,99000,4000"
)
oxt "14000,69000,18000,70000"
text (MLText
uid 34,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "95200,3000,97300,4000"
st "
Path:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*10 (CommentText
uid 35,0
shape (Rectangle
uid 36,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "95000,4000,99000,5000"
)
oxt "14000,70000,18000,71000"
text (MLText
uid 37,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "95200,4000,97900,5000"
st "
Edited:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*11 (CommentText
uid 38,0
shape (Rectangle
uid 39,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "99000,3000,116000,4000"
)
oxt "18000,69000,35000,70000"
text (MLText
uid 40,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "99200,3000,112000,4000"
st "
%library/%unit/%view
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
]
shape (GroupingShape
uid 10,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 2
)
xt "95000,0,136000,5000"
)
oxt "14000,66000,55000,71000"
)
*12 (SaComponent
uid 169,0
optionalChildren [
*13 (CptPort
uid 109,0
ps "OnEdgeStrategy"
shape (Triangle
uid 110,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,70625,80750,71375"
)
tg (CPTG
uid 111,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 112,0
va (VaSet
)
xt "75400,70500,79000,71500"
st "wiz_reset"
ju 2
blo "79000,71300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "wiz_reset"
t "std_logic"
o 47
suid 2,0
i "'1'"
)
)
)
*14 (CptPort
uid 129,0
ps "OnEdgeStrategy"
shape (Triangle
uid 130,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,119625,80750,120375"
)
tg (CPTG
uid 131,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 132,0
va (VaSet
)
xt "75000,119500,79000,120500"
st "led : (7:0)"
ju 2
blo "79000,120300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "led"
t "std_logic_vector"
b "(7 DOWNTO 0)"
posAdd 0
o 36
suid 7,0
i "(OTHERS => '0')"
)
)
)
*15 (CptPort
uid 141,0
ps "OnEdgeStrategy"
shape (Triangle
uid 142,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,77625,52000,78375"
)
tg (CPTG
uid 143,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 144,0
va (VaSet
)
xt "53000,77500,55800,78500"
st "trigger"
blo "53000,78300"
)
)
thePort (LogicalPort
decl (Decl
n "trigger"
t "std_logic"
preAdd 0
posAdd 0
o 10
suid 18,0
)
)
)
*16 (CptPort
uid 149,0
ps "OnEdgeStrategy"
shape (Triangle
uid 150,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,89625,52000,90375"
)
tg (CPTG
uid 151,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 152,0
va (VaSet
)
xt "53000,89500,56200,90500"
st "adc_oeb"
blo "53000,90300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "adc_oeb"
t "std_logic"
o 29
suid 21,0
i "'1'"
)
)
)
*17 (CptPort
uid 161,0
ps "OnEdgeStrategy"
shape (Triangle
uid 162,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,80625,52000,81375"
)
tg (CPTG
uid 163,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 164,0
va (VaSet
)
xt "53000,80500,58900,81500"
st "board_id : (3:0)"
blo "53000,81300"
)
)
thePort (LogicalPort
decl (Decl
n "board_id"
t "std_logic_vector"
b "(3 downto 0)"
preAdd 0
posAdd 0
o 8
suid 24,0
)
)
)
*18 (CptPort
uid 165,0
ps "OnEdgeStrategy"
shape (Triangle
uid 166,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,81625,52000,82375"
)
tg (CPTG
uid 167,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 168,0
va (VaSet
)
xt "53000,81500,58700,82500"
st "crate_id : (1:0)"
blo "53000,82300"
)
)
thePort (LogicalPort
decl (Decl
n "crate_id"
t "std_logic_vector"
b "(1 downto 0)"
o 9
suid 25,0
)
)
)
*19 (CptPort
uid 179,0
ps "OnEdgeStrategy"
shape (Triangle
uid 180,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,67625,80750,68375"
)
tg (CPTG
uid 181,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 182,0
va (VaSet
)
xt "73000,67500,79000,68500"
st "wiz_addr : (9:0)"
ju 2
blo "79000,68300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "wiz_addr"
t "std_logic_vector"
b "(9 DOWNTO 0)"
o 44
suid 26,0
)
)
)
*20 (CptPort
uid 183,0
ps "OnEdgeStrategy"
shape (Triangle
uid 184,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,74625,80750,75375"
)
tg (CPTG
uid 185,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 186,0
va (VaSet
)
xt "76300,74500,79000,75500"
st "wiz_cs"
ju 2
blo "79000,75300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "wiz_cs"
t "std_logic"
o 45
suid 28,0
i "'1'"
)
)
)
*21 (CptPort
uid 187,0
ps "OnEdgeStrategy"
shape (Diamond
uid 188,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,68625,80750,69375"
)
tg (CPTG
uid 189,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 190,0
va (VaSet
)
xt "72700,68500,79000,69500"
st "wiz_data : (15:0)"
ju 2
blo "79000,69300"
)
)
thePort (LogicalPort
m 2
decl (Decl
n "wiz_data"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 50
suid 27,0
)
)
)
*22 (CptPort
uid 191,0
ps "OnEdgeStrategy"
shape (Triangle
uid 192,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,73625,80750,74375"
)
tg (CPTG
uid 193,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 194,0
va (VaSet
)
xt "76300,73500,79000,74500"
st "wiz_int"
ju 2
blo "79000,74300"
)
)
thePort (LogicalPort
decl (Decl
n "wiz_int"
t "std_logic"
o 11
suid 31,0
)
)
)
*23 (CptPort
uid 195,0
ps "OnEdgeStrategy"
shape (Triangle
uid 196,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,71625,80750,72375"
)
tg (CPTG
uid 197,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 198,0
va (VaSet
)
xt "76400,71500,79000,72500"
st "wiz_rd"
ju 2
blo "79000,72300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "wiz_rd"
t "std_logic"
o 46
suid 30,0
i "'1'"
)
)
)
*24 (CptPort
uid 199,0
ps "OnEdgeStrategy"
shape (Triangle
uid 200,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,72625,80750,73375"
)
tg (CPTG
uid 201,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 202,0
va (VaSet
)
xt "76300,72500,79000,73500"
st "wiz_wr"
ju 2
blo "79000,73300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "wiz_wr"
t "std_logic"
o 48
suid 29,0
i "'1'"
)
)
)
*25 (CptPort
uid 1304,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1305,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,69625,52000,70375"
)
tg (CPTG
uid 1306,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1307,0
va (VaSet
)
xt "53000,69500,57500,70500"
st "CLK_25_PS"
blo "53000,70300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK_25_PS"
t "std_logic"
o 15
suid 35,0
)
)
)
*26 (CptPort
uid 1369,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1370,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,68625,52000,69375"
)
tg (CPTG
uid 1371,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1372,0
va (VaSet
)
xt "53000,68500,56100,69500"
st "CLK_50"
blo "53000,69300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK_50"
t "std_logic"
o 16
suid 37,0
)
)
)
*27 (CptPort
uid 1385,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1386,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,67625,52000,68375"
)
tg (CPTG
uid 1387,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1388,0
va (VaSet
)
xt "53000,67500,54900,68500"
st "CLK"
blo "53000,68300"
)
)
thePort (LogicalPort
decl (Decl
n "CLK"
t "std_logic"
o 1
suid 38,0
)
)
)
*28 (CptPort
uid 1389,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1390,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,94625,52000,95375"
)
tg (CPTG
uid 1391,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1392,0
va (VaSet
)
xt "53000,94500,58900,95500"
st "adc_data_array"
blo "53000,95300"
)
)
thePort (LogicalPort
decl (Decl
n "adc_data_array"
t "adc_data_array_type"
o 6
suid 39,0
)
)
)
*29 (CptPort
uid 1511,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1512,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,88625,52000,89375"
)
tg (CPTG
uid 1513,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1514,0
va (VaSet
)
xt "53000,88500,61000,89500"
st "adc_otr_array : (3:0)"
blo "53000,89300"
)
)
thePort (LogicalPort
decl (Decl
n "adc_otr_array"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 7
suid 40,0
)
)
)
*30 (CptPort
uid 1572,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1573,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,108625,52000,109375"
)
tg (CPTG
uid 1574,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1575,0
va (VaSet
)
xt "53000,108500,61500,109500"
st "drs_channel_id : (3:0)"
blo "53000,109300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "drs_channel_id"
t "std_logic_vector"
b "(3 downto 0)"
o 33
suid 48,0
i "(others => '0')"
)
)
)
*31 (CptPort
uid 1576,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1577,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,109625,52000,110375"
)
tg (CPTG
uid 1578,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1579,0
va (VaSet
)
xt "53000,109500,57300,110500"
st "drs_dwrite"
blo "53000,110300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "drs_dwrite"
t "std_logic"
o 34
suid 49,0
i "'1'"
)
)
)
*32 (CptPort
uid 1588,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1589,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,104625,52000,105375"
)
tg (CPTG
uid 1590,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1591,0
va (VaSet
)
xt "53000,104500,58400,105500"
st "SROUT_in_0"
blo "53000,105300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_0"
t "std_logic"
o 2
suid 42,0
)
)
)
*33 (CptPort
uid 1592,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1593,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,105625,52000,106375"
)
tg (CPTG
uid 1594,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1595,0
va (VaSet
)
xt "53000,105500,58400,106500"
st "SROUT_in_1"
blo "53000,106300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_1"
t "std_logic"
o 3
suid 43,0
)
)
)
*34 (CptPort
uid 1596,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1597,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,106625,52000,107375"
)
tg (CPTG
uid 1598,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1599,0
va (VaSet
)
xt "53000,106500,58400,107500"
st "SROUT_in_2"
blo "53000,107300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_2"
t "std_logic"
o 4
suid 44,0
)
)
)
*35 (CptPort
uid 1600,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1601,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,107625,52000,108375"
)
tg (CPTG
uid 1602,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1603,0
va (VaSet
)
xt "53000,107500,58400,108500"
st "SROUT_in_3"
blo "53000,108300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_3"
t "std_logic"
o 5
suid 45,0
)
)
)
*36 (CptPort
uid 2379,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2380,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,110625,52000,111375"
)
tg (CPTG
uid 2381,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2382,0
va (VaSet
)
xt "53000,110500,57200,111500"
st "RSRLOAD"
blo "53000,111300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "RSRLOAD"
t "std_logic"
o 25
suid 56,0
i "'0'"
)
)
)
*37 (CptPort
uid 2383,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2384,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,112625,52000,113375"
)
tg (CPTG
uid 2385,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2386,0
va (VaSet
)
xt "53000,112500,56000,113500"
st "SRCLK"
blo "53000,113300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "SRCLK"
t "std_logic"
o 26
suid 57,0
i "'0'"
)
)
)
*38 (CptPort
uid 2969,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2970,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,86625,80750,87375"
)
tg (CPTG
uid 2971,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2972,0
va (VaSet
)
xt "76200,86500,79000,87500"
st "dac_cs"
ju 2
blo "79000,87300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dac_cs"
t "std_logic"
o 31
suid 64,0
)
)
)
*39 (CptPort
uid 2973,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2974,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,97625,80750,98375"
)
tg (CPTG
uid 2975,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2976,0
va (VaSet
)
xt "77300,97500,79000,98500"
st "sclk"
ju 2
blo "79000,98300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sclk"
t "std_logic"
o 41
suid 62,0
)
)
)
*40 (CptPort
uid 2977,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2978,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,88625,80750,89375"
)
tg (CPTG
uid 2979,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2980,0
va (VaSet
)
xt "72500,88500,79000,89500"
st "sensor_cs : (3:0)"
ju 2
blo "79000,89300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_cs"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 42
suid 65,0
)
)
)
*41 (CptPort
uid 2981,0
ps "OnEdgeStrategy"
shape (Diamond
uid 2982,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,98625,80750,99375"
)
tg (CPTG
uid 2983,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2984,0
va (VaSet
)
xt "77600,98500,79000,99500"
st "sio"
ju 2
blo "79000,99300"
)
)
thePort (LogicalPort
m 2
decl (Decl
n "sio"
t "std_logic"
preAdd 0
posAdd 0
o 49
suid 63,0
)
)
)
*42 (CptPort
uid 3670,0
ps "OnEdgeStrategy"
shape (Triangle
uid 3671,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,99625,80750,100375"
)
tg (CPTG
uid 3672,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 3673,0
va (VaSet
)
xt "77000,99500,79000,100500"
st "mosi"
ju 2
blo "79000,100300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "mosi"
t "std_logic"
o 37
suid 66,0
i "'0'"
)
)
)
*43 (CptPort
uid 6427,0
ps "OnEdgeStrategy"
shape (Triangle
uid 6428,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,120625,80750,121375"
)
tg (CPTG
uid 6429,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 6430,0
va (VaSet
)
xt "76000,120500,79000,121500"
st "denable"
ju 2
blo "79000,121300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "denable"
t "std_logic"
eolc "-- default domino wave off"
posAdd 0
o 32
suid 67,0
i "'0'"
)
)
)
*44 (CptPort
uid 10046,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10047,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,72625,52000,73375"
)
tg (CPTG
uid 10048,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 10049,0
va (VaSet
)
xt "53000,72500,57500,73500"
st "adc_clk_en"
blo "53000,73300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "adc_clk_en"
t "std_logic"
o 28
suid 69,0
i "'0'"
)
)
)
*45 (CptPort
uid 10246,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10247,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,129625,80750,130375"
)
tg (CPTG
uid 10248,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10249,0
va (VaSet
)
xt "73800,129500,79000,130500"
st "DCM_locked"
ju 2
blo "79000,130300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "DCM_locked"
t "std_logic"
preAdd 0
posAdd 0
o 17
suid 76,0
)
)
)
*46 (CptPort
uid 10254,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10255,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,135625,80750,136375"
)
tg (CPTG
uid 10256,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10257,0
va (VaSet
)
xt "71300,135500,79000,136500"
st "LOCKED_extraOUT"
ju 2
blo "79000,136300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "LOCKED_extraOUT"
t "std_logic"
o 18
suid 70,0
)
)
)
*47 (CptPort
uid 10258,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10259,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,138625,80750,139375"
)
tg (CPTG
uid 10260,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10261,0
va (VaSet
)
xt "74200,138500,79000,139500"
st "offset : (7:0)"
ju 2
blo "79000,139300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "offset"
t "std_logic_vector"
b "(7 downto 0)"
preAdd 0
posAdd 0
o 38
suid 77,0
i "(OTHERS => '0')"
)
)
)
*48 (CptPort
uid 10262,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10263,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,125625,80750,126375"
)
tg (CPTG
uid 10264,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10265,0
va (VaSet
)
xt "74600,125500,79000,126500"
st "PS_DIR_IN"
ju 2
blo "79000,126300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PS_DIR_IN"
t "std_logic"
o 23
suid 80,0
)
)
)
*49 (CptPort
uid 10266,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10267,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,126625,80750,127375"
)
tg (CPTG
uid 10268,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10269,0
va (VaSet
)
xt "74800,126500,79000,127500"
st "PS_DO_IN"
ju 2
blo "79000,127300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PS_DO_IN"
t "std_logic"
o 24
suid 81,0
)
)
)
*50 (CptPort
uid 10270,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10271,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,134625,80750,135375"
)
tg (CPTG
uid 10272,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10273,0
va (VaSet
)
xt "74000,134500,79000,135500"
st "PSCLK_OUT"
ju 2
blo "79000,135300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSCLK_OUT"
t "std_logic"
o 19
suid 74,0
)
)
)
*51 (CptPort
uid 10274,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10275,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,133625,80750,134375"
)
tg (CPTG
uid 10276,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10277,0
va (VaSet
)
xt "71200,133500,79000,134500"
st "PSDONE_extraOUT"
ju 2
blo "79000,134300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSDONE_extraOUT"
t "std_logic"
o 20
suid 71,0
)
)
)
*52 (CptPort
uid 10278,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10279,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,128625,80750,129375"
)
tg (CPTG
uid 10280,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10281,0
va (VaSet
)
xt "74400,128500,79000,129500"
st "PSEN_OUT"
ju 2
blo "79000,129300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSEN_OUT"
t "std_logic"
o 21
suid 73,0
)
)
)
*53 (CptPort
uid 10282,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10283,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,127625,80750,128375"
)
tg (CPTG
uid 10284,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10285,0
va (VaSet
)
xt "72000,127500,79000,128500"
st "PSINCDEC_OUT"
ju 2
blo "79000,128300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSINCDEC_OUT"
t "std_logic"
o 22
suid 72,0
)
)
)
*54 (CptPort
uid 10286,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10287,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,131625,80750,132375"
)
tg (CPTG
uid 10288,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10289,0
va (VaSet
)
xt "76800,131500,79000,132500"
st "ready"
ju 2
blo "79000,132300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "ready"
t "std_logic"
preAdd 0
posAdd 0
o 39
suid 79,0
i "'0'"
)
)
)
*55 (CptPort
uid 10290,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10291,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,132625,80750,133375"
)
tg (CPTG
uid 10292,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10293,0
va (VaSet
)
xt "76100,132500,79000,133500"
st "shifting"
ju 2
blo "79000,133300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "shifting"
t "std_logic"
prec "-- status:"
preAdd 0
posAdd 0
o 43
suid 78,0
i "'0'"
)
)
)
*56 (CptPort
uid 10320,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10321,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,123625,80750,124375"
)
tg (CPTG
uid 10322,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10323,0
va (VaSet
)
xt "74200,123500,79000,124500"
st "CLK25_OUT"
ju 2
blo "79000,124300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK25_OUT"
t "std_logic"
o 12
suid 83,0
)
)
)
*57 (CptPort
uid 10324,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10325,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,124625,80750,125375"
)
tg (CPTG
uid 10326,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10327,0
va (VaSet
)
xt "72800,124500,79000,125500"
st "CLK25_PSOUT"
ju 2
blo "79000,125300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK25_PSOUT"
t "std_logic"
o 13
suid 84,0
)
)
)
*58 (CptPort
uid 10328,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10329,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,122625,80750,123375"
)
tg (CPTG
uid 10330,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10331,0
va (VaSet
)
xt "74200,122500,79000,123500"
st "CLK50_OUT"
ju 2
blo "79000,123300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK50_OUT"
t "std_logic"
o 14
suid 82,0
)
)
)
*59 (CptPort
uid 12314,0
ps "OnEdgeStrategy"
shape (Triangle
uid 12315,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,139625,80750,140375"
)
tg (CPTG
uid 12316,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 12317,0
va (VaSet
)
xt "75300,139500,79000,140500"
st "SRIN_out"
ju 2
blo "79000,140300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "SRIN_out"
t "std_logic"
o 27
suid 85,0
i "'0'"
)
)
)
*60 (CptPort
uid 12521,0
ps "OnEdgeStrategy"
shape (Triangle
uid 12522,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,140625,80750,141375"
)
tg (CPTG
uid 12523,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 12524,0
va (VaSet
)
xt "76500,140500,79000,141500"
st "amber"
ju 2
blo "79000,141300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "amber"
t "std_logic"
o 30
suid 87,0
)
)
)
*61 (CptPort
uid 12525,0
ps "OnEdgeStrategy"
shape (Triangle
uid 12526,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,141625,80750,142375"
)
tg (CPTG
uid 12527,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 12528,0
va (VaSet
)
xt "76600,141500,79000,142500"
st "green"
ju 2
blo "79000,142300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "green"
t "std_logic"
o 35
suid 86,0
)
)
)
*62 (CptPort
uid 12529,0
ps "OnEdgeStrategy"
shape (Triangle
uid 12530,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,142625,80750,143375"
)
tg (CPTG
uid 12531,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 12532,0
va (VaSet
)
xt "77500,142500,79000,143500"
st "red"
ju 2
blo "79000,143300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "red"
t "std_logic"
o 40
suid 88,0
)
)
)
]
shape (Rectangle
uid 170,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "52000,66000,80000,144000"
)
oxt "15000,-1000,43000,27000"
ttg (MlTextGroup
uid 171,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*63 (Text
uid 172,0
va (VaSet
font "Arial,8,1"
)
xt "52200,123000,58400,124000"
st "FACT_FAD_lib"
blo "52200,123800"
tm "BdLibraryNameMgr"
)
*64 (Text
uid 173,0
va (VaSet
font "Arial,8,1"
)
xt "52200,124000,56400,125000"
st "FAD_main"
blo "52200,124800"
tm "CptNameMgr"
)
*65 (Text
uid 174,0
va (VaSet
font "Arial,8,1"
)
xt "52200,125000,58000,126000"
st "I_board_main"
blo "52200,125800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 175,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 176,0
text (MLText
uid 177,0
va (VaSet
font "Courier New,8,0"
)
xt "52000,65200,81500,66000"
st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B    ( integer )  "
)
header ""
)
elements [
(GiElement
name "RAMADDRWIDTH64b"
type "integer"
value "LOG2_OF_RAM_SIZE_64B"
)
]
)
viewicon (ZoomableIcon
uid 178,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "52250,142250,53750,143750"
iconName "BlockDiagram.png"
iconMaskName "BlockDiagram.msk"
ftype 1
)
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
*66 (PortIoIn
uid 231,0
shape (CompositeShape
uid 232,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 233,0
sl 0
ro 270
xt "20000,77625,21500,78375"
)
(Line
uid 234,0
sl 0
ro 270
xt "21500,78000,22000,78000"
pts [
"21500,78000"
"22000,78000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 235,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 236,0
va (VaSet
)
xt "16900,77500,19000,78500"
st "TRG"
ju 2
blo "19000,78300"
tm "WireNameMgr"
)
)
)
*67 (PortIoIn
uid 251,0
shape (CompositeShape
uid 252,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 253,0
sl 0
ro 270
xt "19000,67625,20500,68375"
)
(Line
uid 254,0
sl 0
ro 270
xt "20500,68000,21000,68000"
pts [
"20500,68000"
"21000,68000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 255,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 256,0
va (VaSet
)
xt "15200,67500,18000,68500"
st "X_50M"
ju 2
blo "18000,68300"
tm "WireNameMgr"
)
)
)
*68 (HdlText
uid 265,0
optionalChildren [
*69 (EmbeddedText
uid 271,0
commentText (CommentText
uid 272,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 273,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "32000,83000,44000,87000"
)
oxt "12000,27000,20000,31000"
text (MLText
uid 274,0
va (VaSet
)
xt "32200,83200,39700,86200"
st "
-- hard-wired IDs
board_id <= \"0101\";
crate_id <= \"01\";
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 4000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 266,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "24000,80000,32000,87000"
)
oxt "12000,23000,17000,27000"
ttg (MlTextGroup
uid 267,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*70 (Text
uid 268,0
va (VaSet
font "Arial,8,1"
)
xt "26150,81000,28650,82000"
st "eb_ID"
blo "26150,81800"
tm "HdlTextNameMgr"
)
*71 (Text
uid 269,0
va (VaSet
font "Arial,8,1"
)
xt "26150,82000,26950,83000"
st "1"
blo "26150,82800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 270,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "24250,85250,25750,86750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*72 (Net
uid 275,0
decl (Decl
n "board_id"
t "std_logic_vector"
b "(3 downto 0)"
preAdd 0
posAdd 0
o 73
suid 5,0
)
declText (MLText
uid 276,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,62400,67500,63200"
st "SIGNAL board_id        : std_logic_vector(3 downto 0)
"
)
)
*73 (Net
uid 283,0
decl (Decl
n "crate_id"
t "std_logic_vector"
b "(1 downto 0)"
o 74
suid 6,0
)
declText (MLText
uid 284,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,63200,67500,64000"
st "SIGNAL crate_id        : std_logic_vector(1 downto 0)
"
)
)
*74 (PortIoOut
uid 472,0
shape (CompositeShape
uid 473,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 474,0
sl 0
ro 270
xt "111500,70625,113000,71375"
)
(Line
uid 475,0
sl 0
ro 270
xt "111000,71000,111500,71000"
pts [
"111000,71000"
"111500,71000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 476,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 477,0
va (VaSet
)
xt "114000,70500,117100,71500"
st "W_RES"
blo "114000,71300"
tm "WireNameMgr"
)
)
)
*75 (PortIoOut
uid 478,0
shape (CompositeShape
uid 479,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 480,0
sl 0
ro 270
xt "111500,67625,113000,68375"
)
(Line
uid 481,0
sl 0
ro 270
xt "111000,68000,111500,68000"
pts [
"111000,68000"
"111500,68000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 482,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 483,0
va (VaSet
)
xt "114000,67500,116000,68500"
st "W_A"
blo "114000,68300"
tm "WireNameMgr"
)
)
)
*76 (PortIoOut
uid 484,0
shape (CompositeShape
uid 485,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 486,0
sl 0
ro 270
xt "111500,74625,113000,75375"
)
(Line
uid 487,0
sl 0
ro 270
xt "111000,75000,111500,75000"
pts [
"111000,75000"
"111500,75000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 488,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 489,0
va (VaSet
)
xt "114000,74500,116600,75500"
st "W_CS"
blo "114000,75300"
tm "WireNameMgr"
)
)
)
*77 (PortIoInOut
uid 490,0
shape (CompositeShape
uid 491,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Hexagon
uid 492,0
sl 0
xt "111500,68625,113000,69375"
)
(Line
uid 493,0
sl 0
xt "111000,69000,111500,69000"
pts [
"111000,69000"
"111500,69000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 494,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 495,0
va (VaSet
)
xt "114000,68500,116100,69500"
st "W_D"
blo "114000,69300"
tm "WireNameMgr"
)
)
)
*78 (PortIoIn
uid 496,0
shape (CompositeShape
uid 497,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 498,0
sl 0
ro 90
xt "111500,73625,113000,74375"
)
(Line
uid 499,0
sl 0
ro 90
xt "111000,74000,111500,74000"
pts [
"111500,74000"
"111000,74000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 500,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 501,0
va (VaSet
)
xt "114000,73500,116800,74500"
st "W_INT"
blo "114000,74300"
tm "WireNameMgr"
)
)
)
*79 (PortIoOut
uid 502,0
shape (CompositeShape
uid 503,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 504,0
sl 0
ro 270
xt "111500,71625,113000,72375"
)
(Line
uid 505,0
sl 0
ro 270
xt "111000,72000,111500,72000"
pts [
"111000,72000"
"111500,72000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 506,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 507,0
va (VaSet
)
xt "114000,71500,116700,72500"
st "W_RD"
blo "114000,72300"
tm "WireNameMgr"
)
)
)
*80 (PortIoOut
uid 508,0
shape (CompositeShape
uid 509,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 510,0
sl 0
ro 270
xt "111500,72625,113000,73375"
)
(Line
uid 511,0
sl 0
ro 270
xt "111000,73000,111500,73000"
pts [
"111000,73000"
"111500,73000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 512,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 513,0
va (VaSet
)
xt "114000,72500,116800,73500"
st "W_WR"
blo "114000,73300"
tm "WireNameMgr"
)
)
)
*81 (Net
uid 1465,0
decl (Decl
n "adc_data_array"
t "adc_data_array_type"
o 72
suid 29,0
)
declText (MLText
uid 1466,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,61600,63000,62400"
st "SIGNAL adc_data_array  : adc_data_array_type
"
)
)
*82 (Net
uid 2407,0
decl (Decl
n "RSRLOAD"
t "std_logic"
o 41
suid 57,0
i "'0'"
)
declText (MLText
uid 2408,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,35800,67500,36600"
st "RSRLOAD         : std_logic                    := '0'
"
)
)
*83 (PortIoOut
uid 2415,0
shape (CompositeShape
uid 2416,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 2417,0
sl 0
ro 90
xt "19000,110625,20500,111375"
)
(Line
uid 2418,0
sl 0
ro 90
xt "20500,111000,21000,111000"
pts [
"21000,111000"
"20500,111000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 2419,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2420,0
va (VaSet
)
xt "13800,110500,18000,111500"
st "RSRLOAD"
ju 2
blo "18000,111300"
tm "WireNameMgr"
)
)
)
*84 (Net
uid 2421,0
decl (Decl
n "SRCLK"
t "std_logic"
o 70
suid 58,0
i "'0'"
)
declText (MLText
uid 2422,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,60000,71000,60800"
st "SIGNAL SRCLK           : std_logic                    := '0'
"
)
)
*85 (Net
uid 3019,0
decl (Decl
n "sensor_cs"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 78
suid 65,0
)
declText (MLText
uid 3020,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,66400,67500,67200"
st "SIGNAL sensor_cs       : std_logic_vector(3 DOWNTO 0)
"
)
)
*86 (Net
uid 3025,0
decl (Decl
n "DAC_CS"
t "std_logic"
o 24
suid 66,0
)
declText (MLText
uid 3026,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,23000,54000,23800"
st "DAC_CS          : std_logic
"
)
)
*87 (PortIoOut
uid 3153,0
shape (CompositeShape
uid 3154,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3155,0
sl 0
ro 90
xt "19000,69625,20500,70375"
)
(Line
uid 3156,0
sl 0
ro 90
xt "20500,70000,21000,70000"
pts [
"21000,70000"
"20500,70000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3157,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3158,0
va (VaSet
)
xt "15200,69500,18000,70500"
st "A_CLK"
ju 2
blo "18000,70300"
tm "WireNameMgr"
)
)
)
*88 (Net
uid 3216,0
decl (Decl
n "X_50M"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 16
suid 67,0
)
declText (MLText
uid 3217,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,15800,54000,16600"
st "X_50M           : STD_LOGIC
"
)
)
*89 (Net
uid 3226,0
decl (Decl
n "TRG"
t "STD_LOGIC"
o 14
suid 68,0
)
declText (MLText
uid 3227,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,14200,54000,15000"
st "TRG             : STD_LOGIC
"
)
)
*90 (HdlText
uid 3248,0
optionalChildren [
*91 (EmbeddedText
uid 3254,0
commentText (CommentText
uid 3255,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3256,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "29000,71000,41000,77000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3257,0
va (VaSet
)
xt "29200,71200,41100,77200"
st "
-- ADC_CLK 2
A_CLK (0) <= CLK_25_PS;
A_CLK (1) <= CLK_25_PS;
A_CLK (2) <= CLK_25_PS;
A_CLK (3) <= CLK_25_PS;                                        
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 3249,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "24000,69000,29000,77000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3250,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*92 (Text
uid 3251,0
va (VaSet
font "Arial,8,1"
)
xt "24150,73000,28350,74000"
st "ADC_CLK"
blo "24150,73800"
tm "HdlTextNameMgr"
)
*93 (Text
uid 3252,0
va (VaSet
font "Arial,8,1"
)
xt "24150,74000,24950,75000"
st "2"
blo "24150,74800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3253,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "24250,75250,25750,76750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*94 (Net
uid 3266,0
decl (Decl
n "A_CLK"
t "std_logic_vector"
b "(3 downto 0)"
o 19
suid 71,0
)
declText (MLText
uid 3267,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,19000,64000,19800"
st "A_CLK           : std_logic_vector(3 downto 0)
"
)
)
*95 (Net
uid 3268,0
decl (Decl
n "CLK_25_PS"
t "std_logic"
o 59
suid 72,0
)
declText (MLText
uid 3269,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,51200,57500,52000"
st "SIGNAL CLK_25_PS       : std_logic
"
)
)
*96 (PortIoOut
uid 3284,0
shape (CompositeShape
uid 3285,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3286,0
sl 0
ro 90
xt "19000,89625,20500,90375"
)
(Line
uid 3287,0
sl 0
ro 90
xt "20500,90000,21000,90000"
pts [
"21000,90000"
"20500,90000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3288,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3289,0
va (VaSet
)
xt "14400,89500,18000,90500"
st "OE_ADC"
ju 2
blo "18000,90300"
tm "WireNameMgr"
)
)
)
*97 (Net
uid 3290,0
decl (Decl
n "OE_ADC"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 35
suid 73,0
)
declText (MLText
uid 3291,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,30200,54000,31000"
st "OE_ADC          : STD_LOGIC
"
)
)
*98 (PortIoIn
uid 3292,0
shape (CompositeShape
uid 3293,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3294,0
sl 0
ro 270
xt "19000,88625,20500,89375"
)
(Line
uid 3295,0
sl 0
ro 270
xt "20500,89000,21000,89000"
pts [
"20500,89000"
"21000,89000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3296,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3297,0
va (VaSet
)
xt "15000,88500,18000,89500"
st "A_OTR"
ju 2
blo "18000,89300"
tm "WireNameMgr"
)
)
)
*99 (Net
uid 3298,0
decl (Decl
n "A_OTR"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 5
suid 74,0
)
declText (MLText
uid 3299,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,7000,64000,7800"
st "A_OTR           : std_logic_vector(3 DOWNTO 0)
"
)
)
*100 (HdlText
uid 3300,0
optionalChildren [
*101 (EmbeddedText
uid 3306,0
commentText (CommentText
uid 3307,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3308,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "32000,96000,44000,102000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3309,0
va (VaSet
)
xt "32200,96200,44200,102200"
st "
-- ADC_DATA 3 
adc_data_array (0) <= A0_D;
adc_data_array (1) <= A1_D;
adc_data_array (2) <= A2_D;
adc_data_array (3) <= A3_D;                                       
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 3301,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "24000,94000,32000,102000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3302,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*102 (Text
uid 3303,0
va (VaSet
font "Arial,8,1"
)
xt "27150,95000,31750,96000"
st "ADC_DATA"
blo "27150,95800"
tm "HdlTextNameMgr"
)
*103 (Text
uid 3304,0
va (VaSet
font "Arial,8,1"
)
xt "27150,96000,27950,97000"
st "3"
blo "27150,96800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3305,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "24250,100250,25750,101750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*104 (PortIoIn
uid 3310,0
shape (CompositeShape
uid 3311,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3312,0
sl 0
ro 270
xt "19000,94625,20500,95375"
)
(Line
uid 3313,0
sl 0
ro 270
xt "20500,95000,21000,95000"
pts [
"20500,95000"
"21000,95000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3314,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3315,0
va (VaSet
)
xt "15700,94500,18000,95500"
st "A0_D"
ju 2
blo "18000,95300"
tm "WireNameMgr"
)
)
)
*105 (PortIoIn
uid 3332,0
shape (CompositeShape
uid 3333,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3334,0
sl 0
ro 270
xt "19000,95625,20500,96375"
)
(Line
uid 3335,0
sl 0
ro 270
xt "20500,96000,21000,96000"
pts [
"20500,96000"
"21000,96000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3336,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3337,0
va (VaSet
)
xt "15700,95500,18000,96500"
st "A1_D"
ju 2
blo "18000,96300"
tm "WireNameMgr"
)
)
)
*106 (PortIoIn
uid 3338,0
shape (CompositeShape
uid 3339,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3340,0
sl 0
ro 270
xt "19000,96625,20500,97375"
)
(Line
uid 3341,0
sl 0
ro 270
xt "20500,97000,21000,97000"
pts [
"20500,97000"
"21000,97000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3342,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3343,0
va (VaSet
)
xt "15700,96500,18000,97500"
st "A2_D"
ju 2
blo "18000,97300"
tm "WireNameMgr"
)
)
)
*107 (PortIoIn
uid 3344,0
shape (CompositeShape
uid 3345,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3346,0
sl 0
ro 270
xt "19000,97625,20500,98375"
)
(Line
uid 3347,0
sl 0
ro 270
xt "20500,98000,21000,98000"
pts [
"20500,98000"
"21000,98000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3348,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3349,0
va (VaSet
)
xt "15700,97500,18000,98500"
st "A3_D"
ju 2
blo "18000,98300"
tm "WireNameMgr"
)
)
)
*108 (Net
uid 3374,0
decl (Decl
n "A0_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 1
suid 79,0
)
declText (MLText
uid 3375,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,3800,64500,4600"
st "A0_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*109 (Net
uid 3376,0
decl (Decl
n "A1_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 2
suid 80,0
)
declText (MLText
uid 3377,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,4600,64500,5400"
st "A1_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*110 (Net
uid 3378,0
decl (Decl
n "A2_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 3
suid 81,0
)
declText (MLText
uid 3379,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,5400,64500,6200"
st "A2_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*111 (Net
uid 3380,0
decl (Decl
n "A3_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 4
suid 82,0
)
declText (MLText
uid 3381,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,6200,64500,7000"
st "A3_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*112 (HdlText
uid 3394,0
optionalChildren [
*113 (EmbeddedText
uid 3400,0
commentText (CommentText
uid 3401,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3402,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "32000,114000,44000,120000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3403,0
va (VaSet
)
xt "32200,114200,44200,120200"
st "
-- SRCLK 4         
D0_SRCLK <= SRCLK;
D1_SRCLK <= SRCLK;
D2_SRCLK <= SRCLK;
D3_SRCLK <= SRCLK;                               
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 3395,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "24000,112000,32000,120000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3396,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*114 (Text
uid 3397,0
va (VaSet
font "Arial,8,1"
)
xt "27150,113000,30350,114000"
st "SRCLK"
blo "27150,113800"
tm "HdlTextNameMgr"
)
*115 (Text
uid 3398,0
va (VaSet
font "Arial,8,1"
)
xt "27150,114000,27950,115000"
st "4"
blo "27150,114800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3399,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "24250,118250,25750,119750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*116 (Net
uid 3460,0
decl (Decl
n "D0_SRCLK"
t "STD_LOGIC"
o 20
suid 87,0
)
declText (MLText
uid 3461,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,19800,54000,20600"
st "D0_SRCLK        : STD_LOGIC
"
)
)
*117 (Net
uid 3462,0
decl (Decl
n "D1_SRCLK"
t "STD_LOGIC"
o 21
suid 88,0
)
declText (MLText
uid 3463,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,20600,54000,21400"
st "D1_SRCLK        : STD_LOGIC
"
)
)
*118 (Net
uid 3464,0
decl (Decl
n "D2_SRCLK"
t "STD_LOGIC"
o 22
suid 89,0
)
declText (MLText
uid 3465,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,21400,54000,22200"
st "D2_SRCLK        : STD_LOGIC
"
)
)
*119 (Net
uid 3466,0
decl (Decl
n "D3_SRCLK"
t "STD_LOGIC"
o 23
suid 90,0
)
declText (MLText
uid 3467,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,22200,54000,23000"
st "D3_SRCLK        : STD_LOGIC
"
)
)
*120 (PortIoIn
uid 3476,0
shape (CompositeShape
uid 3477,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3478,0
sl 0
ro 270
xt "19000,104625,20500,105375"
)
(Line
uid 3479,0
sl 0
ro 270
xt "20500,105000,21000,105000"
pts [
"20500,105000"
"21000,105000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3480,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3481,0
va (VaSet
)
xt "13400,104500,18000,105500"
st "D0_SROUT"
ju 2
blo "18000,105300"
tm "WireNameMgr"
)
)
)
*121 (PortIoIn
uid 3482,0
shape (CompositeShape
uid 3483,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3484,0
sl 0
ro 270
xt "19000,105625,20500,106375"
)
(Line
uid 3485,0
sl 0
ro 270
xt "20500,106000,21000,106000"
pts [
"20500,106000"
"21000,106000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3486,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3487,0
va (VaSet
)
xt "13400,105500,18000,106500"
st "D1_SROUT"
ju 2
blo "18000,106300"
tm "WireNameMgr"
)
)
)
*122 (PortIoIn
uid 3488,0
shape (CompositeShape
uid 3489,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3490,0
sl 0
ro 270
xt "19000,106625,20500,107375"
)
(Line
uid 3491,0
sl 0
ro 270
xt "20500,107000,21000,107000"
pts [
"20500,107000"
"21000,107000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3492,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3493,0
va (VaSet
)
xt "13400,106500,18000,107500"
st "D2_SROUT"
ju 2
blo "18000,107300"
tm "WireNameMgr"
)
)
)
*123 (PortIoIn
uid 3494,0
shape (CompositeShape
uid 3495,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3496,0
sl 0
ro 270
xt "19000,107625,20500,108375"
)
(Line
uid 3497,0
sl 0
ro 270
xt "20500,108000,21000,108000"
pts [
"20500,108000"
"21000,108000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3498,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3499,0
va (VaSet
)
xt "13400,107500,18000,108500"
st "D3_SROUT"
ju 2
blo "18000,108300"
tm "WireNameMgr"
)
)
)
*124 (Net
uid 3500,0
decl (Decl
n "D0_SROUT"
t "std_logic"
o 6
suid 91,0
)
declText (MLText
uid 3501,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,7800,54000,8600"
st "D0_SROUT        : std_logic
"
)
)
*125 (Net
uid 3502,0
decl (Decl
n "D1_SROUT"
t "std_logic"
o 7
suid 92,0
)
declText (MLText
uid 3503,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,8600,54000,9400"
st "D1_SROUT        : std_logic
"
)
)
*126 (Net
uid 3504,0
decl (Decl
n "D2_SROUT"
t "std_logic"
o 8
suid 93,0
)
declText (MLText
uid 3505,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,9400,54000,10200"
st "D2_SROUT        : std_logic
"
)
)
*127 (Net
uid 3506,0
decl (Decl
n "D3_SROUT"
t "std_logic"
o 9
suid 94,0
)
declText (MLText
uid 3507,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,10200,54000,11000"
st "D3_SROUT        : std_logic
"
)
)
*128 (PortIoOut
uid 3508,0
shape (CompositeShape
uid 3509,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3510,0
sl 0
ro 90
xt "10000,125625,11500,126375"
)
(Line
uid 3511,0
sl 0
ro 90
xt "11500,126000,12000,126000"
pts [
"12000,126000"
"11500,126000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3512,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3513,0
va (VaSet
)
xt "7100,125500,9000,126500"
st "D_A"
ju 2
blo "9000,126300"
tm "WireNameMgr"
)
)
)
*129 (Net
uid 3514,0
decl (Decl
n "D_A"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 27
suid 95,0
i "(others => '0')"
)
declText (MLText
uid 3515,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,25400,73500,26200"
st "D_A             : std_logic_vector(3 DOWNTO 0) := (others => '0')
"
)
)
*130 (PortIoOut
uid 3516,0
shape (CompositeShape
uid 3517,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3518,0
sl 0
ro 90
xt "19000,109625,20500,110375"
)
(Line
uid 3519,0
sl 0
ro 90
xt "20500,110000,21000,110000"
pts [
"21000,110000"
"20500,110000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3520,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3521,0
va (VaSet
)
xt "14500,109500,18000,110500"
st "DWRITE"
ju 2
blo "18000,110300"
tm "WireNameMgr"
)
)
)
*131 (Net
uid 3522,0
decl (Decl
n "DWRITE"
t "std_logic"
o 26
suid 96,0
i "'0'"
)
declText (MLText
uid 3523,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,24600,67500,25400"
st "DWRITE          : std_logic                    := '0'
"
)
)
*132 (PortIoOut
uid 3536,0
shape (CompositeShape
uid 3537,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3538,0
sl 0
ro 270
xt "111500,86625,113000,87375"
)
(Line
uid 3539,0
sl 0
ro 270
xt "111000,87000,111500,87000"
pts [
"111000,87000"
"111500,87000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3540,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3541,0
va (VaSet
)
xt "114000,86500,117600,87500"
st "DAC_CS"
blo "114000,87300"
tm "WireNameMgr"
)
)
)
*133 (HdlText
uid 3542,0
optionalChildren [
*134 (EmbeddedText
uid 3612,0
commentText (CommentText
uid 3613,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3614,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "88000,90000,100000,96000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3615,0
va (VaSet
)
xt "88200,90200,100100,96200"
st "
-- T_CS 5
T0_CS <= sensor_cs (0); 
T1_CS <= sensor_cs (1);
T2_CS <= sensor_cs (2);
T3_CS <= sensor_cs (3);                                      
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 3543,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "100000,88000,108000,96000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3544,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*135 (Text
uid 3545,0
va (VaSet
font "Arial,8,1"
)
xt "103150,89000,105550,90000"
st "T_CS"
blo "103150,89800"
tm "HdlTextNameMgr"
)
*136 (Text
uid 3546,0
va (VaSet
font "Arial,8,1"
)
xt "103150,90000,103950,91000"
st "5"
blo "103150,90800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3547,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "100250,94250,101750,95750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*137 (PortIoOut
uid 3548,0
shape (CompositeShape
uid 3549,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3550,0
sl 0
ro 270
xt "111500,88625,113000,89375"
)
(Line
uid 3551,0
sl 0
ro 270
xt "111000,89000,111500,89000"
pts [
"111000,89000"
"111500,89000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3552,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3553,0
va (VaSet
)
xt "114000,88500,116800,89500"
st "T0_CS"
blo "114000,89300"
tm "WireNameMgr"
)
)
)
*138 (PortIoOut
uid 3554,0
shape (CompositeShape
uid 3555,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3556,0
sl 0
ro 270
xt "111500,89625,113000,90375"
)
(Line
uid 3557,0
sl 0
ro 270
xt "111000,90000,111500,90000"
pts [
"111000,90000"
"111500,90000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3558,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3559,0
va (VaSet
)
xt "114000,89500,116800,90500"
st "T1_CS"
blo "114000,90300"
tm "WireNameMgr"
)
)
)
*139 (PortIoOut
uid 3560,0
shape (CompositeShape
uid 3561,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3562,0
sl 0
ro 270
xt "111500,90625,113000,91375"
)
(Line
uid 3563,0
sl 0
ro 270
xt "111000,91000,111500,91000"
pts [
"111000,91000"
"111500,91000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3564,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3565,0
va (VaSet
)
xt "114000,90500,116800,91500"
st "T2_CS"
blo "114000,91300"
tm "WireNameMgr"
)
)
)
*140 (PortIoOut
uid 3566,0
shape (CompositeShape
uid 3567,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3568,0
sl 0
ro 270
xt "111500,91625,113000,92375"
)
(Line
uid 3569,0
sl 0
ro 270
xt "111000,92000,111500,92000"
pts [
"111000,92000"
"111500,92000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3570,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3571,0
va (VaSet
)
xt "114000,91500,116800,92500"
st "T3_CS"
blo "114000,92300"
tm "WireNameMgr"
)
)
)
*141 (Net
uid 3604,0
decl (Decl
n "T0_CS"
t "std_logic"
o 44
suid 101,0
)
declText (MLText
uid 3605,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,38200,54000,39000"
st "T0_CS           : std_logic
"
)
)
*142 (Net
uid 3606,0
decl (Decl
n "T1_CS"
t "std_logic"
o 45
suid 102,0
)
declText (MLText
uid 3607,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,39000,54000,39800"
st "T1_CS           : std_logic
"
)
)
*143 (Net
uid 3608,0
decl (Decl
n "T2_CS"
t "std_logic"
o 46
suid 103,0
)
declText (MLText
uid 3609,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,39800,54000,40600"
st "T2_CS           : std_logic
"
)
)
*144 (Net
uid 3610,0
decl (Decl
n "T3_CS"
t "std_logic"
o 47
suid 104,0
)
declText (MLText
uid 3611,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,40600,54000,41400"
st "T3_CS           : std_logic
"
)
)
*145 (PortIoOut
uid 3624,0
shape (CompositeShape
uid 3625,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3626,0
sl 0
ro 270
xt "111500,97625,113000,98375"
)
(Line
uid 3627,0
sl 0
ro 270
xt "111000,98000,111500,98000"
pts [
"111000,98000"
"111500,98000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3628,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3629,0
va (VaSet
)
xt "113750,97500,116550,98500"
st "S_CLK"
blo "113750,98300"
tm "WireNameMgr"
)
)
)
*146 (Net
uid 3630,0
decl (Decl
n "S_CLK"
t "std_logic"
o 43
suid 105,0
)
declText (MLText
uid 3631,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,37400,54000,38200"
st "S_CLK           : std_logic
"
)
)
*147 (Net
uid 3632,0
decl (Decl
n "W_A"
t "std_logic_vector"
b "(9 DOWNTO 0)"
o 49
suid 106,0
)
declText (MLText
uid 3633,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,42200,64000,43000"
st "W_A             : std_logic_vector(9 DOWNTO 0)
"
)
)
*148 (Net
uid 3634,0
decl (Decl
n "W_D"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 55
suid 107,0
)
declText (MLText
uid 3635,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,47000,64500,47800"
st "W_D             : std_logic_vector(15 DOWNTO 0)
"
)
)
*149 (Net
uid 3636,0
decl (Decl
n "W_RES"
t "std_logic"
o 52
suid 108,0
i "'1'"
)
declText (MLText
uid 3637,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,44600,67500,45400"
st "W_RES           : std_logic                    := '1'
"
)
)
*150 (Net
uid 3638,0
decl (Decl
n "W_RD"
t "std_logic"
o 51
suid 109,0
i "'1'"
)
declText (MLText
uid 3639,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,43800,67500,44600"
st "W_RD            : std_logic                    := '1'
"
)
)
*151 (Net
uid 3640,0
decl (Decl
n "W_WR"
t "std_logic"
o 53
suid 110,0
i "'1'"
)
declText (MLText
uid 3641,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,45400,67500,46200"
st "W_WR            : std_logic                    := '1'
"
)
)
*152 (Net
uid 3642,0
decl (Decl
n "W_INT"
t "std_logic"
o 15
suid 111,0
)
declText (MLText
uid 3643,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,15000,54000,15800"
st "W_INT           : std_logic
"
)
)
*153 (Net
uid 3644,0
decl (Decl
n "W_CS"
t "std_logic"
o 50
suid 112,0
i "'1'"
)
declText (MLText
uid 3645,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,43000,67500,43800"
st "W_CS            : std_logic                    := '1'
"
)
)
*154 (PortIoInOut
uid 3674,0
shape (CompositeShape
uid 3675,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Hexagon
uid 3676,0
sl 0
xt "111500,98625,113000,99375"
)
(Line
uid 3677,0
sl 0
xt "111000,99000,111500,99000"
pts [
"111000,99000"
"111500,99000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3678,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3679,0
va (VaSet
)
xt "114000,98500,116400,99500"
st "MISO"
blo "114000,99300"
tm "WireNameMgr"
)
)
)
*155 (Net
uid 3680,0
decl (Decl
n "MOSI"
t "std_logic"
o 34
suid 113,0
i "'0'"
)
declText (MLText
uid 3681,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,29400,67500,30200"
st "MOSI            : std_logic                    := '0'
"
)
)
*156 (PortIoOut
uid 3688,0
shape (CompositeShape
uid 3689,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3690,0
sl 0
ro 270
xt "111500,99625,113000,100375"
)
(Line
uid 3691,0
sl 0
ro 270
xt "111000,100000,111500,100000"
pts [
"111000,100000"
"111500,100000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3692,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3693,0
va (VaSet
)
xt "114000,99500,116400,100500"
st "MOSI"
blo "114000,100300"
tm "WireNameMgr"
)
)
)
*157 (Net
uid 3694,0
decl (Decl
n "MISO"
t "std_logic"
preAdd 0
posAdd 0
o 54
suid 114,0
)
declText (MLText
uid 3695,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,46200,54000,47000"
st "MISO            : std_logic
"
)
)
*158 (HdlText
uid 3700,0
optionalChildren [
*159 (EmbeddedText
uid 3706,0
commentText (CommentText
uid 3707,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3708,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "82000,106000,99000,118000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3709,0
va (VaSet
)
xt "82200,106200,98600,118200"
st "
-- MISC 6     
TRG_V <= '0';
RS485_C_RE <= '0'; 
RS485_C_DE <= '0';   
RS485_C_DO <= RS485_C_DI;

RS485_E_RE <= '0';      
RS485_E_DE <= '0'; 
--RS485_E_DO <= RS485_E_DI;

-- DENABLE <= '0'; -- domino wave stopped
-- DENABLE <= '1'; -- domino wave running


EE_CS <= '1';
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 12000
visibleWidth 17000
)
)
)
]
shape (Rectangle
uid 3701,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "100000,102000,108000,115000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3702,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*160 (Text
uid 3703,0
va (VaSet
font "Arial,8,1"
)
xt "103150,106000,105550,107000"
st "MISC"
blo "103150,106800"
tm "HdlTextNameMgr"
)
*161 (Text
uid 3704,0
va (VaSet
font "Arial,8,1"
)
xt "103150,107000,103950,108000"
st "6"
blo "103150,107800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3705,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "100250,113250,101750,114750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*162 (PortIoOut
uid 3710,0
shape (CompositeShape
uid 3711,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3712,0
sl 0
ro 270
xt "111500,102625,113000,103375"
)
(Line
uid 3713,0
sl 0
ro 270
xt "111000,103000,111500,103000"
pts [
"111000,103000"
"111500,103000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3714,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3715,0
va (VaSet
)
xt "114000,102500,117000,103500"
st "TRG_V"
blo "114000,103300"
tm "WireNameMgr"
)
)
)
*163 (PortIoOut
uid 3716,0
shape (CompositeShape
uid 3717,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3718,0
sl 0
ro 270
xt "111500,103625,113000,104375"
)
(Line
uid 3719,0
sl 0
ro 270
xt "111000,104000,111500,104000"
pts [
"111000,104000"
"111500,104000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3720,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3721,0
va (VaSet
)
xt "114000,103500,119600,104500"
st "RS485_C_RE"
blo "114000,104300"
tm "WireNameMgr"
)
)
)
*164 (PortIoOut
uid 3722,0
shape (CompositeShape
uid 3723,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3724,0
sl 0
ro 270
xt "111500,104625,113000,105375"
)
(Line
uid 3725,0
sl 0
ro 270
xt "111000,105000,111500,105000"
pts [
"111000,105000"
"111500,105000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3726,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3727,0
va (VaSet
)
xt "114000,104500,119600,105500"
st "RS485_C_DE"
blo "114000,105300"
tm "WireNameMgr"
)
)
)
*165 (PortIoOut
uid 3728,0
shape (CompositeShape
uid 3729,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3730,0
sl 0
ro 270
xt "111500,105625,113000,106375"
)
(Line
uid 3731,0
sl 0
ro 270
xt "111000,106000,111500,106000"
pts [
"111000,106000"
"111500,106000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3732,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3733,0
va (VaSet
)
xt "114000,105500,119500,106500"
st "RS485_E_RE"
blo "114000,106300"
tm "WireNameMgr"
)
)
)
*166 (PortIoOut
uid 3734,0
shape (CompositeShape
uid 3735,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3736,0
sl 0
ro 270
xt "111500,106625,113000,107375"
)
(Line
uid 3737,0
sl 0
ro 270
xt "111000,107000,111500,107000"
pts [
"111000,107000"
"111500,107000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3738,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3739,0
va (VaSet
)
xt "114000,106500,119500,107500"
st "RS485_E_DE"
blo "114000,107300"
tm "WireNameMgr"
)
)
)
*167 (PortIoOut
uid 3740,0
shape (CompositeShape
uid 3741,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3742,0
sl 0
ro 270
xt "111500,120625,113000,121375"
)
(Line
uid 3743,0
sl 0
ro 270
xt "111000,121000,111500,121000"
pts [
"111000,121000"
"111500,121000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3744,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3745,0
va (VaSet
)
xt "114000,120500,118000,121500"
st "DENABLE"
blo "114000,121300"
tm "WireNameMgr"
)
)
)
*168 (PortIoOut
uid 3752,0
shape (CompositeShape
uid 3753,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3754,0
sl 0
ro 270
xt "111500,109625,113000,110375"
)
(Line
uid 3755,0
sl 0
ro 270
xt "111000,110000,111500,110000"
pts [
"111000,110000"
"111500,110000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3756,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3757,0
va (VaSet
)
xt "114000,109500,116900,110500"
st "EE_CS"
blo "114000,110300"
tm "WireNameMgr"
)
)
)
*169 (Net
uid 3864,0
decl (Decl
n "TRG_V"
t "std_logic"
o 48
suid 126,0
)
declText (MLText
uid 3865,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,41400,54000,42200"
st "TRG_V           : std_logic
"
)
)
*170 (Net
uid 3866,0
decl (Decl
n "RS485_C_RE"
t "std_logic"
o 38
suid 127,0
)
declText (MLText
uid 3867,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,33400,54000,34200"
st "RS485_C_RE      : std_logic
"
)
)
*171 (Net
uid 3868,0
decl (Decl
n "RS485_C_DE"
t "std_logic"
o 36
suid 128,0
)
declText (MLText
uid 3869,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,31800,54000,32600"
st "RS485_C_DE      : std_logic
"
)
)
*172 (Net
uid 3870,0
decl (Decl
n "RS485_E_RE"
t "std_logic"
o 40
suid 129,0
)
declText (MLText
uid 3871,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,35000,54000,35800"
st "RS485_E_RE      : std_logic
"
)
)
*173 (Net
uid 3872,0
decl (Decl
n "RS485_E_DE"
t "std_logic"
o 39
suid 130,0
)
declText (MLText
uid 3873,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,34200,54000,35000"
st "RS485_E_DE      : std_logic
"
)
)
*174 (Net
uid 3874,0
decl (Decl
n "DENABLE"
t "std_logic"
o 25
suid 131,0
i "'0'"
)
declText (MLText
uid 3875,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,23800,67500,24600"
st "DENABLE         : std_logic                    := '0'
"
)
)
*175 (Net
uid 3878,0
decl (Decl
n "EE_CS"
t "std_logic"
o 30
suid 133,0
)
declText (MLText
uid 3879,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,27800,54000,28600"
st "EE_CS           : std_logic
"
)
)
*176 (PortIoOut
uid 3995,0
shape (CompositeShape
uid 3996,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3997,0
sl 0
ro 90
xt "19000,112625,20500,113375"
)
(Line
uid 3998,0
sl 0
ro 90
xt "20500,113000,21000,113000"
pts [
"21000,113000"
"20500,113000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3999,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4000,0
va (VaSet
)
xt "13600,112500,18000,113500"
st "D0_SRCLK"
ju 2
blo "18000,113300"
tm "WireNameMgr"
)
)
)
*177 (PortIoOut
uid 4001,0
shape (CompositeShape
uid 4002,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4003,0
sl 0
ro 90
xt "19000,113625,20500,114375"
)
(Line
uid 4004,0
sl 0
ro 90
xt "20500,114000,21000,114000"
pts [
"21000,114000"
"20500,114000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4005,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4006,0
va (VaSet
)
xt "13600,113500,18000,114500"
st "D1_SRCLK"
ju 2
blo "18000,114300"
tm "WireNameMgr"
)
)
)
*178 (PortIoOut
uid 4007,0
shape (CompositeShape
uid 4008,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4009,0
sl 0
ro 90
xt "19000,114625,20500,115375"
)
(Line
uid 4010,0
sl 0
ro 90
xt "20500,115000,21000,115000"
pts [
"21000,115000"
"20500,115000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4011,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4012,0
va (VaSet
)
xt "13600,114500,18000,115500"
st "D2_SRCLK"
ju 2
blo "18000,115300"
tm "WireNameMgr"
)
)
)
*179 (PortIoOut
uid 4013,0
shape (CompositeShape
uid 4014,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4015,0
sl 0
ro 90
xt "19000,115625,20500,116375"
)
(Line
uid 4016,0
sl 0
ro 90
xt "20500,116000,21000,116000"
pts [
"21000,116000"
"20500,116000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4017,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4018,0
va (VaSet
)
xt "13600,115500,18000,116500"
st "D3_SRCLK"
ju 2
blo "18000,116300"
tm "WireNameMgr"
)
)
)
*180 (PortIoOut
uid 4916,0
shape (CompositeShape
uid 4917,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4918,0
sl 0
ro 270
xt "111500,119625,113000,120375"
)
(Line
uid 4919,0
sl 0
ro 270
xt "111000,120000,111500,120000"
pts [
"111000,120000"
"111500,120000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4920,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4921,0
va (VaSet
)
xt "114000,119500,115900,120500"
st "D_T"
blo "114000,120300"
tm "WireNameMgr"
)
)
)
*181 (Net
uid 5320,0
decl (Decl
n "D_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 28
suid 141,0
i "(OTHERS => '0')"
)
declText (MLText
uid 5321,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,26200,73500,27000"
st "D_T             : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')
"
)
)
*182 (PortIoIn
uid 6781,0
shape (CompositeShape
uid 6782,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 6783,0
sl 0
ro 270
xt "57000,156625,58500,157375"
)
(Line
uid 6784,0
sl 0
ro 270
xt "58500,157000,59000,157000"
pts [
"58500,157000"
"59000,157000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 6785,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6786,0
va (VaSet
)
xt "51800,156500,56000,157500"
st "D_PLLLCK"
ju 2
blo "56000,157300"
tm "WireNameMgr"
)
)
)
*183 (Net
uid 6793,0
decl (Decl
n "D_PLLLCK"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 10
suid 152,0
)
declText (MLText
uid 6794,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,11000,64000,11800"
st "D_PLLLCK        : std_logic_vector(3 DOWNTO 0)
"
)
)
*184 (PortIoOut
uid 6874,0
shape (CompositeShape
uid 6875,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 6876,0
sl 0
ro 270
xt "75500,156625,77000,157375"
)
(Line
uid 6877,0
sl 0
ro 270
xt "75000,157000,75500,157000"
pts [
"75000,157000"
"75500,157000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 6878,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6879,0
va (VaSet
)
xt "78000,156500,80300,157500"
st "D_T2"
blo "78000,157300"
tm "WireNameMgr"
)
)
)
*185 (Net
uid 6886,0
decl (Decl
n "D_T2"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 29
suid 154,0
i "(others => '0')"
)
declText (MLText
uid 6887,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,27000,73500,27800"
st "D_T2            : std_logic_vector(3 DOWNTO 0) := (others => '0')
"
)
)
*186 (HdlText
uid 6888,0
optionalChildren [
*187 (EmbeddedText
uid 6894,0
commentText (CommentText
uid 6895,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 6896,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "62000,153000,72000,156000"
)
oxt "0,0,18000,5000"
text (MLText
uid 6897,0
va (VaSet
)
xt "62200,153200,70300,154200"
st "
D_T2 <= D_PLLLCK;
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 3000
visibleWidth 10000
)
)
)
]
shape (Rectangle
uid 6889,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "65000,156000,68000,159000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 6890,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*188 (Text
uid 6891,0
va (VaSet
font "Arial,8,1"
)
xt "66150,160000,67850,161000"
st "eb1"
blo "66150,160800"
tm "HdlTextNameMgr"
)
*189 (Text
uid 6892,0
va (VaSet
font "Arial,8,1"
)
xt "66150,161000,66950,162000"
st "7"
blo "66150,161800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 6893,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "65250,157250,66750,158750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*190 (HdlText
uid 7092,0
optionalChildren [
*191 (EmbeddedText
uid 7098,0
commentText (CommentText
uid 7099,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 7100,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "16000,129000,36000,135000"
)
oxt "0,0,18000,5000"
text (MLText
uid 7101,0
va (VaSet
)
xt "16200,129200,28400,131200"
st "
-- eb2 8                                        
D_A <= drs_channel_id;

"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 20000
)
)
)
]
shape (Rectangle
uid 7093,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "21000,123000,29000,129000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 7094,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*192 (Text
uid 7095,0
va (VaSet
font "Arial,8,1"
)
xt "24150,127000,25850,128000"
st "eb2"
blo "24150,127800"
tm "HdlTextNameMgr"
)
*193 (Text
uid 7096,0
va (VaSet
font "Arial,8,1"
)
xt "24150,128000,24950,129000"
st "8"
blo "24150,128800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 7097,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "21250,127250,22750,128750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*194 (PortIoOut
uid 7138,0
shape (CompositeShape
uid 7139,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 7140,0
sl 0
ro 270
xt "132500,125625,134000,126375"
)
(Line
uid 7141,0
sl 0
ro 270
xt "132000,126000,132500,126000"
pts [
"132000,126000"
"132500,126000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 7142,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 7143,0
va (VaSet
)
xt "135000,125500,137200,126500"
st "A1_T"
blo "135000,126300"
tm "WireNameMgr"
)
)
)
*195 (Net
uid 7150,0
decl (Decl
n "A1_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 18
suid 155,0
i "(OTHERS => '0')"
)
declText (MLText
uid 7151,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,17400,73500,18200"
st "A1_T            : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')
"
)
)
*196 (Net
uid 7485,0
decl (Decl
n "dummy"
t "std_logic"
o 76
suid 157,0
)
declText (MLText
uid 7486,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,64800,57500,65600"
st "SIGNAL dummy           : std_logic
"
)
)
*197 (MWC
uid 7652,0
optionalChildren [
*198 (CptPort
uid 7632,0
optionalChildren [
*199 (Line
uid 7636,0
layer 5
sl 0
va (VaSet
vasetType 3
)
xt "91000,87000,91000,87000"
pts [
"91000,87000"
"91000,87000"
]
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 7633,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,65535"
)
xt "90250,86625,91000,87375"
)
tg (CPTG
uid 7634,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 7635,0
sl 0
va (VaSet
isHidden 1
font "arial,8,0"
)
xt "698200,401500,699000,402500"
st "s"
blo "698200,402300"
)
s (Text
uid 7661,0
sl 0
va (VaSet
font "arial,8,0"
)
xt "698200,402500,698200,402500"
blo "698200,402500"
)
)
thePort (LogicalPort
decl (Decl
n "s"
t "std_logic"
o 76
suid 1,0
)
)
)
*200 (CptPort
uid 7637,0
optionalChildren [
*201 (Line
uid 7641,0
layer 5
sl 0
va (VaSet
vasetType 3
)
xt "94000,87000,94000,87000"
pts [
"94000,87000"
"94000,87000"
]
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 7638,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,65535"
)
xt "94000,86625,94750,87375"
)
tg (CPTG
uid 7639,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 7640,0
sl 0
va (VaSet
isHidden 1
font "arial,8,0"
)
xt "137000,449107,137600,450107"
st "t"
ju 2
blo "137600,449907"
)
s (Text
uid 7662,0
sl 0
va (VaSet
font "arial,8,0"
)
xt "137600,450107,137600,450107"
ju 2
blo "137600,450107"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "t"
t "std_logic"
o 24
suid 2,0
)
)
)
*202 (CommentGraphic
uid 7642,0
shape (PolyLine2D
pts [
"91000,87000"
"92000,86000"
]
uid 7643,0
layer 8
sl 0
va (VaSet
vasetType 1
transparent 1
fg "49152,49152,49152"
lineColor "26368,26368,26368"
lineWidth 2
)
xt "91000,86000,92000,87000"
)
oxt "6000,6000,7000,7000"
)
*203 (CommentGraphic
uid 7644,0
shape (PolyLine2D
pts [
"91000,87000"
"92000,88000"
]
uid 7645,0
layer 8
sl 0
va (VaSet
vasetType 1
transparent 1
fg "49152,49152,49152"
lineColor "26368,26368,26368"
lineWidth 2
)
xt "91000,87000,92000,88000"
)
oxt "6000,7000,7000,8000"
)
*204 (CommentGraphic
uid 7646,0
shape (PolyLine2D
pts [
"91988,87329"
"92988,87329"
]
uid 7647,0
layer 8
sl 0
va (VaSet
vasetType 1
transparent 1
fg "49152,49152,49152"
lineColor "26368,26368,26368"
lineWidth 2
)
xt "91988,87329,92988,87329"
)
oxt "6988,7329,7988,7329"
)
*205 (CommentGraphic
uid 7648,0
shape (PolyLine2D
pts [
"93000,87000"
"94000,87000"
]
uid 7649,0
layer 0
sl 0
va (VaSet
vasetType 1
transparent 1
fg "49152,49152,49152"
)
xt "93000,87000,94000,87000"
)
oxt "8000,7000,9000,7000"
)
*206 (CommentGraphic
uid 7650,0
shape (PolyLine2D
pts [
"91976,86730"
"92976,86730"
]
uid 7651,0
layer 8
sl 0
va (VaSet
vasetType 1
transparent 1
fg "49152,49152,49152"
lineColor "26368,26368,26368"
lineWidth 2
)
xt "91976,86730,92976,86730"
)
oxt "6976,6730,7976,6730"
)
]
shape (Rectangle
uid 7653,0
va (VaSet
vasetType 1
transparent 1
fg "0,65535,0"
lineColor "65535,65535,65535"
lineWidth -1
)
xt "91000,86000,94000,88000"
fos 1
)
showPorts 0
oxt "6000,6000,9000,8000"
ttg (MlTextGroup
uid 7654,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*207 (Text
uid 7655,0
va (VaSet
isHidden 1
font "arial,8,0"
)
xt "90350,83100,95150,84100"
st "moduleware"
blo "90350,83900"
)
*208 (Text
uid 7656,0
va (VaSet
font "arial,8,0"
)
xt "90350,84100,95050,85100"
st "assignment"
blo "90350,84900"
)
*209 (Text
uid 7657,0
va (VaSet
font "arial,8,0"
)
xt "90350,85100,91350,86100"
st "I3"
blo "90350,85900"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 7658,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 7659,0
text (MLText
uid 7660,0
va (VaSet
font "arial,8,0"
)
xt "86000,66400,86000,66400"
)
header ""
)
elements [
]
)
sed 1
awe 1
portVis (PortSigDisplay
disp 1
sN 0
sTC 0
selT 0
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
visOptions (mwParamsVisibilityOptions
)
)
*210 (Net
uid 8851,0
decl (Decl
n "drs_channel_id"
t "std_logic_vector"
b "(3 downto 0)"
o 75
suid 159,0
i "(others => '0')"
)
declText (MLText
uid 8852,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,64000,77000,64800"
st "SIGNAL drs_channel_id  : std_logic_vector(3 downto 0) := (others => '0')
"
)
)
*211 (Net
uid 9500,0
decl (Decl
n "CLK_50"
t "std_logic"
o 61
suid 163,0
)
declText (MLText
uid 9501,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,52800,57500,53600"
st "SIGNAL CLK_50          : std_logic
"
)
)
*212 (MWC
uid 10023,0
optionalChildren [
*213 (CptPort
uid 9995,0
optionalChildren [
*214 (Line
uid 9999,0
layer 5
sl 0
va (VaSet
vasetType 3
)
xt "43000,72000,44000,72000"
pts [
"43000,72000"
"44000,72000"
]
)
*215 (Property
uid 10000,0
pclass "_MW_GEOM_"
pname "fixed"
ptn "String"
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 9996,0
ro 270
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,65535"
)
xt "42250,71625,43000,72375"
)
tg (CPTG
uid 9997,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 9998,0
sl 0
va (VaSet
isHidden 1
font "arial,8,0"
)
xt "123669,199342,125469,200342"
st "dout"
blo "123669,200142"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dout"
t "std_logic"
o 59
suid 1,0
)
)
)
*216 (CptPort
uid 10001,0
optionalChildren [
*217 (Line
uid 10005,0
layer 5
sl 0
va (VaSet
vasetType 3
)
xt "48000,73000,49000,73000"
pts [
"49000,73000"
"48000,73000"
]
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 10002,0
ro 270
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,65535"
)
xt "49000,72625,49750,73375"
)
tg (CPTG
uid 10003,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10004,0
sl 0
va (VaSet
isHidden 1
font "arial,8,0"
)
xt "126635,200294,128435,201294"
st "din0"
ju 2
blo "128435,201094"
)
)
thePort (LogicalPort
decl (Decl
n "din0"
t "std_logic"
o 71
suid 2,0
i "'0'"
)
)
)
*218 (CptPort
uid 10006,0
optionalChildren [
*219 (Line
uid 10010,0
layer 5
sl 0
va (VaSet
vasetType 3
)
xt "48000,71000,49000,71000"
pts [
"49000,71000"
"48000,71000"
]
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 10007,0
ro 270
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,65535"
)
xt "49000,70625,49750,71375"
)
tg (CPTG
uid 10008,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10009,0
sl 0
va (VaSet
isHidden 1
font "arial,8,0"
)
xt "126750,198700,128550,199700"
st "din1"
ju 2
blo "128550,199500"
)
)
thePort (LogicalPort
decl (Decl
n "din1"
t "std_logic"
o 60
suid 3,0
)
)
)
*220 (CommentGraphic
uid 10011,0
optionalChildren [
*221 (Property
uid 10013,0
pclass "_MW_GEOM_"
pname "expand"
ptn "String"
)
]
shape (PolyLine2D
pts [
"48000,70000"
"48000,70000"
]
uid 10012,0
layer 0
sl 0
va (VaSet
vasetType 1
transparent 1
fg "49152,49152,49152"
)
xt "48000,70000,48000,70000"
)
oxt "11000,6000,11000,6000"
)
*222 (CommentGraphic
uid 10014,0
optionalChildren [
*223 (Property
uid 10016,0
pclass "_MW_GEOM_"
pname "expand"
ptn "String"
)
]
shape (PolyLine2D
pts [
"48000,74000"
"48000,74000"
]
uid 10015,0
layer 0
sl 0
va (VaSet
vasetType 1
transparent 1
fg "49152,49152,49152"
)
xt "48000,74000,48000,74000"
)
oxt "11000,10000,11000,10000"
)
*224 (Grouping
uid 10017,0
optionalChildren [
*225 (CommentGraphic
uid 10019,0
shape (PolyLine2D
pts [
"46000,70000"
"48000,70000"
"48000,74000"
"46000,74000"
]
uid 10020,0
layer 0
sl 0
va (VaSet
vasetType 1
fg "0,65535,65535"
lineColor "26368,26368,26368"
)
xt "46000,70000,48000,74000"
)
oxt "9000,6000,11000,10000"
)
*226 (CommentGraphic
uid 10021,0
shape (Arc2D
pts [
"46000,74000"
"44000,72000"
"46000,70000"
]
uid 10022,0
layer 0
sl 0
va (VaSet
vasetType 1
fg "0,65535,65535"
lineColor "26368,26368,26368"
)
xt "44000,70000,46000,74000"
)
oxt "7000,6000,9000,10000"
)
]
shape (GroupingShape
uid 10018,0
sl 0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 2
)
xt "44000,70000,48000,74000"
)
oxt "7000,6000,11000,10000"
)
]
shape (Rectangle
uid 10024,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
lineWidth -1
)
xt "43000,70000,49000,74000"
fos 1
)
showPorts 0
oxt "6000,6000,12000,10000"
ttg (MlTextGroup
uid 10025,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*227 (Text
uid 10026,0
va (VaSet
isHidden 1
font "arial,8,0"
)
xt "44500,72500,49300,73500"
st "moduleware"
blo "44500,73300"
)
*228 (Text
uid 10027,0
va (VaSet
font "arial,8,0"
)
xt "44500,73500,46100,74500"
st "and"
blo "44500,74300"
)
*229 (Text
uid 10028,0
va (VaSet
font "arial,8,0"
)
xt "44500,74500,45500,75500"
st "I0"
blo "44500,75300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 10029,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 10030,0
text (MLText
uid 10031,0
va (VaSet
font "arial,8,0"
)
xt "28000,61000,28000,61000"
)
header ""
)
elements [
]
)
sed 1
awe 1
portVis (PortSigDisplay
sN 0
sTC 0
selT 0
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
de 1
visOptions (mwParamsVisibilityOptions
)
)
*230 (Net
uid 10032,0
decl (Decl
n "CLK_25_PS1"
t "std_logic"
o 60
suid 164,0
)
declText (MLText
uid 10033,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,52000,57500,52800"
st "SIGNAL CLK_25_PS1      : std_logic
"
)
)
*231 (Net
uid 10050,0
decl (Decl
n "adc_clk_en"
t "std_logic"
o 71
suid 165,0
i "'0'"
)
declText (MLText
uid 10051,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,60800,71000,61600"
st "SIGNAL adc_clk_en      : std_logic                    := '0'
"
)
)
*232 (PortIoOut
uid 10296,0
shape (CompositeShape
uid 10297,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 10298,0
sl 0
ro 270
xt "132500,127625,134000,128375"
)
(Line
uid 10299,0
sl 0
ro 270
xt "132000,128000,132500,128000"
pts [
"132000,128000"
"132500,128000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 10300,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10301,0
va (VaSet
)
xt "135000,127500,137200,128500"
st "A0_T"
blo "135000,128300"
tm "WireNameMgr"
)
)
)
*233 (Net
uid 10308,0
decl (Decl
n "A0_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 17
suid 166,0
i "(others => '0')"
)
declText (MLText
uid 10309,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,16600,73500,17400"
st "A0_T            : std_logic_vector(7 DOWNTO 0) := (others => '0')
"
)
)
*234 (HdlText
uid 10310,0
optionalChildren [
*235 (EmbeddedText
uid 10316,0
commentText (CommentText
uid 10317,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 10318,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "105000,137000,123000,162000"
)
oxt "0,0,18000,5000"
text (MLText
uid 10319,0
va (VaSet
)
xt "105200,137200,117800,156200"
st "
-- eb3 9                          
A0_T(0) <= CLK50_OUT;
A0_T(1)  <= CLK25_OUT;
A0_T(2) <= CLK25_PSOUT;
A0_T(3) <= PS_DIR_IN;
A0_T(4) <= PS_DO_IN;
A0_T(5) <= PSINCDEC_OUT;
A0_T(6) <= PSEN_OUT;
A0_T(7) <= DCM_locked;

A1_T(0) <= ready;
A1_T(1) <= shifting;
A1_T(2) <= PSDONE_extraOUT;
A1_T(3) <= PSCLK_OUT;
A1_T(4) <= LOCKED_extraOUT;

A1_T(5) <= '0';
A1_T(6) <= '0';
A1_T(7) <= '0';
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 25000
visibleWidth 18000
)
)
)
]
shape (Rectangle
uid 10311,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "106000,122000,112000,136000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 10312,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*236 (Text
uid 10313,0
va (VaSet
font "Arial,8,1"
)
xt "109150,125000,110850,126000"
st "eb3"
blo "109150,125800"
tm "HdlTextNameMgr"
)
*237 (Text
uid 10314,0
va (VaSet
font "Arial,8,1"
)
xt "109150,126000,109950,127000"
st "9"
blo "109150,126800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 10315,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "106250,134250,107750,135750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*238 (Net
uid 10496,0
decl (Decl
n "CLK50_OUT"
t "std_logic"
o 58
suid 184,0
)
declText (MLText
uid 10497,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,50400,57500,51200"
st "SIGNAL CLK50_OUT       : std_logic
"
)
)
*239 (Net
uid 10504,0
decl (Decl
n "CLK25_OUT"
t "std_logic"
o 56
suid 185,0
)
declText (MLText
uid 10505,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,48800,57500,49600"
st "SIGNAL CLK25_OUT       : std_logic
"
)
)
*240 (Net
uid 10512,0
decl (Decl
n "CLK25_PSOUT"
t "std_logic"
o 57
suid 186,0
)
declText (MLText
uid 10513,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,49600,57500,50400"
st "SIGNAL CLK25_PSOUT     : std_logic
"
)
)
*241 (Net
uid 10520,0
decl (Decl
n "PS_DIR_IN"
t "std_logic"
o 68
suid 187,0
)
declText (MLText
uid 10521,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,58400,57500,59200"
st "SIGNAL PS_DIR_IN       : std_logic
"
)
)
*242 (Net
uid 10528,0
decl (Decl
n "PS_DO_IN"
t "std_logic"
o 69
suid 188,0
)
declText (MLText
uid 10529,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,59200,57500,60000"
st "SIGNAL PS_DO_IN        : std_logic
"
)
)
*243 (Net
uid 10536,0
decl (Decl
n "PSEN_OUT"
t "std_logic"
o 66
suid 189,0
)
declText (MLText
uid 10537,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,56800,57500,57600"
st "SIGNAL PSEN_OUT        : std_logic
"
)
)
*244 (Net
uid 10544,0
decl (Decl
n "PSINCDEC_OUT"
t "std_logic"
o 67
suid 190,0
)
declText (MLText
uid 10545,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,57600,57500,58400"
st "SIGNAL PSINCDEC_OUT    : std_logic
"
)
)
*245 (Net
uid 10552,0
decl (Decl
n "DCM_locked"
t "std_logic"
preAdd 0
posAdd 0
o 62
suid 191,0
)
declText (MLText
uid 10553,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,53600,57500,54400"
st "SIGNAL DCM_locked      : std_logic
"
)
)
*246 (Net
uid 10560,0
decl (Decl
n "ready"
t "std_logic"
preAdd 0
posAdd 0
o 77
suid 192,0
i "'0'"
)
declText (MLText
uid 10561,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,65600,71000,66400"
st "SIGNAL ready           : std_logic                    := '0'
"
)
)
*247 (Net
uid 10568,0
decl (Decl
n "shifting"
t "std_logic"
prec "-- status:"
preAdd 0
posAdd 0
o 79
suid 193,0
i "'0'"
)
declText (MLText
uid 10569,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,67200,71000,68800"
st "-- status:
SIGNAL shifting        : std_logic                    := '0'
"
)
)
*248 (Net
uid 10576,0
decl (Decl
n "PSDONE_extraOUT"
t "std_logic"
o 65
suid 194,0
)
declText (MLText
uid 10577,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,56000,57500,56800"
st "SIGNAL PSDONE_extraOUT : std_logic
"
)
)
*249 (Net
uid 10584,0
decl (Decl
n "PSCLK_OUT"
t "std_logic"
o 64
suid 195,0
)
declText (MLText
uid 10585,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,55200,57500,56000"
st "SIGNAL PSCLK_OUT       : std_logic
"
)
)
*250 (Net
uid 10592,0
decl (Decl
n "LOCKED_extraOUT"
t "std_logic"
o 63
suid 196,0
)
declText (MLText
uid 10593,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,54400,57500,55200"
st "SIGNAL LOCKED_extraOUT : std_logic
"
)
)
*251 (PortIoIn
uid 11090,0
shape (CompositeShape
uid 11091,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 11092,0
sl 0
ro 270
xt "94000,102625,95500,103375"
)
(Line
uid 11093,0
sl 0
ro 270
xt "95500,103000,96000,103000"
pts [
"95500,103000"
"96000,103000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 11094,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11095,0
va (VaSet
)
xt "87700,102500,93000,103500"
st "RS485_C_DI"
ju 2
blo "93000,103300"
tm "WireNameMgr"
)
)
)
*252 (Net
uid 11102,0
decl (Decl
n "RS485_C_DI"
t "std_logic"
o 11
suid 197,0
)
declText (MLText
uid 11103,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,11800,54000,12600"
st "RS485_C_DI      : std_logic
"
)
)
*253 (PortIoOut
uid 11104,0
shape (CompositeShape
uid 11105,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 11106,0
sl 0
ro 270
xt "111500,111625,113000,112375"
)
(Line
uid 11107,0
sl 0
ro 270
xt "111000,112000,111500,112000"
pts [
"111000,112000"
"111500,112000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 11108,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11109,0
va (VaSet
)
xt "114000,111500,119700,112500"
st "RS485_C_DO"
blo "114000,112300"
tm "WireNameMgr"
)
)
)
*254 (Net
uid 11116,0
decl (Decl
n "RS485_C_DO"
t "std_logic"
o 37
suid 198,0
)
declText (MLText
uid 11117,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,32600,54000,33400"
st "RS485_C_DO      : std_logic
"
)
)
*255 (PortIoIn
uid 11508,0
shape (CompositeShape
uid 11509,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 11510,0
sl 0
ro 270
xt "121000,115625,122500,116375"
)
(Line
uid 11511,0
sl 0
ro 270
xt "122500,116000,123000,116000"
pts [
"122500,116000"
"123000,116000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 11512,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11513,0
va (VaSet
)
xt "114800,115500,120000,116500"
st "RS485_E_DI"
ju 2
blo "120000,116300"
tm "WireNameMgr"
)
)
)
*256 (Net
uid 11520,0
decl (Decl
n "RS485_E_DI"
t "std_logic"
o 12
suid 200,0
)
declText (MLText
uid 11521,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,12600,54000,13400"
st "RS485_E_DI      : std_logic
"
)
)
*257 (Net
uid 11534,0
decl (Decl
n "RS485_E_DO"
t "std_logic"
o 13
suid 201,0
)
declText (MLText
uid 11535,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,13400,54000,14200"
st "RS485_E_DO      : std_logic
"
)
)
*258 (PortIoIn
uid 11922,0
shape (CompositeShape
uid 11923,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 11924,0
sl 0
ro 90
xt "126500,113625,128000,114375"
)
(Line
uid 11925,0
sl 0
ro 90
xt "126000,114000,126500,114000"
pts [
"126500,114000"
"126000,114000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 11926,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11927,0
va (VaSet
)
xt "129000,113500,134600,114500"
st "RS485_E_DO"
blo "129000,114300"
tm "WireNameMgr"
)
)
)
*259 (PortIoOut
uid 12326,0
shape (CompositeShape
uid 12327,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 12328,0
sl 0
ro 270
xt "87500,139625,89000,140375"
)
(Line
uid 12329,0
sl 0
ro 270
xt "87000,140000,87500,140000"
pts [
"87000,140000"
"87500,140000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 12330,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12331,0
va (VaSet
)
xt "89000,139500,91300,140500"
st "SRIN"
blo "89000,140300"
tm "WireNameMgr"
)
)
)
*260 (Net
uid 12334,0
decl (Decl
n "SRIN"
t "std_logic"
o 42
suid 203,0
i "'0'"
)
declText (MLText
uid 12335,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,36600,67500,37400"
st "SRIN            : std_logic                    := '0'
"
)
)
*261 (PortIoOut
uid 12539,0
shape (CompositeShape
uid 12540,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 12541,0
sl 0
ro 270
xt "87500,140625,89000,141375"
)
(Line
uid 12542,0
sl 0
ro 270
xt "87000,141000,87500,141000"
pts [
"87000,141000"
"87500,141000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 12543,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12544,0
va (VaSet
)
xt "90000,140500,95100,141500"
st "AMBER_LED"
blo "90000,141300"
tm "WireNameMgr"
)
)
)
*262 (PortIoOut
uid 12553,0
shape (CompositeShape
uid 12554,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 12555,0
sl 0
ro 270
xt "87500,141625,89000,142375"
)
(Line
uid 12556,0
sl 0
ro 270
xt "87000,142000,87500,142000"
pts [
"87000,142000"
"87500,142000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 12557,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12558,0
va (VaSet
)
xt "90000,141500,95100,142500"
st "GREEN_LED"
blo "90000,142300"
tm "WireNameMgr"
)
)
)
*263 (PortIoOut
uid 12567,0
shape (CompositeShape
uid 12568,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 12569,0
sl 0
ro 270
xt "87500,142625,89000,143375"
)
(Line
uid 12570,0
sl 0
ro 270
xt "87000,143000,87500,143000"
pts [
"87000,143000"
"87500,143000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 12571,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12572,0
va (VaSet
)
xt "90000,142500,94000,143500"
st "RED_LED"
blo "90000,143300"
tm "WireNameMgr"
)
)
)
*264 (Net
uid 12762,0
decl (Decl
n "AMBER_LED"
t "std_logic"
o 31
suid 207,0
)
declText (MLText
uid 12763,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,18200,54000,19000"
st "AMBER_LED       : std_logic
"
)
)
*265 (Net
uid 12764,0
decl (Decl
n "GREEN_LED"
t "std_logic"
o 32
suid 208,0
)
declText (MLText
uid 12765,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,28600,54000,29400"
st "GREEN_LED       : std_logic
"
)
)
*266 (Net
uid 12766,0
decl (Decl
n "RED_LED"
t "std_logic"
o 33
suid 209,0
)
declText (MLText
uid 12767,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,31000,54000,31800"
st "RED_LED         : std_logic
"
)
)
*267 (Wire
uid 245,0
shape (OrthoPolyLine
uid 246,0
va (VaSet
vasetType 3
)
xt "21000,68000,51250,68000"
pts [
"51250,68000"
"21000,68000"
]
)
start &27
end &67
ss 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 249,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 250,0
va (VaSet
isHidden 1
)
xt "53250,67000,56050,68000"
st "X_50M"
blo "53250,67800"
tm "WireNameMgr"
)
)
on &88
)
*268 (Wire
uid 277,0
shape (OrthoPolyLine
uid 278,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "32000,81000,51250,81000"
pts [
"51250,81000"
"32000,81000"
]
)
start &17
end &68
sat 32
eat 2
sty 1
st 0
sf 1
si 0
tg (WTG
uid 281,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 282,0
va (VaSet
)
xt "44000,80000,49900,81000"
st "board_id : (3:0)"
blo "44000,80800"
tm "WireNameMgr"
)
)
on &72
)
*269 (Wire
uid 285,0
shape (OrthoPolyLine
uid 286,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "32000,82000,51250,82000"
pts [
"51250,82000"
"32000,82000"
]
)
start &18
end &68
sat 32
eat 2
sty 1
st 0
sf 1
si 0
tg (WTG
uid 289,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 290,0
va (VaSet
)
xt "45000,81000,50700,82000"
st "crate_id : (1:0)"
blo "45000,81800"
tm "WireNameMgr"
)
)
on &73
)
*270 (Wire
uid 362,0
shape (OrthoPolyLine
uid 363,0
va (VaSet
vasetType 3
)
xt "21000,90000,51250,90000"
pts [
"21000,90000"
"51250,90000"
]
)
start &96
end &16
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 364,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 365,0
va (VaSet
isHidden 1
)
xt "22000,89000,25600,90000"
st "OE_ADC"
blo "22000,89800"
tm "WireNameMgr"
)
)
on &97
)
*271 (Wire
uid 418,0
shape (OrthoPolyLine
uid 419,0
va (VaSet
vasetType 3
)
xt "80750,71000,111000,71000"
pts [
"80750,71000"
"111000,71000"
]
)
start &13
end &74
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 422,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 423,0
va (VaSet
isHidden 1
)
xt "82000,70000,85100,71000"
st "W_RES"
blo "82000,70800"
tm "WireNameMgr"
)
)
on &149
)
*272 (Wire
uid 426,0
shape (OrthoPolyLine
uid 427,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,68000,111000,68000"
pts [
"80750,68000"
"111000,68000"
]
)
start &19
end &75
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 430,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 431,0
va (VaSet
isHidden 1
)
xt "82000,67000,84000,68000"
st "W_A"
blo "82000,67800"
tm "WireNameMgr"
)
)
on &147
)
*273 (Wire
uid 434,0
shape (OrthoPolyLine
uid 435,0
va (VaSet
vasetType 3
)
xt "80750,75000,111000,75000"
pts [
"80750,75000"
"111000,75000"
]
)
start &20
end &76
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 438,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 439,0
va (VaSet
isHidden 1
)
xt "82000,74000,84600,75000"
st "W_CS"
blo "82000,74800"
tm "WireNameMgr"
)
)
on &153
)
*274 (Wire
uid 442,0
shape (OrthoPolyLine
uid 443,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,69000,111000,69000"
pts [
"80750,69000"
"111000,69000"
]
)
start &21
end &77
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 446,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 447,0
va (VaSet
isHidden 1
)
xt "82000,68000,84100,69000"
st "W_D"
blo "82000,68800"
tm "WireNameMgr"
)
)
on &148
)
*275 (Wire
uid 450,0
shape (OrthoPolyLine
uid 451,0
va (VaSet
vasetType 3
)
xt "80750,74000,111000,74000"
pts [
"111000,74000"
"80750,74000"
]
)
start &78
end &22
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 454,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 455,0
va (VaSet
isHidden 1
)
xt "82000,73000,84800,74000"
st "W_INT"
blo "82000,73800"
tm "WireNameMgr"
)
)
on &152
)
*276 (Wire
uid 458,0
shape (OrthoPolyLine
uid 459,0
va (VaSet
vasetType 3
)
xt "80750,72000,111000,72000"
pts [
"80750,72000"
"111000,72000"
]
)
start &23
end &79
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 462,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 463,0
va (VaSet
isHidden 1
)
xt "82000,71000,84700,72000"
st "W_RD"
blo "82000,71800"
tm "WireNameMgr"
)
)
on &150
)
*277 (Wire
uid 466,0
shape (OrthoPolyLine
uid 467,0
va (VaSet
vasetType 3
)
xt "80750,73000,111000,73000"
pts [
"80750,73000"
"111000,73000"
]
)
start &24
end &80
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 470,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 471,0
va (VaSet
isHidden 1
)
xt "82000,72000,84800,73000"
st "W_WR"
blo "82000,72800"
tm "WireNameMgr"
)
)
on &151
)
*278 (Wire
uid 1467,0
shape (OrthoPolyLine
uid 1468,0
va (VaSet
vasetType 3
)
xt "32000,95000,51250,95000"
pts [
"32000,95000"
"51250,95000"
]
)
start &100
end &28
sat 2
eat 32
st 0
sf 1
si 0
tg (WTG
uid 1471,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1472,0
va (VaSet
)
xt "34000,94000,39900,95000"
st "adc_data_array"
blo "34000,94800"
tm "WireNameMgr"
)
)
on &81
)
*279 (Wire
uid 1730,0
shape (OrthoPolyLine
uid 1731,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,89000,51250,89000"
pts [
"21000,89000"
"51250,89000"
]
)
start &98
end &29
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1734,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1735,0
va (VaSet
isHidden 1
)
xt "22000,88000,25000,89000"
st "A_OTR"
blo "22000,88800"
tm "WireNameMgr"
)
)
on &99
)
*280 (Wire
uid 1833,0
shape (OrthoPolyLine
uid 1834,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "12000,126000,21000,126000"
pts [
"21000,126000"
"12000,126000"
]
)
start &190
end &128
sat 2
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1837,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1838,0
va (VaSet
isHidden 1
)
xt "13000,125000,14900,126000"
st "D_A"
blo "13000,125800"
tm "WireNameMgr"
)
)
on &129
)
*281 (Wire
uid 1841,0
shape (OrthoPolyLine
uid 1842,0
va (VaSet
vasetType 3
)
xt "21000,110000,51250,110000"
pts [
"51250,110000"
"21000,110000"
]
)
start &31
end &130
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1845,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1846,0
va (VaSet
isHidden 1
)
xt "22000,109000,25500,110000"
st "DWRITE"
blo "22000,109800"
tm "WireNameMgr"
)
)
on &131
)
*282 (Wire
uid 1865,0
shape (OrthoPolyLine
uid 1866,0
va (VaSet
vasetType 3
)
xt "21000,105000,51250,105000"
pts [
"21000,105000"
"51250,105000"
]
)
start &120
end &32
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1869,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1870,0
va (VaSet
isHidden 1
)
xt "22000,104000,26600,105000"
st "D0_SROUT"
blo "22000,104800"
tm "WireNameMgr"
)
)
on &124
)
*283 (Wire
uid 1873,0
shape (OrthoPolyLine
uid 1874,0
va (VaSet
vasetType 3
)
xt "21000,106000,51250,106000"
pts [
"21000,106000"
"51250,106000"
]
)
start &121
end &33
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1877,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1878,0
va (VaSet
isHidden 1
)
xt "22000,105000,26600,106000"
st "D1_SROUT"
blo "22000,105800"
tm "WireNameMgr"
)
)
on &125
)
*284 (Wire
uid 1881,0
shape (OrthoPolyLine
uid 1882,0
va (VaSet
vasetType 3
)
xt "21000,107000,51250,107000"
pts [
"21000,107000"
"51250,107000"
]
)
start &122
end &34
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1885,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1886,0
va (VaSet
isHidden 1
)
xt "22000,106000,26600,107000"
st "D2_SROUT"
blo "22000,106800"
tm "WireNameMgr"
)
)
on &126
)
*285 (Wire
uid 1889,0
shape (OrthoPolyLine
uid 1890,0
va (VaSet
vasetType 3
)
xt "21000,108000,51250,108000"
pts [
"21000,108000"
"51250,108000"
]
)
start &123
end &35
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1893,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1894,0
va (VaSet
isHidden 1
)
xt "22000,107000,26600,108000"
st "D3_SROUT"
blo "22000,107800"
tm "WireNameMgr"
)
)
on &127
)
*286 (Wire
uid 2409,0
shape (OrthoPolyLine
uid 2410,0
va (VaSet
vasetType 3
)
xt "21000,111000,51250,111000"
pts [
"51250,111000"
"21000,111000"
]
)
start &36
end &83
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 2413,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2414,0
va (VaSet
isHidden 1
)
xt "22000,110000,26200,111000"
st "RSRLOAD"
blo "22000,110800"
tm "WireNameMgr"
)
)
on &82
)
*287 (Wire
uid 2423,0
shape (OrthoPolyLine
uid 2424,0
va (VaSet
vasetType 3
)
xt "32000,113000,51250,113000"
pts [
"51250,113000"
"32000,113000"
]
)
start &37
end &112
sat 32
eat 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 2427,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2428,0
va (VaSet
isHidden 1
)
xt "66250,109000,69250,110000"
st "SRCLK"
blo "66250,109800"
tm "WireNameMgr"
)
)
on &84
)
*288 (Wire
uid 3009,0
shape (OrthoPolyLine
uid 3010,0
va (VaSet
vasetType 3
)
xt "80750,98000,111000,98000"
pts [
"80750,98000"
"111000,98000"
]
)
start &39
end &145
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3011,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3012,0
va (VaSet
isHidden 1
)
xt "82000,97000,84800,98000"
st "S_CLK"
blo "82000,97800"
tm "WireNameMgr"
)
)
on &146
)
*289 (Wire
uid 3015,0
shape (OrthoPolyLine
uid 3016,0
va (VaSet
vasetType 3
)
xt "80750,99000,111000,99000"
pts [
"80750,99000"
"111000,99000"
]
)
start &41
end &154
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3017,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3018,0
va (VaSet
isHidden 1
)
xt "82750,98000,85150,99000"
st "MISO"
blo "82750,98800"
tm "WireNameMgr"
)
)
on &157
)
*290 (Wire
uid 3021,0
shape (OrthoPolyLine
uid 3022,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,89000,100000,89000"
pts [
"80750,89000"
"100000,89000"
]
)
start &40
end &133
sat 32
eat 1
sty 1
st 0
sf 1
si 0
tg (WTG
uid 3023,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3024,0
va (VaSet
)
xt "92000,88000,98500,89000"
st "sensor_cs : (3:0)"
blo "92000,88800"
tm "WireNameMgr"
)
)
on &85
)
*291 (Wire
uid 3027,0
shape (OrthoPolyLine
uid 3028,0
va (VaSet
vasetType 3
)
xt "94000,87000,111000,87000"
pts [
"94000,87000"
"111000,87000"
]
)
start &200
end &132
ss 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3031,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3032,0
va (VaSet
isHidden 1
)
xt "95000,86000,98600,87000"
st "DAC_CS"
blo "95000,86800"
tm "WireNameMgr"
)
)
on &86
)
*292 (Wire
uid 3218,0
shape (OrthoPolyLine
uid 3219,0
va (VaSet
vasetType 3
)
xt "22000,78000,51250,78000"
pts [
"22000,78000"
"51250,78000"
]
)
start &66
end &15
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3220,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3221,0
va (VaSet
isHidden 1
)
xt "33000,77000,35100,78000"
st "TRG"
blo "33000,77800"
tm "WireNameMgr"
)
)
on &89
)
*293 (Wire
uid 3260,0
shape (OrthoPolyLine
uid 3261,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,70000,24000,70000"
pts [
"21000,70000"
"24000,70000"
]
)
start &87
end &90
sat 32
eat 2
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3264,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3265,0
va (VaSet
isHidden 1
)
xt "23000,69000,25800,70000"
st "A_CLK"
blo "23000,69800"
tm "WireNameMgr"
)
)
on &94
)
*294 (Wire
uid 3270,0
shape (OrthoPolyLine
uid 3271,0
va (VaSet
vasetType 3
)
xt "29000,70000,43000,72000"
pts [
"43000,72000"
"43000,70000"
"32000,70000"
"29000,70000"
]
)
start &213
end &90
sat 32
eat 1
st 0
sf 1
si 0
tg (WTG
uid 3274,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3275,0
va (VaSet
)
xt "35000,69000,39500,70000"
st "CLK_25_PS"
blo "35000,69800"
tm "WireNameMgr"
)
)
on &95
)
*295 (Wire
uid 3318,0
shape (OrthoPolyLine
uid 3319,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,95000,24000,95000"
pts [
"21000,95000"
"24000,95000"
]
)
start &104
end &100
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3322,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3323,0
va (VaSet
isHidden 1
)
xt "23000,94000,25300,95000"
st "A0_D"
blo "23000,94800"
tm "WireNameMgr"
)
)
on &108
)
*296 (Wire
uid 3352,0
shape (OrthoPolyLine
uid 3353,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,96000,24000,96000"
pts [
"21000,96000"
"24000,96000"
]
)
start &105
end &100
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3356,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3357,0
va (VaSet
isHidden 1
)
xt "23000,95000,25300,96000"
st "A1_D"
blo "23000,95800"
tm "WireNameMgr"
)
)
on &109
)
*297 (Wire
uid 3360,0
shape (OrthoPolyLine
uid 3361,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,97000,24000,97000"
pts [
"21000,97000"
"24000,97000"
]
)
start &106
end &100
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3364,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3365,0
va (VaSet
isHidden 1
)
xt "23000,96000,25300,97000"
st "A2_D"
blo "23000,96800"
tm "WireNameMgr"
)
)
on &110
)
*298 (Wire
uid 3368,0
shape (OrthoPolyLine
uid 3369,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,98000,24000,98000"
pts [
"21000,98000"
"24000,98000"
]
)
start &107
end &100
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3372,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3373,0
va (VaSet
isHidden 1
)
xt "23000,97000,25300,98000"
st "A3_D"
blo "23000,97800"
tm "WireNameMgr"
)
)
on &111
)
*299 (Wire
uid 3430,0
shape (OrthoPolyLine
uid 3431,0
va (VaSet
vasetType 3
)
xt "21000,113000,24000,113000"
pts [
"21000,113000"
"24000,113000"
]
)
start &176
end &112
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3434,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3435,0
va (VaSet
isHidden 1
)
xt "23000,112000,27400,113000"
st "D0_SRCLK"
blo "23000,112800"
tm "WireNameMgr"
)
)
on &116
)
*300 (Wire
uid 3438,0
shape (OrthoPolyLine
uid 3439,0
va (VaSet
vasetType 3
)
xt "21000,114000,24000,114000"
pts [
"21000,114000"
"24000,114000"
]
)
start &177
end &112
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3442,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3443,0
va (VaSet
isHidden 1
)
xt "23000,113000,27400,114000"
st "D1_SRCLK"
blo "23000,113800"
tm "WireNameMgr"
)
)
on &117
)
*301 (Wire
uid 3446,0
shape (OrthoPolyLine
uid 3447,0
va (VaSet
vasetType 3
)
xt "21000,115000,24000,115000"
pts [
"21000,115000"
"24000,115000"
]
)
start &178
end &112
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3450,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3451,0
va (VaSet
isHidden 1
)
xt "23000,114000,27400,115000"
st "D2_SRCLK"
blo "23000,114800"
tm "WireNameMgr"
)
)
on &118
)
*302 (Wire
uid 3454,0
shape (OrthoPolyLine
uid 3455,0
va (VaSet
vasetType 3
)
xt "21000,116000,24000,116000"
pts [
"21000,116000"
"24000,116000"
]
)
start &179
end &112
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3458,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3459,0
va (VaSet
isHidden 1
)
xt "23000,115000,27400,116000"
st "D3_SRCLK"
blo "23000,115800"
tm "WireNameMgr"
)
)
on &119
)
*303 (Wire
uid 3574,0
shape (OrthoPolyLine
uid 3575,0
va (VaSet
vasetType 3
)
xt "108000,89000,111000,89000"
pts [
"111000,89000"
"108000,89000"
]
)
start &137
end &133
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3578,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3579,0
va (VaSet
isHidden 1
)
xt "108000,88000,110800,89000"
st "T0_CS"
blo "108000,88800"
tm "WireNameMgr"
)
)
on &141
)
*304 (Wire
uid 3582,0
shape (OrthoPolyLine
uid 3583,0
va (VaSet
vasetType 3
)
xt "108000,90000,111000,90000"
pts [
"111000,90000"
"108000,90000"
]
)
start &138
end &133
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3586,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3587,0
va (VaSet
isHidden 1
)
xt "108000,89000,110800,90000"
st "T1_CS"
blo "108000,89800"
tm "WireNameMgr"
)
)
on &142
)
*305 (Wire
uid 3590,0
shape (OrthoPolyLine
uid 3591,0
va (VaSet
vasetType 3
)
xt "108000,91000,111000,91000"
pts [
"111000,91000"
"108000,91000"
]
)
start &139
end &133
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3594,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3595,0
va (VaSet
isHidden 1
)
xt "108000,90000,110800,91000"
st "T2_CS"
blo "108000,90800"
tm "WireNameMgr"
)
)
on &143
)
*306 (Wire
uid 3598,0
shape (OrthoPolyLine
uid 3599,0
va (VaSet
vasetType 3
)
xt "108000,92000,111000,92000"
pts [
"111000,92000"
"108000,92000"
]
)
start &140
end &133
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3602,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3603,0
va (VaSet
isHidden 1
)
xt "108000,91000,110800,92000"
st "T3_CS"
blo "108000,91800"
tm "WireNameMgr"
)
)
on &144
)
*307 (Wire
uid 3682,0
shape (OrthoPolyLine
uid 3683,0
va (VaSet
vasetType 3
)
xt "80750,100000,111000,100000"
pts [
"80750,100000"
"111000,100000"
]
)
start &42
end &156
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3686,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3687,0
va (VaSet
isHidden 1
)
xt "82000,99000,84400,100000"
st "MOSI"
blo "82000,99800"
tm "WireNameMgr"
)
)
on &155
)
*308 (Wire
uid 3778,0
shape (OrthoPolyLine
uid 3779,0
va (VaSet
vasetType 3
)
xt "108000,103000,111000,103000"
pts [
"111000,103000"
"108000,103000"
]
)
start &162
end &158
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3782,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3783,0
va (VaSet
isHidden 1
)
xt "108000,102000,111000,103000"
st "TRG_V"
blo "108000,102800"
tm "WireNameMgr"
)
)
on &169
)
*309 (Wire
uid 3786,0
shape (OrthoPolyLine
uid 3787,0
va (VaSet
vasetType 3
)
xt "108000,104000,111000,104000"
pts [
"111000,104000"
"108000,104000"
]
)
start &163
end &158
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3790,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3791,0
va (VaSet
isHidden 1
)
xt "108000,103000,113600,104000"
st "RS485_C_RE"
blo "108000,103800"
tm "WireNameMgr"
)
)
on &170
)
*310 (Wire
uid 3794,0
shape (OrthoPolyLine
uid 3795,0
va (VaSet
vasetType 3
)
xt "108000,105000,111000,105000"
pts [
"111000,105000"
"108000,105000"
]
)
start &164
end &158
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3798,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3799,0
va (VaSet
isHidden 1
)
xt "108000,104000,113600,105000"
st "RS485_C_DE"
blo "108000,104800"
tm "WireNameMgr"
)
)
on &171
)
*311 (Wire
uid 3802,0
shape (OrthoPolyLine
uid 3803,0
va (VaSet
vasetType 3
)
xt "108000,106000,111000,106000"
pts [
"111000,106000"
"108000,106000"
]
)
start &165
end &158
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3806,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3807,0
va (VaSet
isHidden 1
)
xt "108000,105000,113500,106000"
st "RS485_E_RE"
blo "108000,105800"
tm "WireNameMgr"
)
)
on &172
)
*312 (Wire
uid 3810,0
shape (OrthoPolyLine
uid 3811,0
va (VaSet
vasetType 3
)
xt "108000,107000,111000,107000"
pts [
"111000,107000"
"108000,107000"
]
)
start &166
end &158
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3814,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3815,0
va (VaSet
isHidden 1
)
xt "108000,106000,113500,107000"
st "RS485_E_DE"
blo "108000,106800"
tm "WireNameMgr"
)
)
on &173
)
*313 (Wire
uid 3834,0
shape (OrthoPolyLine
uid 3835,0
va (VaSet
vasetType 3
)
xt "108000,110000,111000,110000"
pts [
"111000,110000"
"108000,110000"
]
)
start &168
end &158
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3838,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3839,0
va (VaSet
isHidden 1
)
xt "108000,109000,110900,110000"
st "EE_CS"
blo "108000,109800"
tm "WireNameMgr"
)
)
on &175
)
*314 (Wire
uid 4942,0
shape (OrthoPolyLine
uid 4943,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,120000,111000,120000"
pts [
"80750,120000"
"111000,120000"
]
)
start &14
end &180
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 4948,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4949,0
va (VaSet
isHidden 1
)
xt "82750,117000,84650,118000"
st "D_T"
blo "82750,117800"
tm "WireNameMgr"
)
)
on &181
)
*315 (Wire
uid 6431,0
shape (OrthoPolyLine
uid 6432,0
va (VaSet
vasetType 3
)
xt "80750,121000,111000,121000"
pts [
"80750,121000"
"111000,121000"
]
)
start &43
end &167
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 6435,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6436,0
va (VaSet
isHidden 1
)
xt "92000,120000,96000,121000"
st "DENABLE"
blo "92000,120800"
tm "WireNameMgr"
)
)
on &174
)
*316 (Wire
uid 6787,0
shape (OrthoPolyLine
uid 6788,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "59000,157000,65000,157000"
pts [
"59000,157000"
"65000,157000"
]
)
start &182
end &186
sat 32
eat 1
sty 1
st 0
sf 1
si 0
tg (WTG
uid 6791,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6792,0
va (VaSet
isHidden 1
)
xt "61000,156000,67800,157000"
st "D_PLLLCK : (3:0)"
blo "61000,156800"
tm "WireNameMgr"
)
)
on &183
)
*317 (Wire
uid 6880,0
shape (OrthoPolyLine
uid 6881,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "68000,157000,75000,157000"
pts [
"68000,157000"
"75000,157000"
]
)
start &186
end &184
sat 2
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 6884,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6885,0
va (VaSet
isHidden 1
)
xt "70000,156000,74900,157000"
st "D_T2 : (3:0)"
blo "70000,156800"
tm "WireNameMgr"
)
)
on &185
)
*318 (Wire
uid 7144,0
shape (OrthoPolyLine
uid 7145,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "122000,126000,132000,126000"
pts [
"122000,126000"
"132000,126000"
]
)
end &194
sat 16
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 7148,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 7149,0
va (VaSet
isHidden 1
)
xt "124000,125000,128800,126000"
st "A1_T : (7:0)"
blo "124000,125800"
tm "WireNameMgr"
)
)
on &195
)
*319 (Wire
uid 7477,0
shape (OrthoPolyLine
uid 7478,0
va (VaSet
vasetType 3
)
xt "80750,87000,91000,87000"
pts [
"80750,87000"
"91000,87000"
]
)
start &38
end &198
es 0
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 7483,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 7484,0
va (VaSet
)
xt "83000,86000,85700,87000"
st "dummy"
blo "83000,86800"
tm "WireNameMgr"
)
)
on &196
)
*320 (Wire
uid 8853,0
shape (OrthoPolyLine
uid 8854,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "18000,109000,51250,124000"
pts [
"51250,109000"
"18000,109000"
"18000,124000"
"21000,124000"
]
)
start &30
end &190
sat 32
eat 1
sty 1
st 0
sf 1
si 0
tg (WTG
uid 8857,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 8858,0
va (VaSet
)
xt "42000,108000,50500,109000"
st "drs_channel_id : (3:0)"
blo "42000,108800"
tm "WireNameMgr"
)
)
on &210
)
*321 (Wire
uid 9502,0
shape (OrthoPolyLine
uid 9503,0
va (VaSet
vasetType 3
)
xt "46000,69000,51250,69000"
pts [
"51250,69000"
"46000,69000"
]
)
start &26
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 9506,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 9507,0
va (VaSet
)
xt "47000,68000,50100,69000"
st "CLK_50"
blo "47000,68800"
tm "WireNameMgr"
)
)
on &211
)
*322 (Wire
uid 10034,0
shape (OrthoPolyLine
uid 10035,0
va (VaSet
vasetType 3
)
xt "49000,70000,51250,71000"
pts [
"51250,70000"
"49000,70000"
"49000,71000"
]
)
start &25
end &218
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 10036,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10037,0
va (VaSet
isHidden 1
)
xt "45250,69000,50550,70000"
st "CLK_25_PS1"
blo "45250,69800"
tm "WireNameMgr"
)
)
on &230
)
*323 (Wire
uid 10052,0
shape (OrthoPolyLine
uid 10053,0
va (VaSet
vasetType 3
)
xt "49000,73000,51250,73000"
pts [
"51250,73000"
"49000,73000"
]
)
start &44
end &216
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 10054,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10055,0
va (VaSet
isHidden 1
)
xt "47000,72000,51500,73000"
st "adc_clk_en"
blo "47000,72800"
tm "WireNameMgr"
)
)
on &231
)
*324 (Wire
uid 10302,0
shape (OrthoPolyLine
uid 10303,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "122000,128000,132000,128000"
pts [
"122000,128000"
"132000,128000"
]
)
end &232
sat 16
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 10306,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10307,0
va (VaSet
isHidden 1
)
xt "124000,127000,128800,128000"
st "A0_T : (7:0)"
blo "124000,127800"
tm "WireNameMgr"
)
)
on &233
)
*325 (Wire
uid 10452,0
shape (OrthoPolyLine
uid 10453,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "112000,126000,122000,126000"
pts [
"112000,126000"
"122000,126000"
]
)
start &234
sat 2
eat 16
sty 1
st 0
sf 1
si 0
tg (WTG
uid 10458,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10459,0
va (VaSet
)
xt "114000,125000,118800,126000"
st "A0_T : (7:0)"
blo "114000,125800"
tm "WireNameMgr"
)
)
on &233
)
*326 (Wire
uid 10460,0
shape (OrthoPolyLine
uid 10461,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "112000,127000,122000,127000"
pts [
"112000,127000"
"122000,127000"
]
)
start &234
sat 2
eat 16
sty 1
st 0
sf 1
si 0
tg (WTG
uid 10466,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10467,0
va (VaSet
)
xt "114000,126000,118800,127000"
st "A1_T : (7:0)"
blo "114000,126800"
tm "WireNameMgr"
)
)
on &195
)
*327 (Wire
uid 10498,0
shape (OrthoPolyLine
uid 10499,0
va (VaSet
vasetType 3
)
xt "80750,123000,88000,123000"
pts [
"80750,123000"
"88000,123000"
]
)
start &58
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10502,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10503,0
va (VaSet
)
xt "82000,122000,86800,123000"
st "CLK50_OUT"
blo "82000,122800"
tm "WireNameMgr"
)
)
on &238
)
*328 (Wire
uid 10506,0
shape (OrthoPolyLine
uid 10507,0
va (VaSet
vasetType 3
)
xt "80750,124000,88000,124000"
pts [
"80750,124000"
"88000,124000"
]
)
start &56
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10510,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10511,0
va (VaSet
)
xt "82000,123000,86800,124000"
st "CLK25_OUT"
blo "82000,123800"
tm "WireNameMgr"
)
)
on &239
)
*329 (Wire
uid 10514,0
shape (OrthoPolyLine
uid 10515,0
va (VaSet
vasetType 3
)
xt "80750,125000,89000,125000"
pts [
"80750,125000"
"89000,125000"
]
)
start &57
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10518,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10519,0
va (VaSet
)
xt "82000,124000,88200,125000"
st "CLK25_PSOUT"
blo "82000,124800"
tm "WireNameMgr"
)
)
on &240
)
*330 (Wire
uid 10522,0
shape (OrthoPolyLine
uid 10523,0
va (VaSet
vasetType 3
)
xt "80750,126000,87000,126000"
pts [
"80750,126000"
"87000,126000"
]
)
start &48
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10526,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10527,0
va (VaSet
)
xt "82000,125000,86400,126000"
st "PS_DIR_IN"
blo "82000,125800"
tm "WireNameMgr"
)
)
on &241
)
*331 (Wire
uid 10530,0
shape (OrthoPolyLine
uid 10531,0
va (VaSet
vasetType 3
)
xt "80750,127000,87000,127000"
pts [
"80750,127000"
"87000,127000"
]
)
start &49
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10534,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10535,0
va (VaSet
)
xt "82000,126000,86200,127000"
st "PS_DO_IN"
blo "82000,126800"
tm "WireNameMgr"
)
)
on &242
)
*332 (Wire
uid 10538,0
shape (OrthoPolyLine
uid 10539,0
va (VaSet
vasetType 3
)
xt "80750,129000,88000,129000"
pts [
"80750,129000"
"88000,129000"
]
)
start &52
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10542,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10543,0
va (VaSet
)
xt "82000,128000,86600,129000"
st "PSEN_OUT"
blo "82000,128800"
tm "WireNameMgr"
)
)
on &243
)
*333 (Wire
uid 10546,0
shape (OrthoPolyLine
uid 10547,0
va (VaSet
vasetType 3
)
xt "80750,128000,90000,128000"
pts [
"80750,128000"
"90000,128000"
]
)
start &53
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10550,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10551,0
va (VaSet
)
xt "82000,127000,89000,128000"
st "PSINCDEC_OUT"
blo "82000,127800"
tm "WireNameMgr"
)
)
on &244
)
*334 (Wire
uid 10554,0
shape (OrthoPolyLine
uid 10555,0
va (VaSet
vasetType 3
)
xt "80750,130000,88000,130000"
pts [
"80750,130000"
"88000,130000"
]
)
start &45
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10558,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10559,0
va (VaSet
)
xt "82000,129000,87200,130000"
st "DCM_locked"
blo "82000,129800"
tm "WireNameMgr"
)
)
on &245
)
*335 (Wire
uid 10562,0
shape (OrthoPolyLine
uid 10563,0
va (VaSet
vasetType 3
)
xt "80750,132000,85000,132000"
pts [
"80750,132000"
"85000,132000"
]
)
start &54
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10566,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10567,0
va (VaSet
)
xt "82000,131000,84200,132000"
st "ready"
blo "82000,131800"
tm "WireNameMgr"
)
)
on &246
)
*336 (Wire
uid 10570,0
shape (OrthoPolyLine
uid 10571,0
va (VaSet
vasetType 3
)
xt "80750,133000,86000,133000"
pts [
"80750,133000"
"86000,133000"
]
)
start &55
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10574,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10575,0
va (VaSet
)
xt "82000,132000,84900,133000"
st "shifting"
blo "82000,132800"
tm "WireNameMgr"
)
)
on &247
)
*337 (Wire
uid 10578,0
shape (OrthoPolyLine
uid 10579,0
va (VaSet
vasetType 3
)
xt "80750,134000,91000,134000"
pts [
"80750,134000"
"91000,134000"
]
)
start &51
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10582,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10583,0
va (VaSet
)
xt "82000,133000,89800,134000"
st "PSDONE_extraOUT"
blo "82000,133800"
tm "WireNameMgr"
)
)
on &248
)
*338 (Wire
uid 10586,0
shape (OrthoPolyLine
uid 10587,0
va (VaSet
vasetType 3
)
xt "80750,135000,88000,135000"
pts [
"80750,135000"
"88000,135000"
]
)
start &50
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10590,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10591,0
va (VaSet
)
xt "82000,134000,87000,135000"
st "PSCLK_OUT"
blo "82000,134800"
tm "WireNameMgr"
)
)
on &249
)
*339 (Wire
uid 10594,0
shape (OrthoPolyLine
uid 10595,0
va (VaSet
vasetType 3
)
xt "80750,136000,91000,136000"
pts [
"80750,136000"
"91000,136000"
]
)
start &46
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10598,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10599,0
va (VaSet
)
xt "82000,135000,89700,136000"
st "LOCKED_extraOUT"
blo "82000,135800"
tm "WireNameMgr"
)
)
on &250
)
*340 (Wire
uid 10600,0
shape (OrthoPolyLine
uid 10601,0
va (VaSet
vasetType 3
)
xt "96000,123000,106000,123000"
pts [
"96000,123000"
"106000,123000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10606,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10607,0
va (VaSet
)
xt "98000,122000,102800,123000"
st "CLK25_OUT"
blo "98000,122800"
tm "WireNameMgr"
)
)
on &239
)
*341 (Wire
uid 10608,0
shape (OrthoPolyLine
uid 10609,0
va (VaSet
vasetType 3
)
xt "96000,124000,106000,124000"
pts [
"96000,124000"
"106000,124000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10614,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10615,0
va (VaSet
)
xt "98000,123000,104200,124000"
st "CLK25_PSOUT"
blo "98000,123800"
tm "WireNameMgr"
)
)
on &240
)
*342 (Wire
uid 10616,0
shape (OrthoPolyLine
uid 10617,0
va (VaSet
vasetType 3
)
xt "96000,125000,106000,125000"
pts [
"96000,125000"
"106000,125000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10622,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10623,0
va (VaSet
)
xt "98000,124000,102800,125000"
st "CLK50_OUT"
blo "98000,124800"
tm "WireNameMgr"
)
)
on &238
)
*343 (Wire
uid 10624,0
shape (OrthoPolyLine
uid 10625,0
va (VaSet
vasetType 3
)
xt "96000,126000,106000,126000"
pts [
"96000,126000"
"106000,126000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10630,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10631,0
va (VaSet
)
xt "98000,125000,103200,126000"
st "DCM_locked"
blo "98000,125800"
tm "WireNameMgr"
)
)
on &245
)
*344 (Wire
uid 10632,0
shape (OrthoPolyLine
uid 10633,0
va (VaSet
vasetType 3
)
xt "96000,127000,106000,127000"
pts [
"96000,127000"
"106000,127000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10638,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10639,0
va (VaSet
)
xt "98000,126000,105700,127000"
st "LOCKED_extraOUT"
blo "98000,126800"
tm "WireNameMgr"
)
)
on &250
)
*345 (Wire
uid 10640,0
shape (OrthoPolyLine
uid 10641,0
va (VaSet
vasetType 3
)
xt "96000,128000,106000,128000"
pts [
"96000,128000"
"106000,128000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10646,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10647,0
va (VaSet
)
xt "98000,127000,103000,128000"
st "PSCLK_OUT"
blo "98000,127800"
tm "WireNameMgr"
)
)
on &249
)
*346 (Wire
uid 10648,0
shape (OrthoPolyLine
uid 10649,0
va (VaSet
vasetType 3
)
xt "96000,129000,106000,129000"
pts [
"96000,129000"
"106000,129000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10654,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10655,0
va (VaSet
)
xt "98000,128000,105800,129000"
st "PSDONE_extraOUT"
blo "98000,128800"
tm "WireNameMgr"
)
)
on &248
)
*347 (Wire
uid 10656,0
shape (OrthoPolyLine
uid 10657,0
va (VaSet
vasetType 3
)
xt "96000,130000,106000,130000"
pts [
"96000,130000"
"106000,130000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10662,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10663,0
va (VaSet
)
xt "98000,129000,102600,130000"
st "PSEN_OUT"
blo "98000,129800"
tm "WireNameMgr"
)
)
on &243
)
*348 (Wire
uid 10664,0
shape (OrthoPolyLine
uid 10665,0
va (VaSet
vasetType 3
)
xt "96000,131000,106000,131000"
pts [
"96000,131000"
"106000,131000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10670,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10671,0
va (VaSet
)
xt "98000,130000,105000,131000"
st "PSINCDEC_OUT"
blo "98000,130800"
tm "WireNameMgr"
)
)
on &244
)
*349 (Wire
uid 10672,0
shape (OrthoPolyLine
uid 10673,0
va (VaSet
vasetType 3
)
xt "96000,132000,106000,132000"
pts [
"96000,132000"
"106000,132000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10678,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10679,0
va (VaSet
)
xt "98000,131000,102400,132000"
st "PS_DIR_IN"
blo "98000,131800"
tm "WireNameMgr"
)
)
on &241
)
*350 (Wire
uid 10680,0
shape (OrthoPolyLine
uid 10681,0
va (VaSet
vasetType 3
)
xt "96000,133000,106000,133000"
pts [
"96000,133000"
"106000,133000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10686,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10687,0
va (VaSet
)
xt "98000,132000,102200,133000"
st "PS_DO_IN"
blo "98000,132800"
tm "WireNameMgr"
)
)
on &242
)
*351 (Wire
uid 10688,0
shape (OrthoPolyLine
uid 10689,0
va (VaSet
vasetType 3
)
xt "96000,134000,106000,134000"
pts [
"96000,134000"
"106000,134000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10694,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10695,0
va (VaSet
)
xt "98000,133000,100200,134000"
st "ready"
blo "98000,133800"
tm "WireNameMgr"
)
)
on &246
)
*352 (Wire
uid 10696,0
shape (OrthoPolyLine
uid 10697,0
va (VaSet
vasetType 3
)
xt "96000,135000,106000,135000"
pts [
"96000,135000"
"106000,135000"
]
)
end &234
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10702,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10703,0
va (VaSet
)
xt "98000,134000,100900,135000"
st "shifting"
blo "98000,134800"
tm "WireNameMgr"
)
)
on &247
)
*353 (Wire
uid 11096,0
shape (OrthoPolyLine
uid 11097,0
va (VaSet
vasetType 3
)
xt "96000,103000,100000,103000"
pts [
"96000,103000"
"100000,103000"
]
)
start &251
end &158
sat 32
eat 1
st 0
sf 1
si 0
tg (WTG
uid 11100,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11101,0
va (VaSet
isHidden 1
)
xt "126000,96000,131300,97000"
st "RS485_C_DI"
blo "126000,96800"
tm "WireNameMgr"
)
)
on &252
)
*354 (Wire
uid 11110,0
shape (OrthoPolyLine
uid 11111,0
va (VaSet
vasetType 3
)
xt "108000,112000,111000,112000"
pts [
"108000,112000"
"111000,112000"
]
)
start &158
end &253
sat 2
eat 32
st 0
sf 1
si 0
tg (WTG
uid 11114,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11115,0
va (VaSet
isHidden 1
)
xt "110000,111000,115700,112000"
st "RS485_C_DO"
blo "110000,111800"
tm "WireNameMgr"
)
)
on &254
)
*355 (Wire
uid 11514,0
shape (OrthoPolyLine
uid 11515,0
va (VaSet
vasetType 3
)
xt "123000,116000,127000,116000"
pts [
"123000,116000"
"127000,116000"
]
)
start &255
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 11518,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11519,0
va (VaSet
isHidden 1
)
xt "125000,115000,130200,116000"
st "RS485_E_DI"
blo "125000,115800"
tm "WireNameMgr"
)
)
on &256
)
*356 (Wire
uid 11528,0
shape (OrthoPolyLine
uid 11529,0
va (VaSet
vasetType 3
)
xt "123000,114000,126000,114000"
pts [
"123000,114000"
"126000,114000"
]
)
end &258
sat 16
eat 32
st 0
sf 1
si 0
tg (WTG
uid 11532,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 11533,0
va (VaSet
isHidden 1
)
xt "125000,113000,130600,114000"
st "RS485_E_DO"
blo "125000,113800"
tm "WireNameMgr"
)
)
on &257
)
*357 (Wire
uid 12320,0
shape (OrthoPolyLine
uid 12321,0
va (VaSet
vasetType 3
)
xt "80750,140000,87000,140000"
pts [
"80750,140000"
"87000,140000"
]
)
start &59
end &259
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 12324,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12325,0
va (VaSet
isHidden 1
)
xt "82000,139000,84300,140000"
st "SRIN"
blo "82000,139800"
tm "WireNameMgr"
)
)
on &260
)
*358 (Wire
uid 12545,0
shape (OrthoPolyLine
uid 12546,0
va (VaSet
vasetType 3
)
xt "80750,141000,87000,141000"
pts [
"80750,141000"
"87000,141000"
]
)
start &60
end &261
ss 0
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 12549,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12550,0
va (VaSet
isHidden 1
)
xt "83000,140000,88100,141000"
st "AMBER_LED"
blo "83000,140800"
tm "WireNameMgr"
)
)
on &264
)
*359 (Wire
uid 12559,0
shape (OrthoPolyLine
uid 12560,0
va (VaSet
vasetType 3
)
xt "80750,142000,87000,143000"
pts [
"80750,143000"
"87000,142000"
]
)
start &62
end &262
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 12563,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12564,0
va (VaSet
isHidden 1
)
xt "83000,142000,88100,143000"
st "GREEN_LED"
blo "83000,142800"
tm "WireNameMgr"
)
)
on &265
)
*360 (Wire
uid 12573,0
shape (OrthoPolyLine
uid 12574,0
va (VaSet
vasetType 3
)
xt "80750,142000,87000,143000"
pts [
"80750,142000"
"87000,143000"
]
)
start &61
end &263
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 12577,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 12578,0
va (VaSet
isHidden 1
)
xt "83000,141000,87000,142000"
st "RED_LED"
blo "83000,141800"
tm "WireNameMgr"
)
)
on &266
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *361 (PackageList
uid 41,0
stg "VerticalLayoutStrategy"
textVec [
*362 (Text
uid 42,0
va (VaSet
font "arial,8,1"
)
xt "0,0,5400,1000"
st "Package List"
blo "0,800"
)
*363 (MLText
uid 43,0
va (VaSet
)
xt "0,1000,14500,9000"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE IEEE.NUMERIC_STD.all;
USE ieee.std_logic_unsigned.all;

LIBRARY FACT_FAD_lib;
USE FACT_FAD_lib.fad_definitions.all;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 44,0
stg "VerticalLayoutStrategy"
textVec [
*364 (Text
uid 45,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,0,28100,1000"
st "Compiler Directives"
blo "20000,800"
)
*365 (Text
uid 46,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,1000,29600,2000"
st "Pre-module directives:"
blo "20000,1800"
)
*366 (MLText
uid 47,0
va (VaSet
isHidden 1
)
xt "20000,2000,27500,4000"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*367 (Text
uid 48,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,4000,30100,5000"
st "Post-module directives:"
blo "20000,4800"
)
*368 (MLText
uid 49,0
va (VaSet
isHidden 1
)
xt "20000,0,20000,0"
tm "BdCompilerDirectivesTextMgr"
)
*369 (Text
uid 50,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,5000,29900,6000"
st "End-module directives:"
blo "20000,5800"
)
*370 (MLText
uid 51,0
va (VaSet
isHidden 1
)
xt "20000,6000,20000,6000"
tm "BdCompilerDirectivesTextMgr"
)
]
associable 1
)
windowSize "0,22,1281,1024"
viewArea "35200,113200,119019,180587"
cachedDiagramExtent "0,0,699000,450107"
pageSetupInfo (PageSetupInfo
ptrCmd ""
toPrinter 1
exportedDirectories [
"$HDS_PROJECT_DIR/HTMLExport"
]
exportStdIncludeRefs 1
exportStdPackageRefs 1
)
hasePageBreakOrigin 1
pageBreakOrigin "0,0"
lastUid 12954,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,2000,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Arial,8,1"
)
xt "1000,1000,3800,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
defaultBlk (Blk
shape (Rectangle
va (VaSet
vasetType 1
fg "39936,56832,65280"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*371 (Text
va (VaSet
font "Arial,8,1"
)
xt "2200,3500,5800,4500"
st "<library>"
blo "2200,4300"
tm "BdLibraryNameMgr"
)
*372 (Text
va (VaSet
font "Arial,8,1"
)
xt "2200,4500,5600,5500"
st "<block>"
blo "2200,5300"
tm "BlkNameMgr"
)
*373 (Text
va (VaSet
font "Arial,8,1"
)
xt "2200,5500,3200,6500"
st "I0"
blo "2200,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "2200,13500,2200,13500"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultMWComponent (MWC
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*374 (Text
va (VaSet
font "Arial,8,1"
)
xt "550,3500,3450,4500"
st "Library"
blo "550,4300"
)
*375 (Text
va (VaSet
font "Arial,8,1"
)
xt "550,4500,7450,5500"
st "MWComponent"
blo "550,5300"
)
*376 (Text
va (VaSet
font "Arial,8,1"
)
xt "550,5500,1550,6500"
st "I0"
blo "550,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6450,1500,-6450,1500"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
visOptions (mwParamsVisibilityOptions
)
)
defaultSaComponent (SaComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*377 (Text
va (VaSet
font "Arial,8,1"
)
xt "900,3500,3800,4500"
st "Library"
blo "900,4300"
tm "BdLibraryNameMgr"
)
*378 (Text
va (VaSet
font "Arial,8,1"
)
xt "900,4500,7100,5500"
st "SaComponent"
blo "900,5300"
tm "CptNameMgr"
)
*379 (Text
va (VaSet
font "Arial,8,1"
)
xt "900,5500,1900,6500"
st "I0"
blo "900,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6100,1500,-6100,1500"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
defaultVhdlComponent (VhdlComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*380 (Text
va (VaSet
font "Arial,8,1"
)
xt "500,3500,3400,4500"
st "Library"
blo "500,4300"
)
*381 (Text
va (VaSet
font "Arial,8,1"
)
xt "500,4500,7500,5500"
st "VhdlComponent"
blo "500,5300"
)
*382 (Text
va (VaSet
font "Arial,8,1"
)
xt "500,5500,1500,6500"
st "I0"
blo "500,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6500,1500,-6500,1500"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
entityPath ""
archName ""
archPath ""
)
defaultVerilogComponent (VerilogComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-450,0,8450,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*383 (Text
va (VaSet
font "Arial,8,1"
)
xt "50,3500,2950,4500"
st "Library"
blo "50,4300"
)
*384 (Text
va (VaSet
font "Arial,8,1"
)
xt "50,4500,7950,5500"
st "VerilogComponent"
blo "50,5300"
)
*385 (Text
va (VaSet
font "Arial,8,1"
)
xt "50,5500,1050,6500"
st "I0"
blo "50,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6950,1500,-6950,1500"
)
header ""
)
elements [
]
)
entityPath ""
)
defaultHdlText (HdlText
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*386 (Text
va (VaSet
font "Arial,8,1"
)
xt "3150,4000,4850,5000"
st "eb1"
blo "3150,4800"
tm "HdlTextNameMgr"
)
*387 (Text
va (VaSet
font "Arial,8,1"
)
xt "3150,5000,3950,6000"
st "1"
blo "3150,5800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultEmbeddedText (EmbeddedText
commentText (CommentText
ps "CenterOffsetStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,18000,5000"
)
text (MLText
va (VaSet
)
xt "200,200,2000,1200"
st "
Text
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 4600
visibleWidth 17600
)
)
)
defaultGlobalConnector (GlobalConnector
shape (Circle
va (VaSet
vasetType 1
fg "65535,65535,0"
)
xt "-1000,-1000,1000,1000"
radius 1000
)
name (Text
va (VaSet
font "Arial,8,1"
)
xt "-500,-500,500,500"
st "G"
blo "-500,300"
)
)
defaultRipper (Ripper
ps "OnConnectorStrategy"
shape (Line2D
pts [
"0,0"
"1000,1000"
]
va (VaSet
vasetType 1
)
xt "0,0,1000,1000"
)
)
defaultBdJunction (BdJunction
ps "OnConnectorStrategy"
shape (Circle
va (VaSet
vasetType 1
)
xt "-400,-400,400,400"
radius 400
)
)
defaultPortIoIn (PortIoIn
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "-2000,-375,-500,375"
)
(Line
sl 0
ro 270
xt "-500,0,0,0"
pts [
"-500,0"
"0,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "-1375,-1000,-1375,-1000"
ju 2
blo "-1375,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoOut (PortIoOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "500,-375,2000,375"
)
(Line
sl 0
ro 270
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "625,-1000,625,-1000"
blo "625,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoInOut (PortIoInOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultPortIoBuffer (PortIoBuffer
shape (CompositeShape
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultSignal (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,0,1900,1000"
st "sig0"
blo "0,800"
tm "WireNameMgr"
)
)
)
defaultBus (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,0,2400,1000"
st "dbus0"
blo "0,800"
tm "WireNameMgr"
)
)
)
defaultBundle (Bundle
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineColor "32768,0,0"
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
textGroup (BiTextGroup
ps "ConnStartEndStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
)
xt "0,0,3000,1000"
st "bundle0"
blo "0,800"
tm "BundleNameMgr"
)
second (MLText
va (VaSet
)
xt "0,1000,1000,2000"
st "()"
tm "BundleContentsMgr"
)
)
bundleNet &0
)
defaultPortMapFrame (PortMapFrame
ps "PortMapFrameStrategy"
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,10000,12000"
)
portMapText (BiTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
first (MLText
va (VaSet
)
)
second (MLText
va (VaSet
)
tm "PortMapTextMgr"
)
)
)
defaultGenFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 2
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,12600,-100"
st "g0: FOR i IN 0 TO n GENERATE"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1250,1450"
)
num (Text
va (VaSet
)
xt "250,250,1050,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*388 (Text
va (VaSet
font "Arial,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*389 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
)
defaultBlockFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 1
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,7400,-100"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1250,1450"
)
num (Text
va (VaSet
)
xt "250,250,1050,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*390 (Text
va (VaSet
font "Arial,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*391 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
style 3
)
defaultSaCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1800,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1800,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
font "Courier New,8,0"
)
)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
font "Arial,8,1"
)
xt "37000,1800,42400,2800"
st "Declarations"
blo "37000,2600"
)
portLabel (Text
uid 3,0
va (VaSet
font "Arial,8,1"
)
xt "37000,2800,39700,3800"
st "Ports:"
blo "37000,3600"
)
preUserLabel (Text
uid 4,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "37000,1800,40800,2800"
st "Pre User:"
blo "37000,2600"
)
preUserText (MLText
uid 5,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "37000,1800,37000,1800"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
font "Arial,8,1"
)
xt "37000,47800,44100,48800"
st "Diagram Signals:"
blo "37000,48600"
)
postUserLabel (Text
uid 7,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "37000,1800,41700,2800"
st "Post User:"
blo "37000,2600"
)
postUserText (MLText
uid 8,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "37000,1800,37000,1800"
tm "BdDeclarativeTextMgr"
)
)
commonDM (CommonDM
ldm (LogicalDM
suid 209,0
usingSuid 1
emptyRow *392 (LEmptyRow
)
uid 54,0
optionalChildren [
*393 (RefLabelRowHdr
)
*394 (TitleRowHdr
)
*395 (FilterRowHdr
)
*396 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*397 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*398 (GroupColHdr
tm "GroupColHdrMgr"
)
*399 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
)
*400 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
)
*401 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
)
*402 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
)
*403 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
)
*404 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
)
*405 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "board_id"
t "std_logic_vector"
b "(3 downto 0)"
preAdd 0
posAdd 0
o 73
suid 5,0
)
)
uid 327,0
)
*406 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "crate_id"
t "std_logic_vector"
b "(1 downto 0)"
o 74
suid 6,0
)
)
uid 329,0
)
*407 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "adc_data_array"
t "adc_data_array_type"
o 72
suid 29,0
)
)
uid 1491,0
)
*408 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RSRLOAD"
t "std_logic"
o 41
suid 57,0
i "'0'"
)
)
uid 2435,0
)
*409 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "SRCLK"
t "std_logic"
o 70
suid 58,0
i "'0'"
)
)
uid 2437,0
)
*410 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "sensor_cs"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 78
suid 65,0
)
)
uid 3037,0
)
*411 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "DAC_CS"
t "std_logic"
o 24
suid 66,0
)
)
uid 3039,0
)
*412 (LeafLogPort
port (LogicalPort
decl (Decl
n "X_50M"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 16
suid 67,0
)
)
uid 3276,0
)
*413 (LeafLogPort
port (LogicalPort
decl (Decl
n "TRG"
t "STD_LOGIC"
o 14
suid 68,0
)
)
uid 3278,0
)
*414 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "A_CLK"
t "std_logic_vector"
b "(3 downto 0)"
o 19
suid 71,0
)
)
uid 3280,0
)
*415 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK_25_PS"
t "std_logic"
o 59
suid 72,0
)
)
uid 3282,0
)
*416 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "OE_ADC"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 35
suid 73,0
)
)
uid 3382,0
)
*417 (LeafLogPort
port (LogicalPort
decl (Decl
n "A_OTR"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 5
suid 74,0
)
)
uid 3384,0
)
*418 (LeafLogPort
port (LogicalPort
decl (Decl
n "A0_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 1
suid 79,0
)
)
uid 3386,0
)
*419 (LeafLogPort
port (LogicalPort
decl (Decl
n "A1_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 2
suid 80,0
)
)
uid 3388,0
)
*420 (LeafLogPort
port (LogicalPort
decl (Decl
n "A2_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 3
suid 81,0
)
)
uid 3390,0
)
*421 (LeafLogPort
port (LogicalPort
decl (Decl
n "A3_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 4
suid 82,0
)
)
uid 3392,0
)
*422 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D0_SRCLK"
t "STD_LOGIC"
o 20
suid 87,0
)
)
uid 3468,0
)
*423 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D1_SRCLK"
t "STD_LOGIC"
o 21
suid 88,0
)
)
uid 3470,0
)
*424 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D2_SRCLK"
t "STD_LOGIC"
o 22
suid 89,0
)
)
uid 3472,0
)
*425 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D3_SRCLK"
t "STD_LOGIC"
o 23
suid 90,0
)
)
uid 3474,0
)
*426 (LeafLogPort
port (LogicalPort
decl (Decl
n "D0_SROUT"
t "std_logic"
o 6
suid 91,0
)
)
uid 3524,0
)
*427 (LeafLogPort
port (LogicalPort
decl (Decl
n "D1_SROUT"
t "std_logic"
o 7
suid 92,0
)
)
uid 3526,0
)
*428 (LeafLogPort
port (LogicalPort
decl (Decl
n "D2_SROUT"
t "std_logic"
o 8
suid 93,0
)
)
uid 3528,0
)
*429 (LeafLogPort
port (LogicalPort
decl (Decl
n "D3_SROUT"
t "std_logic"
o 9
suid 94,0
)
)
uid 3530,0
)
*430 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D_A"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 27
suid 95,0
i "(others => '0')"
)
)
uid 3532,0
)
*431 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "DWRITE"
t "std_logic"
o 26
suid 96,0
i "'0'"
)
)
uid 3534,0
)
*432 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T0_CS"
t "std_logic"
o 44
suid 101,0
)
)
uid 3646,0
)
*433 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T1_CS"
t "std_logic"
o 45
suid 102,0
)
)
uid 3648,0
)
*434 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T2_CS"
t "std_logic"
o 46
suid 103,0
)
)
uid 3650,0
)
*435 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T3_CS"
t "std_logic"
o 47
suid 104,0
)
)
uid 3652,0
)
*436 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "S_CLK"
t "std_logic"
o 43
suid 105,0
)
)
uid 3654,0
)
*437 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_A"
t "std_logic_vector"
b "(9 DOWNTO 0)"
o 49
suid 106,0
)
)
uid 3656,0
)
*438 (LeafLogPort
port (LogicalPort
m 2
decl (Decl
n "W_D"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 55
suid 107,0
)
)
uid 3658,0
)
*439 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_RES"
t "std_logic"
o 52
suid 108,0
i "'1'"
)
)
uid 3660,0
)
*440 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_RD"
t "std_logic"
o 51
suid 109,0
i "'1'"
)
)
uid 3662,0
)
*441 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_WR"
t "std_logic"
o 53
suid 110,0
i "'1'"
)
)
uid 3664,0
)
*442 (LeafLogPort
port (LogicalPort
decl (Decl
n "W_INT"
t "std_logic"
o 15
suid 111,0
)
)
uid 3666,0
)
*443 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_CS"
t "std_logic"
o 50
suid 112,0
i "'1'"
)
)
uid 3668,0
)
*444 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "MOSI"
t "std_logic"
o 34
suid 113,0
i "'0'"
)
)
uid 3696,0
)
*445 (LeafLogPort
port (LogicalPort
m 2
decl (Decl
n "MISO"
t "std_logic"
preAdd 0
posAdd 0
o 54
suid 114,0
)
)
uid 3698,0
)
*446 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "TRG_V"
t "std_logic"
o 48
suid 126,0
)
)
uid 3886,0
)
*447 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_C_RE"
t "std_logic"
o 38
suid 127,0
)
)
uid 3888,0
)
*448 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_C_DE"
t "std_logic"
o 36
suid 128,0
)
)
uid 3890,0
)
*449 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_E_RE"
t "std_logic"
o 40
suid 129,0
)
)
uid 3892,0
)
*450 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_E_DE"
t "std_logic"
o 39
suid 130,0
)
)
uid 3894,0
)
*451 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "DENABLE"
t "std_logic"
o 25
suid 131,0
i "'0'"
)
)
uid 3896,0
)
*452 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "EE_CS"
t "std_logic"
o 30
suid 133,0
)
)
uid 3900,0
)
*453 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 28
suid 141,0
i "(OTHERS => '0')"
)
)
uid 5322,0
)
*454 (LeafLogPort
port (LogicalPort
decl (Decl
n "D_PLLLCK"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 10
suid 152,0
)
)
uid 6777,0
scheme 0
)
*455 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D_T2"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 29
suid 154,0
i "(others => '0')"
)
)
uid 6872,0
scheme 0
)
*456 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "A1_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 18
suid 155,0
i "(OTHERS => '0')"
)
)
uid 7134,0
scheme 0
)
*457 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "dummy"
t "std_logic"
o 76
suid 157,0
)
)
uid 7473,0
scheme 0
)
*458 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "drs_channel_id"
t "std_logic_vector"
b "(3 downto 0)"
o 75
suid 159,0
i "(others => '0')"
)
)
uid 8875,0
)
*459 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK_50"
t "std_logic"
o 61
suid 163,0
)
)
uid 9516,0
)
*460 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK_25_PS1"
t "std_logic"
o 60
suid 164,0
)
)
uid 10056,0
)
*461 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "adc_clk_en"
t "std_logic"
o 71
suid 165,0
i "'0'"
)
)
uid 10058,0
)
*462 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "A0_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 17
suid 166,0
i "(others => '0')"
)
)
uid 10294,0
scheme 0
)
*463 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK50_OUT"
t "std_logic"
o 58
suid 184,0
)
)
uid 10704,0
)
*464 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK25_OUT"
t "std_logic"
o 56
suid 185,0
)
)
uid 10706,0
)
*465 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK25_PSOUT"
t "std_logic"
o 57
suid 186,0
)
)
uid 10708,0
)
*466 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PS_DIR_IN"
t "std_logic"
o 68
suid 187,0
)
)
uid 10710,0
)
*467 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PS_DO_IN"
t "std_logic"
o 69
suid 188,0
)
)
uid 10712,0
)
*468 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PSEN_OUT"
t "std_logic"
o 66
suid 189,0
)
)
uid 10714,0
)
*469 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PSINCDEC_OUT"
t "std_logic"
o 67
suid 190,0
)
)
uid 10716,0
)
*470 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "DCM_locked"
t "std_logic"
preAdd 0
posAdd 0
o 62
suid 191,0
)
)
uid 10718,0
)
*471 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "ready"
t "std_logic"
preAdd 0
posAdd 0
o 77
suid 192,0
i "'0'"