source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd @ 10081

Last change on this file since 10081 was 10081, checked in by neise, 9 years ago
DRS write shift register & write config register
File size: 178.2 KB
Line 
1DocumentHdrVersion "1.1"
2Header (DocumentHdr
3version 2
4dmPackageRefs [
5(DmPackageRef
6library "ieee"
7unitName "std_logic_1164"
8)
9(DmPackageRef
10library "ieee"
11unitName "std_logic_arith"
12)
13(DmPackageRef
14library "IEEE"
15unitName "NUMERIC_STD"
16)
17(DmPackageRef
18library "ieee"
19unitName "std_logic_unsigned"
20)
21(DmPackageRef
22library "FACT_FAD_lib"
23unitName "fad_definitions"
24)
25]
26instances [
27(Instance
28name "I_board_main"
29duLibraryName "FACT_FAD_lib"
30duName "FAD_main"
31elements [
32(GiElement
33name "RAMADDRWIDTH64b"
34type "integer"
35value "LOG2_OF_RAM_SIZE_64B"
36)
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38mwi 0
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60embeddedInstances [
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63number "1"
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65(EmbeddedInstance
66name "ADC_CLK"
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69(EmbeddedInstance
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71number "3"
72)
73(EmbeddedInstance
74name "SRCLK"
75number "4"
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77(EmbeddedInstance
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79number "5"
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103version "29.1"
104appVersion "2009.2 (Build 10)"
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111value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
112)
113(vvPair
114variable "HDSDir"
115value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
116)
117(vvPair
118variable "SideDataDesignDir"
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120)
121(vvPair
122variable "SideDataUserDir"
123value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.user"
124)
125(vvPair
126variable "SourceDir"
127value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
128)
129(vvPair
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133(vvPair
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137(vvPair
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207value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
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209(vvPair
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213(vvPair
214variable "library_downstream_ModelSimCompiler"
215value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
216)
217(vvPair
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219value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
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251value "FACT_FAD"
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267value "<TBD>"
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273(vvPair
274variable "task_PrecisionRTLPath"
275value "<TBD>"
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277(vvPair
278variable "task_QuestaSimPath"
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282variable "task_VCSPath"
283value "<TBD>"
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286variable "this_ext"
287value "bd"
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291value "struct"
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294variable "this_file_logical"
295value "struct"
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298variable "time"
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301(vvPair
302variable "unit"
303value "FAD_Board"
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306variable "user"
307value "dneise"
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310variable "version"
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315value "struct"
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996va (VaSet
997vasetType 1
998fg "0,65535,0"
999)
1000xt "80000,73625,80750,74375"
1001)
1002tg (CPTG
1003uid 193,0
1004ps "CptPortTextPlaceStrategy"
1005stg "RightVerticalLayoutStrategy"
1006f (Text
1007uid 194,0
1008va (VaSet
1009)
1010xt "76300,73500,79000,74500"
1011st "wiz_int"
1012ju 2
1013blo "79000,74300"
1014)
1015)
1016thePort (LogicalPort
1017decl (Decl
1018n "wiz_int"
1019t "std_logic"
1020o 11
1021suid 31,0
1022)
1023)
1024)
1025*23 (CptPort
1026uid 195,0
1027ps "OnEdgeStrategy"
1028shape (Triangle
1029uid 196,0
1030ro 90
1031va (VaSet
1032vasetType 1
1033fg "0,65535,0"
1034)
1035xt "80000,71625,80750,72375"
1036)
1037tg (CPTG
1038uid 197,0
1039ps "CptPortTextPlaceStrategy"
1040stg "RightVerticalLayoutStrategy"
1041f (Text
1042uid 198,0
1043va (VaSet
1044)
1045xt "76400,71500,79000,72500"
1046st "wiz_rd"
1047ju 2
1048blo "79000,72300"
1049)
1050)
1051thePort (LogicalPort
1052m 1
1053decl (Decl
1054n "wiz_rd"
1055t "std_logic"
1056o 46
1057suid 30,0
1058i "'1'"
1059)
1060)
1061)
1062*24 (CptPort
1063uid 199,0
1064ps "OnEdgeStrategy"
1065shape (Triangle
1066uid 200,0
1067ro 90
1068va (VaSet
1069vasetType 1
1070fg "0,65535,0"
1071)
1072xt "80000,72625,80750,73375"
1073)
1074tg (CPTG
1075uid 201,0
1076ps "CptPortTextPlaceStrategy"
1077stg "RightVerticalLayoutStrategy"
1078f (Text
1079uid 202,0
1080va (VaSet
1081)
1082xt "76300,72500,79000,73500"
1083st "wiz_wr"
1084ju 2
1085blo "79000,73300"
1086)
1087)
1088thePort (LogicalPort
1089m 1
1090decl (Decl
1091n "wiz_wr"
1092t "std_logic"
1093o 48
1094suid 29,0
1095i "'1'"
1096)
1097)
1098)
1099*25 (CptPort
1100uid 1304,0
1101ps "OnEdgeStrategy"
1102shape (Triangle
1103uid 1305,0
1104ro 270
1105va (VaSet
1106vasetType 1
1107fg "0,65535,0"
1108)
1109xt "51250,69625,52000,70375"
1110)
1111tg (CPTG
1112uid 1306,0
1113ps "CptPortTextPlaceStrategy"
1114stg "VerticalLayoutStrategy"
1115f (Text
1116uid 1307,0
1117va (VaSet
1118)
1119xt "53000,69500,57500,70500"
1120st "CLK_25_PS"
1121blo "53000,70300"
1122)
1123)
1124thePort (LogicalPort
1125m 1
1126decl (Decl
1127n "CLK_25_PS"
1128t "std_logic"
1129o 15
1130suid 35,0
1131)
1132)
1133)
1134*26 (CptPort
1135uid 1369,0
1136ps "OnEdgeStrategy"
1137shape (Triangle
1138uid 1370,0
1139ro 270
1140va (VaSet
1141vasetType 1
1142fg "0,65535,0"
1143)
1144xt "51250,68625,52000,69375"
1145)
1146tg (CPTG
1147uid 1371,0
1148ps "CptPortTextPlaceStrategy"
1149stg "VerticalLayoutStrategy"
1150f (Text
1151uid 1372,0
1152va (VaSet
1153)
1154xt "53000,68500,56100,69500"
1155st "CLK_50"
1156blo "53000,69300"
1157)
1158)
1159thePort (LogicalPort
1160m 1
1161decl (Decl
1162n "CLK_50"
1163t "std_logic"
1164o 16
1165suid 37,0
1166)
1167)
1168)
1169*27 (CptPort
1170uid 1385,0
1171ps "OnEdgeStrategy"
1172shape (Triangle
1173uid 1386,0
1174ro 90
1175va (VaSet
1176vasetType 1
1177fg "0,65535,0"
1178)
1179xt "51250,67625,52000,68375"
1180)
1181tg (CPTG
1182uid 1387,0
1183ps "CptPortTextPlaceStrategy"
1184stg "VerticalLayoutStrategy"
1185f (Text
1186uid 1388,0
1187va (VaSet
1188)
1189xt "53000,67500,54900,68500"
1190st "CLK"
1191blo "53000,68300"
1192)
1193)
1194thePort (LogicalPort
1195decl (Decl
1196n "CLK"
1197t "std_logic"
1198o 1
1199suid 38,0
1200)
1201)
1202)
1203*28 (CptPort
1204uid 1389,0
1205ps "OnEdgeStrategy"
1206shape (Triangle
1207uid 1390,0
1208ro 90
1209va (VaSet
1210vasetType 1
1211fg "0,65535,0"
1212)
1213xt "51250,94625,52000,95375"
1214)
1215tg (CPTG
1216uid 1391,0
1217ps "CptPortTextPlaceStrategy"
1218stg "VerticalLayoutStrategy"
1219f (Text
1220uid 1392,0
1221va (VaSet
1222)
1223xt "53000,94500,58900,95500"
1224st "adc_data_array"
1225blo "53000,95300"
1226)
1227)
1228thePort (LogicalPort
1229decl (Decl
1230n "adc_data_array"
1231t "adc_data_array_type"
1232o 6
1233suid 39,0
1234)
1235)
1236)
1237*29 (CptPort
1238uid 1511,0
1239ps "OnEdgeStrategy"
1240shape (Triangle
1241uid 1512,0
1242ro 90
1243va (VaSet
1244vasetType 1
1245fg "0,65535,0"
1246)
1247xt "51250,88625,52000,89375"
1248)
1249tg (CPTG
1250uid 1513,0
1251ps "CptPortTextPlaceStrategy"
1252stg "VerticalLayoutStrategy"
1253f (Text
1254uid 1514,0
1255va (VaSet
1256)
1257xt "53000,88500,61000,89500"
1258st "adc_otr_array : (3:0)"
1259blo "53000,89300"
1260)
1261)
1262thePort (LogicalPort
1263decl (Decl
1264n "adc_otr_array"
1265t "std_logic_vector"
1266b "(3 DOWNTO 0)"
1267o 7
1268suid 40,0
1269)
1270)
1271)
1272*30 (CptPort
1273uid 1572,0
1274ps "OnEdgeStrategy"
1275shape (Triangle
1276uid 1573,0
1277ro 270
1278va (VaSet
1279vasetType 1
1280fg "0,65535,0"
1281)
1282xt "51250,108625,52000,109375"
1283)
1284tg (CPTG
1285uid 1574,0
1286ps "CptPortTextPlaceStrategy"
1287stg "VerticalLayoutStrategy"
1288f (Text
1289uid 1575,0
1290va (VaSet
1291)
1292xt "53000,108500,61500,109500"
1293st "drs_channel_id : (3:0)"
1294blo "53000,109300"
1295)
1296)
1297thePort (LogicalPort
1298m 1
1299decl (Decl
1300n "drs_channel_id"
1301t "std_logic_vector"
1302b "(3 downto 0)"
1303o 33
1304suid 48,0
1305i "(others => '0')"
1306)
1307)
1308)
1309*31 (CptPort
1310uid 1576,0
1311ps "OnEdgeStrategy"
1312shape (Triangle
1313uid 1577,0
1314ro 270
1315va (VaSet
1316vasetType 1
1317fg "0,65535,0"
1318)
1319xt "51250,109625,52000,110375"
1320)
1321tg (CPTG
1322uid 1578,0
1323ps "CptPortTextPlaceStrategy"
1324stg "VerticalLayoutStrategy"
1325f (Text
1326uid 1579,0
1327va (VaSet
1328)
1329xt "53000,109500,57300,110500"
1330st "drs_dwrite"
1331blo "53000,110300"
1332)
1333)
1334thePort (LogicalPort
1335m 1
1336decl (Decl
1337n "drs_dwrite"
1338t "std_logic"
1339o 34
1340suid 49,0
1341i "'1'"
1342)
1343)
1344)
1345*32 (CptPort
1346uid 1588,0
1347ps "OnEdgeStrategy"
1348shape (Triangle
1349uid 1589,0
1350ro 90
1351va (VaSet
1352vasetType 1
1353fg "0,65535,0"
1354)
1355xt "51250,104625,52000,105375"
1356)
1357tg (CPTG
1358uid 1590,0
1359ps "CptPortTextPlaceStrategy"
1360stg "VerticalLayoutStrategy"
1361f (Text
1362uid 1591,0
1363va (VaSet
1364)
1365xt "53000,104500,58400,105500"
1366st "SROUT_in_0"
1367blo "53000,105300"
1368)
1369)
1370thePort (LogicalPort
1371decl (Decl
1372n "SROUT_in_0"
1373t "std_logic"
1374o 2
1375suid 42,0
1376)
1377)
1378)
1379*33 (CptPort
1380uid 1592,0
1381ps "OnEdgeStrategy"
1382shape (Triangle
1383uid 1593,0
1384ro 90
1385va (VaSet
1386vasetType 1
1387fg "0,65535,0"
1388)
1389xt "51250,105625,52000,106375"
1390)
1391tg (CPTG
1392uid 1594,0
1393ps "CptPortTextPlaceStrategy"
1394stg "VerticalLayoutStrategy"
1395f (Text
1396uid 1595,0
1397va (VaSet
1398)
1399xt "53000,105500,58400,106500"
1400st "SROUT_in_1"
1401blo "53000,106300"
1402)
1403)
1404thePort (LogicalPort
1405decl (Decl
1406n "SROUT_in_1"
1407t "std_logic"
1408o 3
1409suid 43,0
1410)
1411)
1412)
1413*34 (CptPort
1414uid 1596,0
1415ps "OnEdgeStrategy"
1416shape (Triangle
1417uid 1597,0
1418ro 90
1419va (VaSet
1420vasetType 1
1421fg "0,65535,0"
1422)
1423xt "51250,106625,52000,107375"
1424)
1425tg (CPTG
1426uid 1598,0
1427ps "CptPortTextPlaceStrategy"
1428stg "VerticalLayoutStrategy"
1429f (Text
1430uid 1599,0
1431va (VaSet
1432)
1433xt "53000,106500,58400,107500"
1434st "SROUT_in_2"
1435blo "53000,107300"
1436)
1437)
1438thePort (LogicalPort
1439decl (Decl
1440n "SROUT_in_2"
1441t "std_logic"
1442o 4
1443suid 44,0
1444)
1445)
1446)
1447*35 (CptPort
1448uid 1600,0
1449ps "OnEdgeStrategy"
1450shape (Triangle
1451uid 1601,0
1452ro 90
1453va (VaSet
1454vasetType 1
1455fg "0,65535,0"
1456)
1457xt "51250,107625,52000,108375"
1458)
1459tg (CPTG
1460uid 1602,0
1461ps "CptPortTextPlaceStrategy"
1462stg "VerticalLayoutStrategy"
1463f (Text
1464uid 1603,0
1465va (VaSet
1466)
1467xt "53000,107500,58400,108500"
1468st "SROUT_in_3"
1469blo "53000,108300"
1470)
1471)
1472thePort (LogicalPort
1473decl (Decl
1474n "SROUT_in_3"
1475t "std_logic"
1476o 5
1477suid 45,0
1478)
1479)
1480)
1481*36 (CptPort
1482uid 2379,0
1483ps "OnEdgeStrategy"
1484shape (Triangle
1485uid 2380,0
1486ro 270
1487va (VaSet
1488vasetType 1
1489fg "0,65535,0"
1490)
1491xt "51250,110625,52000,111375"
1492)
1493tg (CPTG
1494uid 2381,0
1495ps "CptPortTextPlaceStrategy"
1496stg "VerticalLayoutStrategy"
1497f (Text
1498uid 2382,0
1499va (VaSet
1500)
1501xt "53000,110500,57200,111500"
1502st "RSRLOAD"
1503blo "53000,111300"
1504)
1505)
1506thePort (LogicalPort
1507m 1
1508decl (Decl
1509n "RSRLOAD"
1510t "std_logic"
1511o 25
1512suid 56,0
1513i "'0'"
1514)
1515)
1516)
1517*37 (CptPort
1518uid 2383,0
1519ps "OnEdgeStrategy"
1520shape (Triangle
1521uid 2384,0
1522ro 270
1523va (VaSet
1524vasetType 1
1525fg "0,65535,0"
1526)
1527xt "51250,112625,52000,113375"
1528)
1529tg (CPTG
1530uid 2385,0
1531ps "CptPortTextPlaceStrategy"
1532stg "VerticalLayoutStrategy"
1533f (Text
1534uid 2386,0
1535va (VaSet
1536)
1537xt "53000,112500,56000,113500"
1538st "SRCLK"
1539blo "53000,113300"
1540)
1541)
1542thePort (LogicalPort
1543m 1
1544decl (Decl
1545n "SRCLK"
1546t "std_logic"
1547o 26
1548suid 57,0
1549i "'0'"
1550)
1551)
1552)
1553*38 (CptPort
1554uid 2969,0
1555ps "OnEdgeStrategy"
1556shape (Triangle
1557uid 2970,0
1558ro 90
1559va (VaSet
1560vasetType 1
1561fg "0,65535,0"
1562)
1563xt "80000,86625,80750,87375"
1564)
1565tg (CPTG
1566uid 2971,0
1567ps "CptPortTextPlaceStrategy"
1568stg "RightVerticalLayoutStrategy"
1569f (Text
1570uid 2972,0
1571va (VaSet
1572)
1573xt "76200,86500,79000,87500"
1574st "dac_cs"
1575ju 2
1576blo "79000,87300"
1577)
1578)
1579thePort (LogicalPort
1580m 1
1581decl (Decl
1582n "dac_cs"
1583t "std_logic"
1584o 31
1585suid 64,0
1586)
1587)
1588)
1589*39 (CptPort
1590uid 2973,0
1591ps "OnEdgeStrategy"
1592shape (Triangle
1593uid 2974,0
1594ro 90
1595va (VaSet
1596vasetType 1
1597fg "0,65535,0"
1598)
1599xt "80000,97625,80750,98375"
1600)
1601tg (CPTG
1602uid 2975,0
1603ps "CptPortTextPlaceStrategy"
1604stg "RightVerticalLayoutStrategy"
1605f (Text
1606uid 2976,0
1607va (VaSet
1608)
1609xt "77300,97500,79000,98500"
1610st "sclk"
1611ju 2
1612blo "79000,98300"
1613)
1614)
1615thePort (LogicalPort
1616m 1
1617decl (Decl
1618n "sclk"
1619t "std_logic"
1620o 41
1621suid 62,0
1622)
1623)
1624)
1625*40 (CptPort
1626uid 2977,0
1627ps "OnEdgeStrategy"
1628shape (Triangle
1629uid 2978,0
1630ro 90
1631va (VaSet
1632vasetType 1
1633fg "0,65535,0"
1634)
1635xt "80000,88625,80750,89375"
1636)
1637tg (CPTG
1638uid 2979,0
1639ps "CptPortTextPlaceStrategy"
1640stg "RightVerticalLayoutStrategy"
1641f (Text
1642uid 2980,0
1643va (VaSet
1644)
1645xt "72500,88500,79000,89500"
1646st "sensor_cs : (3:0)"
1647ju 2
1648blo "79000,89300"
1649)
1650)
1651thePort (LogicalPort
1652m 1
1653decl (Decl
1654n "sensor_cs"
1655t "std_logic_vector"
1656b "(3 DOWNTO 0)"
1657o 42
1658suid 65,0
1659)
1660)
1661)
1662*41 (CptPort
1663uid 2981,0
1664ps "OnEdgeStrategy"
1665shape (Diamond
1666uid 2982,0
1667ro 90
1668va (VaSet
1669vasetType 1
1670fg "0,65535,0"
1671)
1672xt "80000,98625,80750,99375"
1673)
1674tg (CPTG
1675uid 2983,0
1676ps "CptPortTextPlaceStrategy"
1677stg "RightVerticalLayoutStrategy"
1678f (Text
1679uid 2984,0
1680va (VaSet
1681)
1682xt "77600,98500,79000,99500"
1683st "sio"
1684ju 2
1685blo "79000,99300"
1686)
1687)
1688thePort (LogicalPort
1689m 2
1690decl (Decl
1691n "sio"
1692t "std_logic"
1693preAdd 0
1694posAdd 0
1695o 49
1696suid 63,0
1697)
1698)
1699)
1700*42 (CptPort
1701uid 3670,0
1702ps "OnEdgeStrategy"
1703shape (Triangle
1704uid 3671,0
1705ro 90
1706va (VaSet
1707vasetType 1
1708fg "0,65535,0"
1709)
1710xt "80000,99625,80750,100375"
1711)
1712tg (CPTG
1713uid 3672,0
1714ps "CptPortTextPlaceStrategy"
1715stg "RightVerticalLayoutStrategy"
1716f (Text
1717uid 3673,0
1718va (VaSet
1719)
1720xt "77000,99500,79000,100500"
1721st "mosi"
1722ju 2
1723blo "79000,100300"
1724)
1725)
1726thePort (LogicalPort
1727m 1
1728decl (Decl
1729n "mosi"
1730t "std_logic"
1731o 37
1732suid 66,0
1733i "'0'"
1734)
1735)
1736)
1737*43 (CptPort
1738uid 6427,0
1739ps "OnEdgeStrategy"
1740shape (Triangle
1741uid 6428,0
1742ro 90
1743va (VaSet
1744vasetType 1
1745fg "0,65535,0"
1746)
1747xt "80000,120625,80750,121375"
1748)
1749tg (CPTG
1750uid 6429,0
1751ps "CptPortTextPlaceStrategy"
1752stg "RightVerticalLayoutStrategy"
1753f (Text
1754uid 6430,0
1755va (VaSet
1756)
1757xt "76000,120500,79000,121500"
1758st "denable"
1759ju 2
1760blo "79000,121300"
1761)
1762)
1763thePort (LogicalPort
1764m 1
1765decl (Decl
1766n "denable"
1767t "std_logic"
1768eolc "-- default domino wave off"
1769posAdd 0
1770o 32
1771suid 67,0
1772i "'0'"
1773)
1774)
1775)
1776*44 (CptPort
1777uid 10046,0
1778ps "OnEdgeStrategy"
1779shape (Triangle
1780uid 10047,0
1781ro 270
1782va (VaSet
1783vasetType 1
1784fg "0,65535,0"
1785)
1786xt "51250,72625,52000,73375"
1787)
1788tg (CPTG
1789uid 10048,0
1790ps "CptPortTextPlaceStrategy"
1791stg "VerticalLayoutStrategy"
1792f (Text
1793uid 10049,0
1794va (VaSet
1795)
1796xt "53000,72500,57500,73500"
1797st "adc_clk_en"
1798blo "53000,73300"
1799)
1800)
1801thePort (LogicalPort
1802m 1
1803decl (Decl
1804n "adc_clk_en"
1805t "std_logic"
1806o 28
1807suid 69,0
1808i "'0'"
1809)
1810)
1811)
1812*45 (CptPort
1813uid 10246,0
1814ps "OnEdgeStrategy"
1815shape (Triangle
1816uid 10247,0
1817ro 90
1818va (VaSet
1819vasetType 1
1820fg "0,65535,0"
1821)
1822xt "80000,129625,80750,130375"
1823)
1824tg (CPTG
1825uid 10248,0
1826ps "CptPortTextPlaceStrategy"
1827stg "RightVerticalLayoutStrategy"
1828f (Text
1829uid 10249,0
1830va (VaSet
1831)
1832xt "73800,129500,79000,130500"
1833st "DCM_locked"
1834ju 2
1835blo "79000,130300"
1836)
1837)
1838thePort (LogicalPort
1839m 1
1840decl (Decl
1841n "DCM_locked"
1842t "std_logic"
1843preAdd 0
1844posAdd 0
1845o 17
1846suid 76,0
1847)
1848)
1849)
1850*46 (CptPort
1851uid 10254,0
1852ps "OnEdgeStrategy"
1853shape (Triangle
1854uid 10255,0
1855ro 90
1856va (VaSet
1857vasetType 1
1858fg "0,65535,0"
1859)
1860xt "80000,135625,80750,136375"
1861)
1862tg (CPTG
1863uid 10256,0
1864ps "CptPortTextPlaceStrategy"
1865stg "RightVerticalLayoutStrategy"
1866f (Text
1867uid 10257,0
1868va (VaSet
1869)
1870xt "71300,135500,79000,136500"
1871st "LOCKED_extraOUT"
1872ju 2
1873blo "79000,136300"
1874)
1875)
1876thePort (LogicalPort
1877m 1
1878decl (Decl
1879n "LOCKED_extraOUT"
1880t "std_logic"
1881o 18
1882suid 70,0
1883)
1884)
1885)
1886*47 (CptPort
1887uid 10258,0
1888ps "OnEdgeStrategy"
1889shape (Triangle
1890uid 10259,0
1891ro 90
1892va (VaSet
1893vasetType 1
1894fg "0,65535,0"
1895)
1896xt "80000,138625,80750,139375"
1897)
1898tg (CPTG
1899uid 10260,0
1900ps "CptPortTextPlaceStrategy"
1901stg "RightVerticalLayoutStrategy"
1902f (Text
1903uid 10261,0
1904va (VaSet
1905)
1906xt "74200,138500,79000,139500"
1907st "offset : (7:0)"
1908ju 2
1909blo "79000,139300"
1910)
1911)
1912thePort (LogicalPort
1913m 1
1914decl (Decl
1915n "offset"
1916t "std_logic_vector"
1917b "(7 downto 0)"
1918preAdd 0
1919posAdd 0
1920o 38
1921suid 77,0
1922i "(OTHERS => '0')"
1923)
1924)
1925)
1926*48 (CptPort
1927uid 10262,0
1928ps "OnEdgeStrategy"
1929shape (Triangle
1930uid 10263,0
1931ro 90
1932va (VaSet
1933vasetType 1
1934fg "0,65535,0"
1935)
1936xt "80000,125625,80750,126375"
1937)
1938tg (CPTG
1939uid 10264,0
1940ps "CptPortTextPlaceStrategy"
1941stg "RightVerticalLayoutStrategy"
1942f (Text
1943uid 10265,0
1944va (VaSet
1945)
1946xt "74600,125500,79000,126500"
1947st "PS_DIR_IN"
1948ju 2
1949blo "79000,126300"
1950)
1951)
1952thePort (LogicalPort
1953m 1
1954decl (Decl
1955n "PS_DIR_IN"
1956t "std_logic"
1957o 23
1958suid 80,0
1959)
1960)
1961)
1962*49 (CptPort
1963uid 10266,0
1964ps "OnEdgeStrategy"
1965shape (Triangle
1966uid 10267,0
1967ro 90
1968va (VaSet
1969vasetType 1
1970fg "0,65535,0"
1971)
1972xt "80000,126625,80750,127375"
1973)
1974tg (CPTG
1975uid 10268,0
1976ps "CptPortTextPlaceStrategy"
1977stg "RightVerticalLayoutStrategy"
1978f (Text
1979uid 10269,0
1980va (VaSet
1981)
1982xt "74800,126500,79000,127500"
1983st "PS_DO_IN"
1984ju 2
1985blo "79000,127300"
1986)
1987)
1988thePort (LogicalPort
1989m 1
1990decl (Decl
1991n "PS_DO_IN"
1992t "std_logic"
1993o 24
1994suid 81,0
1995)
1996)
1997)
1998*50 (CptPort
1999uid 10270,0
2000ps "OnEdgeStrategy"
2001shape (Triangle
2002uid 10271,0
2003ro 90
2004va (VaSet
2005vasetType 1
2006fg "0,65535,0"
2007)
2008xt "80000,134625,80750,135375"
2009)
2010tg (CPTG
2011uid 10272,0
2012ps "CptPortTextPlaceStrategy"
2013stg "RightVerticalLayoutStrategy"
2014f (Text
2015uid 10273,0
2016va (VaSet
2017)
2018xt "74000,134500,79000,135500"
2019st "PSCLK_OUT"
2020ju 2
2021blo "79000,135300"
2022)
2023)
2024thePort (LogicalPort
2025m 1
2026decl (Decl
2027n "PSCLK_OUT"
2028t "std_logic"
2029o 19
2030suid 74,0
2031)
2032)
2033)
2034*51 (CptPort
2035uid 10274,0
2036ps "OnEdgeStrategy"
2037shape (Triangle
2038uid 10275,0
2039ro 90
2040va (VaSet
2041vasetType 1
2042fg "0,65535,0"
2043)
2044xt "80000,133625,80750,134375"
2045)
2046tg (CPTG
2047uid 10276,0
2048ps "CptPortTextPlaceStrategy"
2049stg "RightVerticalLayoutStrategy"
2050f (Text
2051uid 10277,0
2052va (VaSet
2053)
2054xt "71200,133500,79000,134500"
2055st "PSDONE_extraOUT"
2056ju 2
2057blo "79000,134300"
2058)
2059)
2060thePort (LogicalPort
2061m 1
2062decl (Decl
2063n "PSDONE_extraOUT"
2064t "std_logic"
2065o 20
2066suid 71,0
2067)
2068)
2069)
2070*52 (CptPort
2071uid 10278,0
2072ps "OnEdgeStrategy"
2073shape (Triangle
2074uid 10279,0
2075ro 90
2076va (VaSet
2077vasetType 1
2078fg "0,65535,0"
2079)
2080xt "80000,128625,80750,129375"
2081)
2082tg (CPTG
2083uid 10280,0
2084ps "CptPortTextPlaceStrategy"
2085stg "RightVerticalLayoutStrategy"
2086f (Text
2087uid 10281,0
2088va (VaSet
2089)
2090xt "74400,128500,79000,129500"
2091st "PSEN_OUT"
2092ju 2
2093blo "79000,129300"
2094)
2095)
2096thePort (LogicalPort
2097m 1
2098decl (Decl
2099n "PSEN_OUT"
2100t "std_logic"
2101o 21
2102suid 73,0
2103)
2104)
2105)
2106*53 (CptPort
2107uid 10282,0
2108ps "OnEdgeStrategy"
2109shape (Triangle
2110uid 10283,0
2111ro 90
2112va (VaSet
2113vasetType 1
2114fg "0,65535,0"
2115)
2116xt "80000,127625,80750,128375"
2117)
2118tg (CPTG
2119uid 10284,0
2120ps "CptPortTextPlaceStrategy"
2121stg "RightVerticalLayoutStrategy"
2122f (Text
2123uid 10285,0
2124va (VaSet
2125)
2126xt "72000,127500,79000,128500"
2127st "PSINCDEC_OUT"
2128ju 2
2129blo "79000,128300"
2130)
2131)
2132thePort (LogicalPort
2133m 1
2134decl (Decl
2135n "PSINCDEC_OUT"
2136t "std_logic"
2137o 22
2138suid 72,0
2139)
2140)
2141)
2142*54 (CptPort
2143uid 10286,0
2144ps "OnEdgeStrategy"
2145shape (Triangle
2146uid 10287,0
2147ro 90
2148va (VaSet
2149vasetType 1
2150fg "0,65535,0"
2151)
2152xt "80000,131625,80750,132375"
2153)
2154tg (CPTG
2155uid 10288,0
2156ps "CptPortTextPlaceStrategy"
2157stg "RightVerticalLayoutStrategy"
2158f (Text
2159uid 10289,0
2160va (VaSet
2161)
2162xt "76800,131500,79000,132500"
2163st "ready"
2164ju 2
2165blo "79000,132300"
2166)
2167)
2168thePort (LogicalPort
2169m 1
2170decl (Decl
2171n "ready"
2172t "std_logic"
2173preAdd 0
2174posAdd 0
2175o 39
2176suid 79,0
2177i "'0'"
2178)
2179)
2180)
2181*55 (CptPort
2182uid 10290,0
2183ps "OnEdgeStrategy"
2184shape (Triangle
2185uid 10291,0
2186ro 90
2187va (VaSet
2188vasetType 1
2189fg "0,65535,0"
2190)
2191xt "80000,132625,80750,133375"
2192)
2193tg (CPTG
2194uid 10292,0
2195ps "CptPortTextPlaceStrategy"
2196stg "RightVerticalLayoutStrategy"
2197f (Text
2198uid 10293,0
2199va (VaSet
2200)
2201xt "76100,132500,79000,133500"
2202st "shifting"
2203ju 2
2204blo "79000,133300"
2205)
2206)
2207thePort (LogicalPort
2208m 1
2209decl (Decl
2210n "shifting"
2211t "std_logic"
2212prec "-- status:"
2213preAdd 0
2214posAdd 0
2215o 43
2216suid 78,0
2217i "'0'"
2218)
2219)
2220)
2221*56 (CptPort
2222uid 10320,0
2223ps "OnEdgeStrategy"
2224shape (Triangle
2225uid 10321,0
2226ro 90
2227va (VaSet
2228vasetType 1
2229fg "0,65535,0"
2230)
2231xt "80000,123625,80750,124375"
2232)
2233tg (CPTG
2234uid 10322,0
2235ps "CptPortTextPlaceStrategy"
2236stg "RightVerticalLayoutStrategy"
2237f (Text
2238uid 10323,0
2239va (VaSet
2240)
2241xt "74200,123500,79000,124500"
2242st "CLK25_OUT"
2243ju 2
2244blo "79000,124300"
2245)
2246)
2247thePort (LogicalPort
2248m 1
2249decl (Decl
2250n "CLK25_OUT"
2251t "std_logic"
2252o 12
2253suid 83,0
2254)
2255)
2256)
2257*57 (CptPort
2258uid 10324,0
2259ps "OnEdgeStrategy"
2260shape (Triangle
2261uid 10325,0
2262ro 90
2263va (VaSet
2264vasetType 1
2265fg "0,65535,0"
2266)
2267xt "80000,124625,80750,125375"
2268)
2269tg (CPTG
2270uid 10326,0
2271ps "CptPortTextPlaceStrategy"
2272stg "RightVerticalLayoutStrategy"
2273f (Text
2274uid 10327,0
2275va (VaSet
2276)
2277xt "72800,124500,79000,125500"
2278st "CLK25_PSOUT"
2279ju 2
2280blo "79000,125300"
2281)
2282)
2283thePort (LogicalPort
2284m 1
2285decl (Decl
2286n "CLK25_PSOUT"
2287t "std_logic"
2288o 13
2289suid 84,0
2290)
2291)
2292)
2293*58 (CptPort
2294uid 10328,0
2295ps "OnEdgeStrategy"
2296shape (Triangle
2297uid 10329,0
2298ro 90
2299va (VaSet
2300vasetType 1
2301fg "0,65535,0"
2302)
2303xt "80000,122625,80750,123375"
2304)
2305tg (CPTG
2306uid 10330,0
2307ps "CptPortTextPlaceStrategy"
2308stg "RightVerticalLayoutStrategy"
2309f (Text
2310uid 10331,0
2311va (VaSet
2312)
2313xt "74200,122500,79000,123500"
2314st "CLK50_OUT"
2315ju 2
2316blo "79000,123300"
2317)
2318)
2319thePort (LogicalPort
2320m 1
2321decl (Decl
2322n "CLK50_OUT"
2323t "std_logic"
2324o 14
2325suid 82,0
2326)
2327)
2328)
2329*59 (CptPort
2330uid 12314,0
2331ps "OnEdgeStrategy"
2332shape (Triangle
2333uid 12315,0
2334ro 90
2335va (VaSet
2336vasetType 1
2337fg "0,65535,0"
2338)
2339xt "80000,139625,80750,140375"
2340)
2341tg (CPTG
2342uid 12316,0
2343ps "CptPortTextPlaceStrategy"
2344stg "RightVerticalLayoutStrategy"
2345f (Text
2346uid 12317,0
2347va (VaSet
2348)
2349xt "75300,139500,79000,140500"
2350st "SRIN_out"
2351ju 2
2352blo "79000,140300"
2353)
2354)
2355thePort (LogicalPort
2356m 1
2357decl (Decl
2358n "SRIN_out"
2359t "std_logic"
2360o 27
2361suid 85,0
2362i "'0'"
2363)
2364)
2365)
2366*60 (CptPort
2367uid 12521,0
2368ps "OnEdgeStrategy"
2369shape (Triangle
2370uid 12522,0
2371ro 90
2372va (VaSet
2373vasetType 1
2374fg "0,65535,0"
2375)
2376xt "80000,140625,80750,141375"
2377)
2378tg (CPTG
2379uid 12523,0
2380ps "CptPortTextPlaceStrategy"
2381stg "RightVerticalLayoutStrategy"
2382f (Text
2383uid 12524,0
2384va (VaSet
2385)
2386xt "76500,140500,79000,141500"
2387st "amber"
2388ju 2
2389blo "79000,141300"
2390)
2391)
2392thePort (LogicalPort
2393m 1
2394decl (Decl
2395n "amber"
2396t "std_logic"
2397o 30
2398suid 87,0
2399)
2400)
2401)
2402*61 (CptPort
2403uid 12525,0
2404ps "OnEdgeStrategy"
2405shape (Triangle
2406uid 12526,0
2407ro 90
2408va (VaSet
2409vasetType 1
2410fg "0,65535,0"
2411)
2412xt "80000,141625,80750,142375"
2413)
2414tg (CPTG
2415uid 12527,0
2416ps "CptPortTextPlaceStrategy"
2417stg "RightVerticalLayoutStrategy"
2418f (Text
2419uid 12528,0
2420va (VaSet
2421)
2422xt "76600,141500,79000,142500"
2423st "green"
2424ju 2
2425blo "79000,142300"
2426)
2427)
2428thePort (LogicalPort
2429m 1
2430decl (Decl
2431n "green"
2432t "std_logic"
2433o 35
2434suid 86,0
2435)
2436)
2437)
2438*62 (CptPort
2439uid 12529,0
2440ps "OnEdgeStrategy"
2441shape (Triangle
2442uid 12530,0
2443ro 90
2444va (VaSet
2445vasetType 1
2446fg "0,65535,0"
2447)
2448xt "80000,142625,80750,143375"
2449)
2450tg (CPTG
2451uid 12531,0
2452ps "CptPortTextPlaceStrategy"
2453stg "RightVerticalLayoutStrategy"
2454f (Text
2455uid 12532,0
2456va (VaSet
2457)
2458xt "77500,142500,79000,143500"
2459st "red"
2460ju 2
2461blo "79000,143300"
2462)
2463)
2464thePort (LogicalPort
2465m 1
2466decl (Decl
2467n "red"
2468t "std_logic"
2469o 40
2470suid 88,0
2471)
2472)
2473)
2474]
2475shape (Rectangle
2476uid 170,0
2477va (VaSet
2478vasetType 1
2479fg "0,65535,0"
2480lineColor "0,32896,0"
2481lineWidth 2
2482)
2483xt "52000,66000,80000,144000"
2484)
2485oxt "15000,-1000,43000,27000"
2486ttg (MlTextGroup
2487uid 171,0
2488ps "CenterOffsetStrategy"
2489stg "VerticalLayoutStrategy"
2490textVec [
2491*63 (Text
2492uid 172,0
2493va (VaSet
2494font "Arial,8,1"
2495)
2496xt "52200,123000,58400,124000"
2497st "FACT_FAD_lib"
2498blo "52200,123800"
2499tm "BdLibraryNameMgr"
2500)
2501*64 (Text
2502uid 173,0
2503va (VaSet
2504font "Arial,8,1"
2505)
2506xt "52200,124000,56400,125000"
2507st "FAD_main"
2508blo "52200,124800"
2509tm "CptNameMgr"
2510)
2511*65 (Text
2512uid 174,0
2513va (VaSet
2514font "Arial,8,1"
2515)
2516xt "52200,125000,58000,126000"
2517st "I_board_main"
2518blo "52200,125800"
2519tm "InstanceNameMgr"
2520)
2521]
2522)
2523ga (GenericAssociation
2524uid 175,0
2525ps "EdgeToEdgeStrategy"
2526matrix (Matrix
2527uid 176,0
2528text (MLText
2529uid 177,0
2530va (VaSet
2531font "Courier New,8,0"
2532)
2533xt "52000,65200,81500,66000"
2534st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B    ( integer )  "
2535)
2536header ""
2537)
2538elements [
2539(GiElement
2540name "RAMADDRWIDTH64b"
2541type "integer"
2542value "LOG2_OF_RAM_SIZE_64B"
2543)
2544]
2545)
2546viewicon (ZoomableIcon
2547uid 178,0
2548sl 0
2549va (VaSet
2550vasetType 1
2551fg "49152,49152,49152"
2552)
2553xt "52250,142250,53750,143750"
2554iconName "BlockDiagram.png"
2555iconMaskName "BlockDiagram.msk"
2556ftype 1
2557)
2558viewiconposition 0
2559portVis (PortSigDisplay
2560)
2561archFileType "UNKNOWN"
2562)
2563*66 (PortIoIn
2564uid 231,0
2565shape (CompositeShape
2566uid 232,0
2567va (VaSet
2568vasetType 1
2569fg "0,0,32768"
2570)
2571optionalChildren [
2572(Pentagon
2573uid 233,0
2574sl 0
2575ro 270
2576xt "20000,77625,21500,78375"
2577)
2578(Line
2579uid 234,0
2580sl 0
2581ro 270
2582xt "21500,78000,22000,78000"
2583pts [
2584"21500,78000"
2585"22000,78000"
2586]
2587)
2588]
2589)
2590stc 0
2591sf 1
2592tg (WTG
2593uid 235,0
2594ps "PortIoTextPlaceStrategy"
2595stg "STSignalDisplayStrategy"
2596f (Text
2597uid 236,0
2598va (VaSet
2599)
2600xt "16900,77500,19000,78500"
2601st "TRG"
2602ju 2
2603blo "19000,78300"
2604tm "WireNameMgr"
2605)
2606)
2607)
2608*67 (PortIoIn
2609uid 251,0
2610shape (CompositeShape
2611uid 252,0
2612va (VaSet
2613vasetType 1
2614fg "0,0,32768"
2615)
2616optionalChildren [
2617(Pentagon
2618uid 253,0
2619sl 0
2620ro 270
2621xt "19000,67625,20500,68375"
2622)
2623(Line
2624uid 254,0
2625sl 0
2626ro 270
2627xt "20500,68000,21000,68000"
2628pts [
2629"20500,68000"
2630"21000,68000"
2631]
2632)
2633]
2634)
2635stc 0
2636sf 1
2637tg (WTG
2638uid 255,0
2639ps "PortIoTextPlaceStrategy"
2640stg "STSignalDisplayStrategy"
2641f (Text
2642uid 256,0
2643va (VaSet
2644)
2645xt "15200,67500,18000,68500"
2646st "X_50M"
2647ju 2
2648blo "18000,68300"
2649tm "WireNameMgr"
2650)
2651)
2652)
2653*68 (HdlText
2654uid 265,0
2655optionalChildren [
2656*69 (EmbeddedText
2657uid 271,0
2658commentText (CommentText
2659uid 272,0
2660ps "CenterOffsetStrategy"
2661shape (Rectangle
2662uid 273,0
2663va (VaSet
2664vasetType 1
2665fg "65535,65535,65535"
2666lineColor "0,0,32768"
2667lineWidth 2
2668)
2669xt "32000,83000,44000,87000"
2670)
2671oxt "12000,27000,20000,31000"
2672text (MLText
2673uid 274,0
2674va (VaSet
2675)
2676xt "32200,83200,39700,86200"
2677st "
2678-- hard-wired IDs
2679board_id <= \"0101\";
2680crate_id <= \"01\";
2681"
2682tm "HdlTextMgr"
2683wrapOption 3
2684visibleHeight 4000
2685visibleWidth 12000
2686)
2687)
2688)
2689]
2690shape (Rectangle
2691uid 266,0
2692va (VaSet
2693vasetType 1
2694fg "65535,65535,37120"
2695lineColor "0,0,32768"
2696lineWidth 2
2697)
2698xt "24000,80000,32000,87000"
2699)
2700oxt "12000,23000,17000,27000"
2701ttg (MlTextGroup
2702uid 267,0
2703ps "CenterOffsetStrategy"
2704stg "VerticalLayoutStrategy"
2705textVec [
2706*70 (Text
2707uid 268,0
2708va (VaSet
2709font "Arial,8,1"
2710)
2711xt "26150,81000,28650,82000"
2712st "eb_ID"
2713blo "26150,81800"
2714tm "HdlTextNameMgr"
2715)
2716*71 (Text
2717uid 269,0
2718va (VaSet
2719font "Arial,8,1"
2720)
2721xt "26150,82000,26950,83000"
2722st "1"
2723blo "26150,82800"
2724tm "HdlTextNumberMgr"
2725)
2726]
2727)
2728viewicon (ZoomableIcon
2729uid 270,0
2730sl 0
2731va (VaSet
2732vasetType 1
2733fg "49152,49152,49152"
2734)
2735xt "24250,85250,25750,86750"
2736iconName "TextFile.png"
2737iconMaskName "TextFile.msk"
2738ftype 21
2739)
2740viewiconposition 0
2741)
2742*72 (Net
2743uid 275,0
2744decl (Decl
2745n "board_id"
2746t "std_logic_vector"
2747b "(3 downto 0)"
2748preAdd 0
2749posAdd 0
2750o 73
2751suid 5,0
2752)
2753declText (MLText
2754uid 276,0
2755va (VaSet
2756font "Courier New,8,0"
2757)
2758xt "39000,62400,67500,63200"
2759st "SIGNAL board_id        : std_logic_vector(3 downto 0)"
2760)
2761)
2762*73 (Net
2763uid 283,0
2764decl (Decl
2765n "crate_id"
2766t "std_logic_vector"
2767b "(1 downto 0)"
2768o 74
2769suid 6,0
2770)
2771declText (MLText
2772uid 284,0
2773va (VaSet
2774font "Courier New,8,0"
2775)
2776xt "39000,63200,67500,64000"
2777st "SIGNAL crate_id        : std_logic_vector(1 downto 0)"
2778)
2779)
2780*74 (PortIoOut
2781uid 472,0
2782shape (CompositeShape
2783uid 473,0
2784va (VaSet
2785vasetType 1
2786fg "0,0,32768"
2787)
2788optionalChildren [
2789(Pentagon
2790uid 474,0
2791sl 0
2792ro 270
2793xt "111500,70625,113000,71375"
2794)
2795(Line
2796uid 475,0
2797sl 0
2798ro 270
2799xt "111000,71000,111500,71000"
2800pts [
2801"111000,71000"
2802"111500,71000"
2803]
2804)
2805]
2806)
2807stc 0
2808sf 1
2809tg (WTG
2810uid 476,0
2811ps "PortIoTextPlaceStrategy"
2812stg "STSignalDisplayStrategy"
2813f (Text
2814uid 477,0
2815va (VaSet
2816)
2817xt "114000,70500,117100,71500"
2818st "W_RES"
2819blo "114000,71300"
2820tm "WireNameMgr"
2821)
2822)
2823)
2824*75 (PortIoOut
2825uid 478,0
2826shape (CompositeShape
2827uid 479,0
2828va (VaSet
2829vasetType 1
2830fg "0,0,32768"
2831)
2832optionalChildren [
2833(Pentagon
2834uid 480,0
2835sl 0
2836ro 270
2837xt "111500,67625,113000,68375"
2838)
2839(Line
2840uid 481,0
2841sl 0
2842ro 270
2843xt "111000,68000,111500,68000"
2844pts [
2845"111000,68000"
2846"111500,68000"
2847]
2848)
2849]
2850)
2851stc 0
2852sf 1
2853tg (WTG
2854uid 482,0
2855ps "PortIoTextPlaceStrategy"
2856stg "STSignalDisplayStrategy"
2857f (Text
2858uid 483,0
2859va (VaSet
2860)
2861xt "114000,67500,116000,68500"
2862st "W_A"
2863blo "114000,68300"
2864tm "WireNameMgr"
2865)
2866)
2867)
2868*76 (PortIoOut
2869uid 484,0
2870shape (CompositeShape
2871uid 485,0
2872va (VaSet
2873vasetType 1
2874fg "0,0,32768"
2875)
2876optionalChildren [
2877(Pentagon
2878uid 486,0
2879sl 0
2880ro 270
2881xt "111500,74625,113000,75375"
2882)
2883(Line
2884uid 487,0
2885sl 0
2886ro 270
2887xt "111000,75000,111500,75000"
2888pts [
2889"111000,75000"
2890"111500,75000"
2891]
2892)
2893]
2894)
2895stc 0
2896sf 1
2897tg (WTG
2898uid 488,0
2899ps "PortIoTextPlaceStrategy"
2900stg "STSignalDisplayStrategy"
2901f (Text
2902uid 489,0
2903va (VaSet
2904)
2905xt "114000,74500,116600,75500"
2906st "W_CS"
2907blo "114000,75300"
2908tm "WireNameMgr"
2909)
2910)
2911)
2912*77 (PortIoInOut
2913uid 490,0
2914shape (CompositeShape
2915uid 491,0
2916va (VaSet
2917vasetType 1
2918fg "0,0,32768"
2919)
2920optionalChildren [
2921(Hexagon
2922uid 492,0
2923sl 0
2924xt "111500,68625,113000,69375"
2925)
2926(Line
2927uid 493,0
2928sl 0
2929xt "111000,69000,111500,69000"
2930pts [
2931"111000,69000"
2932"111500,69000"
2933]
2934)
2935]
2936)
2937stc 0
2938sf 1
2939tg (WTG
2940uid 494,0
2941ps "PortIoTextPlaceStrategy"
2942stg "STSignalDisplayStrategy"
2943f (Text
2944uid 495,0
2945va (VaSet
2946)
2947xt "114000,68500,116100,69500"
2948st "W_D"
2949blo "114000,69300"
2950tm "WireNameMgr"
2951)
2952)
2953)
2954*78 (PortIoIn
2955uid 496,0
2956shape (CompositeShape
2957uid 497,0
2958va (VaSet
2959vasetType 1
2960fg "0,0,32768"
2961)
2962optionalChildren [
2963(Pentagon
2964uid 498,0
2965sl 0
2966ro 90
2967xt "111500,73625,113000,74375"
2968)
2969(Line
2970uid 499,0
2971sl 0
2972ro 90
2973xt "111000,74000,111500,74000"
2974pts [
2975"111500,74000"
2976"111000,74000"
2977]
2978)
2979]
2980)
2981stc 0
2982sf 1
2983tg (WTG
2984uid 500,0
2985ps "PortIoTextPlaceStrategy"
2986stg "STSignalDisplayStrategy"
2987f (Text
2988uid 501,0
2989va (VaSet
2990)
2991xt "114000,73500,116800,74500"
2992st "W_INT"
2993blo "114000,74300"
2994tm "WireNameMgr"
2995)
2996)
2997)
2998*79 (PortIoOut
2999uid 502,0
3000shape (CompositeShape
3001uid 503,0
3002va (VaSet
3003vasetType 1
3004fg "0,0,32768"
3005)
3006optionalChildren [
3007(Pentagon
3008uid 504,0
3009sl 0
3010ro 270
3011xt "111500,71625,113000,72375"
3012)
3013(Line
3014uid 505,0
3015sl 0
3016ro 270
3017xt "111000,72000,111500,72000"
3018pts [
3019"111000,72000"
3020"111500,72000"
3021]
3022)
3023]
3024)
3025stc 0
3026sf 1
3027tg (WTG
3028uid 506,0
3029ps "PortIoTextPlaceStrategy"
3030stg "STSignalDisplayStrategy"
3031f (Text
3032uid 507,0
3033va (VaSet
3034)
3035xt "114000,71500,116700,72500"
3036st "W_RD"
3037blo "114000,72300"
3038tm "WireNameMgr"
3039)
3040)
3041)
3042*80 (PortIoOut
3043uid 508,0
3044shape (CompositeShape
3045uid 509,0
3046va (VaSet
3047vasetType 1
3048fg "0,0,32768"
3049)
3050optionalChildren [
3051(Pentagon
3052uid 510,0
3053sl 0
3054ro 270
3055xt "111500,72625,113000,73375"
3056)
3057(Line
3058uid 511,0
3059sl 0
3060ro 270
3061xt "111000,73000,111500,73000"
3062pts [
3063"111000,73000"
3064"111500,73000"
3065]
3066)
3067]
3068)
3069stc 0
3070sf 1
3071tg (WTG
3072uid 512,0
3073ps "PortIoTextPlaceStrategy"
3074stg "STSignalDisplayStrategy"
3075f (Text
3076uid 513,0
3077va (VaSet
3078)
3079xt "114000,72500,116800,73500"
3080st "W_WR"
3081blo "114000,73300"
3082tm "WireNameMgr"
3083)
3084)
3085)
3086*81 (Net
3087uid 1465,0
3088decl (Decl
3089n "adc_data_array"
3090t "adc_data_array_type"
3091o 72
3092suid 29,0
3093)
3094declText (MLText
3095uid 1466,0
3096va (VaSet
3097font "Courier New,8,0"
3098)
3099xt "39000,61600,63000,62400"
3100st "SIGNAL adc_data_array  : adc_data_array_type"
3101)
3102)
3103*82 (Net
3104uid 2407,0
3105decl (Decl
3106n "RSRLOAD"
3107t "std_logic"
3108o 41
3109suid 57,0
3110i "'0'"
3111)
3112declText (MLText
3113uid 2408,0
3114va (VaSet
3115font "Courier New,8,0"
3116)
3117xt "39000,35800,67500,36600"
3118st "RSRLOAD         : std_logic                    := '0'"
3119)
3120)
3121*83 (PortIoOut
3122uid 2415,0
3123shape (CompositeShape
3124uid 2416,0
3125va (VaSet
3126vasetType 1
3127fg "0,0,32768"
3128)
3129optionalChildren [
3130(Pentagon
3131uid 2417,0
3132sl 0
3133ro 90
3134xt "19000,110625,20500,111375"
3135)
3136(Line
3137uid 2418,0
3138sl 0
3139ro 90
3140xt "20500,111000,21000,111000"
3141pts [
3142"21000,111000"
3143"20500,111000"
3144]
3145)
3146]
3147)
3148stc 0
3149sf 1
3150tg (WTG
3151uid 2419,0
3152ps "PortIoTextPlaceStrategy"
3153stg "STSignalDisplayStrategy"
3154f (Text
3155uid 2420,0
3156va (VaSet
3157)
3158xt "13800,110500,18000,111500"
3159st "RSRLOAD"
3160ju 2
3161blo "18000,111300"
3162tm "WireNameMgr"
3163)
3164)
3165)
3166*84 (Net
3167uid 2421,0
3168decl (Decl
3169n "SRCLK"
3170t "std_logic"
3171o 70
3172suid 58,0
3173i "'0'"
3174)
3175declText (MLText
3176uid 2422,0
3177va (VaSet
3178font "Courier New,8,0"
3179)
3180xt "39000,60000,71000,60800"
3181st "SIGNAL SRCLK           : std_logic                    := '0'"
3182)
3183)
3184*85 (Net
3185uid 3019,0
3186decl (Decl
3187n "sensor_cs"
3188t "std_logic_vector"
3189b "(3 DOWNTO 0)"
3190o 78
3191suid 65,0
3192)
3193declText (MLText
3194uid 3020,0
3195va (VaSet
3196font "Courier New,8,0"
3197)
3198xt "39000,66400,67500,67200"
3199st "SIGNAL sensor_cs       : std_logic_vector(3 DOWNTO 0)"
3200)
3201)
3202*86 (Net
3203uid 3025,0
3204decl (Decl
3205n "DAC_CS"
3206t "std_logic"
3207o 24
3208suid 66,0
3209)
3210declText (MLText
3211uid 3026,0
3212va (VaSet
3213font "Courier New,8,0"
3214)
3215xt "39000,23000,54000,23800"
3216st "DAC_CS          : std_logic"
3217)
3218)
3219*87 (PortIoOut
3220uid 3153,0
3221shape (CompositeShape
3222uid 3154,0
3223va (VaSet
3224vasetType 1
3225fg "0,0,32768"
3226)
3227optionalChildren [
3228(Pentagon
3229uid 3155,0
3230sl 0
3231ro 90
3232xt "19000,69625,20500,70375"
3233)
3234(Line
3235uid 3156,0
3236sl 0
3237ro 90
3238xt "20500,70000,21000,70000"
3239pts [
3240"21000,70000"
3241"20500,70000"
3242]
3243)
3244]
3245)
3246stc 0
3247sf 1
3248tg (WTG
3249uid 3157,0
3250ps "PortIoTextPlaceStrategy"
3251stg "STSignalDisplayStrategy"
3252f (Text
3253uid 3158,0
3254va (VaSet
3255)
3256xt "15200,69500,18000,70500"
3257st "A_CLK"
3258ju 2
3259blo "18000,70300"
3260tm "WireNameMgr"
3261)
3262)
3263)
3264*88 (Net
3265uid 3216,0
3266decl (Decl
3267n "X_50M"
3268t "STD_LOGIC"
3269preAdd 0
3270posAdd 0
3271o 16
3272suid 67,0
3273)
3274declText (MLText
3275uid 3217,0
3276va (VaSet
3277font "Courier New,8,0"
3278)
3279xt "39000,15800,54000,16600"
3280st "X_50M           : STD_LOGIC"
3281)
3282)
3283*89 (Net
3284uid 3226,0
3285decl (Decl
3286n "TRG"
3287t "STD_LOGIC"
3288o 14
3289suid 68,0
3290)
3291declText (MLText
3292uid 3227,0
3293va (VaSet
3294font "Courier New,8,0"
3295)
3296xt "39000,14200,54000,15000"
3297st "TRG             : STD_LOGIC"
3298)
3299)
3300*90 (HdlText
3301uid 3248,0
3302optionalChildren [
3303*91 (EmbeddedText
3304uid 3254,0
3305commentText (CommentText
3306uid 3255,0
3307ps "CenterOffsetStrategy"
3308shape (Rectangle
3309uid 3256,0
3310va (VaSet
3311vasetType 1
3312fg "65535,65535,65535"
3313lineColor "0,0,32768"
3314lineWidth 2
3315)
3316xt "29000,71000,41000,77000"
3317)
3318oxt "0,0,18000,5000"
3319text (MLText
3320uid 3257,0
3321va (VaSet
3322)
3323xt "29200,71200,41100,77200"
3324st "
3325-- ADC_CLK 2
3326A_CLK (0) <= CLK_25_PS;
3327A_CLK (1) <= CLK_25_PS;
3328A_CLK (2) <= CLK_25_PS;
3329A_CLK (3) <= CLK_25_PS;                                       
3330"
3331tm "HdlTextMgr"
3332wrapOption 3
3333visibleHeight 6000
3334visibleWidth 12000
3335)
3336)
3337)
3338]
3339shape (Rectangle
3340uid 3249,0
3341va (VaSet
3342vasetType 1
3343fg "65535,65535,37120"
3344lineColor "0,0,32768"
3345lineWidth 2
3346)
3347xt "24000,69000,29000,77000"
3348)
3349oxt "0,0,8000,10000"
3350ttg (MlTextGroup
3351uid 3250,0
3352ps "CenterOffsetStrategy"
3353stg "VerticalLayoutStrategy"
3354textVec [
3355*92 (Text
3356uid 3251,0
3357va (VaSet
3358font "Arial,8,1"
3359)
3360xt "24150,73000,28350,74000"
3361st "ADC_CLK"
3362blo "24150,73800"
3363tm "HdlTextNameMgr"
3364)
3365*93 (Text
3366uid 3252,0
3367va (VaSet
3368font "Arial,8,1"
3369)
3370xt "24150,74000,24950,75000"
3371st "2"
3372blo "24150,74800"
3373tm "HdlTextNumberMgr"
3374)
3375]
3376)
3377viewicon (ZoomableIcon
3378uid 3253,0
3379sl 0
3380va (VaSet
3381vasetType 1
3382fg "49152,49152,49152"
3383)
3384xt "24250,75250,25750,76750"
3385iconName "TextFile.png"
3386iconMaskName "TextFile.msk"
3387ftype 21
3388)
3389viewiconposition 0
3390)
3391*94 (Net
3392uid 3266,0
3393decl (Decl
3394n "A_CLK"
3395t "std_logic_vector"
3396b "(3 downto 0)"
3397o 19
3398suid 71,0
3399)
3400declText (MLText
3401uid 3267,0
3402va (VaSet
3403font "Courier New,8,0"
3404)
3405xt "39000,19000,64000,19800"
3406st "A_CLK           : std_logic_vector(3 downto 0)"
3407)
3408)
3409*95 (Net
3410uid 3268,0
3411decl (Decl
3412n "CLK_25_PS"
3413t "std_logic"
3414o 59
3415suid 72,0
3416)
3417declText (MLText
3418uid 3269,0
3419va (VaSet
3420font "Courier New,8,0"
3421)
3422xt "39000,51200,57500,52000"
3423st "SIGNAL CLK_25_PS       : std_logic"
3424)
3425)
3426*96 (PortIoOut
3427uid 3284,0
3428shape (CompositeShape
3429uid 3285,0
3430va (VaSet
3431vasetType 1
3432fg "0,0,32768"
3433)
3434optionalChildren [
3435(Pentagon
3436uid 3286,0
3437sl 0
3438ro 90
3439xt "19000,89625,20500,90375"
3440)
3441(Line
3442uid 3287,0
3443sl 0
3444ro 90
3445xt "20500,90000,21000,90000"
3446pts [
3447"21000,90000"
3448"20500,90000"
3449]
3450)
3451]
3452)
3453stc 0
3454sf 1
3455tg (WTG
3456uid 3288,0
3457ps "PortIoTextPlaceStrategy"
3458stg "STSignalDisplayStrategy"
3459f (Text
3460uid 3289,0
3461va (VaSet
3462)
3463xt "14400,89500,18000,90500"
3464st "OE_ADC"
3465ju 2
3466blo "18000,90300"
3467tm "WireNameMgr"
3468)
3469)
3470)
3471*97 (Net
3472uid 3290,0
3473decl (Decl
3474n "OE_ADC"
3475t "STD_LOGIC"
3476preAdd 0
3477posAdd 0
3478o 35
3479suid 73,0
3480)
3481declText (MLText
3482uid 3291,0
3483va (VaSet
3484font "Courier New,8,0"
3485)
3486xt "39000,30200,54000,31000"
3487st "OE_ADC          : STD_LOGIC"
3488)
3489)
3490*98 (PortIoIn
3491uid 3292,0
3492shape (CompositeShape
3493uid 3293,0
3494va (VaSet
3495vasetType 1
3496fg "0,0,32768"
3497)
3498optionalChildren [
3499(Pentagon
3500uid 3294,0
3501sl 0
3502ro 270
3503xt "19000,88625,20500,89375"
3504)
3505(Line
3506uid 3295,0
3507sl 0
3508ro 270
3509xt "20500,89000,21000,89000"
3510pts [
3511"20500,89000"
3512"21000,89000"
3513]
3514)
3515]
3516)
3517stc 0
3518sf 1
3519tg (WTG
3520uid 3296,0
3521ps "PortIoTextPlaceStrategy"
3522stg "STSignalDisplayStrategy"
3523f (Text
3524uid 3297,0
3525va (VaSet
3526)
3527xt "15000,88500,18000,89500"
3528st "A_OTR"
3529ju 2
3530blo "18000,89300"
3531tm "WireNameMgr"
3532)
3533)
3534)
3535*99 (Net
3536uid 3298,0
3537decl (Decl
3538n "A_OTR"
3539t "std_logic_vector"
3540b "(3 DOWNTO 0)"
3541o 5
3542suid 74,0
3543)
3544declText (MLText
3545uid 3299,0
3546va (VaSet
3547font "Courier New,8,0"
3548)
3549xt "39000,7000,64000,7800"
3550st "A_OTR           : std_logic_vector(3 DOWNTO 0)"
3551)
3552)
3553*100 (HdlText
3554uid 3300,0
3555optionalChildren [
3556*101 (EmbeddedText
3557uid 3306,0
3558commentText (CommentText
3559uid 3307,0
3560ps "CenterOffsetStrategy"
3561shape (Rectangle
3562uid 3308,0
3563va (VaSet
3564vasetType 1
3565fg "65535,65535,65535"
3566lineColor "0,0,32768"
3567lineWidth 2
3568)
3569xt "32000,96000,44000,102000"
3570)
3571oxt "0,0,18000,5000"
3572text (MLText
3573uid 3309,0
3574va (VaSet
3575)
3576xt "32200,96200,44200,102200"
3577st "
3578-- ADC_DATA 3
3579adc_data_array (0) <= A0_D;
3580adc_data_array (1) <= A1_D;
3581adc_data_array (2) <= A2_D;
3582adc_data_array (3) <= A3_D;                                       
3583"
3584tm "HdlTextMgr"
3585wrapOption 3
3586visibleHeight 6000
3587visibleWidth 12000
3588)
3589)
3590)
3591]
3592shape (Rectangle
3593uid 3301,0
3594va (VaSet
3595vasetType 1
3596fg "65535,65535,37120"
3597lineColor "0,0,32768"
3598lineWidth 2
3599)
3600xt "24000,94000,32000,102000"
3601)
3602oxt "0,0,8000,10000"
3603ttg (MlTextGroup
3604uid 3302,0
3605ps "CenterOffsetStrategy"
3606stg "VerticalLayoutStrategy"
3607textVec [
3608*102 (Text
3609uid 3303,0
3610va (VaSet
3611font "Arial,8,1"
3612)
3613xt "27150,95000,31750,96000"
3614st "ADC_DATA"
3615blo "27150,95800"
3616tm "HdlTextNameMgr"
3617)
3618*103 (Text
3619uid 3304,0
3620va (VaSet
3621font "Arial,8,1"
3622)
3623xt "27150,96000,27950,97000"
3624st "3"
3625blo "27150,96800"
3626tm "HdlTextNumberMgr"
3627)
3628]
3629)
3630viewicon (ZoomableIcon
3631uid 3305,0
3632sl 0
3633va (VaSet
3634vasetType 1
3635fg "49152,49152,49152"
3636)
3637xt "24250,100250,25750,101750"
3638iconName "TextFile.png"
3639iconMaskName "TextFile.msk"
3640ftype 21
3641)
3642viewiconposition 0
3643)
3644*104 (PortIoIn
3645uid 3310,0
3646shape (CompositeShape
3647uid 3311,0
3648va (VaSet
3649vasetType 1
3650fg "0,0,32768"
3651)
3652optionalChildren [
3653(Pentagon
3654uid 3312,0
3655sl 0
3656ro 270
3657xt "19000,94625,20500,95375"
3658)
3659(Line
3660uid 3313,0
3661sl 0
3662ro 270
3663xt "20500,95000,21000,95000"
3664pts [
3665"20500,95000"
3666"21000,95000"
3667]
3668)
3669]
3670)
3671stc 0
3672sf 1
3673tg (WTG
3674uid 3314,0
3675ps "PortIoTextPlaceStrategy"
3676stg "STSignalDisplayStrategy"
3677f (Text
3678uid 3315,0
3679va (VaSet
3680)
3681xt "15700,94500,18000,95500"
3682st "A0_D"
3683ju 2
3684blo "18000,95300"
3685tm "WireNameMgr"
3686)
3687)
3688)
3689*105 (PortIoIn
3690uid 3332,0
3691shape (CompositeShape
3692uid 3333,0
3693va (VaSet
3694vasetType 1
3695fg "0,0,32768"
3696)
3697optionalChildren [
3698(Pentagon
3699uid 3334,0
3700sl 0
3701ro 270
3702xt "19000,95625,20500,96375"
3703)
3704(Line
3705uid 3335,0
3706sl 0
3707ro 270
3708xt "20500,96000,21000,96000"
3709pts [
3710"20500,96000"
3711"21000,96000"
3712]
3713)
3714]
3715)
3716stc 0
3717sf 1
3718tg (WTG
3719uid 3336,0
3720ps "PortIoTextPlaceStrategy"
3721stg "STSignalDisplayStrategy"
3722f (Text
3723uid 3337,0
3724va (VaSet
3725)
3726xt "15700,95500,18000,96500"
3727st "A1_D"
3728ju 2
3729blo "18000,96300"
3730tm "WireNameMgr"
3731)
3732)
3733)
3734*106 (PortIoIn
3735uid 3338,0
3736shape (CompositeShape
3737uid 3339,0
3738va (VaSet
3739vasetType 1
3740fg "0,0,32768"
3741)
3742optionalChildren [
3743(Pentagon
3744uid 3340,0
3745sl 0
3746ro 270
3747xt "19000,96625,20500,97375"
3748)
3749(Line
3750uid 3341,0
3751sl 0
3752ro 270
3753xt "20500,97000,21000,97000"
3754pts [
3755"20500,97000"
3756"21000,97000"
3757]
3758)
3759]
3760)
3761stc 0
3762sf 1
3763tg (WTG
3764uid 3342,0
3765ps "PortIoTextPlaceStrategy"
3766stg "STSignalDisplayStrategy"
3767f (Text
3768uid 3343,0
3769va (VaSet
3770)
3771xt "15700,96500,18000,97500"
3772st "A2_D"
3773ju 2
3774blo "18000,97300"
3775tm "WireNameMgr"
3776)
3777)
3778)
3779*107 (PortIoIn
3780uid 3344,0
3781shape (CompositeShape
3782uid 3345,0
3783va (VaSet
3784vasetType 1
3785fg "0,0,32768"
3786)
3787optionalChildren [
3788(Pentagon
3789uid 3346,0
3790sl 0
3791ro 270
3792xt "19000,97625,20500,98375"
3793)
3794(Line
3795uid 3347,0
3796sl 0
3797ro 270
3798xt "20500,98000,21000,98000"
3799pts [
3800"20500,98000"
3801"21000,98000"
3802]
3803)
3804]
3805)
3806stc 0
3807sf 1
3808tg (WTG
3809uid 3348,0
3810ps "PortIoTextPlaceStrategy"
3811stg "STSignalDisplayStrategy"
3812f (Text
3813uid 3349,0
3814va (VaSet
3815)
3816xt "15700,97500,18000,98500"
3817st "A3_D"
3818ju 2
3819blo "18000,98300"
3820tm "WireNameMgr"
3821)
3822)
3823)
3824*108 (Net
3825uid 3374,0
3826decl (Decl
3827n "A0_D"
3828t "std_logic_vector"
3829b "(11 DOWNTO 0)"
3830o 1
3831suid 79,0
3832)
3833declText (MLText
3834uid 3375,0
3835va (VaSet
3836font "Courier New,8,0"
3837)
3838xt "39000,3800,64500,4600"
3839st "A0_D            : std_logic_vector(11 DOWNTO 0)"
3840)
3841)
3842*109 (Net
3843uid 3376,0
3844decl (Decl
3845n "A1_D"
3846t "std_logic_vector"
3847b "(11 DOWNTO 0)"
3848o 2
3849suid 80,0
3850)
3851declText (MLText
3852uid 3377,0
3853va (VaSet
3854font "Courier New,8,0"
3855)
3856xt "39000,4600,64500,5400"
3857st "A1_D            : std_logic_vector(11 DOWNTO 0)"
3858)
3859)
3860*110 (Net
3861uid 3378,0
3862decl (Decl
3863n "A2_D"
3864t "std_logic_vector"
3865b "(11 DOWNTO 0)"
3866o 3
3867suid 81,0
3868)
3869declText (MLText
3870uid 3379,0
3871va (VaSet
3872font "Courier New,8,0"
3873)
3874xt "39000,5400,64500,6200"
3875st "A2_D            : std_logic_vector(11 DOWNTO 0)"
3876)
3877)
3878*111 (Net
3879uid 3380,0
3880decl (Decl
3881n "A3_D"
3882t "std_logic_vector"
3883b "(11 DOWNTO 0)"
3884o 4
3885suid 82,0
3886)
3887declText (MLText
3888uid 3381,0
3889va (VaSet
3890font "Courier New,8,0"
3891)
3892xt "39000,6200,64500,7000"
3893st "A3_D            : std_logic_vector(11 DOWNTO 0)"
3894)
3895)
3896*112 (HdlText
3897uid 3394,0
3898optionalChildren [
3899*113 (EmbeddedText
3900uid 3400,0
3901commentText (CommentText
3902uid 3401,0
3903ps "CenterOffsetStrategy"
3904shape (Rectangle
3905uid 3402,0
3906va (VaSet
3907vasetType 1
3908fg "65535,65535,65535"
3909lineColor "0,0,32768"
3910lineWidth 2
3911)
3912xt "32000,114000,44000,120000"
3913)
3914oxt "0,0,18000,5000"
3915text (MLText
3916uid 3403,0
3917va (VaSet
3918)
3919xt "32200,114200,44200,120200"
3920st "
3921-- SRCLK 4         
3922D0_SRCLK <= SRCLK;
3923D1_SRCLK <= SRCLK;
3924D2_SRCLK <= SRCLK;
3925D3_SRCLK <= SRCLK;                               
3926"
3927tm "HdlTextMgr"
3928wrapOption 3
3929visibleHeight 6000
3930visibleWidth 12000
3931)
3932)
3933)
3934]
3935shape (Rectangle
3936uid 3395,0
3937va (VaSet
3938vasetType 1
3939fg "65535,65535,37120"
3940lineColor "0,0,32768"
3941lineWidth 2
3942)
3943xt "24000,112000,32000,120000"
3944)
3945oxt "0,0,8000,10000"
3946ttg (MlTextGroup
3947uid 3396,0
3948ps "CenterOffsetStrategy"
3949stg "VerticalLayoutStrategy"
3950textVec [
3951*114 (Text
3952uid 3397,0
3953va (VaSet
3954font "Arial,8,1"
3955)
3956xt "27150,113000,30350,114000"
3957st "SRCLK"
3958blo "27150,113800"
3959tm "HdlTextNameMgr"
3960)
3961*115 (Text
3962uid 3398,0
3963va (VaSet
3964font "Arial,8,1"
3965)
3966xt "27150,114000,27950,115000"
3967st "4"
3968blo "27150,114800"
3969tm "HdlTextNumberMgr"
3970)
3971]
3972)
3973viewicon (ZoomableIcon
3974uid 3399,0
3975sl 0
3976va (VaSet
3977vasetType 1
3978fg "49152,49152,49152"
3979)
3980xt "24250,118250,25750,119750"
3981iconName "TextFile.png"
3982iconMaskName "TextFile.msk"
3983ftype 21
3984)
3985viewiconposition 0
3986)
3987*116 (Net
3988uid 3460,0
3989decl (Decl
3990n "D0_SRCLK"
3991t "STD_LOGIC"
3992o 20
3993suid 87,0
3994)
3995declText (MLText
3996uid 3461,0
3997va (VaSet
3998font "Courier New,8,0"
3999)
4000xt "39000,19800,54000,20600"
4001st "D0_SRCLK        : STD_LOGIC"
4002)
4003)
4004*117 (Net
4005uid 3462,0
4006decl (Decl
4007n "D1_SRCLK"
4008t "STD_LOGIC"
4009o 21
4010suid 88,0
4011)
4012declText (MLText
4013uid 3463,0
4014va (VaSet
4015font "Courier New,8,0"
4016)
4017xt "39000,20600,54000,21400"
4018st "D1_SRCLK        : STD_LOGIC"
4019)
4020)
4021*118 (Net
4022uid 3464,0
4023decl (Decl
4024n "D2_SRCLK"
4025t "STD_LOGIC"
4026o 22
4027suid 89,0
4028)
4029declText (MLText
4030uid 3465,0
4031va (VaSet
4032font "Courier New,8,0"
4033)
4034xt "39000,21400,54000,22200"
4035st "D2_SRCLK        : STD_LOGIC"
4036)
4037)
4038*119 (Net
4039uid 3466,0
4040decl (Decl
4041n "D3_SRCLK"
4042t "STD_LOGIC"
4043o 23
4044suid 90,0
4045)
4046declText (MLText
4047uid 3467,0
4048va (VaSet
4049font "Courier New,8,0"
4050)
4051xt "39000,22200,54000,23000"
4052st "D3_SRCLK        : STD_LOGIC"
4053)
4054)
4055*120 (PortIoIn
4056uid 3476,0
4057shape (CompositeShape
4058uid 3477,0
4059va (VaSet
4060vasetType 1
4061fg "0,0,32768"
4062)
4063optionalChildren [
4064(Pentagon
4065uid 3478,0
4066sl 0
4067ro 270
4068xt "19000,104625,20500,105375"
4069)
4070(Line
4071uid 3479,0
4072sl 0
4073ro 270
4074xt "20500,105000,21000,105000"
4075pts [
4076"20500,105000"
4077"21000,105000"
4078]
4079)
4080]
4081)
4082stc 0
4083sf 1
4084tg (WTG
4085uid 3480,0
4086ps "PortIoTextPlaceStrategy"
4087stg "STSignalDisplayStrategy"
4088f (Text
4089uid 3481,0
4090va (VaSet
4091)
4092xt "13400,104500,18000,105500"
4093st "D0_SROUT"
4094ju 2
4095blo "18000,105300"
4096tm "WireNameMgr"
4097)
4098)
4099)
4100*121 (PortIoIn
4101uid 3482,0
4102shape (CompositeShape
4103uid 3483,0
4104va (VaSet
4105vasetType 1
4106fg "0,0,32768"
4107)
4108optionalChildren [
4109(Pentagon
4110uid 3484,0
4111sl 0
4112ro 270
4113xt "19000,105625,20500,106375"
4114)
4115(Line
4116uid 3485,0
4117sl 0
4118ro 270
4119xt "20500,106000,21000,106000"
4120pts [
4121"20500,106000"
4122"21000,106000"
4123]
4124)
4125]
4126)
4127stc 0
4128sf 1
4129tg (WTG
4130uid 3486,0
4131ps "PortIoTextPlaceStrategy"
4132stg "STSignalDisplayStrategy"
4133f (Text
4134uid 3487,0
4135va (VaSet
4136)
4137xt "13400,105500,18000,106500"
4138st "D1_SROUT"
4139ju 2
4140blo "18000,106300"
4141tm "WireNameMgr"
4142)
4143)
4144)
4145*122 (PortIoIn
4146uid 3488,0
4147shape (CompositeShape
4148uid 3489,0
4149va (VaSet
4150vasetType 1
4151fg "0,0,32768"
4152)
4153optionalChildren [
4154(Pentagon
4155uid 3490,0
4156sl 0
4157ro 270
4158xt "19000,106625,20500,107375"
4159)
4160(Line
4161uid 3491,0
4162sl 0
4163ro 270
4164xt "20500,107000,21000,107000"
4165pts [
4166"20500,107000"
4167"21000,107000"
4168]
4169)
4170]
4171)
4172stc 0
4173sf 1
4174tg (WTG
4175uid 3492,0
4176ps "PortIoTextPlaceStrategy"
4177stg "STSignalDisplayStrategy"
4178f (Text
4179uid 3493,0
4180va (VaSet
4181)
4182xt "13400,106500,18000,107500"
4183st "D2_SROUT"
4184ju 2
4185blo "18000,107300"
4186tm "WireNameMgr"
4187)
4188)
4189)
4190*123 (PortIoIn
4191uid 3494,0
4192shape (CompositeShape
4193uid 3495,0
4194va (VaSet
4195vasetType 1
4196fg "0,0,32768"
4197)
4198optionalChildren [
4199(Pentagon
4200uid 3496,0
4201sl 0
4202ro 270
4203xt "19000,107625,20500,108375"
4204)
4205(Line
4206uid 3497,0
4207sl 0
4208ro 270
4209xt "20500,108000,21000,108000"
4210pts [
4211"20500,108000"
4212"21000,108000"
4213]
4214)
4215]
4216)
4217stc 0
4218sf 1
4219tg (WTG
4220uid 3498,0
4221ps "PortIoTextPlaceStrategy"
4222stg "STSignalDisplayStrategy"
4223f (Text
4224uid 3499,0
4225va (VaSet
4226)
4227xt "13400,107500,18000,108500"
4228st "D3_SROUT"
4229ju 2
4230blo "18000,108300"
4231tm "WireNameMgr"
4232)
4233)
4234)
4235*124 (Net
4236uid 3500,0
4237decl (Decl
4238n "D0_SROUT"
4239t "std_logic"
4240o 6
4241suid 91,0
4242)
4243declText (MLText
4244uid 3501,0
4245va (VaSet
4246font "Courier New,8,0"
4247)
4248xt "39000,7800,54000,8600"
4249st "D0_SROUT        : std_logic"
4250)
4251)
4252*125 (Net
4253uid 3502,0
4254decl (Decl
4255n "D1_SROUT"
4256t "std_logic"
4257o 7
4258suid 92,0
4259)
4260declText (MLText
4261uid 3503,0
4262va (VaSet
4263font "Courier New,8,0"
4264)
4265xt "39000,8600,54000,9400"
4266st "D1_SROUT        : std_logic"
4267)
4268)
4269*126 (Net
4270uid 3504,0
4271decl (Decl
4272n "D2_SROUT"
4273t "std_logic"
4274o 8
4275suid 93,0
4276)
4277declText (MLText
4278uid 3505,0
4279va (VaSet
4280font "Courier New,8,0"
4281)
4282xt "39000,9400,54000,10200"
4283st "D2_SROUT        : std_logic"
4284)
4285)
4286*127 (Net
4287uid 3506,0
4288decl (Decl
4289n "D3_SROUT"
4290t "std_logic"
4291o 9
4292suid 94,0
4293)
4294declText (MLText
4295uid 3507,0
4296va (VaSet
4297font "Courier New,8,0"
4298)
4299xt "39000,10200,54000,11000"
4300st "D3_SROUT        : std_logic"
4301)
4302)
4303*128 (PortIoOut
4304uid 3508,0
4305shape (CompositeShape
4306uid 3509,0
4307va (VaSet
4308vasetType 1
4309fg "0,0,32768"
4310)
4311optionalChildren [
4312(Pentagon
4313uid 3510,0
4314sl 0
4315ro 90
4316xt "10000,125625,11500,126375"
4317)
4318(Line
4319uid 3511,0
4320sl 0
4321ro 90
4322xt "11500,126000,12000,126000"
4323pts [
4324"12000,126000"
4325"11500,126000"
4326]
4327)
4328]
4329)
4330stc 0
4331sf 1
4332tg (WTG
4333uid 3512,0
4334ps "PortIoTextPlaceStrategy"
4335stg "STSignalDisplayStrategy"
4336f (Text
4337uid 3513,0
4338va (VaSet
4339)
4340xt "7100,125500,9000,126500"
4341st "D_A"
4342ju 2
4343blo "9000,126300"
4344tm "WireNameMgr"
4345)
4346)
4347)
4348*129 (Net
4349uid 3514,0
4350decl (Decl
4351n "D_A"
4352t "std_logic_vector"
4353b "(3 DOWNTO 0)"
4354o 27
4355suid 95,0
4356i "(others => '0')"
4357)
4358declText (MLText
4359uid 3515,0
4360va (VaSet
4361font "Courier New,8,0"
4362)
4363xt "39000,25400,73500,26200"
4364st "D_A             : std_logic_vector(3 DOWNTO 0) := (others => '0')"
4365)
4366)
4367*130 (PortIoOut
4368uid 3516,0
4369shape (CompositeShape
4370uid 3517,0
4371va (VaSet
4372vasetType 1
4373fg "0,0,32768"
4374)
4375optionalChildren [
4376(Pentagon
4377uid 3518,0
4378sl 0
4379ro 90
4380xt "19000,109625,20500,110375"
4381)
4382(Line
4383uid 3519,0
4384sl 0
4385ro 90
4386xt "20500,110000,21000,110000"
4387pts [
4388"21000,110000"
4389"20500,110000"
4390]
4391)
4392]
4393)
4394stc 0
4395sf 1
4396tg (WTG
4397uid 3520,0
4398ps "PortIoTextPlaceStrategy"
4399stg "STSignalDisplayStrategy"
4400f (Text
4401uid 3521,0
4402va (VaSet
4403)
4404xt "14500,109500,18000,110500"
4405st "DWRITE"
4406ju 2
4407blo "18000,110300"
4408tm "WireNameMgr"
4409)
4410)
4411)
4412*131 (Net
4413uid 3522,0
4414decl (Decl
4415n "DWRITE"
4416t "std_logic"
4417o 26
4418suid 96,0
4419i "'0'"
4420)
4421declText (MLText
4422uid 3523,0
4423va (VaSet
4424font "Courier New,8,0"
4425)
4426xt "39000,24600,67500,25400"
4427st "DWRITE          : std_logic                    := '0'"
4428)
4429)
4430*132 (PortIoOut
4431uid 3536,0
4432shape (CompositeShape
4433uid 3537,0
4434va (VaSet
4435vasetType 1
4436fg "0,0,32768"
4437)
4438optionalChildren [
4439(Pentagon
4440uid 3538,0
4441sl 0
4442ro 270
4443xt "111500,86625,113000,87375"
4444)
4445(Line
4446uid 3539,0
4447sl 0
4448ro 270
4449xt "111000,87000,111500,87000"
4450pts [
4451"111000,87000"
4452"111500,87000"
4453]
4454)
4455]
4456)
4457stc 0
4458sf 1
4459tg (WTG
4460uid 3540,0
4461ps "PortIoTextPlaceStrategy"
4462stg "STSignalDisplayStrategy"
4463f (Text
4464uid 3541,0
4465va (VaSet
4466)
4467xt "114000,86500,117600,87500"
4468st "DAC_CS"
4469blo "114000,87300"
4470tm "WireNameMgr"
4471)
4472)
4473)
4474*133 (HdlText
4475uid 3542,0
4476optionalChildren [
4477*134 (EmbeddedText
4478uid 3612,0
4479commentText (CommentText
4480uid 3613,0
4481ps "CenterOffsetStrategy"
4482shape (Rectangle
4483uid 3614,0
4484va (VaSet
4485vasetType 1
4486fg "65535,65535,65535"
4487lineColor "0,0,32768"
4488lineWidth 2
4489)
4490xt "88000,90000,100000,96000"
4491)
4492oxt "0,0,18000,5000"
4493text (MLText
4494uid 3615,0
4495va (VaSet
4496)
4497xt "88200,90200,100100,96200"
4498st "
4499-- T_CS 5
4500T0_CS <= sensor_cs (0);
4501T1_CS <= sensor_cs (1);
4502T2_CS <= sensor_cs (2);
4503T3_CS <= sensor_cs (3);                                     
4504"
4505tm "HdlTextMgr"
4506wrapOption 3
4507visibleHeight 6000
4508visibleWidth 12000
4509)
4510)
4511)
4512]
4513shape (Rectangle
4514uid 3543,0
4515va (VaSet
4516vasetType 1
4517fg "65535,65535,37120"
4518lineColor "0,0,32768"
4519lineWidth 2
4520)
4521xt "100000,88000,108000,96000"
4522)
4523oxt "0,0,8000,10000"
4524ttg (MlTextGroup
4525uid 3544,0
4526ps "CenterOffsetStrategy"
4527stg "VerticalLayoutStrategy"
4528textVec [
4529*135 (Text
4530uid 3545,0
4531va (VaSet
4532font "Arial,8,1"
4533)
4534xt "103150,89000,105550,90000"
4535st "T_CS"
4536blo "103150,89800"
4537tm "HdlTextNameMgr"
4538)
4539*136 (Text
4540uid 3546,0
4541va (VaSet
4542font "Arial,8,1"
4543)
4544xt "103150,90000,103950,91000"
4545st "5"
4546blo "103150,90800"
4547tm "HdlTextNumberMgr"
4548)
4549]
4550)
4551viewicon (ZoomableIcon
4552uid 3547,0
4553sl 0
4554va (VaSet
4555vasetType 1
4556fg "49152,49152,49152"
4557)
4558xt "100250,94250,101750,95750"
4559iconName "TextFile.png"
4560iconMaskName "TextFile.msk"
4561ftype 21
4562)
4563viewiconposition 0
4564)
4565*137 (PortIoOut
4566uid 3548,0
4567shape (CompositeShape
4568uid 3549,0
4569va (VaSet
4570vasetType 1
4571fg "0,0,32768"
4572)
4573optionalChildren [
4574(Pentagon
4575uid 3550,0
4576sl 0
4577ro 270
4578xt "111500,88625,113000,89375"
4579)
4580(Line
4581uid 3551,0
4582sl 0
4583ro 270
4584xt "111000,89000,111500,89000"
4585pts [
4586"111000,89000"
4587"111500,89000"
4588]
4589)
4590]
4591)
4592stc 0
4593sf 1
4594tg (WTG
4595uid 3552,0
4596ps "PortIoTextPlaceStrategy"
4597stg "STSignalDisplayStrategy"
4598f (Text
4599uid 3553,0
4600va (VaSet
4601)
4602xt "114000,88500,116800,89500"
4603st "T0_CS"
4604blo "114000,89300"
4605tm "WireNameMgr"
4606)
4607)
4608)
4609*138 (PortIoOut
4610uid 3554,0
4611shape (CompositeShape
4612uid 3555,0
4613va (VaSet
4614vasetType 1
4615fg "0,0,32768"
4616)
4617optionalChildren [
4618(Pentagon
4619uid 3556,0
4620sl 0
4621ro 270
4622xt "111500,89625,113000,90375"
4623)
4624(Line
4625uid 3557,0
4626sl 0
4627ro 270
4628xt "111000,90000,111500,90000"
4629pts [
4630"111000,90000"
4631"111500,90000"
4632]
4633)
4634]
4635)
4636stc 0
4637sf 1
4638tg (WTG
4639uid 3558,0
4640ps "PortIoTextPlaceStrategy"
4641stg "STSignalDisplayStrategy"
4642f (Text
4643uid 3559,0
4644va (VaSet
4645)
4646xt "114000,89500,116800,90500"
4647st "T1_CS"
4648blo "114000,90300"
4649tm "WireNameMgr"
4650)
4651)
4652)
4653*139 (PortIoOut
4654uid 3560,0
4655shape (CompositeShape
4656uid 3561,0
4657va (VaSet
4658vasetType 1
4659fg "0,0,32768"
4660)
4661optionalChildren [
4662(Pentagon
4663uid 3562,0
4664sl 0
4665ro 270
4666xt "111500,90625,113000,91375"
4667)
4668(Line
4669uid 3563,0
4670sl 0
4671ro 270
4672xt "111000,91000,111500,91000"
4673pts [
4674"111000,91000"
4675"111500,91000"
4676]
4677)
4678]
4679)
4680stc 0
4681sf 1
4682tg (WTG
4683uid 3564,0
4684ps "PortIoTextPlaceStrategy"
4685stg "STSignalDisplayStrategy"
4686f (Text
4687uid 3565,0
4688va (VaSet
4689)
4690xt "114000,90500,116800,91500"
4691st "T2_CS"
4692blo "114000,91300"
4693tm "WireNameMgr"
4694)
4695)
4696)
4697*140 (PortIoOut
4698uid 3566,0
4699shape (CompositeShape
4700uid 3567,0
4701va (VaSet
4702vasetType 1
4703fg "0,0,32768"
4704)
4705optionalChildren [
4706(Pentagon
4707uid 3568,0
4708sl 0
4709ro 270
4710xt "111500,91625,113000,92375"
4711)
4712(Line
4713uid 3569,0
4714sl 0
4715ro 270
4716xt "111000,92000,111500,92000"
4717pts [
4718"111000,92000"
4719"111500,92000"
4720]
4721)
4722]
4723)
4724stc 0
4725sf 1
4726tg (WTG
4727uid 3570,0
4728ps "PortIoTextPlaceStrategy"
4729stg "STSignalDisplayStrategy"
4730f (Text
4731uid 3571,0
4732va (VaSet
4733)
4734xt "114000,91500,116800,92500"
4735st "T3_CS"
4736blo "114000,92300"
4737tm "WireNameMgr"
4738)
4739)
4740)
4741*141 (Net
4742uid 3604,0
4743decl (Decl
4744n "T0_CS"
4745t "std_logic"
4746o 44
4747suid 101,0
4748)
4749declText (MLText
4750uid 3605,0
4751va (VaSet
4752font "Courier New,8,0"
4753)
4754xt "39000,38200,54000,39000"
4755st "T0_CS           : std_logic"
4756)
4757)
4758*142 (Net
4759uid 3606,0
4760decl (Decl
4761n "T1_CS"
4762t "std_logic"
4763o 45
4764suid 102,0
4765)
4766declText (MLText
4767uid 3607,0
4768va (VaSet
4769font "Courier New,8,0"
4770)
4771xt "39000,39000,54000,39800"
4772st "T1_CS           : std_logic"
4773)
4774)
4775*143 (Net
4776uid 3608,0
4777decl (Decl
4778n "T2_CS"
4779t "std_logic"
4780o 46
4781suid 103,0
4782)
4783declText (MLText
4784uid 3609,0
4785va (VaSet
4786font "Courier New,8,0"
4787)
4788xt "39000,39800,54000,40600"
4789st "T2_CS           : std_logic"
4790)
4791)
4792*144 (Net
4793uid 3610,0
4794decl (Decl
4795n "T3_CS"
4796t "std_logic"
4797o 47
4798suid 104,0
4799)
4800declText (MLText
4801uid 3611,0
4802va (VaSet
4803font "Courier New,8,0"
4804)
4805xt "39000,40600,54000,41400"
4806st "T3_CS           : std_logic"
4807)
4808)
4809*145 (PortIoOut
4810uid 3624,0
4811shape (CompositeShape
4812uid 3625,0
4813va (VaSet
4814vasetType 1
4815fg "0,0,32768"
4816)
4817optionalChildren [
4818(Pentagon
4819uid 3626,0
4820sl 0
4821ro 270
4822xt "111500,97625,113000,98375"
4823)
4824(Line
4825uid 3627,0
4826sl 0
4827ro 270
4828xt "111000,98000,111500,98000"
4829pts [
4830"111000,98000"
4831"111500,98000"
4832]
4833)
4834]
4835)
4836stc 0
4837sf 1
4838tg (WTG
4839uid 3628,0
4840ps "PortIoTextPlaceStrategy"
4841stg "STSignalDisplayStrategy"
4842f (Text
4843uid 3629,0
4844va (VaSet
4845)
4846xt "113750,97500,116550,98500"
4847st "S_CLK"
4848blo "113750,98300"
4849tm "WireNameMgr"
4850)
4851)
4852)
4853*146 (Net
4854uid 3630,0
4855decl (Decl
4856n "S_CLK"
4857t "std_logic"
4858o 43
4859suid 105,0
4860)
4861declText (MLText
4862uid 3631,0
4863va (VaSet
4864font "Courier New,8,0"
4865)
4866xt "39000,37400,54000,38200"
4867st "S_CLK           : std_logic"
4868)
4869)
4870*147 (Net
4871uid 3632,0
4872decl (Decl
4873n "W_A"
4874t "std_logic_vector"
4875b "(9 DOWNTO 0)"
4876o 49
4877suid 106,0
4878)
4879declText (MLText
4880uid 3633,0
4881va (VaSet
4882font "Courier New,8,0"
4883)
4884xt "39000,42200,64000,43000"
4885st "W_A             : std_logic_vector(9 DOWNTO 0)"
4886)
4887)
4888*148 (Net
4889uid 3634,0
4890decl (Decl
4891n "W_D"
4892t "std_logic_vector"
4893b "(15 DOWNTO 0)"
4894o 55
4895suid 107,0
4896)
4897declText (MLText
4898uid 3635,0
4899va (VaSet
4900font "Courier New,8,0"
4901)
4902xt "39000,47000,64500,47800"
4903st "W_D             : std_logic_vector(15 DOWNTO 0)"
4904)
4905)
4906*149 (Net
4907uid 3636,0
4908decl (Decl
4909n "W_RES"
4910t "std_logic"
4911o 52
4912suid 108,0
4913i "'1'"
4914)
4915declText (MLText
4916uid 3637,0
4917va (VaSet
4918font "Courier New,8,0"
4919)
4920xt "39000,44600,67500,45400"
4921st "W_RES           : std_logic                    := '1'"
4922)
4923)
4924*150 (Net
4925uid 3638,0
4926decl (Decl
4927n "W_RD"
4928t "std_logic"
4929o 51
4930suid 109,0
4931i "'1'"
4932)
4933declText (MLText
4934uid 3639,0
4935va (VaSet
4936font "Courier New,8,0"
4937)
4938xt "39000,43800,67500,44600"
4939st "W_RD            : std_logic                    := '1'"
4940)
4941)
4942*151 (Net
4943uid 3640,0
4944decl (Decl
4945n "W_WR"
4946t "std_logic"
4947o 53
4948suid 110,0
4949i "'1'"
4950)
4951declText (MLText
4952uid 3641,0
4953va (VaSet
4954font "Courier New,8,0"
4955)
4956xt "39000,45400,67500,46200"
4957st "W_WR            : std_logic                    := '1'"
4958)
4959)
4960*152 (Net
4961uid 3642,0
4962decl (Decl
4963n "W_INT"
4964t "std_logic"
4965o 15
4966suid 111,0
4967)
4968declText (MLText
4969uid 3643,0
4970va (VaSet
4971font "Courier New,8,0"
4972)
4973xt "39000,15000,54000,15800"
4974st "W_INT           : std_logic"
4975)
4976)
4977*153 (Net
4978uid 3644,0
4979decl (Decl
4980n "W_CS"
4981t "std_logic"
4982o 50
4983suid 112,0
4984i "'1'"
4985)
4986declText (MLText
4987uid 3645,0
4988va (VaSet
4989font "Courier New,8,0"
4990)
4991xt "39000,43000,67500,43800"
4992st "W_CS            : std_logic                    := '1'"
4993)
4994)
4995*154 (PortIoInOut
4996uid 3674,0
4997shape (CompositeShape
4998uid 3675,0
4999va (VaSet
5000vasetType 1
5001fg "0,0,32768"
5002)
5003optionalChildren [
5004(Hexagon
5005uid 3676,0
5006sl 0
5007xt "111500,98625,113000,99375"
5008)
5009(Line
5010uid 3677,0
5011sl 0
5012xt "111000,99000,111500,99000"
5013pts [
5014"111000,99000"
5015"111500,99000"
5016]
5017)
5018]
5019)
5020stc 0
5021sf 1
5022tg (WTG
5023uid 3678,0
5024ps "PortIoTextPlaceStrategy"
5025stg "STSignalDisplayStrategy"
5026f (Text
5027uid 3679,0
5028va (VaSet
5029)
5030xt "114000,98500,116400,99500"
5031st "MISO"
5032blo "114000,99300"
5033tm "WireNameMgr"
5034)
5035)
5036)
5037*155 (Net
5038uid 3680,0
5039decl (Decl
5040n "MOSI"
5041t "std_logic"
5042o 34
5043suid 113,0
5044i "'0'"
5045)
5046declText (MLText
5047uid 3681,0
5048va (VaSet
5049font "Courier New,8,0"
5050)
5051xt "39000,29400,67500,30200"
5052st "MOSI            : std_logic                    := '0'"
5053)
5054)
5055*156 (PortIoOut
5056uid 3688,0
5057shape (CompositeShape
5058uid 3689,0
5059va (VaSet
5060vasetType 1
5061fg "0,0,32768"
5062)
5063optionalChildren [
5064(Pentagon
5065uid 3690,0
5066sl 0
5067ro 270
5068xt "111500,99625,113000,100375"
5069)
5070(Line
5071uid 3691,0
5072sl 0
5073ro 270
5074xt "111000,100000,111500,100000"
5075pts [
5076"111000,100000"
5077"111500,100000"
5078]
5079)
5080]
5081)
5082stc 0
5083sf 1
5084tg (WTG
5085uid 3692,0
5086ps "PortIoTextPlaceStrategy"
5087stg "STSignalDisplayStrategy"
5088f (Text
5089uid 3693,0
5090va (VaSet
5091)
5092xt "114000,99500,116400,100500"
5093st "MOSI"
5094blo "114000,100300"
5095tm "WireNameMgr"
5096)
5097)
5098)
5099*157 (Net
5100uid 3694,0
5101decl (Decl
5102n "MISO"
5103t "std_logic"
5104preAdd 0
5105posAdd 0
5106o 54
5107suid 114,0
5108)
5109declText (MLText
5110uid 3695,0
5111va (VaSet
5112font "Courier New,8,0"
5113)
5114xt "39000,46200,54000,47000"
5115st "MISO            : std_logic"
5116)
5117)
5118*158 (HdlText
5119uid 3700,0
5120optionalChildren [
5121*159 (EmbeddedText
5122uid 3706,0
5123commentText (CommentText
5124uid 3707,0
5125ps "CenterOffsetStrategy"
5126shape (Rectangle
5127uid 3708,0
5128va (VaSet
5129vasetType 1
5130fg "65535,65535,65535"
5131lineColor "0,0,32768"
5132lineWidth 2
5133)
5134xt "82000,106000,99000,118000"
5135)
5136oxt "0,0,18000,5000"
5137text (MLText
5138uid 3709,0
5139va (VaSet
5140)
5141xt "82200,106200,98600,118200"
5142st "
5143-- MISC 6     
5144TRG_V <= '0';
5145RS485_C_RE <= '0';
5146RS485_C_DE <= '0';   
5147RS485_C_DO <= RS485_C_DI;
5148
5149RS485_E_RE <= '0';     
5150RS485_E_DE <= '0';
5151--RS485_E_DO <= RS485_E_DI;
5152
5153-- DENABLE <= '0'; -- domino wave stopped
5154-- DENABLE <= '1'; -- domino wave running
5155
5156
5157EE_CS <= '1';
5158"
5159tm "HdlTextMgr"
5160wrapOption 3
5161visibleHeight 12000
5162visibleWidth 17000
5163)
5164)
5165)
5166]
5167shape (Rectangle
5168uid 3701,0
5169va (VaSet
5170vasetType 1
5171fg "65535,65535,37120"
5172lineColor "0,0,32768"
5173lineWidth 2
5174)
5175xt "100000,102000,108000,115000"
5176)
5177oxt "0,0,8000,10000"
5178ttg (MlTextGroup
5179uid 3702,0
5180ps "CenterOffsetStrategy"
5181stg "VerticalLayoutStrategy"
5182textVec [
5183*160 (Text
5184uid 3703,0
5185va (VaSet
5186font "Arial,8,1"
5187)
5188xt "103150,106000,105550,107000"
5189st "MISC"
5190blo "103150,106800"
5191tm "HdlTextNameMgr"
5192)
5193*161 (Text
5194uid 3704,0
5195va (VaSet
5196font "Arial,8,1"
5197)
5198xt "103150,107000,103950,108000"
5199st "6"
5200blo "103150,107800"
5201tm "HdlTextNumberMgr"
5202)
5203]
5204)
5205viewicon (ZoomableIcon
5206uid 3705,0
5207sl 0
5208va (VaSet
5209vasetType 1
5210fg "49152,49152,49152"
5211)
5212xt "100250,113250,101750,114750"
5213iconName "TextFile.png"
5214iconMaskName "TextFile.msk"
5215ftype 21
5216)
5217viewiconposition 0
5218)
5219*162 (PortIoOut
5220uid 3710,0
5221shape (CompositeShape
5222uid 3711,0
5223va (VaSet
5224vasetType 1
5225fg "0,0,32768"
5226)
5227optionalChildren [
5228(Pentagon
5229uid 3712,0
5230sl 0
5231ro 270
5232xt "111500,102625,113000,103375"
5233)
5234(Line
5235uid 3713,0
5236sl 0
5237ro 270
5238xt "111000,103000,111500,103000"
5239pts [
5240"111000,103000"
5241"111500,103000"
5242]
5243)
5244]
5245)
5246stc 0
5247sf 1
5248tg (WTG
5249uid 3714,0
5250ps "PortIoTextPlaceStrategy"
5251stg "STSignalDisplayStrategy"
5252f (Text
5253uid 3715,0
5254va (VaSet
5255)
5256xt "114000,102500,117000,103500"
5257st "TRG_V"
5258blo "114000,103300"
5259tm "WireNameMgr"
5260)
5261)
5262)
5263*163 (PortIoOut
5264uid 3716,0
5265shape (CompositeShape
5266uid 3717,0
5267va (VaSet
5268vasetType 1
5269fg "0,0,32768"
5270)
5271optionalChildren [
5272(Pentagon
5273uid 3718,0
5274sl 0
5275ro 270
5276xt "111500,103625,113000,104375"
5277)
5278(Line
5279uid 3719,0
5280sl 0
5281ro 270
5282xt "111000,104000,111500,104000"
5283pts [
5284"111000,104000"
5285"111500,104000"
5286]
5287)
5288]
5289)
5290stc 0
5291sf 1
5292tg (WTG
5293uid 3720,0
5294ps "PortIoTextPlaceStrategy"
5295stg "STSignalDisplayStrategy"
5296f (Text
5297uid 3721,0
5298va (VaSet
5299)
5300xt "114000,103500,119600,104500"
5301st "RS485_C_RE"
5302blo "114000,104300"
5303tm "WireNameMgr"
5304)
5305)
5306)
5307*164 (PortIoOut
5308uid 3722,0
5309shape (CompositeShape
5310uid 3723,0
5311va (VaSet
5312vasetType 1
5313fg "0,0,32768"
5314)
5315optionalChildren [
5316(Pentagon
5317uid 3724,0
5318sl 0
5319ro 270
5320xt "111500,104625,113000,105375"
5321)
5322(Line
5323uid 3725,0
5324sl 0
5325ro 270
5326xt "111000,105000,111500,105000"
5327pts [
5328"111000,105000"
5329"111500,105000"
5330]
5331)
5332]
5333)
5334stc 0
5335sf 1
5336tg (WTG
5337uid 3726,0
5338ps "PortIoTextPlaceStrategy"
5339stg "STSignalDisplayStrategy"
5340f (Text
5341uid 3727,0
5342va (VaSet
5343)
5344xt "114000,104500,119600,105500"
5345st "RS485_C_DE"
5346blo "114000,105300"
5347tm "WireNameMgr"
5348)
5349)
5350)
5351*165 (PortIoOut
5352uid 3728,0
5353shape (CompositeShape
5354uid 3729,0
5355va (VaSet
5356vasetType 1
5357fg "0,0,32768"
5358)
5359optionalChildren [
5360(Pentagon
5361uid 3730,0
5362sl 0
5363ro 270
5364xt "111500,105625,113000,106375"
5365)
5366(Line
5367uid 3731,0
5368sl 0
5369ro 270
5370xt "111000,106000,111500,106000"
5371pts [
5372"111000,106000"
5373"111500,106000"
5374]
5375)
5376]
5377)
5378stc 0
5379sf 1
5380tg (WTG
5381uid 3732,0
5382ps "PortIoTextPlaceStrategy"
5383stg "STSignalDisplayStrategy"
5384f (Text
5385uid 3733,0
5386va (VaSet
5387)
5388xt "114000,105500,119500,106500"
5389st "RS485_E_RE"
5390blo "114000,106300"
5391tm "WireNameMgr"
5392)
5393)
5394)
5395*166 (PortIoOut
5396uid 3734,0
5397shape (CompositeShape
5398uid 3735,0
5399va (VaSet
5400vasetType 1
5401fg "0,0,32768"
5402)
5403optionalChildren [
5404(Pentagon
5405uid 3736,0
5406sl 0
5407ro 270
5408xt "111500,106625,113000,107375"
5409)
5410(Line
5411uid 3737,0
5412sl 0
5413ro 270
5414xt "111000,107000,111500,107000"
5415pts [
5416"111000,107000"
5417"111500,107000"
5418]
5419)
5420]
5421)
5422stc 0
5423sf 1
5424tg (WTG
5425uid 3738,0
5426ps "PortIoTextPlaceStrategy"
5427stg "STSignalDisplayStrategy"
5428f (Text
5429uid 3739,0
5430va (VaSet
5431)
5432xt "114000,106500,119500,107500"
5433st "RS485_E_DE"
5434blo "114000,107300"
5435tm "WireNameMgr"
5436)
5437)
5438)
5439*167 (PortIoOut
5440uid 3740,0
5441shape (CompositeShape
5442uid 3741,0
5443va (VaSet
5444vasetType 1
5445fg "0,0,32768"
5446)
5447optionalChildren [
5448(Pentagon
5449uid 3742,0
5450sl 0
5451ro 270
5452xt "111500,120625,113000,121375"
5453)
5454(Line
5455uid 3743,0
5456sl 0
5457ro 270
5458xt "111000,121000,111500,121000"
5459pts [
5460"111000,121000"
5461"111500,121000"
5462]
5463)
5464]
5465)
5466stc 0
5467sf 1
5468tg (WTG
5469uid 3744,0
5470ps "PortIoTextPlaceStrategy"
5471stg "STSignalDisplayStrategy"
5472f (Text
5473uid 3745,0
5474va (VaSet
5475)
5476xt "114000,120500,118000,121500"
5477st "DENABLE"
5478blo "114000,121300"
5479tm "WireNameMgr"
5480)
5481)
5482)
5483*168 (PortIoOut
5484uid 3752,0
5485shape (CompositeShape
5486uid 3753,0
5487va (VaSet
5488vasetType 1
5489fg "0,0,32768"
5490)
5491optionalChildren [
5492(Pentagon
5493uid 3754,0
5494sl 0
5495ro 270
5496xt "111500,109625,113000,110375"
5497)
5498(Line
5499uid 3755,0
5500sl 0
5501ro 270
5502xt "111000,110000,111500,110000"
5503pts [
5504"111000,110000"
5505"111500,110000"
5506]
5507)
5508]
5509)
5510stc 0
5511sf 1
5512tg (WTG
5513uid 3756,0
5514ps "PortIoTextPlaceStrategy"
5515stg "STSignalDisplayStrategy"
5516f (Text
5517uid 3757,0
5518va (VaSet
5519)
5520xt "114000,109500,116900,110500"
5521st "EE_CS"
5522blo "114000,110300"
5523tm "WireNameMgr"
5524)
5525)
5526)
5527*169 (Net
5528uid 3864,0
5529decl (Decl
5530n "TRG_V"
5531t "std_logic"
5532o 48
5533suid 126,0
5534)
5535declText (MLText
5536uid 3865,0
5537va (VaSet
5538font "Courier New,8,0"
5539)
5540xt "39000,41400,54000,42200"
5541st "TRG_V           : std_logic"
5542)
5543)
5544*170 (Net
5545uid 3866,0
5546decl (Decl
5547n "RS485_C_RE"
5548t "std_logic"
5549o 38
5550suid 127,0
5551)
5552declText (MLText
5553uid 3867,0
5554va (VaSet
5555font "Courier New,8,0"
5556)
5557xt "39000,33400,54000,34200"
5558st "RS485_C_RE      : std_logic"
5559)
5560)
5561*171 (Net
5562uid 3868,0
5563decl (Decl
5564n "RS485_C_DE"
5565t "std_logic"
5566o 36
5567suid 128,0
5568)
5569declText (MLText
5570uid 3869,0
5571va (VaSet
5572font "Courier New,8,0"
5573)
5574xt "39000,31800,54000,32600"
5575st "RS485_C_DE      : std_logic"
5576)
5577)
5578*172 (Net
5579uid 3870,0
5580decl (Decl
5581n "RS485_E_RE"
5582t "std_logic"
5583o 40
5584suid 129,0
5585)
5586declText (MLText
5587uid 3871,0
5588va (VaSet
5589font "Courier New,8,0"
5590)
5591xt "39000,35000,54000,35800"
5592st "RS485_E_RE      : std_logic"
5593)
5594)
5595*173 (Net
5596uid 3872,0
5597decl (Decl
5598n "RS485_E_DE"
5599t "std_logic"
5600o 39
5601suid 130,0
5602)
5603declText (MLText
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5605va (VaSet
5606font "Courier New,8,0"
5607)
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5609st "RS485_E_DE      : std_logic"
5610)
5611)
5612*174 (Net
5613uid 3874,0
5614decl (Decl
5615n "DENABLE"
5616t "std_logic"
5617o 25
5618suid 131,0
5619i "'0'"
5620)
5621declText (MLText
5622uid 3875,0
5623va (VaSet
5624font "Courier New,8,0"
5625)
5626xt "39000,23800,67500,24600"
5627st "DENABLE         : std_logic                    := '0'"
5628)
5629)
5630*175 (Net
5631uid 3878,0
5632decl (Decl
5633n "EE_CS"
5634t "std_logic"
5635o 30
5636suid 133,0
5637)
5638declText (MLText
5639uid 3879,0
5640va (VaSet
5641font "Courier New,8,0"
5642)
5643xt "39000,27800,54000,28600"
5644st "EE_CS           : std_logic"
5645)
5646)
5647*176 (PortIoOut
5648uid 3995,0
5649shape (CompositeShape
5650uid 3996,0
5651va (VaSet
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5653fg "0,0,32768"
5654)
5655optionalChildren [
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5660xt "19000,112625,20500,113375"
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5662(Line
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5668"21000,113000"
5669"20500,113000"
5670]
5671)
5672]
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5674stc 0
5675sf 1
5676tg (WTG
5677uid 3999,0
5678ps "PortIoTextPlaceStrategy"
5679stg "STSignalDisplayStrategy"
5680f (Text
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5683)
5684xt "13600,112500,18000,113500"
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5687blo "18000,113300"
5688tm "WireNameMgr"
5689)
5690)
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5692*177 (PortIoOut
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5705xt "19000,113625,20500,114375"
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5714"20500,114000"
5715]
5716)
5717]
5718)
5719stc 0
5720sf 1
5721tg (WTG
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5723ps "PortIoTextPlaceStrategy"
5724stg "STSignalDisplayStrategy"
5725f (Text
5726uid 4006,0
5727va (VaSet
5728)
5729xt "13600,113500,18000,114500"
5730st "D1_SRCLK"
5731ju 2
5732blo "18000,114300"
5733tm "WireNameMgr"
5734)
5735)
5736)
5737*178 (PortIoOut
5738uid 4007,0
5739shape (CompositeShape
5740uid 4008,0
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5742vasetType 1
5743fg "0,0,32768"
5744)
5745optionalChildren [
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5749ro 90
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5759"20500,115000"
5760]
5761)
5762]
5763)
5764stc 0
5765sf 1
5766tg (WTG
5767uid 4011,0
5768ps "PortIoTextPlaceStrategy"
5769stg "STSignalDisplayStrategy"
5770f (Text
5771uid 4012,0
5772va (VaSet
5773)
5774xt "13600,114500,18000,115500"
5775st "D2_SRCLK"
5776ju 2
5777blo "18000,115300"
5778tm "WireNameMgr"
5779)
5780)
5781)
5782*179 (PortIoOut
5783uid 4013,0
5784shape (CompositeShape
5785uid 4014,0
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5787vasetType 1
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5794ro 90
5795xt "19000,115625,20500,116375"
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5797(Line
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5799sl 0
5800ro 90
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5804"20500,116000"
5805]
5806)
5807]
5808)
5809stc 0
5810sf 1
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5815f (Text
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5817va (VaSet
5818)
5819xt "13600,115500,18000,116500"
5820st "D3_SRCLK"
5821ju 2
5822blo "18000,116300"
5823tm "WireNameMgr"
5824)
5825)
5826)
5827*180 (PortIoOut
5828uid 4916,0
5829shape (CompositeShape
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5831va (VaSet
5832vasetType 1
5833fg "0,0,32768"
5834)
5835optionalChildren [
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5837uid 4918,0
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5839ro 270
5840xt "111500,119625,113000,120375"
5841)
5842(Line
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5844sl 0
5845ro 270
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5848"111000,120000"
5849"111500,120000"
5850]
5851)
5852]
5853)
5854stc 0
5855sf 1
5856tg (WTG
5857uid 4920,0
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5859stg "STSignalDisplayStrategy"
5860f (Text
5861uid 4921,0
5862va (VaSet
5863)
5864xt "114000,119500,115900,120500"
5865st "D_T"
5866blo "114000,120300"
5867tm "WireNameMgr"
5868)
5869)
5870)
5871*181 (Net
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5875t "std_logic_vector"
5876b "(7 DOWNTO 0)"
5877o 28
5878suid 141,0
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5881declText (MLText
5882uid 5321,0
5883va (VaSet
5884font "Courier New,8,0"
5885)
5886xt "39000,26200,73500,27000"
5887st "D_T             : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')"
5888)
5889)
5890*182 (PortIoIn
5891uid 6781,0
5892shape (CompositeShape
5893uid 6782,0
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5895vasetType 1
5896fg "0,0,32768"
5897)
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5900uid 6783,0
5901sl 0
5902ro 270
5903xt "57000,156625,58500,157375"
5904)
5905(Line
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5907sl 0
5908ro 270
5909xt "58500,157000,59000,157000"
5910pts [
5911"58500,157000"
5912"59000,157000"
5913]
5914)
5915]
5916)
5917stc 0
5918sf 1
5919tg (WTG
5920uid 6785,0
5921ps "PortIoTextPlaceStrategy"
5922stg "STSignalDisplayStrategy"
5923f (Text
5924uid 6786,0
5925va (VaSet
5926)
5927xt "51800,156500,56000,157500"
5928st "D_PLLLCK"
5929ju 2
5930blo "56000,157300"
5931tm "WireNameMgr"
5932)
5933)
5934)
5935*183 (Net
5936uid 6793,0
5937decl (Decl
5938n "D_PLLLCK"
5939t "std_logic_vector"
5940b "(3 DOWNTO 0)"
5941o 10
5942suid 152,0
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5944declText (MLText
5945uid 6794,0
5946va (VaSet
5947font "Courier New,8,0"
5948)
5949xt "39000,11000,64000,11800"
5950st "D_PLLLCK        : std_logic_vector(3 DOWNTO 0)"
5951)
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5953*184 (PortIoOut
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5959fg "0,0,32768"
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5961optionalChildren [
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5964sl 0
5965ro 270
5966xt "75500,156625,77000,157375"
5967)
5968(Line
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5970sl 0
5971ro 270
5972xt "75000,157000,75500,157000"
5973pts [
5974"75000,157000"
5975"75500,157000"
5976]
5977)
5978]
5979)
5980stc 0
5981sf 1
5982tg (WTG
5983uid 6878,0
5984ps "PortIoTextPlaceStrategy"
5985stg "STSignalDisplayStrategy"
5986f (Text
5987uid 6879,0
5988va (VaSet
5989)
5990xt "78000,156500,80300,157500"
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5992blo "78000,157300"
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5994)
5995)
5996)
5997*185 (Net
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6000n "D_T2"
6001t "std_logic_vector"
6002b "(3 DOWNTO 0)"
6003o 29
6004suid 154,0
6005i "(others => '0')"
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6007declText (MLText
6008uid 6887,0
6009va (VaSet
6010font "Courier New,8,0"
6011)
6012xt "39000,27000,73500,27800"
6013st "D_T2            : std_logic_vector(3 DOWNTO 0) := (others => '0')"
6014)
6015)
6016*186 (HdlText
6017uid 6888,0
6018optionalChildren [
6019*187 (EmbeddedText
6020uid 6894,0
6021commentText (CommentText
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6024shape (Rectangle
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6026va (VaSet
6027vasetType 1
6028fg "65535,65535,65535"
6029lineColor "0,0,32768"
6030lineWidth 2
6031)
6032xt "62000,153000,72000,156000"
6033)
6034oxt "0,0,18000,5000"
6035text (MLText
6036uid 6897,0
6037va (VaSet
6038)
6039xt "62200,153200,70300,154200"
6040st "
6041D_T2 <= D_PLLLCK;
6042"
6043tm "HdlTextMgr"
6044wrapOption 3
6045visibleHeight 3000
6046visibleWidth 10000
6047)
6048)
6049)
6050]
6051shape (Rectangle
6052uid 6889,0
6053va (VaSet
6054vasetType 1
6055fg "65535,65535,37120"
6056lineColor "0,0,32768"
6057lineWidth 2
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6059xt "65000,156000,68000,159000"
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6061oxt "0,0,8000,10000"
6062ttg (MlTextGroup
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6065stg "VerticalLayoutStrategy"
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6072xt "66150,160000,67850,161000"
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6074blo "66150,160800"
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6077*189 (Text
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6079va (VaSet
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6081)
6082xt "66150,161000,66950,162000"
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6084blo "66150,161800"
6085tm "HdlTextNumberMgr"
6086)
6087]
6088)
6089viewicon (ZoomableIcon
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6091sl 0
6092va (VaSet
6093vasetType 1
6094fg "49152,49152,49152"
6095)
6096xt "65250,157250,66750,158750"
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6098iconMaskName "TextFile.msk"
6099ftype 21
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6101viewiconposition 0
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6103*190 (HdlText
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6117lineWidth 2
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6119xt "16000,129000,36000,135000"
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6121oxt "0,0,18000,5000"
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6126xt "16200,129200,28400,131200"
6127st "
6128-- eb2 8                                       
6129D_A <= drs_channel_id;
6130
6131"
6132tm "HdlTextMgr"
6133wrapOption 3
6134visibleHeight 6000
6135visibleWidth 20000
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6138)
6139]
6140shape (Rectangle
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6143vasetType 1
6144fg "65535,65535,37120"
6145lineColor "0,0,32768"
6146lineWidth 2
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6166*193 (Text
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6178viewicon (ZoomableIcon
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6180sl 0
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6185xt "21250,127250,22750,128750"
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6207(Line
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6210ro 270
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6219stc 0
6220sf 1
6221tg (WTG
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6255*196 (Net
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6265va (VaSet
6266font "Courier New,8,0"
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6285xt "91000,87000,91000,87000"
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6288"91000,87000"
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6292ps "OnEdgeStrategy"
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6298isHidden 1
6299fg "0,65535,65535"
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6301xt "90250,86625,91000,87375"
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6303tg (CPTG
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6318s (Text
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6324xt "698200,402500,698200,402500"
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6350"94000,87000"
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6354ps "OnEdgeStrategy"
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6365tg (CPTG
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6379blo "137600,449907"
6380)
6381s (Text
6382uid 7662,0
6383sl 0
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6387xt "137600,450107,137600,450107"
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6389blo "137600,450107"
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6392thePort (LogicalPort
6393m 1
6394decl (Decl
6395n "t"
6396t "std_logic"
6397o 24
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6400)
6401)
6402*202 (CommentGraphic
6403uid 7642,0
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6410layer 8
6411sl 0
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6414transparent 1
6415fg "49152,49152,49152"
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6440xt "91000,87000,92000,88000"
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6461xt "91988,87329,92988,87329"
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7115-- eb3 9                         
7116A0_T(0) <= ready;
7117A0_T(1) <= shifting;
7118A0_T(2) <= CLK25_PSOUT;
7119A0_T(3) <= PS_DIR_IN;
7120A0_T(4) <= PS_DO_IN;
7121A0_T(5) <= PSINCDEC_OUT;
7122A0_T(6) <= PSEN_OUT;
7123A0_T(7) <= DCM_locked;
7124
7125A1_T(0) <= SRIN;
7126A1_T(1) <= PSDONE_extraOUT;
7127A1_T(2) <= PSCLK_OUT;
7128A1_T(3) <= LOCKED_extraOUT;
7129
7130A1_T(4) <= drs_channel_id(0);
7131A1_T(5) <= drs_channel_id(1);
7132A1_T(6) <= drs_channel_id(2);
7133A1_T(7) <= drs_channel_id(3);
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7211)
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7213*239 (Net
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7262)
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7264*242 (Net
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7285t "std_logic"
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7298*244 (Net
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7302t "std_logic"
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7316uid 10552,0
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7318n "DCM_locked"
7319t "std_logic"
7320preAdd 0
7321posAdd 0
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7332)
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7338t "std_logic"
7339preAdd 0
7340posAdd 0
7341o 77
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7343i "'0'"
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7351st "SIGNAL ready           : std_logic                    := '0'"
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7357n "shifting"
7358t "std_logic"
7359prec "-- status:"
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7366declText (MLText
7367uid 10569,0
7368va (VaSet
7369font "Courier New,8,0"
7370)
7371xt "39000,67200,71000,68800"
7372st "-- status:
7373SIGNAL shifting        : std_logic                    := '0'"
7374)
7375)
7376*248 (Net
7377uid 10576,0
7378decl (Decl
7379n "PSDONE_extraOUT"
7380t "std_logic"
7381o 65
7382suid 194,0
7383)
7384declText (MLText
7385uid 10577,0
7386va (VaSet
7387font "Courier New,8,0"
7388)
7389xt "39000,56000,57500,56800"
7390st "SIGNAL PSDONE_extraOUT : std_logic"
7391)
7392)
7393*249 (Net
7394uid 10584,0
7395decl (Decl
7396n "PSCLK_OUT"
7397t "std_logic"
7398o 64
7399suid 195,0
7400)
7401declText (MLText
7402uid 10585,0
7403va (VaSet
7404font "Courier New,8,0"
7405)
7406xt "39000,55200,57500,56000"
7407st "SIGNAL PSCLK_OUT       : std_logic"
7408)
7409)
7410*250 (Net
7411uid 10592,0
7412decl (Decl
7413n "LOCKED_extraOUT"
7414t "std_logic"
7415o 63
7416suid 196,0
7417)
7418declText (MLText
7419uid 10593,0
7420va (VaSet
7421font "Courier New,8,0"
7422)
7423xt "39000,54400,57500,55200"
7424st "SIGNAL LOCKED_extraOUT : std_logic"
7425)
7426)
7427*251 (PortIoIn
7428uid 11090,0
7429shape (CompositeShape
7430uid 11091,0
7431va (VaSet
7432vasetType 1
7433fg "0,0,32768"
7434)
7435optionalChildren [
7436(Pentagon
7437uid 11092,0
7438sl 0
7439ro 270
7440xt "94000,102625,95500,103375"
7441)
7442(Line
7443uid 11093,0
7444sl 0
7445ro 270
7446xt "95500,103000,96000,103000"
7447pts [
7448"95500,103000"
7449"96000,103000"
7450]
7451)
7452]
7453)
7454stc 0
7455sf 1
7456tg (WTG
7457uid 11094,0
7458ps "PortIoTextPlaceStrategy"
7459stg "STSignalDisplayStrategy"
7460f (Text
7461uid 11095,0
7462va (VaSet
7463)
7464xt "87700,102500,93000,103500"
7465st "RS485_C_DI"
7466ju 2
7467blo "93000,103300"
7468tm "WireNameMgr"
7469)
7470)
7471)
7472*252 (Net
7473uid 11102,0
7474decl (Decl
7475n "RS485_C_DI"
7476t "std_logic"
7477o 11
7478suid 197,0
7479)
7480declText (MLText
7481uid 11103,0
7482va (VaSet
7483font "Courier New,8,0"
7484)
7485xt "39000,11800,54000,12600"
7486st "RS485_C_DI      : std_logic"
7487)
7488)
7489*253 (PortIoOut
7490uid 11104,0
7491shape (CompositeShape
7492uid 11105,0
7493va (VaSet
7494vasetType 1
7495fg "0,0,32768"
7496)
7497optionalChildren [
7498(Pentagon
7499uid 11106,0
7500sl 0
7501ro 270
7502xt "111500,111625,113000,112375"
7503)
7504(Line
7505uid 11107,0
7506sl 0
7507ro 270
7508xt "111000,112000,111500,112000"
7509pts [
7510"111000,112000"
7511"111500,112000"
7512]
7513)
7514]
7515)
7516stc 0
7517sf 1
7518tg (WTG
7519uid 11108,0
7520ps "PortIoTextPlaceStrategy"
7521stg "STSignalDisplayStrategy"
7522f (Text
7523uid 11109,0
7524va (VaSet
7525)
7526xt "114000,111500,119700,112500"
7527st "RS485_C_DO"
7528blo "114000,112300"
7529tm "WireNameMgr"
7530)
7531)
7532)
7533*254 (Net
7534uid 11116,0
7535decl (Decl
7536n "RS485_C_DO"
7537t "std_logic"
7538o 37
7539suid 198,0
7540)
7541declText (MLText
7542uid 11117,0
7543va (VaSet
7544font "Courier New,8,0"
7545)
7546xt "39000,32600,54000,33400"
7547st "RS485_C_DO      : std_logic"
7548)
7549)
7550*255 (PortIoIn
7551uid 11508,0
7552shape (CompositeShape
7553uid 11509,0
7554va (VaSet
7555vasetType 1
7556fg "0,0,32768"
7557)
7558optionalChildren [
7559(Pentagon
7560uid 11510,0
7561sl 0
7562ro 270
7563xt "121000,115625,122500,116375"
7564)
7565(Line
7566uid 11511,0
7567sl 0
7568ro 270
7569xt "122500,116000,123000,116000"
7570pts [
7571"122500,116000"
7572"123000,116000"
7573]
7574)
7575]
7576)
7577stc 0
7578sf 1
7579tg (WTG
7580uid 11512,0
7581ps "PortIoTextPlaceStrategy"
7582stg "STSignalDisplayStrategy"
7583f (Text
7584uid 11513,0
7585va (VaSet
7586)
7587xt "114800,115500,120000,116500"
7588st "RS485_E_DI"
7589ju 2
7590blo "120000,116300"
7591tm "WireNameMgr"
7592)
7593)
7594)
7595*256 (Net
7596uid 11520,0
7597decl (Decl
7598n "RS485_E_DI"
7599t "std_logic"
7600o 12
7601suid 200,0
7602)
7603declText (MLText
7604uid 11521,0
7605va (VaSet
7606font "Courier New,8,0"
7607)
7608xt "39000,12600,54000,13400"
7609st "RS485_E_DI      : std_logic"
7610)
7611)
7612*257 (Net
7613uid 11534,0
7614decl (Decl
7615n "RS485_E_DO"
7616t "std_logic"
7617o 13
7618suid 201,0
7619)
7620declText (MLText
7621uid 11535,0
7622va (VaSet
7623font "Courier New,8,0"
7624)
7625xt "39000,13400,54000,14200"
7626st "RS485_E_DO      : std_logic"
7627)
7628)
7629*258 (PortIoIn
7630uid 11922,0
7631shape (CompositeShape
7632uid 11923,0
7633va (VaSet
7634vasetType 1
7635fg "0,0,32768"
7636)
7637optionalChildren [
7638(Pentagon
7639uid 11924,0
7640sl 0
7641ro 90
7642xt "126500,113625,128000,114375"
7643)
7644(Line
7645uid 11925,0
7646sl 0
7647ro 90
7648xt "126000,114000,126500,114000"
7649pts [
7650"126500,114000"
7651"126000,114000"
7652]
7653)
7654]
7655)
7656stc 0
7657sf 1
7658tg (WTG
7659uid 11926,0
7660ps "PortIoTextPlaceStrategy"
7661stg "STSignalDisplayStrategy"
7662f (Text
7663uid 11927,0
7664va (VaSet
7665)
7666xt "129000,113500,134600,114500"
7667st "RS485_E_DO"
7668blo "129000,114300"
7669tm "WireNameMgr"
7670)
7671)
7672)
7673*259 (PortIoOut
7674uid 12326,0
7675shape (CompositeShape
7676uid 12327,0
7677va (VaSet
7678vasetType 1
7679fg "0,0,32768"
7680)
7681optionalChildren [
7682(Pentagon
7683uid 12328,0
7684sl 0
7685ro 270
7686xt "87500,139625,89000,140375"
7687)
7688(Line
7689uid 12329,0
7690sl 0
7691ro 270
7692xt "87000,140000,87500,140000"
7693pts [
7694"87000,140000"
7695"87500,140000"
7696]
7697)
7698]
7699)
7700stc 0
7701sf 1
7702tg (WTG
7703uid 12330,0
7704ps "PortIoTextPlaceStrategy"
7705stg "STSignalDisplayStrategy"
7706f (Text
7707uid 12331,0
7708va (VaSet
7709)
7710xt "89000,139500,91300,140500"
7711st "SRIN"
7712blo "89000,140300"
7713tm "WireNameMgr"
7714)
7715)
7716)
7717*260 (Net
7718uid 12334,0
7719decl (Decl
7720n "SRIN"
7721t "std_logic"
7722o 42
7723suid 203,0
7724i "'0'"
7725)
7726declText (MLText
7727uid 12335,0
7728va (VaSet
7729font "Courier New,8,0"
7730)
7731xt "39000,36600,67500,37400"
7732st "SRIN            : std_logic                    := '0'"
7733)
7734)
7735*261 (PortIoOut
7736uid 12539,0
7737shape (CompositeShape
7738uid 12540,0
7739va (VaSet
7740vasetType 1
7741fg "0,0,32768"
7742)
7743optionalChildren [
7744(Pentagon
7745uid 12541,0
7746sl 0
7747ro 270
7748xt "87500,140625,89000,141375"
7749)
7750(Line
7751uid 12542,0
7752sl 0
7753ro 270
7754xt "87000,141000,87500,141000"
7755pts [
7756"87000,141000"
7757"87500,141000"
7758]
7759)
7760]
7761)
7762stc 0
7763sf 1
7764tg (WTG
7765uid 12543,0
7766ps "PortIoTextPlaceStrategy"
7767stg "STSignalDisplayStrategy"
7768f (Text
7769uid 12544,0
7770va (VaSet
7771)
7772xt "90000,140500,95100,141500"
7773st "AMBER_LED"
7774blo "90000,141300"
7775tm "WireNameMgr"
7776)
7777)
7778)
7779*262 (PortIoOut
7780uid 12553,0
7781shape (CompositeShape
7782uid 12554,0
7783va (VaSet
7784vasetType 1
7785fg "0,0,32768"
7786)
7787optionalChildren [
7788(Pentagon
7789uid 12555,0
7790sl 0
7791ro 270
7792xt "87500,141625,89000,142375"
7793)
7794(Line
7795uid 12556,0
7796sl 0
7797ro 270
7798xt "87000,142000,87500,142000"
7799pts [
7800"87000,142000"
7801"87500,142000"
7802]
7803)
7804]
7805)
7806stc 0
7807sf 1
7808tg (WTG
7809uid 12557,0
7810ps "PortIoTextPlaceStrategy"
7811stg "STSignalDisplayStrategy"
7812f (Text
7813uid 12558,0
7814va (VaSet
7815)
7816xt "90000,141500,95100,142500"
7817st "GREEN_LED"
7818blo "90000,142300"
7819tm "WireNameMgr"
7820)
7821)
7822)
7823*263 (PortIoOut
7824uid 12567,0
7825shape (CompositeShape
7826uid 12568,0
7827va (VaSet
7828vasetType 1
7829fg "0,0,32768"
7830)
7831optionalChildren [
7832(Pentagon
7833uid 12569,0
7834sl 0
7835ro 270
7836xt "87500,142625,89000,143375"
7837)
7838(Line
7839uid 12570,0
7840sl 0
7841ro 270
7842xt "87000,143000,87500,143000"
7843pts [
7844"87000,143000"
7845"87500,143000"
7846]
7847)
7848]
7849)
7850stc 0
7851sf 1
7852tg (WTG
7853uid 12571,0
7854ps "PortIoTextPlaceStrategy"
7855stg "STSignalDisplayStrategy"
7856f (Text
7857uid 12572,0
7858va (VaSet
7859)
7860xt "90000,142500,94000,143500"
7861st "RED_LED"
7862blo "90000,143300"
7863tm "WireNameMgr"
7864)
7865)
7866)
7867*264 (Net
7868uid 12762,0
7869decl (Decl
7870n "AMBER_LED"
7871t "std_logic"
7872o 31
7873suid 207,0
7874)
7875declText (MLText
7876uid 12763,0
7877va (VaSet
7878font "Courier New,8,0"
7879)
7880xt "39000,18200,54000,19000"
7881st "AMBER_LED       : std_logic"
7882)
7883)
7884*265 (Net
7885uid 12764,0
7886decl (Decl
7887n "GREEN_LED"
7888t "std_logic"
7889o 32
7890suid 208,0
7891)
7892declText (MLText
7893uid 12765,0
7894va (VaSet
7895font "Courier New,8,0"
7896)
7897xt "39000,28600,54000,29400"
7898st "GREEN_LED       : std_logic"
7899)
7900)
7901*266 (Net
7902uid 12766,0
7903decl (Decl
7904n "RED_LED"
7905t "std_logic"
7906o 33
7907suid 209,0
7908)
7909declText (MLText
7910uid 12767,0
7911va (VaSet
7912font "Courier New,8,0"
7913)
7914xt "39000,31000,54000,31800"
7915st "RED_LED         : std_logic"
7916)
7917)
7918*267 (Wire
7919uid 245,0
7920shape (OrthoPolyLine
7921uid 246,0
7922va (VaSet
7923vasetType 3
7924)
7925xt "21000,68000,51250,68000"
7926pts [
7927"51250,68000"
7928"21000,68000"
7929]
7930)
7931start &27
7932end &67
7933ss 0
7934sat 32
7935eat 32
7936stc 0
7937st 0
7938sf 1
7939si 0
7940tg (WTG
7941uid 249,0
7942ps "ConnStartEndStrategy"
7943stg "STSignalDisplayStrategy"
7944f (Text
7945uid 250,0
7946va (VaSet
7947isHidden 1
7948)
7949xt "53250,67000,56050,68000"
7950st "X_50M"
7951blo "53250,67800"
7952tm "WireNameMgr"
7953)
7954)
7955on &88
7956)
7957*268 (Wire
7958uid 277,0
7959shape (OrthoPolyLine
7960uid 278,0
7961va (VaSet
7962vasetType 3
7963lineWidth 2
7964)
7965xt "32000,81000,51250,81000"
7966pts [
7967"51250,81000"
7968"32000,81000"
7969]
7970)
7971start &17
7972end &68
7973sat 32
7974eat 2
7975sty 1
7976st 0
7977sf 1
7978si 0
7979tg (WTG
7980uid 281,0
7981ps "ConnStartEndStrategy"
7982stg "STSignalDisplayStrategy"
7983f (Text
7984uid 282,0
7985va (VaSet
7986)
7987xt "44000,80000,49900,81000"
7988st "board_id : (3:0)"
7989blo "44000,80800"
7990tm "WireNameMgr"
7991)
7992)
7993on &72
7994)
7995*269 (Wire
7996uid 285,0
7997shape (OrthoPolyLine
7998uid 286,0
7999va (VaSet
8000vasetType 3
8001lineWidth 2
8002)
8003xt "32000,82000,51250,82000"
8004pts [
8005"51250,82000"
8006"32000,82000"
8007]
8008)
8009start &18
8010end &68
8011sat 32
8012eat 2
8013sty 1
8014st 0
8015sf 1
8016si 0
8017tg (WTG
8018uid 289,0
8019ps "ConnStartEndStrategy"
8020stg "STSignalDisplayStrategy"
8021f (Text
8022uid 290,0
8023va (VaSet
8024)
8025xt "45000,81000,50700,82000"
8026st "crate_id : (1:0)"
8027blo "45000,81800"
8028tm "WireNameMgr"
8029)
8030)
8031on &73
8032)
8033*270 (Wire
8034uid 362,0
8035shape (OrthoPolyLine
8036uid 363,0
8037va (VaSet
8038vasetType 3
8039)
8040xt "21000,90000,51250,90000"
8041pts [
8042"21000,90000"
8043"51250,90000"
8044]
8045)
8046start &96
8047end &16
8048sat 32
8049eat 32
8050stc 0
8051st 0
8052sf 1
8053si 0
8054tg (WTG
8055uid 364,0
8056ps "ConnStartEndStrategy"
8057stg "STSignalDisplayStrategy"
8058f (Text
8059uid 365,0
8060va (VaSet
8061isHidden 1
8062)
8063xt "22000,89000,25600,90000"
8064st "OE_ADC"
8065blo "22000,89800"
8066tm "WireNameMgr"
8067)
8068)
8069on &97
8070)
8071*271 (Wire
8072uid 418,0
8073shape (OrthoPolyLine
8074uid 419,0
8075va (VaSet
8076vasetType 3
8077)
8078xt "80750,71000,111000,71000"
8079pts [
8080"80750,71000"
8081"111000,71000"
8082]
8083)
8084start &13
8085end &74
8086sat 32
8087eat 32
8088stc 0
8089st 0
8090sf 1
8091si 0
8092tg (WTG
8093uid 422,0
8094ps "ConnStartEndStrategy"
8095stg "STSignalDisplayStrategy"
8096f (Text
8097uid 423,0
8098va (VaSet
8099isHidden 1
8100)
8101xt "82000,70000,85100,71000"
8102st "W_RES"
8103blo "82000,70800"
8104tm "WireNameMgr"
8105)
8106)
8107on &149
8108)
8109*272 (Wire
8110uid 426,0
8111shape (OrthoPolyLine
8112uid 427,0
8113va (VaSet
8114vasetType 3
8115lineWidth 2
8116)
8117xt "80750,68000,111000,68000"
8118pts [
8119"80750,68000"
8120"111000,68000"
8121]
8122)
8123start &19
8124end &75
8125sat 32
8126eat 32
8127sty 1
8128stc 0
8129st 0
8130sf 1
8131si 0
8132tg (WTG
8133uid 430,0
8134ps "ConnStartEndStrategy"
8135stg "STSignalDisplayStrategy"
8136f (Text
8137uid 431,0
8138va (VaSet
8139isHidden 1
8140)
8141xt "82000,67000,84000,68000"
8142st "W_A"
8143blo "82000,67800"
8144tm "WireNameMgr"
8145)
8146)
8147on &147
8148)
8149*273 (Wire
8150uid 434,0
8151shape (OrthoPolyLine
8152uid 435,0
8153va (VaSet
8154vasetType 3
8155)
8156xt "80750,75000,111000,75000"
8157pts [
8158"80750,75000"
8159"111000,75000"
8160]
8161)
8162start &20
8163end &76
8164sat 32
8165eat 32
8166stc 0
8167st 0
8168sf 1
8169si 0
8170tg (WTG
8171uid 438,0
8172ps "ConnStartEndStrategy"
8173stg "STSignalDisplayStrategy"
8174f (Text
8175uid 439,0
8176va (VaSet
8177isHidden 1
8178)
8179xt "82000,74000,84600,75000"
8180st "W_CS"
8181blo "82000,74800"
8182tm "WireNameMgr"
8183)
8184)
8185on &153
8186)
8187*274 (Wire
8188uid 442,0
8189shape (OrthoPolyLine
8190uid 443,0
8191va (VaSet
8192vasetType 3
8193lineWidth 2
8194)
8195xt "80750,69000,111000,69000"
8196pts [
8197"80750,69000"
8198"111000,69000"
8199]
8200)
8201start &21
8202end &77
8203sat 32
8204eat 32
8205sty 1
8206stc 0
8207st 0
8208sf 1
8209si 0
8210tg (WTG
8211uid 446,0
8212ps "ConnStartEndStrategy"
8213stg "STSignalDisplayStrategy"
8214f (Text
8215uid 447,0
8216va (VaSet
8217isHidden 1
8218)
8219xt "82000,68000,84100,69000"
8220st "W_D"
8221blo "82000,68800"
8222tm "WireNameMgr"
8223)
8224)
8225on &148
8226)
8227*275 (Wire
8228uid 450,0
8229shape (OrthoPolyLine
8230uid 451,0
8231va (VaSet
8232vasetType 3
8233)
8234xt "80750,74000,111000,74000"
8235pts [
8236"111000,74000"
8237"80750,74000"
8238]
8239)
8240start &78
8241end &22
8242sat 32
8243eat 32
8244stc 0
8245st 0
8246sf 1
8247si 0
8248tg (WTG
8249uid 454,0
8250ps "ConnStartEndStrategy"
8251stg "STSignalDisplayStrategy"
8252f (Text
8253uid 455,0
8254va (VaSet
8255isHidden 1
8256)
8257xt "82000,73000,84800,74000"
8258st "W_INT"
8259blo "82000,73800"
8260tm "WireNameMgr"
8261)
8262)
8263on &152
8264)
8265*276 (Wire
8266uid 458,0
8267shape (OrthoPolyLine
8268uid 459,0
8269va (VaSet
8270vasetType 3
8271)
8272xt "80750,72000,111000,72000"
8273pts [
8274"80750,72000"
8275"111000,72000"
8276]
8277)
8278start &23
8279end &79
8280sat 32
8281eat 32
8282stc 0
8283st 0
8284sf 1
8285si 0
8286tg (WTG
8287uid 462,0
8288ps "ConnStartEndStrategy"
8289stg "STSignalDisplayStrategy"
8290f (Text
8291uid 463,0
8292va (VaSet
8293isHidden 1
8294)
8295xt "82000,71000,84700,72000"
8296st "W_RD"
8297blo "82000,71800"
8298tm "WireNameMgr"
8299)
8300)
8301on &150
8302)
8303*277 (Wire
8304uid 466,0
8305shape (OrthoPolyLine
8306uid 467,0
8307va (VaSet
8308vasetType 3
8309)
8310xt "80750,73000,111000,73000"
8311pts [
8312"80750,73000"
8313"111000,73000"
8314]
8315)
8316start &24
8317end &80
8318sat 32
8319eat 32
8320stc 0
8321st 0
8322sf 1
8323si 0
8324tg (WTG
8325uid 470,0
8326ps "ConnStartEndStrategy"
8327stg "STSignalDisplayStrategy"
8328f (Text
8329uid 471,0
8330va (VaSet
8331isHidden 1
8332)
8333xt "82000,72000,84800,73000"
8334st "W_WR"
8335blo "82000,72800"
8336tm "WireNameMgr"
8337)
8338)
8339on &151
8340)
8341*278 (Wire
8342uid 1467,0
8343shape (OrthoPolyLine
8344uid 1468,0
8345va (VaSet
8346vasetType 3
8347)
8348xt "32000,95000,51250,95000"
8349pts [
8350"32000,95000"
8351"51250,95000"
8352]
8353)
8354start &100
8355end &28
8356sat 2
8357eat 32
8358st 0
8359sf 1
8360si 0
8361tg (WTG
8362uid 1471,0
8363ps "ConnStartEndStrategy"
8364stg "STSignalDisplayStrategy"
8365f (Text
8366uid 1472,0
8367va (VaSet
8368)
8369xt "34000,94000,39900,95000"
8370st "adc_data_array"
8371blo "34000,94800"
8372tm "WireNameMgr"
8373)
8374)
8375on &81
8376)
8377*279 (Wire
8378uid 1730,0
8379shape (OrthoPolyLine
8380uid 1731,0
8381va (VaSet
8382vasetType 3
8383lineWidth 2
8384)
8385xt "21000,89000,51250,89000"
8386pts [
8387"21000,89000"
8388"51250,89000"
8389]
8390)
8391start &98
8392end &29
8393sat 32
8394eat 32
8395sty 1
8396stc 0
8397st 0
8398sf 1
8399si 0
8400tg (WTG
8401uid 1734,0
8402ps "ConnStartEndStrategy"
8403stg "STSignalDisplayStrategy"
8404f (Text
8405uid 1735,0
8406va (VaSet
8407isHidden 1
8408)
8409xt "22000,88000,25000,89000"
8410st "A_OTR"
8411blo "22000,88800"
8412tm "WireNameMgr"
8413)
8414)
8415on &99
8416)
8417*280 (Wire
8418uid 1833,0
8419shape (OrthoPolyLine
8420uid 1834,0
8421va (VaSet
8422vasetType 3
8423lineWidth 2
8424)
8425xt "12000,126000,21000,126000"
8426pts [
8427"21000,126000"
8428"12000,126000"
8429]
8430)
8431start &190
8432end &128
8433sat 2
8434eat 32
8435sty 1
8436stc 0
8437st 0
8438sf 1
8439si 0
8440tg (WTG
8441uid 1837,0
8442ps "ConnStartEndStrategy"
8443stg "STSignalDisplayStrategy"
8444f (Text
8445uid 1838,0
8446va (VaSet
8447isHidden 1
8448)
8449xt "13000,125000,14900,126000"
8450st "D_A"
8451blo "13000,125800"
8452tm "WireNameMgr"
8453)
8454)
8455on &129
8456)
8457*281 (Wire
8458uid 1841,0
8459shape (OrthoPolyLine
8460uid 1842,0
8461va (VaSet
8462vasetType 3
8463)
8464xt "21000,110000,51250,110000"
8465pts [
8466"51250,110000"
8467"21000,110000"
8468]
8469)
8470start &31
8471end &130
8472sat 32
8473eat 32
8474stc 0
8475st 0
8476sf 1
8477si 0
8478tg (WTG
8479uid 1845,0
8480ps "ConnStartEndStrategy"
8481stg "STSignalDisplayStrategy"
8482f (Text
8483uid 1846,0
8484va (VaSet
8485isHidden 1
8486)
8487xt "22000,109000,25500,110000"
8488st "DWRITE"
8489blo "22000,109800"
8490tm "WireNameMgr"
8491)
8492)
8493on &131
8494)
8495*282 (Wire
8496uid 1865,0
8497shape (OrthoPolyLine
8498uid 1866,0
8499va (VaSet
8500vasetType 3
8501)
8502xt "21000,105000,51250,105000"
8503pts [
8504"21000,105000"
8505"51250,105000"
8506]
8507)
8508start &120
8509end &32
8510sat 32
8511eat 32
8512stc 0
8513st 0
8514sf 1
8515si 0
8516tg (WTG
8517uid 1869,0
8518ps "ConnStartEndStrategy"
8519stg "STSignalDisplayStrategy"
8520f (Text
8521uid 1870,0
8522va (VaSet
8523isHidden 1
8524)
8525xt "22000,104000,26600,105000"
8526st "D0_SROUT"
8527blo "22000,104800"
8528tm "WireNameMgr"
8529)
8530)
8531on &124
8532)
8533*283 (Wire
8534uid 1873,0
8535shape (OrthoPolyLine
8536uid 1874,0
8537va (VaSet
8538vasetType 3
8539)
8540xt "21000,106000,51250,106000"
8541pts [
8542"21000,106000"
8543"51250,106000"
8544]
8545)
8546start &121
8547end &33
8548sat 32
8549eat 32
8550stc 0
8551st 0
8552sf 1
8553si 0
8554tg (WTG
8555uid 1877,0
8556ps "ConnStartEndStrategy"
8557stg "STSignalDisplayStrategy"
8558f (Text
8559uid 1878,0
8560va (VaSet
8561isHidden 1
8562)
8563xt "22000,105000,26600,106000"
8564st "D1_SROUT"
8565blo "22000,105800"
8566tm "WireNameMgr"
8567)
8568)
8569on &125
8570)
8571*284 (Wire
8572uid 1881,0
8573shape (OrthoPolyLine
8574uid 1882,0
8575va (VaSet
8576vasetType 3
8577)
8578xt "21000,107000,51250,107000"
8579pts [
8580"21000,107000"
8581"51250,107000"
8582]
8583)
8584start &122
8585end &34
8586sat 32
8587eat 32
8588stc 0
8589st 0
8590sf 1
8591si 0
8592tg (WTG
8593uid 1885,0
8594ps "ConnStartEndStrategy"
8595stg "STSignalDisplayStrategy"
8596f (Text
8597uid 1886,0
8598va (VaSet
8599isHidden 1
8600)
8601xt "22000,106000,26600,107000"
8602st "D2_SROUT"
8603blo "22000,106800"
8604tm "WireNameMgr"
8605)
8606)
8607on &126
8608)
8609*285 (Wire
8610uid 1889,0
8611shape (OrthoPolyLine
8612uid 1890,0
8613va (VaSet
8614vasetType 3
8615)
8616xt "21000,108000,51250,108000"
8617pts [
8618"21000,108000"
8619"51250,108000"
8620]
8621)
8622start &123
8623end &35
8624sat 32
8625eat 32
8626stc 0
8627st 0
8628sf 1
8629si 0
8630tg (WTG
8631uid 1893,0
8632ps "ConnStartEndStrategy"
8633stg "STSignalDisplayStrategy"
8634f (Text
8635uid 1894,0
8636va (VaSet
8637isHidden 1
8638)
8639xt "22000,107000,26600,108000"
8640st "D3_SROUT"
8641blo "22000,107800"
8642tm "WireNameMgr"
8643)
8644)
8645on &127
8646)
8647*286 (Wire
8648uid 2409,0
8649shape (OrthoPolyLine
8650uid 2410,0
8651va (VaSet
8652vasetType 3
8653)
8654xt "21000,111000,51250,111000"
8655pts [
8656"51250,111000"
8657"21000,111000"
8658]
8659)
8660start &36
8661end &83
8662sat 32
8663eat 32
8664stc 0
8665st 0
8666sf 1
8667si 0
8668tg (WTG
8669uid 2413,0
8670ps "ConnStartEndStrategy"
8671stg "STSignalDisplayStrategy"
8672f (Text
8673uid 2414,0
8674va (VaSet
8675isHidden 1
8676)
8677xt "22000,110000,26200,111000"
8678st "RSRLOAD"
8679blo "22000,110800"
8680tm "WireNameMgr"
8681)
8682)
8683on &82
8684)
8685*287 (Wire
8686uid 2423,0
8687shape (OrthoPolyLine
8688uid 2424,0
8689va (VaSet
8690vasetType 3
8691)
8692xt "32000,113000,51250,113000"
8693pts [
8694"51250,113000"
8695"32000,113000"
8696]
8697)
8698start &37
8699end &112
8700sat 32
8701eat 1
8702stc 0
8703st 0
8704sf 1
8705si 0
8706tg (WTG
8707uid 2427,0
8708ps "ConnStartEndStrategy"
8709stg "STSignalDisplayStrategy"
8710f (Text
8711uid 2428,0
8712va (VaSet
8713isHidden 1
8714)
8715xt "66250,109000,69250,110000"
8716st "SRCLK"
8717blo "66250,109800"
8718tm "WireNameMgr"
8719)
8720)
8721on &84
8722)
8723*288 (Wire
8724uid 3009,0
8725shape (OrthoPolyLine
8726uid 3010,0
8727va (VaSet
8728vasetType 3
8729)
8730xt "80750,98000,111000,98000"
8731pts [
8732"80750,98000"
8733"111000,98000"
8734]
8735)
8736start &39
8737end &145
8738sat 32
8739eat 32
8740stc 0
8741st 0
8742sf 1
8743si 0
8744tg (WTG
8745uid 3011,0
8746ps "ConnStartEndStrategy"
8747stg "STSignalDisplayStrategy"
8748f (Text
8749uid 3012,0
8750va (VaSet
8751isHidden 1
8752)
8753xt "82000,97000,84800,98000"
8754st "S_CLK"
8755blo "82000,97800"
8756tm "WireNameMgr"
8757)
8758)
8759on &146
8760)
8761*289 (Wire
8762uid 3015,0
8763shape (OrthoPolyLine
8764uid 3016,0
8765va (VaSet
8766vasetType 3
8767)
8768xt "80750,99000,111000,99000"
8769pts [
8770"80750,99000"
8771"111000,99000"
8772]
8773)
8774start &41
8775end &154
8776sat 32
8777eat 32
8778stc 0
8779st 0
8780sf 1
8781si 0
8782tg (WTG
8783uid 3017,0
8784ps "ConnStartEndStrategy"
8785stg "STSignalDisplayStrategy"
8786f (Text
8787uid 3018,0
8788va (VaSet
8789isHidden 1
8790)
8791xt "82750,98000,85150,99000"
8792st "MISO"
8793blo "82750,98800"
8794tm "WireNameMgr"
8795)
8796)
8797on &157
8798)
8799*290 (Wire
8800uid 3021,0
8801shape (OrthoPolyLine
8802uid 3022,0
8803va (VaSet
8804vasetType 3
8805lineWidth 2
8806)
8807xt "80750,89000,100000,89000"
8808pts [
8809"80750,89000"
8810"100000,89000"
8811]
8812)
8813start &40
8814end &133
8815sat 32
8816eat 1
8817sty 1
8818st 0
8819sf 1
8820si 0
8821tg (WTG
8822uid 3023,0
8823ps "ConnStartEndStrategy"
8824stg "STSignalDisplayStrategy"
8825f (Text
8826uid 3024,0
8827va (VaSet
8828)
8829xt "92000,88000,98500,89000"
8830st "sensor_cs : (3:0)"
8831blo "92000,88800"
8832tm "WireNameMgr"
8833)
8834)
8835on &85
8836)
8837*291 (Wire
8838uid 3027,0
8839shape (OrthoPolyLine
8840uid 3028,0
8841va (VaSet
8842vasetType 3
8843)
8844xt "94000,87000,111000,87000"
8845pts [
8846"94000,87000"
8847"111000,87000"
8848]
8849)
8850start &200
8851end &132
8852ss 0
8853sat 32
8854eat 32
8855stc 0
8856st 0
8857sf 1
8858si 0
8859tg (WTG
8860uid 3031,0
8861ps "ConnStartEndStrategy"
8862stg "STSignalDisplayStrategy"
8863f (Text
8864uid 3032,0
8865va (VaSet
8866isHidden 1
8867)
8868xt "95000,86000,98600,87000"
8869st "DAC_CS"
8870blo "95000,86800"
8871tm "WireNameMgr"
8872)
8873)
8874on &86
8875)
8876*292 (Wire
8877uid 3218,0
8878shape (OrthoPolyLine
8879uid 3219,0
8880va (VaSet
8881vasetType 3
8882)
8883xt "22000,78000,51250,78000"
8884pts [
8885"22000,78000"
8886"51250,78000"
8887]
8888)
8889start &66
8890end &15
8891sat 32
8892eat 32
8893stc 0
8894st 0
8895sf 1
8896si 0
8897tg (WTG
8898uid 3220,0
8899ps "ConnStartEndStrategy"
8900stg "STSignalDisplayStrategy"
8901f (Text
8902uid 3221,0
8903va (VaSet
8904isHidden 1
8905)
8906xt "33000,77000,35100,78000"
8907st "TRG"
8908blo "33000,77800"
8909tm "WireNameMgr"
8910)
8911)
8912on &89
8913)
8914*293 (Wire
8915uid 3260,0
8916shape (OrthoPolyLine
8917uid 3261,0
8918va (VaSet
8919vasetType 3
8920lineWidth 2
8921)
8922xt "21000,70000,24000,70000"
8923pts [
8924"21000,70000"
8925"24000,70000"
8926]
8927)
8928start &87
8929end &90
8930sat 32
8931eat 2
8932sty 1
8933stc 0
8934st 0
8935sf 1
8936si 0
8937tg (WTG
8938uid 3264,0
8939ps "ConnStartEndStrategy"
8940stg "STSignalDisplayStrategy"
8941f (Text
8942uid 3265,0
8943va (VaSet
8944isHidden 1
8945)
8946xt "23000,69000,25800,70000"
8947st "A_CLK"
8948blo "23000,69800"
8949tm "WireNameMgr"
8950)
8951)
8952on &94
8953)
8954*294 (Wire
8955uid 3270,0
8956shape (OrthoPolyLine
8957uid 3271,0
8958va (VaSet
8959vasetType 3
8960)
8961xt "29000,70000,43000,72000"
8962pts [
8963"43000,72000"
8964"43000,70000"
8965"32000,70000"
8966"29000,70000"
8967]
8968)
8969start &213
8970end &90
8971sat 32
8972eat 1
8973st 0
8974sf 1
8975si 0
8976tg (WTG
8977uid 3274,0
8978ps "ConnStartEndStrategy"
8979stg "STSignalDisplayStrategy"
8980f (Text
8981uid 3275,0
8982va (VaSet
8983)
8984xt "35000,69000,39500,70000"
8985st "CLK_25_PS"
8986blo "35000,69800"
8987tm "WireNameMgr"
8988)
8989)
8990on &95
8991)
8992*295 (Wire
8993uid 3318,0
8994shape (OrthoPolyLine
8995uid 3319,0
8996va (VaSet
8997vasetType 3
8998lineWidth 2
8999)
9000xt "21000,95000,24000,95000"
9001pts [
9002"21000,95000"
9003"24000,95000"
9004]
9005)
9006start &104
9007end &100
9008sat 32
9009eat 1
9010sty 1
9011stc 0
9012st 0
9013sf 1
9014si 0
9015tg (WTG
9016uid 3322,0
9017ps "ConnStartEndStrategy"
9018stg "STSignalDisplayStrategy"
9019f (Text
9020uid 3323,0
9021va (VaSet
9022isHidden 1
9023)
9024xt "23000,94000,25300,95000"
9025st "A0_D"
9026blo "23000,94800"
9027tm "WireNameMgr"
9028)
9029)
9030on &108
9031)
9032*296 (Wire
9033uid 3352,0
9034shape (OrthoPolyLine
9035uid 3353,0
9036va (VaSet
9037vasetType 3
9038lineWidth 2
9039)
9040xt "21000,96000,24000,96000"
9041pts [
9042"21000,96000"
9043"24000,96000"
9044]
9045)
9046start &105
9047end &100
9048sat 32
9049eat 1
9050sty 1
9051stc 0
9052st 0
9053sf 1
9054si 0
9055tg (WTG
9056uid 3356,0
9057ps "ConnStartEndStrategy"
9058stg "STSignalDisplayStrategy"
9059f (Text
9060uid 3357,0
9061va (VaSet
9062isHidden 1
9063)
9064xt "23000,95000,25300,96000"
9065st "A1_D"
9066blo "23000,95800"
9067tm "WireNameMgr"
9068)
9069)
9070on &109
9071)
9072*297 (Wire
9073uid 3360,0
9074shape (OrthoPolyLine
9075uid 3361,0
9076va (VaSet
9077vasetType 3
9078lineWidth 2
9079)
9080xt "21000,97000,24000,97000"
9081pts [
9082"21000,97000"
9083"24000,97000"
9084]
9085)
9086start &106
9087end &100
9088sat 32
9089eat 1
9090sty 1
9091stc 0
9092st 0
9093sf 1
9094si 0
9095tg (WTG
9096uid 3364,0
9097ps "ConnStartEndStrategy"
9098stg "STSignalDisplayStrategy"
9099f (Text
9100uid 3365,0
9101va (VaSet
9102isHidden 1
9103)
9104xt "23000,96000,25300,97000"
9105st "A2_D"
9106blo "23000,96800"
9107tm "WireNameMgr"
9108)
9109)
9110on &110
9111)
9112*298 (Wire
9113uid 3368,0
9114shape (OrthoPolyLine
9115uid 3369,0
9116va (VaSet
9117vasetType 3
9118lineWidth 2
9119)
9120xt "21000,98000,24000,98000"
9121pts [
9122"21000,98000"
9123"24000,98000"
9124]
9125)
9126start &107
9127end &100
9128sat 32
9129eat 1
9130sty 1
9131stc 0
9132st 0
9133sf 1
9134si 0
9135tg (WTG
9136uid 3372,0
9137ps "ConnStartEndStrategy"
9138stg "STSignalDisplayStrategy"
9139f (Text
9140uid 3373,0
9141va (VaSet
9142isHidden 1
9143)
9144xt "23000,97000,25300,98000"
9145st "A3_D"
9146blo "23000,97800"
9147tm "WireNameMgr"
9148)
9149)
9150on &111
9151)
9152*299 (Wire
9153uid 3430,0
9154shape (OrthoPolyLine
9155uid 3431,0
9156va (VaSet
9157vasetType 3
9158)
9159xt "21000,113000,24000,113000"
9160pts [
9161"21000,113000"
9162"24000,113000"
9163]
9164)
9165start &176
9166end &112
9167sat 32
9168eat 2
9169stc 0
9170st 0
9171sf 1
9172si 0
9173tg (WTG
9174uid 3434,0
9175ps "ConnStartEndStrategy"
9176stg "STSignalDisplayStrategy"
9177f (Text
9178uid 3435,0
9179va (VaSet
9180isHidden 1
9181)
9182xt "23000,112000,27400,113000"
9183st "D0_SRCLK"
9184blo "23000,112800"
9185tm "WireNameMgr"
9186)
9187)
9188on &116
9189)
9190*300 (Wire
9191uid 3438,0
9192shape (OrthoPolyLine
9193uid 3439,0
9194va (VaSet
9195vasetType 3
9196)
9197xt "21000,114000,24000,114000"
9198pts [
9199"21000,114000"
9200"24000,114000"
9201]
9202)
9203start &177
9204end &112
9205sat 32
9206eat 2
9207stc 0
9208st 0
9209sf 1
9210si 0
9211tg (WTG
9212uid 3442,0
9213ps "ConnStartEndStrategy"
9214stg "STSignalDisplayStrategy"
9215f (Text
9216uid 3443,0
9217va (VaSet
9218isHidden 1
9219)
9220xt "23000,113000,27400,114000"
9221st "D1_SRCLK"
9222blo "23000,113800"
9223tm "WireNameMgr"
9224)
9225)
9226on &117
9227)
9228*301 (Wire
9229uid 3446,0
9230shape (OrthoPolyLine
9231uid 3447,0
9232va (VaSet
9233vasetType 3
9234)
9235xt "21000,115000,24000,115000"
9236pts [
9237"21000,115000"
9238"24000,115000"
9239]
9240)
9241start &178
9242end &112
9243sat 32
9244eat 2
9245stc 0
9246st 0
9247sf 1
9248si 0
9249tg (WTG
9250uid 3450,0
9251ps "ConnStartEndStrategy"
9252stg "STSignalDisplayStrategy"
9253f (Text
9254uid 3451,0
9255va (VaSet
9256isHidden 1
9257)
9258xt "23000,114000,27400,115000"
9259st "D2_SRCLK"
9260blo "23000,114800"
9261tm "WireNameMgr"
9262)
9263)
9264on &118
9265)
9266*302 (Wire
9267uid 3454,0
9268shape (OrthoPolyLine
9269uid 3455,0
9270va (VaSet
9271vasetType 3
9272)
9273xt "21000,116000,24000,116000"
9274pts [
9275"21000,116000"
9276"24000,116000"
9277]
9278)
9279start &179
9280end &112
9281sat 32
9282eat 2
9283stc 0
9284st 0
9285sf 1
9286si 0
9287tg (WTG
9288uid 3458,0
9289ps "ConnStartEndStrategy"
9290stg "STSignalDisplayStrategy"
9291f (Text
9292uid 3459,0
9293va (VaSet
9294isHidden 1
9295)
9296xt "23000,115000,27400,116000"
9297st "D3_SRCLK"
9298blo "23000,115800"
9299tm "WireNameMgr"
9300)
9301)
9302on &119
9303)
9304*303 (Wire
9305uid 3574,0
9306shape (OrthoPolyLine
9307uid 3575,0
9308va (VaSet
9309vasetType 3
9310)
9311xt "108000,89000,111000,89000"
9312pts [
9313"111000,89000"
9314"108000,89000"
9315]
9316)
9317start &137
9318end &133
9319sat 32
9320eat 2
9321stc 0
9322st 0
9323sf 1
9324si 0
9325tg (WTG
9326uid 3578,0
9327ps "ConnStartEndStrategy"
9328stg "STSignalDisplayStrategy"
9329f (Text
9330uid 3579,0
9331va (VaSet
9332isHidden 1
9333)
9334xt "108000,88000,110800,89000"
9335st "T0_CS"
9336blo "108000,88800"
9337tm "WireNameMgr"
9338)
9339)
9340on &141
9341)
9342*304 (Wire
9343uid 3582,0
9344shape (OrthoPolyLine
9345uid 3583,0
9346va (VaSet
9347vasetType 3
9348)
9349xt "108000,90000,111000,90000"
9350pts [
9351"111000,90000"
9352"108000,90000"
9353]
9354)
9355start &138
9356end &133
9357sat 32
9358eat 2
9359stc 0
9360st 0
9361sf 1
9362si 0
9363tg (WTG
9364uid 3586,0
9365ps "ConnStartEndStrategy"
9366stg "STSignalDisplayStrategy"
9367f (Text
9368uid 3587,0
9369va (VaSet
9370isHidden 1
9371)
9372xt "108000,89000,110800,90000"
9373st "T1_CS"
9374blo "108000,89800"
9375tm "WireNameMgr"
9376)
9377)
9378on &142
9379)
9380*305 (Wire
9381uid 3590,0
9382shape (OrthoPolyLine
9383uid 3591,0
9384va (VaSet
9385vasetType 3
9386)
9387xt "108000,91000,111000,91000"
9388pts [
9389"111000,91000"
9390"108000,91000"
9391]
9392)
9393start &139
9394end &133
9395sat 32
9396eat 2
9397stc 0
9398st 0
9399sf 1
9400si 0
9401tg (WTG
9402uid 3594,0
9403ps "ConnStartEndStrategy"
9404stg "STSignalDisplayStrategy"
9405f (Text
9406uid 3595,0
9407va (VaSet
9408isHidden 1
9409)
9410xt "108000,90000,110800,91000"
9411st "T2_CS"
9412blo "108000,90800"
9413tm "WireNameMgr"
9414)
9415)
9416on &143
9417)
9418*306 (Wire
9419uid 3598,0
9420shape (OrthoPolyLine
9421uid 3599,0
9422va (VaSet
9423vasetType 3
9424)
9425xt "108000,92000,111000,92000"
9426pts [
9427"111000,92000"
9428"108000,92000"
9429]
9430)
9431start &140
9432end &133
9433sat 32
9434eat 2
9435stc 0
9436st 0
9437sf 1
9438si 0
9439tg (WTG
9440uid 3602,0
9441ps "ConnStartEndStrategy"
9442stg "STSignalDisplayStrategy"
9443f (Text
9444uid 3603,0
9445va (VaSet
9446isHidden 1
9447)
9448xt "108000,91000,110800,92000"
9449st "T3_CS"
9450blo "108000,91800"
9451tm "WireNameMgr"
9452)
9453)
9454on &144
9455)
9456*307 (Wire
9457uid 3682,0
9458shape (OrthoPolyLine
9459uid 3683,0
9460va (VaSet
9461vasetType 3
9462)
9463xt "80750,100000,111000,100000"
9464pts [
9465"80750,100000"
9466"111000,100000"
9467]
9468)
9469start &42
9470end &156
9471sat 32
9472eat 32
9473stc 0
9474st 0
9475sf 1
9476si 0
9477tg (WTG
9478uid 3686,0
9479ps "ConnStartEndStrategy"
9480stg "STSignalDisplayStrategy"
9481f (Text
9482uid 3687,0
9483va (VaSet
9484isHidden 1
9485)
9486xt "82000,99000,84400,100000"
9487st "MOSI"
9488blo "82000,99800"
9489tm "WireNameMgr"
9490)
9491)
9492on &155
9493)
9494*308 (Wire
9495uid 3778,0
9496shape (OrthoPolyLine
9497uid 3779,0
9498va (VaSet
9499vasetType 3
9500)
9501xt "108000,103000,111000,103000"
9502pts [
9503"111000,103000"
9504"108000,103000"
9505]
9506)
9507start &162
9508end &158
9509sat 32
9510eat 2
9511stc 0
9512st 0
9513sf 1
9514si 0
9515tg (WTG
9516uid 3782,0
9517ps "ConnStartEndStrategy"
9518stg "STSignalDisplayStrategy"
9519f (Text
9520uid 3783,0
9521va (VaSet
9522isHidden 1
9523)
9524xt "108000,102000,111000,103000"
9525st "TRG_V"
9526blo "108000,102800"
9527tm "WireNameMgr"
9528)
9529)
9530on &169
9531)
9532*309 (Wire
9533uid 3786,0
9534shape (OrthoPolyLine
9535uid 3787,0
9536va (VaSet
9537vasetType 3
9538)
9539xt "108000,104000,111000,104000"
9540pts [
9541"111000,104000"
9542"108000,104000"
9543]
9544)
9545start &163
9546end &158
9547sat 32
9548eat 2
9549stc 0
9550st 0
9551sf 1
9552si 0
9553tg (WTG
9554uid 3790,0
9555ps "ConnStartEndStrategy"
9556stg "STSignalDisplayStrategy"
9557f (Text
9558uid 3791,0
9559va (VaSet
9560isHidden 1
9561)
9562xt "108000,103000,113600,104000"
9563st "RS485_C_RE"
9564blo "108000,103800"
9565tm "WireNameMgr"
9566)
9567)
9568on &170
9569)
9570*310 (Wire
9571uid 3794,0
9572shape (OrthoPolyLine
9573uid 3795,0
9574va (VaSet
9575vasetType 3
9576)
9577xt "108000,105000,111000,105000"
9578pts [
9579"111000,105000"
9580"108000,105000"
9581]
9582)
9583start &164
9584end &158
9585sat 32
9586eat 2
9587stc 0
9588st 0
9589sf 1
9590si 0
9591tg (WTG
9592uid 3798,0
9593ps "ConnStartEndStrategy"
9594stg "STSignalDisplayStrategy"
9595f (Text
9596uid 3799,0
9597va (VaSet
9598isHidden 1
9599)
9600xt "108000,104000,113600,105000"
9601st "RS485_C_DE"
9602blo "108000,104800"
9603tm "WireNameMgr"
9604)
9605)
9606on &171
9607)
9608*311 (Wire
9609uid 3802,0
9610shape (OrthoPolyLine
9611uid 3803,0
9612va (VaSet
9613vasetType 3
9614)
9615xt "108000,106000,111000,106000"
9616pts [
9617"111000,106000"
9618"108000,106000"
9619]
9620)
9621start &165
9622end &158
9623sat 32
9624eat 2
9625stc 0
9626st 0
9627sf 1
9628si 0
9629tg (WTG
9630uid 3806,0
9631ps "ConnStartEndStrategy"
9632stg "STSignalDisplayStrategy"
9633f (Text
9634uid 3807,0
9635va (VaSet
9636isHidden 1
9637)
9638xt "108000,105000,113500,106000"
9639st "RS485_E_RE"
9640blo "108000,105800"
9641tm "WireNameMgr"
9642)
9643)
9644on &172
9645)
9646*312 (Wire
9647uid 3810,0
9648shape (OrthoPolyLine
9649uid 3811,0
9650va (VaSet
9651vasetType 3
9652)
9653xt "108000,107000,111000,107000"
9654pts [
9655"111000,107000"
9656"108000,107000"
9657]
9658)
9659start &166
9660end &158
9661sat 32
9662eat 2
9663stc 0
9664st 0
9665sf 1
9666si 0
9667tg (WTG
9668uid 3814,0
9669ps "ConnStartEndStrategy"
9670stg "STSignalDisplayStrategy"
9671f (Text
9672uid 3815,0
9673va (VaSet
9674isHidden 1
9675)
9676xt "108000,106000,113500,107000"
9677st "RS485_E_DE"
9678blo "108000,106800"
9679tm "WireNameMgr"
9680)
9681)
9682on &173
9683)
9684*313 (Wire
9685uid 3834,0
9686shape (OrthoPolyLine
9687uid 3835,0
9688va (VaSet
9689vasetType 3
9690)
9691xt "108000,110000,111000,110000"
9692pts [
9693"111000,110000"
9694"108000,110000"
9695]
9696)
9697start &168
9698end &158
9699sat 32
9700eat 2
9701stc 0
9702st 0
9703sf 1
9704si 0
9705tg (WTG
9706uid 3838,0
9707ps "ConnStartEndStrategy"
9708stg "STSignalDisplayStrategy"
9709f (Text
9710uid 3839,0
9711va (VaSet
9712isHidden 1
9713)
9714xt "108000,109000,110900,110000"
9715st "EE_CS"
9716blo "108000,109800"
9717tm "WireNameMgr"
9718)
9719)
9720on &175
9721)
9722*314 (Wire
9723uid 4942,0
9724shape (OrthoPolyLine
9725uid 4943,0
9726va (VaSet
9727vasetType 3
9728lineWidth 2
9729)
9730xt "80750,120000,111000,120000"
9731pts [
9732"80750,120000"
9733"111000,120000"
9734]
9735)
9736start &14
9737end &180
9738sat 32
9739eat 32
9740sty 1
9741stc 0
9742st 0
9743sf 1
9744si 0
9745tg (WTG
9746uid 4948,0
9747ps "ConnStartEndStrategy"
9748stg "STSignalDisplayStrategy"
9749f (Text
9750uid 4949,0
9751va (VaSet
9752isHidden 1
9753)
9754xt "82750,117000,84650,118000"
9755st "D_T"
9756blo "82750,117800"
9757tm "WireNameMgr"
9758)
9759)
9760on &181
9761)
9762*315 (Wire
9763uid 6431,0
9764shape (OrthoPolyLine
9765uid 6432,0
9766va (VaSet
9767vasetType 3
9768)
9769xt "80750,121000,111000,121000"
9770pts [
9771"80750,121000"
9772"111000,121000"
9773]
9774)
9775start &43
9776end &167
9777sat 32
9778eat 32
9779stc 0
9780st 0
9781sf 1
9782si 0
9783tg (WTG
9784uid 6435,0
9785ps "ConnStartEndStrategy"
9786stg "STSignalDisplayStrategy"
9787f (Text
9788uid 6436,0
9789va (VaSet
9790isHidden 1
9791)
9792xt "92000,120000,96000,121000"
9793st "DENABLE"
9794blo "92000,120800"
9795tm "WireNameMgr"
9796)
9797)
9798on &174
9799)
9800*316 (Wire
9801uid 6787,0
9802shape (OrthoPolyLine
9803uid 6788,0
9804va (VaSet
9805vasetType 3
9806lineWidth 2
9807)
9808xt "59000,157000,65000,157000"
9809pts [
9810"59000,157000"
9811"65000,157000"
9812]
9813)
9814start &182
9815end &186
9816sat 32
9817eat 1
9818sty 1
9819st 0
9820sf 1
9821si 0
9822tg (WTG
9823uid 6791,0
9824ps "ConnStartEndStrategy"
9825stg "STSignalDisplayStrategy"
9826f (Text
9827uid 6792,0
9828va (VaSet
9829isHidden 1
9830)
9831xt "61000,156000,67800,157000"
9832st "D_PLLLCK : (3:0)"
9833blo "61000,156800"
9834tm "WireNameMgr"
9835)
9836)
9837on &183
9838)
9839*317 (Wire
9840uid 6880,0
9841shape (OrthoPolyLine
9842uid 6881,0
9843va (VaSet
9844vasetType 3
9845lineWidth 2
9846)
9847xt "68000,157000,75000,157000"
9848pts [
9849"68000,157000"
9850"75000,157000"
9851]
9852)
9853start &186
9854end &184
9855sat 2
9856eat 32
9857sty 1
9858st 0
9859sf 1
9860si 0
9861tg (WTG
9862uid 6884,0
9863ps "ConnStartEndStrategy"
9864stg "STSignalDisplayStrategy"
9865f (Text
9866uid 6885,0
9867va (VaSet
9868isHidden 1
9869)
9870xt "70000,156000,74900,157000"
9871st "D_T2 : (3:0)"
9872blo "70000,156800"
9873tm "WireNameMgr"
9874)
9875)
9876on &185
9877)
9878*318 (Wire
9879uid 7144,0
9880shape (OrthoPolyLine
9881uid 7145,0
9882va (VaSet
9883vasetType 3
9884lineWidth 2
9885)
9886xt "122000,126000,132000,126000"
9887pts [
9888"122000,126000"
9889"132000,126000"
9890]
9891)
9892end &194
9893sat 16
9894eat 32
9895sty 1
9896st 0
9897sf 1
9898si 0
9899tg (WTG
9900uid 7148,0
9901ps "ConnStartEndStrategy"
9902stg "STSignalDisplayStrategy"
9903f (Text
9904uid 7149,0
9905va (VaSet
9906isHidden 1
9907)
9908xt "124000,125000,128800,126000"
9909st "A1_T : (7:0)"
9910blo "124000,125800"
9911tm "WireNameMgr"
9912)
9913)
9914on &195
9915)
9916*319 (Wire
9917uid 7477,0
9918shape (OrthoPolyLine
9919uid 7478,0
9920va (VaSet
9921vasetType 3
9922)
9923xt "80750,87000,91000,87000"
9924pts [
9925"80750,87000"
9926"91000,87000"
9927]
9928)
9929start &38
9930end &198
9931es 0
9932sat 32
9933eat 32
9934st 0
9935sf 1
9936si 0
9937tg (WTG
9938uid 7483,0
9939ps "ConnStartEndStrategy"
9940stg "STSignalDisplayStrategy"
9941f (Text
9942uid 7484,0
9943va (VaSet
9944)
9945xt "83000,86000,85700,87000"
9946st "dummy"
9947blo "83000,86800"
9948tm "WireNameMgr"
9949)
9950)
9951on &196
9952)
9953*320 (Wire
9954uid 8853,0
9955shape (OrthoPolyLine
9956uid 8854,0
9957va (VaSet
9958vasetType 3
9959lineWidth 2
9960)
9961xt "18000,109000,51250,124000"
9962pts [
9963"51250,109000"
9964"18000,109000"
9965"18000,124000"
9966"21000,124000"
9967]
9968)
9969start &30
9970end &190
9971sat 32
9972eat 1
9973sty 1
9974st 0
9975sf 1
9976si 0
9977tg (WTG
9978uid 8857,0
9979ps "ConnStartEndStrategy"
9980stg "STSignalDisplayStrategy"
9981f (Text
9982uid 8858,0
9983va (VaSet
9984)
9985xt "42000,108000,50500,109000"
9986st "drs_channel_id : (3:0)"
9987blo "42000,108800"
9988tm "WireNameMgr"
9989)
9990)
9991on &210
9992)
9993*321 (Wire
9994uid 9502,0
9995shape (OrthoPolyLine
9996uid 9503,0
9997va (VaSet
9998vasetType 3
9999)
10000xt "46000,69000,51250,69000"
10001pts [
10002"51250,69000"
10003"46000,69000"
10004]
10005)
10006start &26
10007sat 32
10008eat 16
10009st 0
10010sf 1
10011si 0
10012tg (WTG
10013uid 9506,0
10014ps "ConnStartEndStrategy"
10015stg "STSignalDisplayStrategy"
10016f (Text
10017uid 9507,0
10018va (VaSet
10019)
10020xt "47000,68000,50100,69000"
10021st "CLK_50"
10022blo "47000,68800"
10023tm "WireNameMgr"
10024)
10025)
10026on &211
10027)
10028*322 (Wire
10029uid 10034,0
10030shape (OrthoPolyLine
10031uid 10035,0
10032va (VaSet
10033vasetType 3
10034)
10035xt "49000,70000,51250,71000"
10036pts [
10037"51250,70000"
10038"49000,70000"
10039"49000,71000"
10040]
10041)
10042start &25
10043end &218
10044sat 32
10045eat 32
10046st 0
10047sf 1
10048si 0
10049tg (WTG
10050uid 10036,0
10051ps "ConnStartEndStrategy"
10052stg "STSignalDisplayStrategy"
10053f (Text
10054uid 10037,0
10055va (VaSet
10056isHidden 1
10057)
10058xt "45250,69000,50550,70000"
10059st "CLK_25_PS1"
10060blo "45250,69800"
10061tm "WireNameMgr"
10062)
10063)
10064on &230
10065)
10066*323 (Wire
10067uid 10052,0
10068shape (OrthoPolyLine
10069uid 10053,0
10070va (VaSet
10071vasetType 3
10072)
10073xt "49000,73000,51250,73000"
10074pts [
10075"51250,73000"
10076"49000,73000"
10077]
10078)
10079start &44
10080end &216
10081sat 32
10082eat 32
10083st 0
10084sf 1
10085si 0
10086tg (WTG
10087uid 10054,0
10088ps "ConnStartEndStrategy"
10089stg "STSignalDisplayStrategy"
10090f (Text
10091uid 10055,0
10092va (VaSet
10093isHidden 1
10094)
10095xt "47000,72000,51500,73000"
10096st "adc_clk_en"
10097blo "47000,72800"
10098tm "WireNameMgr"
10099)
10100)
10101on &231
10102)
10103*324 (Wire
10104uid 10302,0
10105shape (OrthoPolyLine
10106uid 10303,0
10107va (VaSet
10108vasetType 3
10109lineWidth 2
10110)
10111xt "122000,128000,132000,128000"
10112pts [
10113"122000,128000"
10114"132000,128000"
10115]
10116)
10117end &232
10118sat 16
10119eat 32
10120sty 1
10121st 0
10122sf 1
10123si 0
10124tg (WTG
10125uid 10306,0
10126ps "ConnStartEndStrategy"
10127stg "STSignalDisplayStrategy"
10128f (Text
10129uid 10307,0
10130va (VaSet
10131isHidden 1
10132)
10133xt "124000,127000,128800,128000"
10134st "A0_T : (7:0)"
10135blo "124000,127800"
10136tm "WireNameMgr"
10137)
10138)
10139on &233
10140)
10141*325 (Wire
10142uid 10452,0
10143shape (OrthoPolyLine
10144uid 10453,0
10145va (VaSet
10146vasetType 3
10147lineWidth 2
10148)
10149xt "112000,126000,122000,126000"
10150pts [
10151"112000,126000"
10152"122000,126000"
10153]
10154)
10155start &234
10156sat 2
10157eat 16
10158sty 1
10159st 0
10160sf 1
10161si 0
10162tg (WTG
10163uid 10458,0
10164ps "ConnStartEndStrategy"
10165stg "STSignalDisplayStrategy"
10166f (Text
10167uid 10459,0
10168va (VaSet
10169)
10170xt "114000,125000,118800,126000"
10171st "A0_T : (7:0)"
10172blo "114000,125800"
10173tm "WireNameMgr"
10174)
10175)
10176on &233
10177)
10178*326 (Wire
10179uid 10460,0
10180shape (OrthoPolyLine
10181uid 10461,0
10182va (VaSet
10183vasetType 3
10184lineWidth 2
10185)
10186xt "112000,127000,122000,127000"
10187pts [
10188"112000,127000"
10189"122000,127000"
10190]
10191)
10192start &234
10193sat 2
10194eat 16
10195sty 1
10196st 0
10197sf 1
10198si 0
10199tg (WTG
10200uid 10466,0
10201ps "ConnStartEndStrategy"
10202stg "STSignalDisplayStrategy"
10203f (Text
10204uid 10467,0
10205va (VaSet
10206)
10207xt "114000,126000,118800,127000"
10208st "A1_T : (7:0)"
10209blo "114000,126800"
10210tm "WireNameMgr"
10211)
10212)
10213on &195
10214)
10215*327 (Wire
10216uid 10498,0
10217shape (OrthoPolyLine
10218uid 10499,0
10219va (VaSet
10220vasetType 3
10221)
10222xt "80750,123000,88000,123000"
10223pts [
10224"80750,123000"
10225"88000,123000"
10226]
10227)
10228start &58
10229sat 32
10230eat 16
10231st 0
10232sf 1
10233si 0
10234tg (WTG
10235uid 10502,0
10236ps "ConnStartEndStrategy"
10237stg "STSignalDisplayStrategy"
10238f (Text
10239uid 10503,0
10240va (VaSet
10241)
10242xt "82000,122000,86800,123000"
10243st "CLK50_OUT"
10244blo "82000,122800"
10245tm "WireNameMgr"
10246)
10247)
10248on &238
10249)
10250*328 (Wire
10251uid 10506,0
10252shape (OrthoPolyLine
10253uid 10507,0
10254va (VaSet
10255vasetType 3
10256)
10257xt "80750,124000,88000,124000"
10258pts [
10259"80750,124000"
10260"88000,124000"
10261]
10262)
10263start &56
10264sat 32
10265eat 16
10266st 0
10267sf 1
10268si 0
10269tg (WTG
10270uid 10510,0
10271ps "ConnStartEndStrategy"
10272stg "STSignalDisplayStrategy"
10273f (Text
10274uid 10511,0
10275va (VaSet
10276)
10277xt "82000,123000,86800,124000"
10278st "CLK25_OUT"
10279blo "82000,123800"
10280tm "WireNameMgr"
10281)
10282)
10283on &239
10284)
10285*329 (Wire
10286uid 10514,0
10287shape (OrthoPolyLine
10288uid 10515,0
10289va (VaSet
10290vasetType 3
10291)
10292xt "80750,125000,89000,125000"
10293pts [
10294"80750,125000"
10295"89000,125000"
10296]
10297)
10298start &57
10299sat 32
10300eat 16
10301st 0
10302sf 1
10303si 0
10304tg (WTG
10305uid 10518,0
10306ps "ConnStartEndStrategy"
10307stg "STSignalDisplayStrategy"
10308f (Text
10309uid 10519,0
10310va (VaSet
10311)
10312xt "82000,124000,88200,125000"
10313st "CLK25_PSOUT"
10314blo "82000,124800"
10315tm "WireNameMgr"
10316)
10317)
10318on &240
10319)
10320*330 (Wire
10321uid 10522,0
10322shape (OrthoPolyLine
10323uid 10523,0
10324va (VaSet
10325vasetType 3
10326)
10327xt "80750,126000,87000,126000"
10328pts [
10329"80750,126000"
10330"87000,126000"
10331]
10332)
10333start &48
10334sat 32
10335eat 16
10336st 0
10337sf 1
10338si 0
10339tg (WTG
10340uid 10526,0
10341ps "ConnStartEndStrategy"
10342stg "STSignalDisplayStrategy"
10343f (Text
10344uid 10527,0
10345va (VaSet
10346)
10347xt "82000,125000,86400,126000"
10348st "PS_DIR_IN"
10349blo "82000,125800"
10350tm "WireNameMgr"
10351)
10352)
10353on &241
10354)
10355*331 (Wire
10356uid 10530,0
10357shape (OrthoPolyLine
10358uid 10531,0
10359va (VaSet
10360vasetType 3
10361)
10362xt "80750,127000,87000,127000"
10363pts [
10364"80750,127000"
10365"87000,127000"
10366]
10367)
10368start &49
10369sat 32
10370eat 16
10371st 0
10372sf 1
10373si 0
10374tg (WTG
10375uid 10534,0
10376ps "ConnStartEndStrategy"
10377stg "STSignalDisplayStrategy"
10378f (Text
10379uid 10535,0
10380va (VaSet
10381)
10382xt "82000,126000,86200,127000"
10383st "PS_DO_IN"
10384blo "82000,126800"
10385tm "WireNameMgr"
10386)
10387)
10388on &242
10389)
10390*332 (Wire
10391uid 10538,0
10392shape (OrthoPolyLine
10393uid 10539,0
10394va (VaSet
10395vasetType 3
10396)
10397xt "80750,129000,88000,129000"
10398pts [
10399"80750,129000"
10400"88000,129000"
10401]
10402)
10403start &52
10404sat 32
10405eat 16
10406st 0
10407sf 1
10408si 0
10409tg (WTG
10410uid 10542,0
10411ps "ConnStartEndStrategy"
10412stg "STSignalDisplayStrategy"
10413f (Text
10414uid 10543,0
10415va (VaSet
10416)
10417xt "82000,128000,86600,129000"
10418st "PSEN_OUT"
10419blo "82000,128800"
10420tm "WireNameMgr"
10421)
10422)
10423on &243
10424)
10425*333 (Wire
10426uid 10546,0
10427shape (OrthoPolyLine
10428uid 10547,0
10429va (VaSet
10430vasetType 3
10431)
10432xt "80750,128000,90000,128000"
10433pts [
10434"80750,128000"
10435"90000,128000"
10436]
10437)
10438start &53
10439sat 32
10440eat 16
10441st 0
10442sf 1
10443si 0
10444tg (WTG
10445uid 10550,0
10446ps "ConnStartEndStrategy"
10447stg "STSignalDisplayStrategy"
10448f (Text
10449uid 10551,0
10450va (VaSet
10451)
10452xt "82000,127000,89000,128000"
10453st "PSINCDEC_OUT"
10454blo "82000,127800"
10455tm "WireNameMgr"
10456)
10457)
10458on &244
10459)
10460*334 (Wire
10461uid 10554,0
10462shape (OrthoPolyLine
10463uid 10555,0
10464va (VaSet
10465vasetType 3
10466)
10467xt "80750,130000,88000,130000"
10468pts [
10469"80750,130000"
10470"88000,130000"
10471]
10472)
10473start &45
10474sat 32
10475eat 16
10476st 0
10477sf 1
10478si 0
10479tg (WTG
10480uid 10558,0
10481ps "ConnStartEndStrategy"
10482stg "STSignalDisplayStrategy"
10483f (Text
10484uid 10559,0
10485va (VaSet
10486)
10487xt "82000,129000,87200,130000"
10488st "DCM_locked"
10489blo "82000,129800"
10490tm "WireNameMgr"
10491)
10492)
10493on &245
10494)
10495*335 (Wire
10496uid 10562,0
10497shape (OrthoPolyLine
10498uid 10563,0
10499va (VaSet
10500vasetType 3
10501)
10502xt "80750,132000,85000,132000"
10503pts [
10504"80750,132000"
10505"85000,132000"
10506]
10507)
10508start &54
10509sat 32
10510eat 16
10511st 0
10512sf 1
10513si 0
10514tg (WTG
10515uid 10566,0
10516ps "ConnStartEndStrategy"
10517stg "STSignalDisplayStrategy"
10518f (Text
10519uid 10567,0
10520va (VaSet
10521)
10522xt "82000,131000,84200,132000"
10523st "ready"
10524blo "82000,131800"
10525tm "WireNameMgr"
10526)
10527)
10528on &246
10529)
10530*336 (Wire
10531uid 10570,0
10532shape (OrthoPolyLine
10533uid 10571,0
10534va (VaSet
10535vasetType 3
10536)
10537xt "80750,133000,86000,133000"
10538pts [
10539"80750,133000"
10540"86000,133000"
10541]
10542)
10543start &55
10544sat 32
10545eat 16
10546st 0
10547sf 1
10548si 0
10549tg (WTG
10550uid 10574,0
10551ps "ConnStartEndStrategy"
10552stg "STSignalDisplayStrategy"
10553f (Text
10554uid 10575,0
10555va (VaSet
10556)
10557xt "82000,132000,84900,133000"
10558st "shifting"
10559blo "82000,132800"
10560tm "WireNameMgr"
10561)
10562)
10563on &247
10564)
10565*337 (Wire
10566uid 10578,0
10567shape (OrthoPolyLine
10568uid 10579,0
10569va (VaSet
10570vasetType 3
10571)
10572xt "80750,134000,91000,134000"
10573pts [
10574"80750,134000"
10575"91000,134000"
10576]
10577)
10578start &51
10579sat 32
10580eat 16
10581st 0
10582sf 1
10583si 0
10584tg (WTG
10585uid 10582,0
10586ps "ConnStartEndStrategy"
10587stg "STSignalDisplayStrategy"
10588f (Text
10589uid 10583,0
10590va (VaSet
10591)
10592xt "82000,133000,89800,134000"
10593st "PSDONE_extraOUT"
10594blo "82000,133800"
10595tm "WireNameMgr"
10596)
10597)
10598on &248
10599)
10600*338 (Wire
10601uid 10586,0
10602shape (OrthoPolyLine
10603uid 10587,0
10604va (VaSet
10605vasetType 3
10606)
10607xt "80750,135000,88000,135000"
10608pts [
10609"80750,135000"
10610"88000,135000"
10611]
10612)
10613start &50
10614sat 32
10615eat 16
10616st 0
10617sf 1
10618si 0
10619tg (WTG
10620uid 10590,0
10621ps "ConnStartEndStrategy"
10622stg "STSignalDisplayStrategy"
10623f (Text
10624uid 10591,0
10625va (VaSet
10626)
10627xt "82000,134000,87000,135000"
10628st "PSCLK_OUT"
10629blo "82000,134800"
10630tm "WireNameMgr"
10631)
10632)
10633on &249
10634)
10635*339 (Wire
10636uid 10594,0
10637shape (OrthoPolyLine
10638uid 10595,0
10639va (VaSet
10640vasetType 3
10641)
10642xt "80750,136000,91000,136000"
10643pts [
10644"80750,136000"
10645"91000,136000"
10646]
10647)
10648start &46
10649sat 32
10650eat 16
10651st 0
10652sf 1
10653si 0
10654tg (WTG
10655uid 10598,0
10656ps "ConnStartEndStrategy"
10657stg "STSignalDisplayStrategy"
10658f (Text
10659uid 10599,0
10660va (VaSet
10661)
10662xt "82000,135000,89700,136000"
10663st "LOCKED_extraOUT"
10664blo "82000,135800"
10665tm "WireNameMgr"
10666)
10667)
10668on &250
10669)
10670*340 (Wire
10671uid 10600,0
10672shape (OrthoPolyLine
10673uid 10601,0
10674va (VaSet
10675vasetType 3
10676)
10677xt "96000,123000,106000,123000"
10678pts [
10679"96000,123000"
10680"106000,123000"
10681]
10682)
10683end &234
10684sat 16
10685eat 1
10686st 0
10687sf 1
10688si 0
10689tg (WTG
10690uid 10606,0
10691ps "ConnStartEndStrategy"
10692stg "STSignalDisplayStrategy"
10693f (Text
10694uid 10607,0
10695va (VaSet
10696)
10697xt "98000,122000,102800,123000"
10698st "CLK25_OUT"
10699blo "98000,122800"
10700tm "WireNameMgr"
10701)
10702)
10703on &239
10704)
10705*341 (Wire
10706uid 10608,0
10707shape (OrthoPolyLine
10708uid 10609,0
10709va (VaSet
10710vasetType 3
10711)
10712xt "96000,124000,106000,124000"
10713pts [
10714"96000,124000"
10715"106000,124000"
10716]
10717)
10718end &234
10719sat 16
10720eat 1
10721st 0
10722sf 1
10723si 0
10724tg (WTG
10725uid 10614,0
10726ps "ConnStartEndStrategy"
10727stg "STSignalDisplayStrategy"
10728f (Text
10729uid 10615,0
10730va (VaSet
10731)
10732xt "98000,123000,104200,124000"
10733st "CLK25_PSOUT"
10734blo "98000,123800"
10735tm "WireNameMgr"
10736)
10737)
10738on &240
10739)
10740*342 (Wire
10741uid 10616,0
10742shape (OrthoPolyLine
10743uid 10617,0
10744va (VaSet
10745vasetType 3
10746)
10747xt "96000,125000,106000,125000"
10748pts [
10749"96000,125000"
10750"106000,125000"
10751]
10752)
10753end &234
10754sat 16
10755eat 1
10756st 0
10757sf 1
10758si 0
10759tg (WTG
10760uid 10622,0
10761ps "ConnStartEndStrategy"
10762stg "STSignalDisplayStrategy"
10763f (Text
10764uid 10623,0
10765va (VaSet
10766)
10767xt "98000,124000,102800,125000"
10768st "CLK50_OUT"
10769blo "98000,124800"
10770tm "WireNameMgr"
10771)
10772)
10773on &238
10774)
10775*343 (Wire
10776uid 10624,0
10777shape (OrthoPolyLine
10778uid 10625,0
10779va (VaSet
10780vasetType 3
10781)
10782xt "96000,126000,106000,126000"
10783pts [
10784"96000,126000"
10785"106000,126000"
10786]
10787)
10788end &234
10789sat 16
10790eat 1
10791st 0
10792sf 1
10793si 0
10794tg (WTG
10795uid 10630,0
10796ps "ConnStartEndStrategy"
10797stg "STSignalDisplayStrategy"
10798f (Text
10799uid 10631,0
10800va (VaSet
10801)
10802xt "98000,125000,103200,126000"
10803st "DCM_locked"
10804blo "98000,125800"
10805tm "WireNameMgr"
10806)
10807)
10808on &245
10809)
10810*344 (Wire
10811uid 10632,0
10812shape (OrthoPolyLine
10813uid 10633,0
10814va (VaSet
10815vasetType 3
10816)
10817xt "96000,127000,106000,127000"
10818pts [
10819"96000,127000"
10820"106000,127000"
10821]
10822)
10823end &234
10824sat 16
10825eat 1
10826st 0
10827sf 1
10828si 0
10829tg (WTG
10830uid 10638,0
10831ps "ConnStartEndStrategy"
10832stg "STSignalDisplayStrategy"
10833f (Text
10834uid 10639,0
10835va (VaSet
10836)
10837xt "98000,126000,105700,127000"
10838st "LOCKED_extraOUT"
10839blo "98000,126800"
10840tm "WireNameMgr"
10841)
10842)
10843on &250
10844)
10845*345 (Wire
10846uid 10640,0
10847shape (OrthoPolyLine
10848uid 10641,0
10849va (VaSet
10850vasetType 3
10851)
10852xt "96000,128000,106000,128000"
10853pts [
10854"96000,128000"
10855"106000,128000"
10856]
10857)
10858end &234
10859sat 16
10860eat 1
10861st 0
10862sf 1
10863si 0
10864tg (WTG
10865uid 10646,0
10866ps "ConnStartEndStrategy"
10867stg "STSignalDisplayStrategy"
10868f (Text
10869uid 10647,0
10870va (VaSet
10871)
10872xt "98000,127000,103000,128000"
10873st "PSCLK_OUT"
10874blo "98000,127800"
10875tm "WireNameMgr"
10876)
10877)
10878on &249
10879)
10880*346 (Wire
10881uid 10648,0
10882shape (OrthoPolyLine
10883uid 10649,0
10884va (VaSet
10885vasetType 3
10886)
10887xt "96000,129000,106000,129000"
10888pts [
10889"96000,129000"
10890"106000,129000"
10891]
10892)
10893end &234
10894sat 16
10895eat 1
10896st 0
10897sf 1
10898si 0
10899tg (WTG
10900uid 10654,0
10901ps "ConnStartEndStrategy"
10902stg "STSignalDisplayStrategy"
10903f (Text
10904uid 10655,0
10905va (VaSet
10906)
10907xt "98000,128000,105800,129000"
10908st "PSDONE_extraOUT"
10909blo "98000,128800"
10910tm "WireNameMgr"
10911)
10912)
10913on &248
10914)
10915*347 (Wire
10916uid 10656,0
10917shape (OrthoPolyLine
10918uid 10657,0
10919va (VaSet
10920vasetType 3
10921)
10922xt "96000,130000,106000,130000"
10923pts [
10924"96000,130000"
10925"106000,130000"
10926]
10927)
10928end &234
10929sat 16
10930eat 1
10931st 0
10932sf 1
10933si 0
10934tg (WTG
10935uid 10662,0
10936ps "ConnStartEndStrategy"
10937stg "STSignalDisplayStrategy"
10938f (Text
10939uid 10663,0
10940va (VaSet
10941)
10942xt "98000,129000,102600,130000"
10943st "PSEN_OUT"
10944blo "98000,129800"
10945tm "WireNameMgr"
10946)
10947)
10948on &243
10949)
10950*348 (Wire
10951uid 10664,0
10952shape (OrthoPolyLine
10953uid 10665,0
10954va (VaSet
10955vasetType 3
10956)
10957xt "96000,131000,106000,131000"
10958pts [
10959"96000,131000"
10960"106000,131000"
10961]
10962)
10963end &234
10964sat 16
10965eat 1
10966st 0
10967sf 1
10968si 0
10969tg (WTG
10970uid 10670,0
10971ps "ConnStartEndStrategy"
10972stg "STSignalDisplayStrategy"
10973f (Text
10974uid 10671,0
10975va (VaSet
10976)
10977xt "98000,130000,105000,131000"
10978st "PSINCDEC_OUT"
10979blo "98000,130800"
10980tm "WireNameMgr"
10981)
10982)
10983on &244
10984)
10985*349 (Wire
10986uid 10672,0
10987shape (OrthoPolyLine
10988uid 10673,0
10989va (VaSet
10990vasetType 3
10991)
10992xt "96000,132000,106000,132000"
10993pts [
10994"96000,132000"
10995"106000,132000"
10996]
10997)
10998end &234
10999sat 16
11000eat 1
11001st 0
11002sf 1
11003si 0
11004tg (WTG
11005uid 10678,0
11006ps "ConnStartEndStrategy"
11007stg "STSignalDisplayStrategy"
11008f (Text
11009uid 10679,0
11010va (VaSet
11011)
11012xt "98000,131000,102400,132000"
11013st "PS_DIR_IN"
11014blo "98000,131800"
11015tm "WireNameMgr"
11016)
11017)
11018on &241
11019)
11020*350 (Wire
11021uid 10680,0
11022shape (OrthoPolyLine
11023uid 10681,0
11024va (VaSet
11025vasetType 3
11026)
11027xt "96000,133000,106000,133000"
11028pts [
11029"96000,133000"
11030"106000,133000"
11031]
11032)
11033end &234
11034sat 16
11035eat 1
11036st 0
11037sf 1
11038si 0
11039tg (WTG
11040uid 10686,0
11041ps "ConnStartEndStrategy"
11042stg "STSignalDisplayStrategy"
11043f (Text
11044uid 10687,0
11045va (VaSet
11046)
11047xt "98000,132000,102200,133000"
11048st "PS_DO_IN"
11049blo "98000,132800"
11050tm "WireNameMgr"
11051)
11052)
11053on &242
11054)
11055*351 (Wire
11056uid 10688,0
11057shape (OrthoPolyLine
11058uid 10689,0
11059va (VaSet
11060vasetType 3
11061)
11062xt "96000,134000,106000,134000"
11063pts [
11064"96000,134000"
11065"106000,134000"
11066]
11067)
11068end &234
11069sat 16
11070eat 1
11071st 0
11072sf 1
11073si 0
11074tg (WTG
11075uid 10694,0
11076ps "ConnStartEndStrategy"
11077stg "STSignalDisplayStrategy"
11078f (Text
11079uid 10695,0
11080va (VaSet
11081)
11082xt "98000,133000,100200,134000"
11083st "ready"
11084blo "98000,133800"
11085tm "WireNameMgr"
11086)
11087)
11088on &246
11089)
11090*352 (Wire
11091uid 10696,0
11092shape (OrthoPolyLine
11093uid 10697,0
11094va (VaSet
11095vasetType 3
11096)
11097xt "96000,135000,106000,135000"
11098pts [
11099"96000,135000"
11100"106000,135000"
11101]
11102)
11103end &234
11104sat 16
11105eat 1
11106st 0
11107sf 1
11108si 0
11109tg (WTG
11110uid 10702,0
11111ps "ConnStartEndStrategy"
11112stg "STSignalDisplayStrategy"
11113f (Text
11114uid 10703,0
11115va (VaSet
11116)
11117xt "98000,134000,100900,135000"
11118st "shifting"
11119blo "98000,134800"
11120tm "WireNameMgr"
11121)
11122)
11123on &247
11124)
11125*353 (Wire
11126uid 11096,0
11127shape (OrthoPolyLine
11128uid 11097,0
11129va (VaSet
11130vasetType 3
11131)
11132xt "96000,103000,100000,103000"
11133pts [
11134"96000,103000"
11135"100000,103000"
11136]
11137)
11138start &251
11139end &158
11140sat 32
11141eat 1
11142st 0
11143sf 1
11144si 0
11145tg (WTG
11146uid 11100,0
11147ps "ConnStartEndStrategy"
11148stg "STSignalDisplayStrategy"
11149f (Text
11150uid 11101,0
11151va (VaSet
11152isHidden 1
11153)
11154xt "126000,96000,131300,97000"
11155st "RS485_C_DI"
11156blo "126000,96800"
11157tm "WireNameMgr"
11158)
11159)
11160on &252
11161)
11162*354 (Wire
11163uid 11110,0
11164shape (OrthoPolyLine
11165uid 11111,0
11166va (VaSet
11167vasetType 3
11168)
11169xt "108000,112000,111000,112000"
11170pts [
11171"108000,112000"
11172"111000,112000"
11173]
11174)
11175start &158
11176end &253
11177sat 2
11178eat 32
11179st 0
11180sf 1
11181si 0
11182tg (WTG
11183uid 11114,0
11184ps "ConnStartEndStrategy"
11185stg "STSignalDisplayStrategy"
11186f (Text
11187uid 11115,0
11188va (VaSet
11189isHidden 1
11190)
11191xt "110000,111000,115700,112000"
11192st "RS485_C_DO"
11193blo "110000,111800"
11194tm "WireNameMgr"
11195)
11196)
11197on &254
11198)
11199*355 (Wire
11200uid 11514,0
11201shape (OrthoPolyLine
11202uid 11515,0
11203va (VaSet
11204vasetType 3
11205)
11206xt "123000,116000,127000,116000"
11207pts [
11208"123000,116000"
11209"127000,116000"
11210]
11211)
11212start &255
11213sat 32
11214eat 16
11215st 0
11216sf 1
11217si 0
11218tg (WTG
11219uid 11518,0
11220ps "ConnStartEndStrategy"
11221stg "STSignalDisplayStrategy"
11222f (Text
11223uid 11519,0
11224va (VaSet
11225isHidden 1
11226)
11227xt "125000,115000,130200,116000"
11228st "RS485_E_DI"
11229blo "125000,115800"
11230tm "WireNameMgr"
11231)
11232)
11233on &256
11234)
11235*356 (Wire
11236uid 11528,0
11237shape (OrthoPolyLine
11238uid 11529,0
11239va (VaSet
11240vasetType 3
11241)
11242xt "123000,114000,126000,114000"
11243pts [
11244"123000,114000"
11245"126000,114000"
11246]
11247)
11248end &258
11249sat 16
11250eat 32
11251st 0
11252sf 1
11253si 0
11254tg (WTG
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11257stg "STSignalDisplayStrategy"
11258f (Text
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11262)
11263xt "125000,113000,130600,114000"
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11265blo "125000,113800"
11266tm "WireNameMgr"
11267)
11268)
11269on &257
11270)
11271*357 (Wire
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11281"87000,140000"
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11283)
11284start &59
11285end &259
11286sat 32
11287eat 32
11288stc 0
11289st 0
11290sf 1
11291si 0
11292tg (WTG
11293uid 12324,0
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11305)
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11307on &260
11308)
11309*358 (Wire
11310uid 12545,0
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11312uid 12546,0
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11315)
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11318"80750,141000"
11319"87000,141000"
11320]
11321)
11322start &60
11323end &261
11324ss 0
11325sat 32
11326eat 32
11327st 0
11328sf 1
11329si 0
11330tg (WTG
11331uid 12549,0
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11342tm "WireNameMgr"
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11345on &264
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11347*359 (Wire
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11350uid 12560,0
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11356"80750,143000"
11357"87000,142000"
11358]
11359)
11360start &62
11361end &262
11362sat 32
11363eat 32
11364st 0
11365sf 1
11366si 0
11367tg (WTG
11368uid 12563,0
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11375)
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11377st "GREEN_LED"
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11379tm "WireNameMgr"
11380)
11381)
11382on &265
11383)
11384*360 (Wire
11385uid 12573,0
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11387uid 12574,0
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11389vasetType 3
11390)
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11393"80750,142000"
11394"87000,143000"
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11396)
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11398end &263
11399sat 32
11400eat 32
11401st 0
11402sf 1
11403si 0
11404tg (WTG
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11415blo "83000,141800"
11416tm "WireNameMgr"
11417)
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11419on &266
11420)
11421*361 (Wire
11422uid 13136,0
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11431"106000,136000"
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11433)
11434end &234
11435sat 16
11436eat 1
11437st 0
11438sf 1
11439si 0
11440tg (WTG
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11452)
11453)
11454on &260
11455)
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11463xySpacing 1000
11464xShown 1
11465yShown 1
11466color "26368,26368,26368"
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11542*369 (MLText
11543uid 49,0
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11546)
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11577exportedDirectories [
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11580exportStdIncludeRefs 1
11581exportStdPackageRefs 1
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11628blo "1000,1800"
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11631)
11632)
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11673)
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11740)
11741]
11742)
11743ga (GenericAssociation
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11746text (MLText
11747va (VaSet
11748font "Courier New,8,0"
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11750xt "-6450,1500,-6450,1500"
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11753)
11754elements [
11755]
11756)
11757portVis (PortSigDisplay
11758)
11759prms (Property
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11761pname "params"
11762ptn "String"
11763)
11764visOptions (mwParamsVisibilityOptions
11765)
11766)
11767defaultSaComponent (SaComponent
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11789)
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11801font "Arial,8,1"
11802)
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11807)
11808]
11809)
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11816)
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11819header ""
11820)
11821elements [
11822]
11823)
11824viewicon (ZoomableIcon
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11827vasetType 1
11828fg "49152,49152,49152"
11829)
11830xt "0,0,1500,1500"
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11835portVis (PortSigDisplay
11836)
11837archFileType "UNKNOWN"
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11839defaultVhdlComponent (VhdlComponent
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11849ttg (MlTextGroup
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11877)
11878]
11879)
11880ga (GenericAssociation
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11886)
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11888)
11889header ""
11890)
11891elements [
11892]
11893)
11894portVis (PortSigDisplay
11895)
11896entityPath ""
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11900defaultVerilogComponent (VerilogComponent
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11929)
11930*386 (Text
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11936blo "50,6300"
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11938)
11939]
11940)
11941ga (GenericAssociation
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11944text (MLText
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11947)
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11951)
11952elements [
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12001viewiconposition 0
12002)
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12015text (MLText
12016va (VaSet
12017)
12018xt "200,200,2000,1200"
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12021"
12022tm "HdlTextMgr"
12023wrapOption 3
12024visibleHeight 4600
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12027)
12028)
12029defaultGlobalConnector (GlobalConnector
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12031va (VaSet
12032vasetType 1
12033fg "65535,65535,0"
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12035xt "-1000,-1000,1000,1000"
12036radius 1000
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12038name (Text
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12045)
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12052"1000,1000"
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12057xt "0,0,1000,1000"
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12059)
12060defaultBdJunction (BdJunction
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12063va (VaSet
12064vasetType 1
12065)
12066xt "-400,-400,400,400"
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12068)
12069)
12070defaultPortIoIn (PortIoIn
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12076optionalChildren [
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12088"0,0"
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12094sf 1
12095tg (WTG
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12099va (VaSet
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12101xt "-1375,-1000,-1375,-1000"
12102ju 2
12103blo "-1375,-1000"
12104tm "WireNameMgr"
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12106)
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12108defaultPortIoOut (PortIoOut
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12132sf 1
12133tg (WTG
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12137va (VaSet
12138)
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12140blo "625,-1000"
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12142)
12143)
12144)
12145defaultPortIoInOut (PortIoInOut
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12156(Line
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12161"500,0"
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12163)
12164]
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12167sf 1
12168tg (WTG
12169ps "PortIoTextPlaceStrategy"
12170stg "STSignalDisplayStrategy"
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12173)
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12176tm "WireNameMgr"
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12178)
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12188(Hexagon
12189sl 0
12190xt "500,-375,2000,375"
12191)
12192(Line
12193sl 0
12194xt "0,0,500,0"
12195pts [
12196"0,0"
12197"500,0"
12198]
12199)
12200]
12201)
12202stc 0
12203sf 1
12204tg (WTG
12205ps "PortIoTextPlaceStrategy"
12206stg "STSignalDisplayStrategy"
12207f (Text
12208va (VaSet
12209)
12210xt "0,-375,0,-375"
12211blo "0,-375"
12212tm "WireNameMgr"
12213)
12214)
12215)
12216defaultSignal (Wire
12217shape (OrthoPolyLine
12218va (VaSet
12219vasetType 3
12220)
12221pts [
12222"0,0"
12223"0,0"
12224]
12225)
12226ss 0
12227es 0
12228sat 32
12229eat 32
12230st 0
12231sf 1
12232si 0
12233tg (WTG
12234ps "ConnStartEndStrategy"
12235stg "STSignalDisplayStrategy"
12236f (Text
12237va (VaSet
12238)
12239xt "0,0,1900,1000"
12240st "sig0"
12241blo "0,800"
12242tm "WireNameMgr"
12243)
12244)
12245)
12246defaultBus (Wire
12247shape (OrthoPolyLine
12248va (VaSet
12249vasetType 3
12250lineWidth 2
12251)
12252pts [
12253"0,0"
12254"0,0"
12255]
12256)
12257ss 0
12258es 0
12259sat 32
12260eat 32
12261sty 1
12262st 0
12263sf 1
12264si 0
12265tg (WTG
12266ps "ConnStartEndStrategy"
12267stg "STSignalDisplayStrategy"
12268f (Text
12269va (VaSet
12270)
12271xt "0,0,2400,1000"
12272st "dbus0"
12273blo "0,800"
12274tm "WireNameMgr"
12275)
12276)
12277)
12278defaultBundle (Bundle
12279shape (OrthoPolyLine
12280va (VaSet
12281vasetType 3
12282lineColor "32768,0,0"
12283lineWidth 2
12284)
12285pts [
12286"0,0"
12287"0,0"
12288]
12289)
12290ss 0
12291es 0
12292sat 32
12293eat 32
12294textGroup (BiTextGroup
12295ps "ConnStartEndStrategy"
12296stg "VerticalLayoutStrategy"
12297first (Text
12298va (VaSet
12299)
12300xt "0,0,3000,1000"
12301st "bundle0"
12302blo "0,800"
12303tm "BundleNameMgr"
12304)
12305second (MLText
12306va (VaSet
12307)
12308xt "0,1000,1000,2000"
12309st "()"
12310tm "BundleContentsMgr"
12311)
12312)
12313bundleNet &0
12314)
12315defaultPortMapFrame (PortMapFrame
12316ps "PortMapFrameStrategy"
12317shape (RectFrame
12318va (VaSet
12319vasetType 1
12320fg "65535,65535,65535"
12321lineColor "0,0,32768"
12322lineWidth 2
12323)
12324xt "0,0,10000,12000"
12325)
12326portMapText (BiTextGroup
12327ps "BottomRightOffsetStrategy"
12328stg "VerticalLayoutStrategy"
12329first (MLText
12330va (VaSet
12331)
12332)
12333second (MLText
12334va (VaSet
12335)
12336tm "PortMapTextMgr"
12337)
12338)
12339)
12340defaultGenFrame (Frame
12341shape (RectFrame
12342va (VaSet
12343vasetType 1
12344fg "65535,65535,65535"
12345lineColor "26368,26368,26368"
12346lineStyle 2
12347lineWidth 2
12348)
12349xt "0,0,20000,20000"
12350)
12351title (TextAssociate
12352ps "TopLeftStrategy"
12353text (MLText
12354va (VaSet
12355)
12356xt "0,-1100,12600,-100"
12357st "g0: FOR i IN 0 TO n GENERATE"
12358tm "FrameTitleTextMgr"
12359)
12360)
12361seqNum (FrameSequenceNumber
12362ps "TopLeftStrategy"
12363shape (Rectangle
12364va (VaSet
12365vasetType 1
12366fg "65535,65535,65535"
12367)
12368xt "50,50,1250,1450"
12369)
12370num (Text
12371va (VaSet
12372)
12373xt "250,250,1050,1250"
12374st "1"
12375blo "250,1050"
12376tm "FrameSeqNumMgr"
12377)
12378)
12379decls (MlTextGroup
12380ps "BottomRightOffsetStrategy"
12381stg "VerticalLayoutStrategy"
12382textVec [
12383*389 (Text
12384va (VaSet
12385font "Arial,8,1"
12386)
12387xt "14100,20000,22000,21000"
12388st "Frame Declarations"
12389blo "14100,20800"
12390)
12391*390 (MLText
12392va (VaSet
12393)
12394xt "14100,21000,14100,21000"
12395tm "BdFrameDeclTextMgr"
12396)
12397]
12398)
12399)
12400defaultBlockFrame (Frame
12401shape (RectFrame
12402va (VaSet
12403vasetType 1
12404fg "65535,65535,65535"
12405lineColor "26368,26368,26368"
12406lineStyle 1
12407lineWidth 2
12408)
12409xt "0,0,20000,20000"
12410)
12411title (TextAssociate
12412ps "TopLeftStrategy"
12413text (MLText
12414va (VaSet
12415)
12416xt "0,-1100,7400,-100"
12417st "b0: BLOCK (guard)"
12418tm "FrameTitleTextMgr"
12419)
12420)
12421seqNum (FrameSequenceNumber
12422ps "TopLeftStrategy"
12423shape (Rectangle
12424va (VaSet
12425vasetType 1
12426fg "65535,65535,65535"
12427)
12428xt "50,50,1250,1450"
12429)
12430num (Text
12431va (VaSet
12432)
12433xt "250,250,1050,1250"
12434st "1"
12435blo "250,1050"
12436tm "FrameSeqNumMgr"
12437)
12438)
12439decls (MlTextGroup
12440ps "BottomRightOffsetStrategy"
12441stg "VerticalLayoutStrategy"
12442textVec [
12443*391 (Text
12444va (VaSet
12445font "Arial,8,1"
12446)
12447xt "14100,20000,22000,21000"
12448st "Frame Declarations"
12449blo "14100,20800"
12450)
12451*392 (MLText
12452va (VaSet
12453)
12454xt "14100,21000,14100,21000"
12455tm "BdFrameDeclTextMgr"
12456)
12457]
12458)
12459style 3
12460)
12461defaultSaCptPort (CptPort
12462ps "OnEdgeStrategy"
12463shape (Triangle
12464ro 90
12465va (VaSet
12466vasetType 1
12467fg "0,65535,0"
12468)
12469xt "0,0,750,750"
12470)
12471tg (CPTG
12472ps "CptPortTextPlaceStrategy"
12473stg "VerticalLayoutStrategy"
12474f (Text
12475va (VaSet
12476)
12477xt "0,750,1800,1750"
12478st "Port"
12479blo "0,1550"
12480)
12481)
12482thePort (LogicalPort
12483decl (Decl
12484n "Port"
12485t ""
12486o 0
12487)
12488)
12489)
12490defaultSaCptPortBuffer (CptPort
12491ps "OnEdgeStrategy"
12492shape (Diamond
12493va (VaSet
12494vasetType 1
12495fg "65535,65535,65535"
12496)
12497xt "0,0,750,750"
12498)
12499tg (CPTG
12500ps "CptPortTextPlaceStrategy"
12501stg "VerticalLayoutStrategy"
12502f (Text
12503va (VaSet
12504)
12505xt "0,750,1800,1750"
12506st "Port"
12507blo "0,1550"
12508)
12509)
12510thePort (LogicalPort
12511m 3
12512decl (Decl
12513n "Port"
12514t ""
12515o 0
12516)
12517)
12518)
12519defaultDeclText (MLText
12520va (VaSet
12521font "Courier New,8,0"
12522)
12523)
12524archDeclarativeBlock (BdArchDeclBlock
12525uid 1,0
12526stg "BdArchDeclBlockLS"
12527declLabel (Text
12528uid 2,0
12529va (VaSet
12530font "Arial,8,1"
12531)
12532xt "37000,1800,42400,2800"
12533st "Declarations"
12534blo "37000,2600"
12535)
12536portLabel (Text
12537uid 3,0
12538va (VaSet
12539font "Arial,8,1"
12540)
12541xt "37000,2800,39700,3800"
12542st "Ports:"
12543blo "37000,3600"
12544)
12545preUserLabel (Text
12546uid 4,0
12547va (VaSet
12548isHidden 1
12549font "Arial,8,1"
12550)
12551xt "37000,1800,40800,2800"
12552st "Pre User:"
12553blo "37000,2600"
12554)
12555preUserText (MLText
12556uid 5,0
12557va (VaSet
12558isHidden 1
12559font "Courier New,8,0"
12560)
12561xt "37000,1800,37000,1800"
12562tm "BdDeclarativeTextMgr"
12563)
12564diagSignalLabel (Text
12565uid 6,0
12566va (VaSet
12567font "Arial,8,1"
12568)
12569xt "37000,47800,44100,48800"
12570st "Diagram Signals:"
12571blo "37000,48600"
12572)
12573postUserLabel (Text
12574uid 7,0
12575va (VaSet
12576isHidden 1
12577font "Arial,8,1"
12578)
12579xt "37000,1800,41700,2800"
12580st "Post User:"
12581blo "37000,2600"
12582)
12583postUserText (MLText
12584uid 8,0
12585va (VaSet
12586isHidden 1
12587font "Courier New,8,0"
12588)
12589xt "37000,1800,37000,1800"
12590tm "BdDeclarativeTextMgr"
12591)
12592)
12593commonDM (CommonDM
12594ldm (LogicalDM
12595suid 209,0
12596usingSuid 1
12597emptyRow *393 (LEmptyRow
12598)
12599uid 54,0
12600optionalChildren [
12601*394 (RefLabelRowHdr
12602)
12603*395 (TitleRowHdr
12604)
12605*396 (FilterRowHdr
12606)
12607*397 (RefLabelColHdr
12608tm "RefLabelColHdrMgr"
12609)
12610*398 (RowExpandColHdr
12611tm "RowExpandColHdrMgr"
12612)
12613*399 (GroupColHdr
12614tm "GroupColHdrMgr"
12615)
12616*400 (NameColHdr
12617tm "BlockDiagramNameColHdrMgr"
12618)
12619*401 (ModeColHdr
12620tm "BlockDiagramModeColHdrMgr"
12621)
12622*402 (TypeColHdr
12623tm "BlockDiagramTypeColHdrMgr"
12624)
12625*403 (BoundsColHdr
12626tm "BlockDiagramBoundsColHdrMgr"
12627)
12628*404 (InitColHdr
12629tm "BlockDiagramInitColHdrMgr"
12630)
12631*405 (EolColHdr
12632tm "BlockDiagramEolColHdrMgr"
12633)
12634*406 (LeafLogPort
12635port (LogicalPort
12636m 4
12637decl (Decl
12638n "board_id"
12639t "std_logic_vector"
12640b "(3 downto 0)"
12641preAdd 0
12642posAdd 0
12643o 73
12644suid 5,0
12645)
12646)
12647uid 327,0
12648)
12649*407 (LeafLogPort
12650port (LogicalPort
12651m 4
12652decl (Decl
12653n "crate_id"
12654t "std_logic_vector"
12655b "(1 downto 0)"
12656o 74
12657suid 6,0
12658)
12659)
12660uid 329,0
12661)
12662*408 (LeafLogPort
12663port (LogicalPort
12664m 4
12665decl (Decl
12666n "adc_data_array"
12667t "adc_data_array_type"
12668o 72
12669suid 29,0
12670)
12671)
12672uid 1491,0
12673)
12674*409 (LeafLogPort
12675port (LogicalPort
12676m 1
12677decl (Decl
12678n "RSRLOAD"
12679t "std_logic"
12680o 41
12681suid 57,0
12682i "'0'"
12683)
12684)
12685uid 2435,0
12686)
12687*410 (LeafLogPort
12688port (LogicalPort
12689m 4
12690decl (Decl
12691n "SRCLK"
12692t "std_logic"
12693o 70
12694suid 58,0
12695i "'0'"
12696)
12697)
12698uid 2437,0
12699)
12700*411 (LeafLogPort
12701port (LogicalPort
12702m 4
12703decl (Decl
12704n "sensor_cs"
12705t "std_logic_vector"
12706b "(3 DOWNTO 0)"
12707o 78
12708suid 65,0
12709)
12710)
12711uid 3037,0
12712)
12713*412 (LeafLogPort
12714port (LogicalPort
12715m 1
12716decl (Decl
12717n "DAC_CS"
12718t "std_logic"
12719o 24
12720suid 66,0
12721)
12722)
12723uid 3039,0
12724)
12725*413 (LeafLogPort
12726port (LogicalPort
12727decl (Decl
12728n "X_50M"
12729t "STD_LOGIC"
12730preAdd 0
12731posAdd 0
12732o 16
12733suid 67,0
12734)
12735)
12736uid 3276,0
12737)
12738*414 (LeafLogPort
12739port (LogicalPort
12740decl (Decl
12741n "TRG"
12742t "STD_LOGIC"
12743o 14
12744suid 68,0
12745)
12746)
12747uid 3278,0
12748)
12749*415 (LeafLogPort
12750port (LogicalPort
12751m 1
12752decl (Decl
12753n "A_CLK"
12754t "std_logic_vector"
12755b "(3 downto 0)"
12756o 19
12757suid 71,0
12758)
12759)
12760uid 3280,0
12761)
12762*416 (LeafLogPort
12763port (LogicalPort
12764m 4
12765decl (Decl
12766n "CLK_25_PS"
12767t "std_logic"
12768o 59
12769suid 72,0
12770)
12771)
12772uid 3282,0
12773)
12774*417 (LeafLogPort
12775port (LogicalPort
12776m 1
12777decl (Decl
12778n "OE_ADC"
12779t "STD_LOGIC"
12780preAdd 0
12781posAdd 0
12782o 35
12783suid 73,0
12784)
12785)
12786uid 3382,0
12787)
12788*418 (LeafLogPort
12789port (LogicalPort
12790decl (Decl
12791n "A_OTR"
12792t "std_logic_vector"
12793b "(3 DOWNTO 0)"
12794o 5
12795suid 74,0
12796)
12797)
12798uid 3384,0
12799)
12800*419 (LeafLogPort
12801port (LogicalPort
12802decl (Decl
12803n "A0_D"
12804t "std_logic_vector"
12805b "(11 DOWNTO 0)"
12806o 1
12807suid 79,0
12808)
12809)
12810uid 3386,0
12811)
12812*420 (LeafLogPort
12813port (LogicalPort
12814decl (Decl
12815n "A1_D"
12816t "std_logic_vector"
12817b "(11 DOWNTO 0)"
12818o 2
12819suid 80,0
12820)
12821)
12822uid 3388,0
12823)
12824*421 (LeafLogPort
12825port (LogicalPort
12826decl (Decl
12827n "A2_D"
12828t "std_logic_vector"
12829b "(11 DOWNTO 0)"
12830o 3
12831suid 81,0
12832)
12833)
12834uid 3390,0
12835)
12836*422 (LeafLogPort
12837port (LogicalPort
12838decl (Decl
12839n "A3_D"
12840t "std_logic_vector"
12841b "(11 DOWNTO 0)"
12842o 4
12843suid 82,0
12844)
12845)
12846uid 3392,0
12847)
12848*423 (LeafLogPort
12849port (LogicalPort
12850m 1
12851decl (Decl
12852n "D0_SRCLK"
12853t "STD_LOGIC"
12854o 20
12855suid 87,0
12856)
12857)
12858uid 3468,0
12859)
12860*424 (LeafLogPort
12861port (LogicalPort
12862m 1
12863decl (Decl
12864n "D1_SRCLK"
12865t "STD_LOGIC"
12866o 21
12867suid 88,0
12868)
12869)
12870uid 3470,0
12871)
12872*425 (LeafLogPort
12873port (LogicalPort
12874m 1
12875decl (Decl
12876n "D2_SRCLK"
12877t "STD_LOGIC"
12878o 22
12879suid 89,0
12880)
12881)
12882uid 3472,0
12883)
12884*426 (LeafLogPort
12885port (LogicalPort
12886m 1
12887decl (Decl
12888n "D3_SRCLK"
12889t "STD_LOGIC"
12890o 23
12891suid 90,0
12892)
12893)
12894uid 3474,0
12895)
12896*427 (LeafLogPort
12897port (LogicalPort
12898decl (Decl
12899n "D0_SROUT"
12900t "std_logic"
12901o 6
12902suid 91,0
12903)
12904)
12905uid 3524,0
12906)
12907*428 (LeafLogPort
12908port (LogicalPort
12909decl (Decl
12910n "D1_SROUT"
12911t "std_logic"
12912o 7
12913suid 92,0
12914)
12915)
12916uid 3526,0
12917)
12918*429 (LeafLogPort
12919port (LogicalPort
12920decl (Decl
12921n "D2_SROUT"
12922t "std_logic"
12923o 8
12924suid 93,0
12925)
12926)
12927uid 3528,0
12928)
12929*430 (LeafLogPort
12930port (LogicalPort
12931decl (Decl
12932n "D3_SROUT"
12933t "std_logic"
12934o 9
12935suid 94,0
12936)
12937)
12938uid 3530,0
12939)
12940*431 (LeafLogPort
12941port (LogicalPort
12942m 1
12943decl (Decl
12944n "D_A"
12945t "std_logic_vector"
12946b "(3 DOWNTO 0)"
12947o 27
12948suid 95,0
12949i "(others => '0')"
12950)
12951)
12952uid 3532,0
12953)
12954*432 (LeafLogPort
12955port (LogicalPort
12956m 1
12957decl (Decl
12958n "DWRITE"
12959t "std_logic"
12960o 26
12961suid 96,0
12962i "'0'"
12963)
12964)
12965uid 3534,0
12966)
12967*433 (LeafLogPort
12968port (LogicalPort
12969m 1
12970decl (Decl
12971n "T0_CS"
12972t "std_logic"
12973o 44
12974suid 101,0
12975)
12976)
12977uid 3646,0
12978)
12979*434 (LeafLogPort
12980port (LogicalPort
12981m 1
12982decl (Decl
12983n "T1_CS"
12984t "std_logic"
12985o 45
12986suid 102,0
12987)
12988)
12989uid 3648,0
12990)
12991*435 (LeafLogPort
12992port (LogicalPort
12993m 1
12994decl (Decl
12995n "T2_CS"
12996t "std_logic"
12997o 46
12998suid 103,0
12999)
13000)
13001uid 3650,0
13002)
13003*436 (LeafLogPort
13004port (LogicalPort
13005m 1
13006decl (Decl
13007n "T3_CS"
13008t "std_logic"
13009o 47
13010suid 104,0
13011)
13012)
13013uid 3652,0
13014)
13015*437 (LeafLogPort
13016port (LogicalPort
13017m 1
13018decl (Decl
13019n "S_CLK"
13020t "std_logic"
13021o 43
13022suid 105,0
13023)
13024)
13025uid 3654,0
13026)
13027*438 (LeafLogPort
13028port (LogicalPort
13029m 1
13030decl (Decl
13031n "W_A"
13032t "std_logic_vector"
13033b "(9 DOWNTO 0)"
13034o 49
13035suid 106,0
13036)
13037)
13038uid 3656,0
13039)
13040*439 (LeafLogPort
13041port (LogicalPort
13042m 2
13043decl (Decl
13044n "W_D"
13045t "std_logic_vector"
13046b "(15 DOWNTO 0)"
13047o 55
13048suid 107,0
13049)
13050)
13051uid 3658,0
13052)
13053*440 (LeafLogPort
13054port (LogicalPort
13055m 1
13056decl (Decl
13057n "W_RES"
13058t "std_logic"
13059o 52
13060suid 108,0
13061i "'1'"
13062)
13063)
13064uid 3660,0
13065)
13066*441 (LeafLogPort
13067port (LogicalPort
13068m 1
13069decl (Decl
13070n "W_RD"
13071t "std_logic"
13072o 51
13073suid 109,0
13074i "'1'"
13075)
13076)
13077uid 3662,0
13078)
13079*442 (LeafLogPort
13080port (LogicalPort
13081m 1
13082decl (Decl
13083n "W_WR"
13084t "std_logic"
13085o 53
13086suid 110,0
13087i "'1'"
13088)
13089)
13090uid 3664,0
13091)
13092*443 (LeafLogPort
13093port (LogicalPort
13094decl (Decl
13095n "W_INT"
13096t "std_logic"
13097o 15
13098suid 111,0
13099)
13100)
13101uid 3666,0
13102)
13103*444 (LeafLogPort
13104port (LogicalPort
13105m 1
13106decl (Decl
13107n "W_CS"
13108t "std_logic"
13109o 50
13110suid 112,0
13111i "'1'"
13112)
13113)
13114uid 3668,0
13115)
13116*445 (LeafLogPort
13117port (LogicalPort
13118m 1
13119decl (Decl
13120n "MOSI"
13121t "std_logic"
13122o 34
13123suid 113,0
13124i "'0'"
13125)
13126)
13127uid 3696,0
13128)
13129*446 (LeafLogPort
13130port (LogicalPort
13131m 2
13132decl (Decl
13133n "MISO"
13134t "std_logic"
13135preAdd 0
13136posAdd 0
13137o 54
13138suid 114,0
13139)
13140)
13141uid 3698,0
13142)
13143*447 (LeafLogPort
13144port (LogicalPort
13145m 1
13146decl (Decl
13147n "TRG_V"
13148t "std_logic"
13149o 48
13150suid 126,0
13151)
13152)
13153uid 3886,0
13154)
13155*448 (LeafLogPort
13156port (LogicalPort
13157m 1
13158decl (Decl
13159n "RS485_C_RE"
13160t "std_logic"
13161o 38
13162suid 127,0
13163)
13164)
13165uid 3888,0
13166)
13167*449 (LeafLogPort
13168port (LogicalPort
13169m 1
13170decl (Decl
13171n "RS485_C_DE"
13172t "std_logic"
13173o 36
13174suid 128,0
13175)
13176)
13177uid 3890,0
13178)
13179*450 (LeafLogPort
13180port (LogicalPort
13181m 1
13182decl (Decl
13183n "RS485_E_RE"
13184t "std_logic"
13185o 40
13186suid 129,0
13187)
13188)
13189uid 3892,0
13190)
13191*451 (LeafLogPort
13192port (LogicalPort
13193m 1
13194decl (Decl
13195n "RS485_E_DE"
13196t "std_logic"
13197o 39
13198suid 130,0
13199)
13200)
13201uid 3894,0
13202)
13203*452 (LeafLogPort
13204port (LogicalPort
13205m 1
13206decl (Decl
13207n "DENABLE"
13208t "std_logic"
13209o 25
13210suid 131,0
13211i "'0'"
13212)
13213)
13214uid 3896,0
13215)
13216*453 (LeafLogPort
13217port (LogicalPort
13218m 1
13219decl (Decl
13220n "EE_CS"
13221t "std_logic"
13222o 30
13223suid 133,0
13224)
13225)
13226uid 3900,0
13227)
13228*454 (LeafLogPort
13229port (LogicalPort
13230m 1
13231decl (Decl
13232n "D_T"
13233t "std_logic_vector"
13234b "(7 DOWNTO 0)"
13235o 28
13236suid 141,0
13237i "(OTHERS => '0')"
13238)
13239)
13240uid 5322,0
13241)
13242*455 (LeafLogPort
13243port (LogicalPort
13244decl (Decl
13245n "D_PLLLCK"
13246t "std_logic_vector"
13247b "(3 DOWNTO 0)"
13248o 10
13249suid 152,0
13250)
13251)
13252uid 6777,0
13253scheme 0
13254)
13255*456 (LeafLogPort
13256port (LogicalPort
13257m 1
13258decl (Decl
13259n "D_T2"
13260t "std_logic_vector"
13261b "(3 DOWNTO 0)"
13262o 29
13263suid 154,0
13264i "(others => '0')"
13265)
13266)
13267uid 6872,0
13268scheme 0
13269)
13270*457 (LeafLogPort
13271port (LogicalPort
13272m 1
13273decl (Decl
13274n "A1_T"
13275t "std_logic_vector"
13276b "(7 DOWNTO 0)"
13277o 18
13278suid 155,0
13279i "(OTHERS => '0')"
13280)
13281)
13282uid 7134,0
13283scheme 0
13284)
13285*458 (LeafLogPort
13286port (LogicalPort
13287m 4
13288decl (Decl
13289n "dummy"
13290t "std_logic"
13291o 76
13292suid 157,0
13293)
13294)
13295uid 7473,0
13296scheme 0
13297)
13298*459 (LeafLogPort
13299port (LogicalPort
13300m 4
13301decl (Decl
13302n "drs_channel_id"
13303t "std_logic_vector"
13304b "(3 downto 0)"
13305o 75
13306suid 159,0
13307i "(others => '0')"
13308)
13309)
13310uid 8875,0
13311)
13312*460 (LeafLogPort
13313port (LogicalPort
13314m 4
13315decl (Decl
13316n "CLK_50"
13317t "std_logic"
13318o 61
13319suid 163,0
13320)
13321)
13322uid 9516,0
13323)
13324*461 (LeafLogPort
13325port (LogicalPort
13326m 4
13327decl (Decl
13328n "CLK_25_PS1"
13329t "std_logic"
13330o 60
13331suid 164,0
13332)
13333)
13334uid 10056,0
13335)
13336*462 (LeafLogPort
13337port (LogicalPort
13338m 4
13339decl (Decl
13340n "adc_clk_en"
13341t "std_logic"
13342o 71
13343suid 165,0
13344i "'0'"
13345)
13346)
13347uid 10058,0
13348)
13349*463 (LeafLogPort
13350port (LogicalPort
13351m 1
13352decl (Decl
13353n "A0_T"
13354t "std_logic_vector"
13355b "(7 DOWNTO 0)"
13356o 17
13357suid 166,0
13358i "(others => '0')"
13359)
13360)
13361uid 10294,0
13362scheme 0
13363)
13364*464 (LeafLogPort
13365port (LogicalPort
13366m 4
13367decl (Decl
13368n "CLK50_OUT"
13369t "std_logic"
13370o 58
13371suid 184,0
13372)
13373)
13374uid 10704,0
13375)
13376*465 (LeafLogPort
13377port (LogicalPort
13378m 4
13379decl (Decl
13380n "CLK25_OUT"
13381t "std_logic"
13382o 56
13383suid 185,0
13384)
13385)
13386uid 10706,0
13387)
13388*466 (LeafLogPort
13389port (LogicalPort
13390m 4
13391decl (Decl
13392n "CLK25_PSOUT"
13393t "std_logic"
13394o 57
13395suid 186,0
13396)
13397)
13398uid 10708,0
13399)
13400*467 (LeafLogPort
13401port (LogicalPort
13402m 4
13403decl (Decl
13404n "PS_DIR_IN"
13405t "std_logic"
13406o 68
13407suid 187,0
13408)
13409)
13410uid 10710,0
13411)
13412*468 (LeafLogPort
13413port (LogicalPort
13414m 4
13415decl (Decl
13416n "PS_DO_IN"
13417t "std_logic"
13418o 69
13419suid 188,0
13420)
13421)
13422uid 10712,0
13423)
13424*469 (LeafLogPort
13425port (LogicalPort
13426m 4
13427decl (Decl
13428n "PSEN_OUT"
13429t "std_logic"
13430o 66
13431suid 189,0
13432)
13433)
13434uid 10714,0
13435)
13436*470 (LeafLogPort
13437port (LogicalPort
13438m 4
13439decl (Decl
13440n "PSINCDEC_OUT"
13441t "std_logic"
13442o 67
13443suid 190,0
13444)
13445)
13446uid 10716,0
13447)
13448*471 (LeafLogPort
13449port (LogicalPort
13450m 4
13451decl (Decl
13452n "DCM_locked"
13453t "std_logic"
13454preAdd 0
13455posAdd 0
13456o 62
13457suid 191,0
13458)
13459)
13460uid 10718,0
13461)
13462*472 (LeafLogPort
13463port (LogicalPort
13464m 4
13465decl (Decl
13466n "ready"
13467t "std_logic"
13468preAdd 0
13469posAdd 0
13470o 77
13471suid 192,0
13472i "'0'"
13473)
13474)
13475uid 10720,0
13476)
13477*473 (LeafLogPort
13478port (LogicalPort
13479m 4
13480decl (Decl
13481n "shifting"
13482t "std_logic"
13483prec "-- status:"
13484preAdd 0
13485posAdd 0
13486o 79
13487suid 193,0
13488i "'0'"
13489)
13490)
13491uid 10722,0
13492)
13493*474 (LeafLogPort
13494port (LogicalPort
13495m 4
13496decl (Decl
13497n "PSDONE_extraOUT"
13498t "std_logic"
13499o 65
13500suid 194,0
13501)
13502)
13503uid 10724,0
13504)
13505*475 (LeafLogPort
13506port (LogicalPort
13507m 4
13508decl (Decl
13509n "PSCLK_OUT"
13510t "std_logic"
13511o 64
13512suid 195,0
13513)
13514)
13515uid 10726,0
13516)
13517*476 (LeafLogPort
13518port (LogicalPort
13519m 4
13520decl (Decl
13521n "LOCKED_extraOUT"
13522t "std_logic"
13523o 63
13524suid 196,0
13525)
13526)
13527uid 10728,0
13528)
13529*477 (LeafLogPort
13530port (LogicalPort
13531decl (Decl
13532n "RS485_C_DI"
13533t "std_logic"
13534o 11
13535suid 197,0
13536)
13537)
13538uid 11084,0
13539scheme 0
13540)
13541*478 (LeafLogPort
13542port (LogicalPort
13543m 1
13544decl (Decl
13545n "RS485_C_DO"
13546t "std_logic"
13547o 37
13548suid 198,0
13549)
13550)
13551uid 11086,0
13552scheme 0
13553)
13554*479 (LeafLogPort
13555port (LogicalPort
13556decl (Decl
13557n "RS485_E_DI"
13558t "std_logic"
13559o 12
13560suid 200,0
13561)
13562)
13563uid 11504,0
13564scheme 0
13565)
13566*480 (LeafLogPort
13567port (LogicalPort
13568decl (Decl
13569n "RS485_E_DO"
13570t "std_logic"
13571o 13
13572suid 201,0
13573)
13574)
13575uid 11506,0
13576scheme 0
13577)
13578*481 (LeafLogPort
13579port (LogicalPort
13580m 1
13581decl (Decl
13582n "SRIN"
13583t "std_logic"
13584o 42
13585suid 203,0
13586i "'0'"
13587)
13588)
13589uid 12336,0
13590)
13591*482 (LeafLogPort
13592port (LogicalPort
13593m 1
13594decl (Decl
13595n "AMBER_LED"
13596t "std_logic"
13597o 31
13598suid 207,0
13599)
13600)
13601uid 12768,0
13602)
13603*483 (LeafLogPort
13604port (LogicalPort
13605m 1
13606decl (Decl
13607n "GREEN_LED"
13608t "std_logic"
13609o 32
13610suid 208,0
13611)
13612)
13613uid 12770,0
13614)
13615*484 (LeafLogPort
13616port (LogicalPort
13617m 1
13618decl (Decl
13619n "RED_LED"
13620t "std_logic"
13621o 33
13622suid 209,0
13623)
13624)
13625uid 12772,0
13626)
13627]
13628)
13629pdm (PhysicalDM
13630displayShortBounds 1
13631editShortBounds 1
13632uid 67,0
13633optionalChildren [
13634*485 (Sheet
13635sheetRow (SheetRow
13636headerVa (MVa
13637cellColor "49152,49152,49152"
13638fontColor "0,0,0"
13639font "Tahoma,10,0"
13640)
13641cellVa (MVa
13642cellColor "65535,65535,65535"
13643fontColor "0,0,0"
13644font "Tahoma,10,0"
13645)
13646groupVa (MVa
13647cellColor "39936,56832,65280"
13648fontColor "0,0,0"
13649font "Tahoma,10,0"
13650)
13651emptyMRCItem *486 (MRCItem
13652litem &393
13653pos 79
13654dimension 20
13655)
13656uid 69,0
13657optionalChildren [
13658*487 (MRCItem
13659litem &394
13660pos 0
13661dimension 20
13662uid 70,0
13663)
13664*488 (MRCItem
13665litem &395
13666pos 1
13667dimension 23
13668uid 71,0
13669)
13670*489 (MRCItem
13671litem &396
13672pos 2
13673hidden 1
13674dimension 20
13675uid 72,0
13676)
13677*490 (MRCItem
13678litem &406
13679pos 52
13680dimension 20
13681uid 328,0
13682)
13683*491 (MRCItem
13684litem &407
13685pos 53
13686dimension 20
13687uid 330,0
13688)
13689*492 (MRCItem
13690litem &408
13691pos 54
13692dimension 20
13693uid 1492,0
13694)
13695*493 (MRCItem
13696litem &409
13697pos 0
13698dimension 20
13699uid 2436,0
13700)
13701*494 (MRCItem
13702litem &410
13703pos 55
13704dimension 20
13705uid 2438,0
13706)
13707*495 (MRCItem
13708litem &411
13709pos 56
13710dimension 20
13711uid 3038,0
13712)
13713*496 (MRCItem
13714litem &412
13715pos 1
13716dimension 20
13717uid 3040,0
13718)
13719*497 (MRCItem
13720litem &413
13721pos 2
13722dimension 20
13723uid 3277,0
13724)
13725*498 (MRCItem
13726litem &414
13727pos 3
13728dimension 20
13729uid 3279,0
13730)
13731*499 (MRCItem
13732litem &415
13733pos 4
13734dimension 20
13735uid 3281,0
13736)
13737*500 (MRCItem
13738litem &416
13739pos 57
13740dimension 20
13741uid 3283,0
13742)
13743*501 (MRCItem
13744litem &417
13745pos 5
13746dimension 20
13747uid 3383,0
13748)
13749*502 (MRCItem
13750litem &418
13751pos 6
13752dimension 20
13753uid 3385,0
13754)
13755*503 (MRCItem
13756litem &419
13757pos 7
13758dimension 20
13759uid 3387,0
13760)
13761*504 (MRCItem
13762litem &420
13763pos 8
13764dimension 20
13765uid 3389,0
13766)
13767*505 (MRCItem
13768litem &421
13769pos 9
13770dimension 20
13771uid 3391,0
13772)
13773*506 (MRCItem
13774litem &422
13775pos 10
13776dimension 20
13777uid 3393,0
13778)
13779*507 (MRCItem
13780litem &423
13781pos 11
13782dimension 20
13783uid 3469,0
13784)
13785*508 (MRCItem
13786litem &424
13787pos 12
13788dimension 20
13789uid 3471,0
13790)
13791*509 (MRCItem
13792litem &425
13793pos 13
13794dimension 20
13795uid 3473,0
13796)
13797*510 (MRCItem
13798litem &426
13799pos 14
13800dimension 20
13801uid 3475,0
13802)
13803*511 (MRCItem
13804litem &427
13805pos 15
13806dimension 20
13807uid 3525,0
13808)
13809*512 (MRCItem
13810litem &428
13811pos 16
13812dimension 20
13813uid 3527,0
13814)
13815*513 (MRCItem
13816litem &429
13817pos 17
13818dimension 20
13819uid 3529,0
13820)
13821*514 (MRCItem
13822litem &430
13823pos 18
13824dimension 20
13825uid 3531,0
13826)
13827*515 (MRCItem
13828litem &431
13829pos 19
13830dimension 20
13831uid 3533,0
13832)
13833*516 (MRCItem
13834litem &432
13835pos 20
13836dimension 20
13837uid 3535,0
13838)
13839*517 (MRCItem
13840litem &433
13841pos 21
13842dimension 20
13843uid 3647,0
13844)
13845*518 (MRCItem
13846litem &434
13847pos 22
13848dimension 20
13849uid 3649,0
13850)
13851*519 (MRCItem
13852litem &435
13853pos 23
13854dimension 20
13855uid 3651,0
13856)
13857*520 (MRCItem
13858litem &436
13859pos 24
13860dimension 20
13861uid 3653,0
13862)
13863*521 (MRCItem
13864litem &437
13865pos 25
13866dimension 20
13867uid 3655,0
13868)
13869*522 (MRCItem
13870litem &438
13871pos 26
13872dimension 20
13873uid 3657,0
13874)
13875*523 (MRCItem
13876litem &439
13877pos 27
13878dimension 20
1387