source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd@ 10121

Last change on this file since 10121 was 10121, checked in by neise, 12 years ago
synchronous trigger handling added continous soft trigger generation. ---> control frequency via 'send 0x21??' each step increases trigger delay by 12.5ms 0x2100 = 40Hz 0x21FF = 0.3Hz
File size: 174.2 KB
Line 
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1011)
1012thePort (LogicalPort
1013decl (Decl
1014n "wiz_int"
1015t "std_logic"
1016o 11
1017suid 31,0
1018)
1019)
1020)
1021*23 (CptPort
1022uid 195,0
1023ps "OnEdgeStrategy"
1024shape (Triangle
1025uid 196,0
1026ro 90
1027va (VaSet
1028vasetType 1
1029fg "0,65535,0"
1030)
1031xt "80000,71625,80750,72375"
1032)
1033tg (CPTG
1034uid 197,0
1035ps "CptPortTextPlaceStrategy"
1036stg "RightVerticalLayoutStrategy"
1037f (Text
1038uid 198,0
1039va (VaSet
1040)
1041xt "76400,71500,79000,72500"
1042st "wiz_rd"
1043ju 2
1044blo "79000,72300"
1045)
1046)
1047thePort (LogicalPort
1048m 1
1049decl (Decl
1050n "wiz_rd"
1051t "std_logic"
1052o 45
1053suid 30,0
1054i "'1'"
1055)
1056)
1057)
1058*24 (CptPort
1059uid 199,0
1060ps "OnEdgeStrategy"
1061shape (Triangle
1062uid 200,0
1063ro 90
1064va (VaSet
1065vasetType 1
1066fg "0,65535,0"
1067)
1068xt "80000,72625,80750,73375"
1069)
1070tg (CPTG
1071uid 201,0
1072ps "CptPortTextPlaceStrategy"
1073stg "RightVerticalLayoutStrategy"
1074f (Text
1075uid 202,0
1076va (VaSet
1077)
1078xt "76300,72500,79000,73500"
1079st "wiz_wr"
1080ju 2
1081blo "79000,73300"
1082)
1083)
1084thePort (LogicalPort
1085m 1
1086decl (Decl
1087n "wiz_wr"
1088t "std_logic"
1089o 47
1090suid 29,0
1091i "'1'"
1092)
1093)
1094)
1095*25 (CptPort
1096uid 1304,0
1097ps "OnEdgeStrategy"
1098shape (Triangle
1099uid 1305,0
1100ro 270
1101va (VaSet
1102vasetType 1
1103fg "0,65535,0"
1104)
1105xt "51250,69625,52000,70375"
1106)
1107tg (CPTG
1108uid 1306,0
1109ps "CptPortTextPlaceStrategy"
1110stg "VerticalLayoutStrategy"
1111f (Text
1112uid 1307,0
1113va (VaSet
1114)
1115xt "53000,69500,57500,70500"
1116st "CLK_25_PS"
1117blo "53000,70300"
1118)
1119)
1120thePort (LogicalPort
1121m 1
1122decl (Decl
1123n "CLK_25_PS"
1124t "std_logic"
1125o 15
1126suid 35,0
1127)
1128)
1129)
1130*26 (CptPort
1131uid 1369,0
1132ps "OnEdgeStrategy"
1133shape (Triangle
1134uid 1370,0
1135ro 270
1136va (VaSet
1137vasetType 1
1138fg "0,65535,0"
1139)
1140xt "51250,68625,52000,69375"
1141)
1142tg (CPTG
1143uid 1371,0
1144ps "CptPortTextPlaceStrategy"
1145stg "VerticalLayoutStrategy"
1146f (Text
1147uid 1372,0
1148va (VaSet
1149)
1150xt "53000,68500,56100,69500"
1151st "CLK_50"
1152blo "53000,69300"
1153)
1154)
1155thePort (LogicalPort
1156m 1
1157decl (Decl
1158n "CLK_50"
1159t "std_logic"
1160o 16
1161suid 37,0
1162)
1163)
1164)
1165*27 (CptPort
1166uid 1385,0
1167ps "OnEdgeStrategy"
1168shape (Triangle
1169uid 1386,0
1170ro 90
1171va (VaSet
1172vasetType 1
1173fg "0,65535,0"
1174)
1175xt "51250,67625,52000,68375"
1176)
1177tg (CPTG
1178uid 1387,0
1179ps "CptPortTextPlaceStrategy"
1180stg "VerticalLayoutStrategy"
1181f (Text
1182uid 1388,0
1183va (VaSet
1184)
1185xt "53000,67500,54900,68500"
1186st "CLK"
1187blo "53000,68300"
1188)
1189)
1190thePort (LogicalPort
1191decl (Decl
1192n "CLK"
1193t "std_logic"
1194o 1
1195suid 38,0
1196)
1197)
1198)
1199*28 (CptPort
1200uid 1389,0
1201ps "OnEdgeStrategy"
1202shape (Triangle
1203uid 1390,0
1204ro 90
1205va (VaSet
1206vasetType 1
1207fg "0,65535,0"
1208)
1209xt "51250,94625,52000,95375"
1210)
1211tg (CPTG
1212uid 1391,0
1213ps "CptPortTextPlaceStrategy"
1214stg "VerticalLayoutStrategy"
1215f (Text
1216uid 1392,0
1217va (VaSet
1218)
1219xt "53000,94500,58900,95500"
1220st "adc_data_array"
1221blo "53000,95300"
1222)
1223)
1224thePort (LogicalPort
1225decl (Decl
1226n "adc_data_array"
1227t "adc_data_array_type"
1228o 6
1229suid 39,0
1230)
1231)
1232)
1233*29 (CptPort
1234uid 1511,0
1235ps "OnEdgeStrategy"
1236shape (Triangle
1237uid 1512,0
1238ro 90
1239va (VaSet
1240vasetType 1
1241fg "0,65535,0"
1242)
1243xt "51250,88625,52000,89375"
1244)
1245tg (CPTG
1246uid 1513,0
1247ps "CptPortTextPlaceStrategy"
1248stg "VerticalLayoutStrategy"
1249f (Text
1250uid 1514,0
1251va (VaSet
1252)
1253xt "53000,88500,61000,89500"
1254st "adc_otr_array : (3:0)"
1255blo "53000,89300"
1256)
1257)
1258thePort (LogicalPort
1259decl (Decl
1260n "adc_otr_array"
1261t "std_logic_vector"
1262b "(3 DOWNTO 0)"
1263o 7
1264suid 40,0
1265)
1266)
1267)
1268*30 (CptPort
1269uid 1572,0
1270ps "OnEdgeStrategy"
1271shape (Triangle
1272uid 1573,0
1273ro 270
1274va (VaSet
1275vasetType 1
1276fg "0,65535,0"
1277)
1278xt "51250,108625,52000,109375"
1279)
1280tg (CPTG
1281uid 1574,0
1282ps "CptPortTextPlaceStrategy"
1283stg "VerticalLayoutStrategy"
1284f (Text
1285uid 1575,0
1286va (VaSet
1287)
1288xt "53000,108500,61500,109500"
1289st "drs_channel_id : (3:0)"
1290blo "53000,109300"
1291)
1292)
1293thePort (LogicalPort
1294m 1
1295decl (Decl
1296n "drs_channel_id"
1297t "std_logic_vector"
1298b "(3 downto 0)"
1299o 32
1300suid 48,0
1301i "(others => '0')"
1302)
1303)
1304)
1305*31 (CptPort
1306uid 1576,0
1307ps "OnEdgeStrategy"
1308shape (Triangle
1309uid 1577,0
1310ro 270
1311va (VaSet
1312vasetType 1
1313fg "0,65535,0"
1314)
1315xt "51250,109625,52000,110375"
1316)
1317tg (CPTG
1318uid 1578,0
1319ps "CptPortTextPlaceStrategy"
1320stg "VerticalLayoutStrategy"
1321f (Text
1322uid 1579,0
1323va (VaSet
1324)
1325xt "53000,109500,57300,110500"
1326st "drs_dwrite"
1327blo "53000,110300"
1328)
1329)
1330thePort (LogicalPort
1331m 1
1332decl (Decl
1333n "drs_dwrite"
1334t "std_logic"
1335o 33
1336suid 49,0
1337i "'1'"
1338)
1339)
1340)
1341*32 (CptPort
1342uid 1588,0
1343ps "OnEdgeStrategy"
1344shape (Triangle
1345uid 1589,0
1346ro 90
1347va (VaSet
1348vasetType 1
1349fg "0,65535,0"
1350)
1351xt "51250,104625,52000,105375"
1352)
1353tg (CPTG
1354uid 1590,0
1355ps "CptPortTextPlaceStrategy"
1356stg "VerticalLayoutStrategy"
1357f (Text
1358uid 1591,0
1359va (VaSet
1360)
1361xt "53000,104500,58400,105500"
1362st "SROUT_in_0"
1363blo "53000,105300"
1364)
1365)
1366thePort (LogicalPort
1367decl (Decl
1368n "SROUT_in_0"
1369t "std_logic"
1370o 2
1371suid 42,0
1372)
1373)
1374)
1375*33 (CptPort
1376uid 1592,0
1377ps "OnEdgeStrategy"
1378shape (Triangle
1379uid 1593,0
1380ro 90
1381va (VaSet
1382vasetType 1
1383fg "0,65535,0"
1384)
1385xt "51250,105625,52000,106375"
1386)
1387tg (CPTG
1388uid 1594,0
1389ps "CptPortTextPlaceStrategy"
1390stg "VerticalLayoutStrategy"
1391f (Text
1392uid 1595,0
1393va (VaSet
1394)
1395xt "53000,105500,58400,106500"
1396st "SROUT_in_1"
1397blo "53000,106300"
1398)
1399)
1400thePort (LogicalPort
1401decl (Decl
1402n "SROUT_in_1"
1403t "std_logic"
1404o 3
1405suid 43,0
1406)
1407)
1408)
1409*34 (CptPort
1410uid 1596,0
1411ps "OnEdgeStrategy"
1412shape (Triangle
1413uid 1597,0
1414ro 90
1415va (VaSet
1416vasetType 1
1417fg "0,65535,0"
1418)
1419xt "51250,106625,52000,107375"
1420)
1421tg (CPTG
1422uid 1598,0
1423ps "CptPortTextPlaceStrategy"
1424stg "VerticalLayoutStrategy"
1425f (Text
1426uid 1599,0
1427va (VaSet
1428)
1429xt "53000,106500,58400,107500"
1430st "SROUT_in_2"
1431blo "53000,107300"
1432)
1433)
1434thePort (LogicalPort
1435decl (Decl
1436n "SROUT_in_2"
1437t "std_logic"
1438o 4
1439suid 44,0
1440)
1441)
1442)
1443*35 (CptPort
1444uid 1600,0
1445ps "OnEdgeStrategy"
1446shape (Triangle
1447uid 1601,0
1448ro 90
1449va (VaSet
1450vasetType 1
1451fg "0,65535,0"
1452)
1453xt "51250,107625,52000,108375"
1454)
1455tg (CPTG
1456uid 1602,0
1457ps "CptPortTextPlaceStrategy"
1458stg "VerticalLayoutStrategy"
1459f (Text
1460uid 1603,0
1461va (VaSet
1462)
1463xt "53000,107500,58400,108500"
1464st "SROUT_in_3"
1465blo "53000,108300"
1466)
1467)
1468thePort (LogicalPort
1469decl (Decl
1470n "SROUT_in_3"
1471t "std_logic"
1472o 5
1473suid 45,0
1474)
1475)
1476)
1477*36 (CptPort
1478uid 2379,0
1479ps "OnEdgeStrategy"
1480shape (Triangle
1481uid 2380,0
1482ro 270
1483va (VaSet
1484vasetType 1
1485fg "0,65535,0"
1486)
1487xt "51250,110625,52000,111375"
1488)
1489tg (CPTG
1490uid 2381,0
1491ps "CptPortTextPlaceStrategy"
1492stg "VerticalLayoutStrategy"
1493f (Text
1494uid 2382,0
1495va (VaSet
1496)
1497xt "53000,110500,57200,111500"
1498st "RSRLOAD"
1499blo "53000,111300"
1500)
1501)
1502thePort (LogicalPort
1503m 1
1504decl (Decl
1505n "RSRLOAD"
1506t "std_logic"
1507o 23
1508suid 56,0
1509i "'0'"
1510)
1511)
1512)
1513*37 (CptPort
1514uid 2383,0
1515ps "OnEdgeStrategy"
1516shape (Triangle
1517uid 2384,0
1518ro 270
1519va (VaSet
1520vasetType 1
1521fg "0,65535,0"
1522)
1523xt "51250,112625,52000,113375"
1524)
1525tg (CPTG
1526uid 2385,0
1527ps "CptPortTextPlaceStrategy"
1528stg "VerticalLayoutStrategy"
1529f (Text
1530uid 2386,0
1531va (VaSet
1532)
1533xt "53000,112500,56000,113500"
1534st "SRCLK"
1535blo "53000,113300"
1536)
1537)
1538thePort (LogicalPort
1539m 1
1540decl (Decl
1541n "SRCLK"
1542t "std_logic"
1543o 24
1544suid 57,0
1545i "'0'"
1546)
1547)
1548)
1549*38 (CptPort
1550uid 2969,0
1551ps "OnEdgeStrategy"
1552shape (Triangle
1553uid 2970,0
1554ro 90
1555va (VaSet
1556vasetType 1
1557fg "0,65535,0"
1558)
1559xt "80000,86625,80750,87375"
1560)
1561tg (CPTG
1562uid 2971,0
1563ps "CptPortTextPlaceStrategy"
1564stg "RightVerticalLayoutStrategy"
1565f (Text
1566uid 2972,0
1567va (VaSet
1568)
1569xt "76200,86500,79000,87500"
1570st "dac_cs"
1571ju 2
1572blo "79000,87300"
1573)
1574)
1575thePort (LogicalPort
1576m 1
1577decl (Decl
1578n "dac_cs"
1579t "std_logic"
1580o 30
1581suid 64,0
1582)
1583)
1584)
1585*39 (CptPort
1586uid 2973,0
1587ps "OnEdgeStrategy"
1588shape (Triangle
1589uid 2974,0
1590ro 90
1591va (VaSet
1592vasetType 1
1593fg "0,65535,0"
1594)
1595xt "80000,97625,80750,98375"
1596)
1597tg (CPTG
1598uid 2975,0
1599ps "CptPortTextPlaceStrategy"
1600stg "RightVerticalLayoutStrategy"
1601f (Text
1602uid 2976,0
1603va (VaSet
1604)
1605xt "77300,97500,79000,98500"
1606st "sclk"
1607ju 2
1608blo "79000,98300"
1609)
1610)
1611thePort (LogicalPort
1612m 1
1613decl (Decl
1614n "sclk"
1615t "std_logic"
1616o 40
1617suid 62,0
1618)
1619)
1620)
1621*40 (CptPort
1622uid 2977,0
1623ps "OnEdgeStrategy"
1624shape (Triangle
1625uid 2978,0
1626ro 90
1627va (VaSet
1628vasetType 1
1629fg "0,65535,0"
1630)
1631xt "80000,88625,80750,89375"
1632)
1633tg (CPTG
1634uid 2979,0
1635ps "CptPortTextPlaceStrategy"
1636stg "RightVerticalLayoutStrategy"
1637f (Text
1638uid 2980,0
1639va (VaSet
1640)
1641xt "72500,88500,79000,89500"
1642st "sensor_cs : (3:0)"
1643ju 2
1644blo "79000,89300"
1645)
1646)
1647thePort (LogicalPort
1648m 1
1649decl (Decl
1650n "sensor_cs"
1651t "std_logic_vector"
1652b "(3 DOWNTO 0)"
1653o 41
1654suid 65,0
1655)
1656)
1657)
1658*41 (CptPort
1659uid 2981,0
1660ps "OnEdgeStrategy"
1661shape (Diamond
1662uid 2982,0
1663ro 90
1664va (VaSet
1665vasetType 1
1666fg "0,65535,0"
1667)
1668xt "80000,98625,80750,99375"
1669)
1670tg (CPTG
1671uid 2983,0
1672ps "CptPortTextPlaceStrategy"
1673stg "RightVerticalLayoutStrategy"
1674f (Text
1675uid 2984,0
1676va (VaSet
1677)
1678xt "77600,98500,79000,99500"
1679st "sio"
1680ju 2
1681blo "79000,99300"
1682)
1683)
1684thePort (LogicalPort
1685m 2
1686decl (Decl
1687n "sio"
1688t "std_logic"
1689preAdd 0
1690posAdd 0
1691o 48
1692suid 63,0
1693)
1694)
1695)
1696*42 (CptPort
1697uid 3670,0
1698ps "OnEdgeStrategy"
1699shape (Triangle
1700uid 3671,0
1701ro 90
1702va (VaSet
1703vasetType 1
1704fg "0,65535,0"
1705)
1706xt "80000,99625,80750,100375"
1707)
1708tg (CPTG
1709uid 3672,0
1710ps "CptPortTextPlaceStrategy"
1711stg "RightVerticalLayoutStrategy"
1712f (Text
1713uid 3673,0
1714va (VaSet
1715)
1716xt "77000,99500,79000,100500"
1717st "mosi"
1718ju 2
1719blo "79000,100300"
1720)
1721)
1722thePort (LogicalPort
1723m 1
1724decl (Decl
1725n "mosi"
1726t "std_logic"
1727o 36
1728suid 66,0
1729i "'0'"
1730)
1731)
1732)
1733*43 (CptPort
1734uid 6427,0
1735ps "OnEdgeStrategy"
1736shape (Triangle
1737uid 6428,0
1738ro 90
1739va (VaSet
1740vasetType 1
1741fg "0,65535,0"
1742)
1743xt "80000,120625,80750,121375"
1744)
1745tg (CPTG
1746uid 6429,0
1747ps "CptPortTextPlaceStrategy"
1748stg "RightVerticalLayoutStrategy"
1749f (Text
1750uid 6430,0
1751va (VaSet
1752)
1753xt "76000,120500,79000,121500"
1754st "denable"
1755ju 2
1756blo "79000,121300"
1757)
1758)
1759thePort (LogicalPort
1760m 1
1761decl (Decl
1762n "denable"
1763t "std_logic"
1764eolc "-- default domino wave off"
1765posAdd 0
1766o 31
1767suid 67,0
1768i "'0'"
1769)
1770)
1771)
1772*44 (CptPort
1773uid 10046,0
1774ps "OnEdgeStrategy"
1775shape (Triangle
1776uid 10047,0
1777ro 270
1778va (VaSet
1779vasetType 1
1780fg "0,65535,0"
1781)
1782xt "51250,72625,52000,73375"
1783)
1784tg (CPTG
1785uid 10048,0
1786ps "CptPortTextPlaceStrategy"
1787stg "VerticalLayoutStrategy"
1788f (Text
1789uid 10049,0
1790va (VaSet
1791)
1792xt "53000,72500,57500,73500"
1793st "adc_clk_en"
1794blo "53000,73300"
1795)
1796)
1797thePort (LogicalPort
1798m 1
1799decl (Decl
1800n "adc_clk_en"
1801t "std_logic"
1802o 26
1803suid 69,0
1804i "'0'"
1805)
1806)
1807)
1808*45 (CptPort
1809uid 10246,0
1810ps "OnEdgeStrategy"
1811shape (Triangle
1812uid 10247,0
1813ro 90
1814va (VaSet
1815vasetType 1
1816fg "0,65535,0"
1817)
1818xt "80000,129625,80750,130375"
1819)
1820tg (CPTG
1821uid 10248,0
1822ps "CptPortTextPlaceStrategy"
1823stg "RightVerticalLayoutStrategy"
1824f (Text
1825uid 10249,0
1826va (VaSet
1827)
1828xt "73800,129500,79000,130500"
1829st "DCM_locked"
1830ju 2
1831blo "79000,130300"
1832)
1833)
1834thePort (LogicalPort
1835m 1
1836decl (Decl
1837n "DCM_locked"
1838t "std_logic"
1839preAdd 0
1840posAdd 0
1841o 17
1842suid 76,0
1843)
1844)
1845)
1846*46 (CptPort
1847uid 10254,0
1848ps "OnEdgeStrategy"
1849shape (Triangle
1850uid 10255,0
1851ro 90
1852va (VaSet
1853vasetType 1
1854fg "0,65535,0"
1855)
1856xt "80000,135625,80750,136375"
1857)
1858tg (CPTG
1859uid 10256,0
1860ps "CptPortTextPlaceStrategy"
1861stg "RightVerticalLayoutStrategy"
1862f (Text
1863uid 10257,0
1864va (VaSet
1865)
1866xt "71300,135500,79000,136500"
1867st "LOCKED_extraOUT"
1868ju 2
1869blo "79000,136300"
1870)
1871)
1872thePort (LogicalPort
1873m 1
1874decl (Decl
1875n "LOCKED_extraOUT"
1876t "std_logic"
1877o 18
1878suid 70,0
1879)
1880)
1881)
1882*47 (CptPort
1883uid 10258,0
1884ps "OnEdgeStrategy"
1885shape (Triangle
1886uid 10259,0
1887ro 90
1888va (VaSet
1889vasetType 1
1890fg "0,65535,0"
1891)
1892xt "80000,138625,80750,139375"
1893)
1894tg (CPTG
1895uid 10260,0
1896ps "CptPortTextPlaceStrategy"
1897stg "RightVerticalLayoutStrategy"
1898f (Text
1899uid 10261,0
1900va (VaSet
1901)
1902xt "74200,138500,79000,139500"
1903st "offset : (7:0)"
1904ju 2
1905blo "79000,139300"
1906)
1907)
1908thePort (LogicalPort
1909m 1
1910decl (Decl
1911n "offset"
1912t "std_logic_vector"
1913b "(7 downto 0)"
1914preAdd 0
1915posAdd 0
1916o 37
1917suid 77,0
1918i "(OTHERS => '0')"
1919)
1920)
1921)
1922*48 (CptPort
1923uid 10262,0
1924ps "OnEdgeStrategy"
1925shape (Triangle
1926uid 10263,0
1927ro 90
1928va (VaSet
1929vasetType 1
1930fg "0,65535,0"
1931)
1932xt "80000,125625,80750,126375"
1933)
1934tg (CPTG
1935uid 10264,0
1936ps "CptPortTextPlaceStrategy"
1937stg "RightVerticalLayoutStrategy"
1938f (Text
1939uid 10265,0
1940va (VaSet
1941)
1942xt "74600,125500,79000,126500"
1943st "PS_DIR_IN"
1944ju 2
1945blo "79000,126300"
1946)
1947)
1948thePort (LogicalPort
1949m 1
1950decl (Decl
1951n "PS_DIR_IN"
1952t "std_logic"
1953o 22
1954suid 80,0
1955)
1956)
1957)
1958*49 (CptPort
1959uid 10270,0
1960ps "OnEdgeStrategy"
1961shape (Triangle
1962uid 10271,0
1963ro 90
1964va (VaSet
1965vasetType 1
1966fg "0,65535,0"
1967)
1968xt "80000,134625,80750,135375"
1969)
1970tg (CPTG
1971uid 10272,0
1972ps "CptPortTextPlaceStrategy"
1973stg "RightVerticalLayoutStrategy"
1974f (Text
1975uid 10273,0
1976va (VaSet
1977)
1978xt "74000,134500,79000,135500"
1979st "PSCLK_OUT"
1980ju 2
1981blo "79000,135300"
1982)
1983)
1984thePort (LogicalPort
1985m 1
1986decl (Decl
1987n "PSCLK_OUT"
1988t "std_logic"
1989o 19
1990suid 74,0
1991)
1992)
1993)
1994*50 (CptPort
1995uid 10274,0
1996ps "OnEdgeStrategy"
1997shape (Triangle
1998uid 10275,0
1999ro 90
2000va (VaSet
2001vasetType 1
2002fg "0,65535,0"
2003)
2004xt "80000,133625,80750,134375"
2005)
2006tg (CPTG
2007uid 10276,0
2008ps "CptPortTextPlaceStrategy"
2009stg "RightVerticalLayoutStrategy"
2010f (Text
2011uid 10277,0
2012va (VaSet
2013)
2014xt "71200,133500,79000,134500"
2015st "PSDONE_extraOUT"
2016ju 2
2017blo "79000,134300"
2018)
2019)
2020thePort (LogicalPort
2021m 1
2022decl (Decl
2023n "PSDONE_extraOUT"
2024t "std_logic"
2025o 20
2026suid 71,0
2027)
2028)
2029)
2030*51 (CptPort
2031uid 10282,0
2032ps "OnEdgeStrategy"
2033shape (Triangle
2034uid 10283,0
2035ro 90
2036va (VaSet
2037vasetType 1
2038fg "0,65535,0"
2039)
2040xt "80000,127625,80750,128375"
2041)
2042tg (CPTG
2043uid 10284,0
2044ps "CptPortTextPlaceStrategy"
2045stg "RightVerticalLayoutStrategy"
2046f (Text
2047uid 10285,0
2048va (VaSet
2049)
2050xt "72000,127500,79000,128500"
2051st "PSINCDEC_OUT"
2052ju 2
2053blo "79000,128300"
2054)
2055)
2056thePort (LogicalPort
2057m 1
2058decl (Decl
2059n "PSINCDEC_OUT"
2060t "std_logic"
2061o 21
2062suid 72,0
2063)
2064)
2065)
2066*52 (CptPort
2067uid 10286,0
2068ps "OnEdgeStrategy"
2069shape (Triangle
2070uid 10287,0
2071ro 90
2072va (VaSet
2073vasetType 1
2074fg "0,65535,0"
2075)
2076xt "80000,131625,80750,132375"
2077)
2078tg (CPTG
2079uid 10288,0
2080ps "CptPortTextPlaceStrategy"
2081stg "RightVerticalLayoutStrategy"
2082f (Text
2083uid 10289,0
2084va (VaSet
2085)
2086xt "76800,131500,79000,132500"
2087st "ready"
2088ju 2
2089blo "79000,132300"
2090)
2091)
2092thePort (LogicalPort
2093m 1
2094decl (Decl
2095n "ready"
2096t "std_logic"
2097preAdd 0
2098posAdd 0
2099o 38
2100suid 79,0
2101i "'0'"
2102)
2103)
2104)
2105*53 (CptPort
2106uid 10290,0
2107ps "OnEdgeStrategy"
2108shape (Triangle
2109uid 10291,0
2110ro 90
2111va (VaSet
2112vasetType 1
2113fg "0,65535,0"
2114)
2115xt "80000,132625,80750,133375"
2116)
2117tg (CPTG
2118uid 10292,0
2119ps "CptPortTextPlaceStrategy"
2120stg "RightVerticalLayoutStrategy"
2121f (Text
2122uid 10293,0
2123va (VaSet
2124)
2125xt "76100,132500,79000,133500"
2126st "shifting"
2127ju 2
2128blo "79000,133300"
2129)
2130)
2131thePort (LogicalPort
2132m 1
2133decl (Decl
2134n "shifting"
2135t "std_logic"
2136prec "-- status:"
2137preAdd 0
2138posAdd 0
2139o 42
2140suid 78,0
2141i "'0'"
2142)
2143)
2144)
2145*54 (CptPort
2146uid 10320,0
2147ps "OnEdgeStrategy"
2148shape (Triangle
2149uid 10321,0
2150ro 90
2151va (VaSet
2152vasetType 1
2153fg "0,65535,0"
2154)
2155xt "80000,123625,80750,124375"
2156)
2157tg (CPTG
2158uid 10322,0
2159ps "CptPortTextPlaceStrategy"
2160stg "RightVerticalLayoutStrategy"
2161f (Text
2162uid 10323,0
2163va (VaSet
2164)
2165xt "74200,123500,79000,124500"
2166st "CLK25_OUT"
2167ju 2
2168blo "79000,124300"
2169)
2170)
2171thePort (LogicalPort
2172m 1
2173decl (Decl
2174n "CLK25_OUT"
2175t "std_logic"
2176o 12
2177suid 83,0
2178)
2179)
2180)
2181*55 (CptPort
2182uid 10324,0
2183ps "OnEdgeStrategy"
2184shape (Triangle
2185uid 10325,0
2186ro 90
2187va (VaSet
2188vasetType 1
2189fg "0,65535,0"
2190)
2191xt "80000,124625,80750,125375"
2192)
2193tg (CPTG
2194uid 10326,0
2195ps "CptPortTextPlaceStrategy"
2196stg "RightVerticalLayoutStrategy"
2197f (Text
2198uid 10327,0
2199va (VaSet
2200)
2201xt "72800,124500,79000,125500"
2202st "CLK25_PSOUT"
2203ju 2
2204blo "79000,125300"
2205)
2206)
2207thePort (LogicalPort
2208m 1
2209decl (Decl
2210n "CLK25_PSOUT"
2211t "std_logic"
2212o 13
2213suid 84,0
2214)
2215)
2216)
2217*56 (CptPort
2218uid 10328,0
2219ps "OnEdgeStrategy"
2220shape (Triangle
2221uid 10329,0
2222ro 90
2223va (VaSet
2224vasetType 1
2225fg "0,65535,0"
2226)
2227xt "80000,122625,80750,123375"
2228)
2229tg (CPTG
2230uid 10330,0
2231ps "CptPortTextPlaceStrategy"
2232stg "RightVerticalLayoutStrategy"
2233f (Text
2234uid 10331,0
2235va (VaSet
2236)
2237xt "74200,122500,79000,123500"
2238st "CLK50_OUT"
2239ju 2
2240blo "79000,123300"
2241)
2242)
2243thePort (LogicalPort
2244m 1
2245decl (Decl
2246n "CLK50_OUT"
2247t "std_logic"
2248o 14
2249suid 82,0
2250)
2251)
2252)
2253*57 (CptPort
2254uid 12314,0
2255ps "OnEdgeStrategy"
2256shape (Triangle
2257uid 12315,0
2258ro 90
2259va (VaSet
2260vasetType 1
2261fg "0,65535,0"
2262)
2263xt "80000,139625,80750,140375"
2264)
2265tg (CPTG
2266uid 12316,0
2267ps "CptPortTextPlaceStrategy"
2268stg "RightVerticalLayoutStrategy"
2269f (Text
2270uid 12317,0
2271va (VaSet
2272)
2273xt "75300,139500,79000,140500"
2274st "SRIN_out"
2275ju 2
2276blo "79000,140300"
2277)
2278)
2279thePort (LogicalPort
2280m 1
2281decl (Decl
2282n "SRIN_out"
2283t "std_logic"
2284o 25
2285suid 85,0
2286i "'0'"
2287)
2288)
2289)
2290*58 (CptPort
2291uid 12521,0
2292ps "OnEdgeStrategy"
2293shape (Triangle
2294uid 12522,0
2295ro 90
2296va (VaSet
2297vasetType 1
2298fg "0,65535,0"
2299)
2300xt "80000,140625,80750,141375"
2301)
2302tg (CPTG
2303uid 12523,0
2304ps "CptPortTextPlaceStrategy"
2305stg "RightVerticalLayoutStrategy"
2306f (Text
2307uid 12524,0
2308va (VaSet
2309)
2310xt "76500,140500,79000,141500"
2311st "amber"
2312ju 2
2313blo "79000,141300"
2314)
2315)
2316thePort (LogicalPort
2317m 1
2318decl (Decl
2319n "amber"
2320t "std_logic"
2321o 29
2322suid 87,0
2323)
2324)
2325)
2326*59 (CptPort
2327uid 12525,0
2328ps "OnEdgeStrategy"
2329shape (Triangle
2330uid 12526,0
2331ro 90
2332va (VaSet
2333vasetType 1
2334fg "0,65535,0"
2335)
2336xt "80000,141625,80750,142375"
2337)
2338tg (CPTG
2339uid 12527,0
2340ps "CptPortTextPlaceStrategy"
2341stg "RightVerticalLayoutStrategy"
2342f (Text
2343uid 12528,0
2344va (VaSet
2345)
2346xt "76600,141500,79000,142500"
2347st "green"
2348ju 2
2349blo "79000,142300"
2350)
2351)
2352thePort (LogicalPort
2353m 1
2354decl (Decl
2355n "green"
2356t "std_logic"
2357o 34
2358suid 86,0
2359)
2360)
2361)
2362*60 (CptPort
2363uid 12529,0
2364ps "OnEdgeStrategy"
2365shape (Triangle
2366uid 12530,0
2367ro 90
2368va (VaSet
2369vasetType 1
2370fg "0,65535,0"
2371)
2372xt "80000,142625,80750,143375"
2373)
2374tg (CPTG
2375uid 12531,0
2376ps "CptPortTextPlaceStrategy"
2377stg "RightVerticalLayoutStrategy"
2378f (Text
2379uid 12532,0
2380va (VaSet
2381)
2382xt "77500,142500,79000,143500"
2383st "red"
2384ju 2
2385blo "79000,143300"
2386)
2387)
2388thePort (LogicalPort
2389m 1
2390decl (Decl
2391n "red"
2392t "std_logic"
2393o 39
2394suid 88,0
2395)
2396)
2397)
2398*61 (CptPort
2399uid 13843,0
2400ps "OnEdgeStrategy"
2401shape (Triangle
2402uid 13844,0
2403ro 90
2404va (VaSet
2405vasetType 1
2406fg "0,65535,0"
2407)
2408xt "80000,143625,80750,144375"
2409)
2410tg (CPTG
2411uid 13845,0
2412ps "CptPortTextPlaceStrategy"
2413stg "RightVerticalLayoutStrategy"
2414f (Text
2415uid 13846,0
2416va (VaSet
2417)
2418xt "70500,143500,79000,144500"
2419st "additional_flasher_out"
2420ju 2
2421blo "79000,144300"
2422)
2423)
2424thePort (LogicalPort
2425m 1
2426decl (Decl
2427n "additional_flasher_out"
2428t "std_logic"
2429o 28
2430suid 90,0
2431)
2432)
2433)
2434]
2435shape (Rectangle
2436uid 170,0
2437va (VaSet
2438vasetType 1
2439fg "0,65535,0"
2440lineColor "0,32896,0"
2441lineWidth 2
2442)
2443xt "52000,66000,80000,145000"
2444)
2445oxt "15000,-1000,43000,27000"
2446ttg (MlTextGroup
2447uid 171,0
2448ps "CenterOffsetStrategy"
2449stg "VerticalLayoutStrategy"
2450textVec [
2451*62 (Text
2452uid 172,0
2453va (VaSet
2454font "Arial,8,1"
2455)
2456xt "55200,141000,61400,142000"
2457st "FACT_FAD_lib"
2458blo "55200,141800"
2459tm "BdLibraryNameMgr"
2460)
2461*63 (Text
2462uid 173,0
2463va (VaSet
2464font "Arial,8,1"
2465)
2466xt "55200,142000,59400,143000"
2467st "FAD_main"
2468blo "55200,142800"
2469tm "CptNameMgr"
2470)
2471*64 (Text
2472uid 174,0
2473va (VaSet
2474font "Arial,8,1"
2475)
2476xt "55200,143000,61000,144000"
2477st "I_board_main"
2478blo "55200,143800"
2479tm "InstanceNameMgr"
2480)
2481]
2482)
2483ga (GenericAssociation
2484uid 175,0
2485ps "EdgeToEdgeStrategy"
2486matrix (Matrix
2487uid 176,0
2488text (MLText
2489uid 177,0
2490va (VaSet
2491font "Courier New,8,0"
2492)
2493xt "52000,65200,81500,66000"
2494st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B ( integer ) "
2495)
2496header ""
2497)
2498elements [
2499(GiElement
2500name "RAMADDRWIDTH64b"
2501type "integer"
2502value "LOG2_OF_RAM_SIZE_64B"
2503)
2504]
2505)
2506viewicon (ZoomableIcon
2507uid 178,0
2508sl 0
2509va (VaSet
2510vasetType 1
2511fg "49152,49152,49152"
2512)
2513xt "52250,143250,53750,144750"
2514iconName "BlockDiagram.png"
2515iconMaskName "BlockDiagram.msk"
2516ftype 1
2517)
2518viewiconposition 0
2519portVis (PortSigDisplay
2520)
2521archFileType "UNKNOWN"
2522)
2523*65 (PortIoIn
2524uid 231,0
2525shape (CompositeShape
2526uid 232,0
2527va (VaSet
2528vasetType 1
2529fg "0,0,32768"
2530)
2531optionalChildren [
2532(Pentagon
2533uid 233,0
2534sl 0
2535ro 270
2536xt "20000,77625,21500,78375"
2537)
2538(Line
2539uid 234,0
2540sl 0
2541ro 270
2542xt "21500,78000,22000,78000"
2543pts [
2544"21500,78000"
2545"22000,78000"
2546]
2547)
2548]
2549)
2550stc 0
2551sf 1
2552tg (WTG
2553uid 235,0
2554ps "PortIoTextPlaceStrategy"
2555stg "STSignalDisplayStrategy"
2556f (Text
2557uid 236,0
2558va (VaSet
2559)
2560xt "16900,77500,19000,78500"
2561st "TRG"
2562ju 2
2563blo "19000,78300"
2564tm "WireNameMgr"
2565)
2566)
2567)
2568*66 (PortIoIn
2569uid 251,0
2570shape (CompositeShape
2571uid 252,0
2572va (VaSet
2573vasetType 1
2574fg "0,0,32768"
2575)
2576optionalChildren [
2577(Pentagon
2578uid 253,0
2579sl 0
2580ro 270
2581xt "19000,67625,20500,68375"
2582)
2583(Line
2584uid 254,0
2585sl 0
2586ro 270
2587xt "20500,68000,21000,68000"
2588pts [
2589"20500,68000"
2590"21000,68000"
2591]
2592)
2593]
2594)
2595stc 0
2596sf 1
2597tg (WTG
2598uid 255,0
2599ps "PortIoTextPlaceStrategy"
2600stg "STSignalDisplayStrategy"
2601f (Text
2602uid 256,0
2603va (VaSet
2604)
2605xt "15200,67500,18000,68500"
2606st "X_50M"
2607ju 2
2608blo "18000,68300"
2609tm "WireNameMgr"
2610)
2611)
2612)
2613*67 (HdlText
2614uid 265,0
2615optionalChildren [
2616*68 (EmbeddedText
2617uid 271,0
2618commentText (CommentText
2619uid 272,0
2620ps "CenterOffsetStrategy"
2621shape (Rectangle
2622uid 273,0
2623va (VaSet
2624vasetType 1
2625fg "65535,65535,65535"
2626lineColor "0,0,32768"
2627lineWidth 2
2628)
2629xt "32000,83000,44000,87000"
2630)
2631oxt "12000,27000,20000,31000"
2632text (MLText
2633uid 274,0
2634va (VaSet
2635)
2636xt "32200,83200,39700,86200"
2637st "
2638-- hard-wired IDs
2639board_id <= \"0101\";
2640crate_id <= \"01\";
2641"
2642tm "HdlTextMgr"
2643wrapOption 3
2644visibleHeight 4000
2645visibleWidth 12000
2646)
2647)
2648)
2649]
2650shape (Rectangle
2651uid 266,0
2652va (VaSet
2653vasetType 1
2654fg "65535,65535,37120"
2655lineColor "0,0,32768"
2656lineWidth 2
2657)
2658xt "24000,80000,32000,87000"
2659)
2660oxt "12000,23000,17000,27000"
2661ttg (MlTextGroup
2662uid 267,0
2663ps "CenterOffsetStrategy"
2664stg "VerticalLayoutStrategy"
2665textVec [
2666*69 (Text
2667uid 268,0
2668va (VaSet
2669font "Arial,8,1"
2670)
2671xt "26150,81000,28650,82000"
2672st "eb_ID"
2673blo "26150,81800"
2674tm "HdlTextNameMgr"
2675)
2676*70 (Text
2677uid 269,0
2678va (VaSet
2679font "Arial,8,1"
2680)
2681xt "26150,82000,26950,83000"
2682st "1"
2683blo "26150,82800"
2684tm "HdlTextNumberMgr"
2685)
2686]
2687)
2688viewicon (ZoomableIcon
2689uid 270,0
2690sl 0
2691va (VaSet
2692vasetType 1
2693fg "49152,49152,49152"
2694)
2695xt "24250,85250,25750,86750"
2696iconName "TextFile.png"
2697iconMaskName "TextFile.msk"
2698ftype 21
2699)
2700viewiconposition 0
2701)
2702*71 (Net
2703uid 275,0
2704decl (Decl
2705n "board_id"
2706t "std_logic_vector"
2707b "(3 downto 0)"
2708preAdd 0
2709posAdd 0
2710o 75
2711suid 5,0
2712)
2713declText (MLText
2714uid 276,0
2715va (VaSet
2716font "Courier New,8,0"
2717)
2718xt "39000,62400,67500,63200"
2719st "SIGNAL board_id : std_logic_vector(3 downto 0)
2720"
2721)
2722)
2723*72 (Net
2724uid 283,0
2725decl (Decl
2726n "crate_id"
2727t "std_logic_vector"
2728b "(1 downto 0)"
2729o 76
2730suid 6,0
2731)
2732declText (MLText
2733uid 284,0
2734va (VaSet
2735font "Courier New,8,0"
2736)
2737xt "39000,63200,67500,64000"
2738st "SIGNAL crate_id : std_logic_vector(1 downto 0)
2739"
2740)
2741)
2742*73 (PortIoOut
2743uid 472,0
2744shape (CompositeShape
2745uid 473,0
2746va (VaSet
2747vasetType 1
2748fg "0,0,32768"
2749)
2750optionalChildren [
2751(Pentagon
2752uid 474,0
2753sl 0
2754ro 270
2755xt "111500,70625,113000,71375"
2756)
2757(Line
2758uid 475,0
2759sl 0
2760ro 270
2761xt "111000,71000,111500,71000"
2762pts [
2763"111000,71000"
2764"111500,71000"
2765]
2766)
2767]
2768)
2769stc 0
2770sf 1
2771tg (WTG
2772uid 476,0
2773ps "PortIoTextPlaceStrategy"
2774stg "STSignalDisplayStrategy"
2775f (Text
2776uid 477,0
2777va (VaSet
2778)
2779xt "114000,70500,117100,71500"
2780st "W_RES"
2781blo "114000,71300"
2782tm "WireNameMgr"
2783)
2784)
2785)
2786*74 (PortIoOut
2787uid 478,0
2788shape (CompositeShape
2789uid 479,0
2790va (VaSet
2791vasetType 1
2792fg "0,0,32768"
2793)
2794optionalChildren [
2795(Pentagon
2796uid 480,0
2797sl 0
2798ro 270
2799xt "111500,67625,113000,68375"
2800)
2801(Line
2802uid 481,0
2803sl 0
2804ro 270
2805xt "111000,68000,111500,68000"
2806pts [
2807"111000,68000"
2808"111500,68000"
2809]
2810)
2811]
2812)
2813stc 0
2814sf 1
2815tg (WTG
2816uid 482,0
2817ps "PortIoTextPlaceStrategy"
2818stg "STSignalDisplayStrategy"
2819f (Text
2820uid 483,0
2821va (VaSet
2822)
2823xt "114000,67500,116000,68500"
2824st "W_A"
2825blo "114000,68300"
2826tm "WireNameMgr"
2827)
2828)
2829)
2830*75 (PortIoOut
2831uid 484,0
2832shape (CompositeShape
2833uid 485,0
2834va (VaSet
2835vasetType 1
2836fg "0,0,32768"
2837)
2838optionalChildren [
2839(Pentagon
2840uid 486,0
2841sl 0
2842ro 270
2843xt "111500,74625,113000,75375"
2844)
2845(Line
2846uid 487,0
2847sl 0
2848ro 270
2849xt "111000,75000,111500,75000"
2850pts [
2851"111000,75000"
2852"111500,75000"
2853]
2854)
2855]
2856)
2857stc 0
2858sf 1
2859tg (WTG
2860uid 488,0
2861ps "PortIoTextPlaceStrategy"
2862stg "STSignalDisplayStrategy"
2863f (Text
2864uid 489,0
2865va (VaSet
2866)
2867xt "114000,74500,116600,75500"
2868st "W_CS"
2869blo "114000,75300"
2870tm "WireNameMgr"
2871)
2872)
2873)
2874*76 (PortIoInOut
2875uid 490,0
2876shape (CompositeShape
2877uid 491,0
2878va (VaSet
2879vasetType 1
2880fg "0,0,32768"
2881)
2882optionalChildren [
2883(Hexagon
2884uid 492,0
2885sl 0
2886xt "111500,68625,113000,69375"
2887)
2888(Line
2889uid 493,0
2890sl 0
2891xt "111000,69000,111500,69000"
2892pts [
2893"111000,69000"
2894"111500,69000"
2895]
2896)
2897]
2898)
2899stc 0
2900sf 1
2901tg (WTG
2902uid 494,0
2903ps "PortIoTextPlaceStrategy"
2904stg "STSignalDisplayStrategy"
2905f (Text
2906uid 495,0
2907va (VaSet
2908)
2909xt "114000,68500,116100,69500"
2910st "W_D"
2911blo "114000,69300"
2912tm "WireNameMgr"
2913)
2914)
2915)
2916*77 (PortIoIn
2917uid 496,0
2918shape (CompositeShape
2919uid 497,0
2920va (VaSet
2921vasetType 1
2922fg "0,0,32768"
2923)
2924optionalChildren [
2925(Pentagon
2926uid 498,0
2927sl 0
2928ro 90
2929xt "111500,73625,113000,74375"
2930)
2931(Line
2932uid 499,0
2933sl 0
2934ro 90
2935xt "111000,74000,111500,74000"
2936pts [
2937"111500,74000"
2938"111000,74000"
2939]
2940)
2941]
2942)
2943stc 0
2944sf 1
2945tg (WTG
2946uid 500,0
2947ps "PortIoTextPlaceStrategy"
2948stg "STSignalDisplayStrategy"
2949f (Text
2950uid 501,0
2951va (VaSet
2952)
2953xt "114000,73500,116800,74500"
2954st "W_INT"
2955blo "114000,74300"
2956tm "WireNameMgr"
2957)
2958)
2959)
2960*78 (PortIoOut
2961uid 502,0
2962shape (CompositeShape
2963uid 503,0
2964va (VaSet
2965vasetType 1
2966fg "0,0,32768"
2967)
2968optionalChildren [
2969(Pentagon
2970uid 504,0
2971sl 0
2972ro 270
2973xt "111500,71625,113000,72375"
2974)
2975(Line
2976uid 505,0
2977sl 0
2978ro 270
2979xt "111000,72000,111500,72000"
2980pts [
2981"111000,72000"
2982"111500,72000"
2983]
2984)
2985]
2986)
2987stc 0
2988sf 1
2989tg (WTG
2990uid 506,0
2991ps "PortIoTextPlaceStrategy"
2992stg "STSignalDisplayStrategy"
2993f (Text
2994uid 507,0
2995va (VaSet
2996)
2997xt "114000,71500,116700,72500"
2998st "W_RD"
2999blo "114000,72300"
3000tm "WireNameMgr"
3001)
3002)
3003)
3004*79 (PortIoOut
3005uid 508,0
3006shape (CompositeShape
3007uid 509,0
3008va (VaSet
3009vasetType 1
3010fg "0,0,32768"
3011)
3012optionalChildren [
3013(Pentagon
3014uid 510,0
3015sl 0
3016ro 270
3017xt "111500,72625,113000,73375"
3018)
3019(Line
3020uid 511,0
3021sl 0
3022ro 270
3023xt "111000,73000,111500,73000"
3024pts [
3025"111000,73000"
3026"111500,73000"
3027]
3028)
3029]
3030)
3031stc 0
3032sf 1
3033tg (WTG
3034uid 512,0
3035ps "PortIoTextPlaceStrategy"
3036stg "STSignalDisplayStrategy"
3037f (Text
3038uid 513,0
3039va (VaSet
3040)
3041xt "114000,72500,116800,73500"
3042st "W_WR"
3043blo "114000,73300"
3044tm "WireNameMgr"
3045)
3046)
3047)
3048*80 (Net
3049uid 1465,0
3050decl (Decl
3051n "adc_data_array"
3052t "adc_data_array_type"
3053o 74
3054suid 29,0
3055)
3056declText (MLText
3057uid 1466,0
3058va (VaSet
3059font "Courier New,8,0"
3060)
3061xt "39000,61600,63000,62400"
3062st "SIGNAL adc_data_array : adc_data_array_type
3063"
3064)
3065)
3066*81 (Net
3067uid 2407,0
3068decl (Decl
3069n "RSRLOAD"
3070t "std_logic"
3071o 43
3072suid 57,0
3073i "'0'"
3074)
3075declText (MLText
3076uid 2408,0
3077va (VaSet
3078font "Courier New,8,0"
3079)
3080xt "39000,37400,67500,38200"
3081st "RSRLOAD : std_logic := '0'
3082"
3083)
3084)
3085*82 (PortIoOut
3086uid 2415,0
3087shape (CompositeShape
3088uid 2416,0
3089va (VaSet
3090vasetType 1
3091fg "0,0,32768"
3092)
3093optionalChildren [
3094(Pentagon
3095uid 2417,0
3096sl 0
3097ro 90
3098xt "19000,110625,20500,111375"
3099)
3100(Line
3101uid 2418,0
3102sl 0
3103ro 90
3104xt "20500,111000,21000,111000"
3105pts [
3106"21000,111000"
3107"20500,111000"
3108]
3109)
3110]
3111)
3112stc 0
3113sf 1
3114tg (WTG
3115uid 2419,0
3116ps "PortIoTextPlaceStrategy"
3117stg "STSignalDisplayStrategy"
3118f (Text
3119uid 2420,0
3120va (VaSet
3121)
3122xt "13800,110500,18000,111500"
3123st "RSRLOAD"
3124ju 2
3125blo "18000,111300"
3126tm "WireNameMgr"
3127)
3128)
3129)
3130*83 (Net
3131uid 2421,0
3132decl (Decl
3133n "SRCLK"
3134t "std_logic"
3135o 72
3136suid 58,0
3137i "'0'"
3138)
3139declText (MLText
3140uid 2422,0
3141va (VaSet
3142font "Courier New,8,0"
3143)
3144xt "39000,60000,71000,60800"
3145st "SIGNAL SRCLK : std_logic := '0'
3146"
3147)
3148)
3149*84 (Net
3150uid 3019,0
3151decl (Decl
3152n "sensor_cs"
3153t "std_logic_vector"
3154b "(3 DOWNTO 0)"
3155o 80
3156suid 65,0
3157)
3158declText (MLText
3159uid 3020,0
3160va (VaSet
3161font "Courier New,8,0"
3162)
3163xt "39000,66400,67500,67200"
3164st "SIGNAL sensor_cs : std_logic_vector(3 DOWNTO 0)
3165"
3166)
3167)
3168*85 (Net
3169uid 3025,0
3170decl (Decl
3171n "DAC_CS"
3172t "std_logic"
3173o 27
3174suid 66,0
3175)
3176declText (MLText
3177uid 3026,0
3178va (VaSet
3179font "Courier New,8,0"
3180)
3181xt "39000,24600,54000,25400"
3182st "DAC_CS : std_logic
3183"
3184)
3185)
3186*86 (PortIoOut
3187uid 3153,0
3188shape (CompositeShape
3189uid 3154,0
3190va (VaSet
3191vasetType 1
3192fg "0,0,32768"
3193)
3194optionalChildren [
3195(Pentagon
3196uid 3155,0
3197sl 0
3198ro 90
3199xt "19000,69625,20500,70375"
3200)
3201(Line
3202uid 3156,0
3203sl 0
3204ro 90
3205xt "20500,70000,21000,70000"
3206pts [
3207"21000,70000"
3208"20500,70000"
3209]
3210)
3211]
3212)
3213stc 0
3214sf 1
3215tg (WTG
3216uid 3157,0
3217ps "PortIoTextPlaceStrategy"
3218stg "STSignalDisplayStrategy"
3219f (Text
3220uid 3158,0
3221va (VaSet
3222)
3223xt "15200,69500,18000,70500"
3224st "A_CLK"
3225ju 2
3226blo "18000,70300"
3227tm "WireNameMgr"
3228)
3229)
3230)
3231*87 (Net
3232uid 3216,0
3233decl (Decl
3234n "X_50M"
3235t "STD_LOGIC"
3236preAdd 0
3237posAdd 0
3238o 18
3239suid 67,0
3240)
3241declText (MLText
3242uid 3217,0
3243va (VaSet
3244font "Courier New,8,0"
3245)
3246xt "39000,17400,54000,18200"
3247st "X_50M : STD_LOGIC
3248"
3249)
3250)
3251*88 (Net
3252uid 3226,0
3253decl (Decl
3254n "TRG"
3255t "STD_LOGIC"
3256o 16
3257suid 68,0
3258)
3259declText (MLText
3260uid 3227,0
3261va (VaSet
3262font "Courier New,8,0"
3263)
3264xt "39000,15800,54000,16600"
3265st "TRG : STD_LOGIC
3266"
3267)
3268)
3269*89 (HdlText
3270uid 3248,0
3271optionalChildren [
3272*90 (EmbeddedText
3273uid 3254,0
3274commentText (CommentText
3275uid 3255,0
3276ps "CenterOffsetStrategy"
3277shape (Rectangle
3278uid 3256,0
3279va (VaSet
3280vasetType 1
3281fg "65535,65535,65535"
3282lineColor "0,0,32768"
3283lineWidth 2
3284)
3285xt "29000,71000,41000,77000"
3286)
3287oxt "0,0,18000,5000"
3288text (MLText
3289uid 3257,0
3290va (VaSet
3291)
3292xt "29200,71200,41100,77200"
3293st "
3294-- ADC_CLK 2
3295A_CLK (0) <= CLK_25_PS;
3296A_CLK (1) <= CLK_25_PS;
3297A_CLK (2) <= CLK_25_PS;
3298A_CLK (3) <= CLK_25_PS;
3299"
3300tm "HdlTextMgr"
3301wrapOption 3
3302visibleHeight 6000
3303visibleWidth 12000
3304)
3305)
3306)
3307]
3308shape (Rectangle
3309uid 3249,0
3310va (VaSet
3311vasetType 1
3312fg "65535,65535,37120"
3313lineColor "0,0,32768"
3314lineWidth 2
3315)
3316xt "24000,69000,29000,77000"
3317)
3318oxt "0,0,8000,10000"
3319ttg (MlTextGroup
3320uid 3250,0
3321ps "CenterOffsetStrategy"
3322stg "VerticalLayoutStrategy"
3323textVec [
3324*91 (Text
3325uid 3251,0
3326va (VaSet
3327font "Arial,8,1"
3328)
3329xt "24150,73000,28350,74000"
3330st "ADC_CLK"
3331blo "24150,73800"
3332tm "HdlTextNameMgr"
3333)
3334*92 (Text
3335uid 3252,0
3336va (VaSet
3337font "Arial,8,1"
3338)
3339xt "24150,74000,24950,75000"
3340st "2"
3341blo "24150,74800"
3342tm "HdlTextNumberMgr"
3343)
3344]
3345)
3346viewicon (ZoomableIcon
3347uid 3253,0
3348sl 0
3349va (VaSet
3350vasetType 1
3351fg "49152,49152,49152"
3352)
3353xt "24250,75250,25750,76750"
3354iconName "TextFile.png"
3355iconMaskName "TextFile.msk"
3356ftype 21
3357)
3358viewiconposition 0
3359)
3360*93 (Net
3361uid 3266,0
3362decl (Decl
3363n "A_CLK"
3364t "std_logic_vector"
3365b "(3 downto 0)"
3366o 22
3367suid 71,0
3368)
3369declText (MLText
3370uid 3267,0
3371va (VaSet
3372font "Courier New,8,0"
3373)
3374xt "39000,20600,64000,21400"
3375st "A_CLK : std_logic_vector(3 downto 0)
3376"
3377)
3378)
3379*94 (Net
3380uid 3268,0
3381decl (Decl
3382n "CLK_25_PS"
3383t "std_logic"
3384o 61
3385suid 72,0
3386)
3387declText (MLText
3388uid 3269,0
3389va (VaSet
3390font "Courier New,8,0"
3391)
3392xt "39000,52800,57500,53600"
3393st "SIGNAL CLK_25_PS : std_logic
3394"
3395)
3396)
3397*95 (PortIoOut
3398uid 3284,0
3399shape (CompositeShape
3400uid 3285,0
3401va (VaSet
3402vasetType 1
3403fg "0,0,32768"
3404)
3405optionalChildren [
3406(Pentagon
3407uid 3286,0
3408sl 0
3409ro 90
3410xt "19000,89625,20500,90375"
3411)
3412(Line
3413uid 3287,0
3414sl 0
3415ro 90
3416xt "20500,90000,21000,90000"
3417pts [
3418"21000,90000"
3419"20500,90000"
3420]
3421)
3422]
3423)
3424stc 0
3425sf 1
3426tg (WTG
3427uid 3288,0
3428ps "PortIoTextPlaceStrategy"
3429stg "STSignalDisplayStrategy"
3430f (Text
3431uid 3289,0
3432va (VaSet
3433)
3434xt "14400,89500,18000,90500"
3435st "OE_ADC"
3436ju 2
3437blo "18000,90300"
3438tm "WireNameMgr"
3439)
3440)
3441)
3442*96 (Net
3443uid 3290,0
3444decl (Decl
3445n "OE_ADC"
3446t "STD_LOGIC"
3447preAdd 0
3448posAdd 0
3449o 36
3450suid 73,0
3451)
3452declText (MLText
3453uid 3291,0
3454va (VaSet
3455font "Courier New,8,0"
3456)
3457xt "39000,31800,54000,32600"
3458st "OE_ADC : STD_LOGIC
3459"
3460)
3461)
3462*97 (PortIoIn
3463uid 3292,0
3464shape (CompositeShape
3465uid 3293,0
3466va (VaSet
3467vasetType 1
3468fg "0,0,32768"
3469)
3470optionalChildren [
3471(Pentagon
3472uid 3294,0
3473sl 0
3474ro 270
3475xt "19000,88625,20500,89375"
3476)
3477(Line
3478uid 3295,0
3479sl 0
3480ro 270
3481xt "20500,89000,21000,89000"
3482pts [
3483"20500,89000"
3484"21000,89000"
3485]
3486)
3487]
3488)
3489stc 0
3490sf 1
3491tg (WTG
3492uid 3296,0
3493ps "PortIoTextPlaceStrategy"
3494stg "STSignalDisplayStrategy"
3495f (Text
3496uid 3297,0
3497va (VaSet
3498)
3499xt "15000,88500,18000,89500"
3500st "A_OTR"
3501ju 2
3502blo "18000,89300"
3503tm "WireNameMgr"
3504)
3505)
3506)
3507*98 (Net
3508uid 3298,0
3509decl (Decl
3510n "A_OTR"
3511t "std_logic_vector"
3512b "(3 DOWNTO 0)"
3513o 5
3514suid 74,0
3515)
3516declText (MLText
3517uid 3299,0
3518va (VaSet
3519font "Courier New,8,0"
3520)
3521xt "39000,7000,64000,7800"
3522st "A_OTR : std_logic_vector(3 DOWNTO 0)
3523"
3524)
3525)
3526*99 (HdlText
3527uid 3300,0
3528optionalChildren [
3529*100 (EmbeddedText
3530uid 3306,0
3531commentText (CommentText
3532uid 3307,0
3533ps "CenterOffsetStrategy"
3534shape (Rectangle
3535uid 3308,0
3536va (VaSet
3537vasetType 1
3538fg "65535,65535,65535"
3539lineColor "0,0,32768"
3540lineWidth 2
3541)
3542xt "32000,96000,44000,102000"
3543)
3544oxt "0,0,18000,5000"
3545text (MLText
3546uid 3309,0
3547va (VaSet
3548)
3549xt "32200,96200,44200,102200"
3550st "
3551-- ADC_DATA 3
3552adc_data_array (0) <= A0_D;
3553adc_data_array (1) <= A1_D;
3554adc_data_array (2) <= A2_D;
3555adc_data_array (3) <= A3_D;
3556"
3557tm "HdlTextMgr"
3558wrapOption 3
3559visibleHeight 6000
3560visibleWidth 12000
3561)
3562)
3563)
3564]
3565shape (Rectangle
3566uid 3301,0
3567va (VaSet
3568vasetType 1
3569fg "65535,65535,37120"
3570lineColor "0,0,32768"
3571lineWidth 2
3572)
3573xt "24000,94000,32000,102000"
3574)
3575oxt "0,0,8000,10000"
3576ttg (MlTextGroup
3577uid 3302,0
3578ps "CenterOffsetStrategy"
3579stg "VerticalLayoutStrategy"
3580textVec [
3581*101 (Text
3582uid 3303,0
3583va (VaSet
3584font "Arial,8,1"
3585)
3586xt "27150,95000,31750,96000"
3587st "ADC_DATA"
3588blo "27150,95800"
3589tm "HdlTextNameMgr"
3590)
3591*102 (Text
3592uid 3304,0
3593va (VaSet
3594font "Arial,8,1"
3595)
3596xt "27150,96000,27950,97000"
3597st "3"
3598blo "27150,96800"
3599tm "HdlTextNumberMgr"
3600)
3601]
3602)
3603viewicon (ZoomableIcon
3604uid 3305,0
3605sl 0
3606va (VaSet
3607vasetType 1
3608fg "49152,49152,49152"
3609)
3610xt "24250,100250,25750,101750"
3611iconName "TextFile.png"
3612iconMaskName "TextFile.msk"
3613ftype 21
3614)
3615viewiconposition 0
3616)
3617*103 (PortIoIn
3618uid 3310,0
3619shape (CompositeShape
3620uid 3311,0
3621va (VaSet
3622vasetType 1
3623fg "0,0,32768"
3624)
3625optionalChildren [
3626(Pentagon
3627uid 3312,0
3628sl 0
3629ro 270
3630xt "19000,94625,20500,95375"
3631)
3632(Line
3633uid 3313,0
3634sl 0
3635ro 270
3636xt "20500,95000,21000,95000"
3637pts [
3638"20500,95000"
3639"21000,95000"
3640]
3641)
3642]
3643)
3644stc 0
3645sf 1
3646tg (WTG
3647uid 3314,0
3648ps "PortIoTextPlaceStrategy"
3649stg "STSignalDisplayStrategy"
3650f (Text
3651uid 3315,0
3652va (VaSet
3653)
3654xt "15700,94500,18000,95500"
3655st "A0_D"
3656ju 2
3657blo "18000,95300"
3658tm "WireNameMgr"
3659)
3660)
3661)
3662*104 (PortIoIn
3663uid 3332,0
3664shape (CompositeShape
3665uid 3333,0
3666va (VaSet
3667vasetType 1
3668fg "0,0,32768"
3669)
3670optionalChildren [
3671(Pentagon
3672uid 3334,0
3673sl 0
3674ro 270
3675xt "19000,95625,20500,96375"
3676)
3677(Line
3678uid 3335,0
3679sl 0
3680ro 270
3681xt "20500,96000,21000,96000"
3682pts [
3683"20500,96000"
3684"21000,96000"
3685]
3686)
3687]
3688)
3689stc 0
3690sf 1
3691tg (WTG
3692uid 3336,0
3693ps "PortIoTextPlaceStrategy"
3694stg "STSignalDisplayStrategy"
3695f (Text
3696uid 3337,0
3697va (VaSet
3698)
3699xt "15700,95500,18000,96500"
3700st "A1_D"
3701ju 2
3702blo "18000,96300"
3703tm "WireNameMgr"
3704)
3705)
3706)
3707*105 (PortIoIn
3708uid 3338,0
3709shape (CompositeShape
3710uid 3339,0
3711va (VaSet
3712vasetType 1
3713fg "0,0,32768"
3714)
3715optionalChildren [
3716(Pentagon
3717uid 3340,0
3718sl 0
3719ro 270
3720xt "19000,96625,20500,97375"
3721)
3722(Line
3723uid 3341,0
3724sl 0
3725ro 270
3726xt "20500,97000,21000,97000"
3727pts [
3728"20500,97000"
3729"21000,97000"
3730]
3731)
3732]
3733)
3734stc 0
3735sf 1
3736tg (WTG
3737uid 3342,0
3738ps "PortIoTextPlaceStrategy"
3739stg "STSignalDisplayStrategy"
3740f (Text
3741uid 3343,0
3742va (VaSet
3743)
3744xt "15700,96500,18000,97500"
3745st "A2_D"
3746ju 2
3747blo "18000,97300"
3748tm "WireNameMgr"
3749)
3750)
3751)
3752*106 (PortIoIn
3753uid 3344,0
3754shape (CompositeShape
3755uid 3345,0
3756va (VaSet
3757vasetType 1
3758fg "0,0,32768"
3759)
3760optionalChildren [
3761(Pentagon
3762uid 3346,0
3763sl 0
3764ro 270
3765xt "19000,97625,20500,98375"
3766)
3767(Line
3768uid 3347,0
3769sl 0
3770ro 270
3771xt "20500,98000,21000,98000"
3772pts [
3773"20500,98000"
3774"21000,98000"
3775]
3776)
3777]
3778)
3779stc 0
3780sf 1
3781tg (WTG
3782uid 3348,0
3783ps "PortIoTextPlaceStrategy"
3784stg "STSignalDisplayStrategy"
3785f (Text
3786uid 3349,0
3787va (VaSet
3788)
3789xt "15700,97500,18000,98500"
3790st "A3_D"
3791ju 2
3792blo "18000,98300"
3793tm "WireNameMgr"
3794)
3795)
3796)
3797*107 (Net
3798uid 3374,0
3799decl (Decl
3800n "A0_D"
3801t "std_logic_vector"
3802b "(11 DOWNTO 0)"
3803o 1
3804suid 79,0
3805)
3806declText (MLText
3807uid 3375,0
3808va (VaSet
3809font "Courier New,8,0"
3810)
3811xt "39000,3800,64500,4600"
3812st "A0_D : std_logic_vector(11 DOWNTO 0)
3813"
3814)
3815)
3816*108 (Net
3817uid 3376,0
3818decl (Decl
3819n "A1_D"
3820t "std_logic_vector"
3821b "(11 DOWNTO 0)"
3822o 2
3823suid 80,0
3824)
3825declText (MLText
3826uid 3377,0
3827va (VaSet
3828font "Courier New,8,0"
3829)
3830xt "39000,4600,64500,5400"
3831st "A1_D : std_logic_vector(11 DOWNTO 0)
3832"
3833)
3834)
3835*109 (Net
3836uid 3378,0
3837decl (Decl
3838n "A2_D"
3839t "std_logic_vector"
3840b "(11 DOWNTO 0)"
3841o 3
3842suid 81,0
3843)
3844declText (MLText
3845uid 3379,0
3846va (VaSet
3847font "Courier New,8,0"
3848)
3849xt "39000,5400,64500,6200"
3850st "A2_D : std_logic_vector(11 DOWNTO 0)
3851"
3852)
3853)
3854*110 (Net
3855uid 3380,0
3856decl (Decl
3857n "A3_D"
3858t "std_logic_vector"
3859b "(11 DOWNTO 0)"
3860o 4
3861suid 82,0
3862)
3863declText (MLText
3864uid 3381,0
3865va (VaSet
3866font "Courier New,8,0"
3867)
3868xt "39000,6200,64500,7000"
3869st "A3_D : std_logic_vector(11 DOWNTO 0)
3870"
3871)
3872)
3873*111 (HdlText
3874uid 3394,0
3875optionalChildren [
3876*112 (EmbeddedText
3877uid 3400,0
3878commentText (CommentText
3879uid 3401,0
3880ps "CenterOffsetStrategy"
3881shape (Rectangle
3882uid 3402,0
3883va (VaSet
3884vasetType 1
3885fg "65535,65535,65535"
3886lineColor "0,0,32768"
3887lineWidth 2
3888)
3889xt "32000,114000,44000,120000"
3890)
3891oxt "0,0,18000,5000"
3892text (MLText
3893uid 3403,0
3894va (VaSet
3895)
3896xt "32200,114200,44200,120200"
3897st "
3898-- SRCLK 4
3899D0_SRCLK <= SRCLK;
3900D1_SRCLK <= SRCLK;
3901D2_SRCLK <= SRCLK;
3902D3_SRCLK <= SRCLK;
3903"
3904tm "HdlTextMgr"
3905wrapOption 3
3906visibleHeight 6000
3907visibleWidth 12000
3908)
3909)
3910)
3911]
3912shape (Rectangle
3913uid 3395,0
3914va (VaSet
3915vasetType 1
3916fg "65535,65535,37120"
3917lineColor "0,0,32768"
3918lineWidth 2
3919)
3920xt "24000,112000,32000,120000"
3921)
3922oxt "0,0,8000,10000"
3923ttg (MlTextGroup
3924uid 3396,0
3925ps "CenterOffsetStrategy"
3926stg "VerticalLayoutStrategy"
3927textVec [
3928*113 (Text
3929uid 3397,0
3930va (VaSet
3931font "Arial,8,1"
3932)
3933xt "27150,113000,30350,114000"
3934st "SRCLK"
3935blo "27150,113800"
3936tm "HdlTextNameMgr"
3937)
3938*114 (Text
3939uid 3398,0
3940va (VaSet
3941font "Arial,8,1"
3942)
3943xt "27150,114000,27950,115000"
3944st "4"
3945blo "27150,114800"
3946tm "HdlTextNumberMgr"
3947)
3948]
3949)
3950viewicon (ZoomableIcon
3951uid 3399,0
3952sl 0
3953va (VaSet
3954vasetType 1
3955fg "49152,49152,49152"
3956)
3957xt "24250,118250,25750,119750"
3958iconName "TextFile.png"
3959iconMaskName "TextFile.msk"
3960ftype 21
3961)
3962viewiconposition 0
3963)
3964*115 (Net
3965uid 3460,0
3966decl (Decl
3967n "D0_SRCLK"
3968t "STD_LOGIC"
3969o 23
3970suid 87,0
3971)
3972declText (MLText
3973uid 3461,0
3974va (VaSet
3975font "Courier New,8,0"
3976)
3977xt "39000,21400,54000,22200"
3978st "D0_SRCLK : STD_LOGIC
3979"
3980)
3981)
3982*116 (Net
3983uid 3462,0
3984decl (Decl
3985n "D1_SRCLK"
3986t "STD_LOGIC"
3987o 24
3988suid 88,0
3989)
3990declText (MLText
3991uid 3463,0
3992va (VaSet
3993font "Courier New,8,0"
3994)
3995xt "39000,22200,54000,23000"
3996st "D1_SRCLK : STD_LOGIC
3997"
3998)
3999)
4000*117 (Net
4001uid 3464,0
4002decl (Decl
4003n "D2_SRCLK"
4004t "STD_LOGIC"
4005o 25
4006suid 89,0
4007)
4008declText (MLText
4009uid 3465,0
4010va (VaSet
4011font "Courier New,8,0"
4012)
4013xt "39000,23000,54000,23800"
4014st "D2_SRCLK : STD_LOGIC
4015"
4016)
4017)
4018*118 (Net
4019uid 3466,0
4020decl (Decl
4021n "D3_SRCLK"
4022t "STD_LOGIC"
4023o 26
4024suid 90,0
4025)
4026declText (MLText
4027uid 3467,0
4028va (VaSet
4029font "Courier New,8,0"
4030)
4031xt "39000,23800,54000,24600"
4032st "D3_SRCLK : STD_LOGIC
4033"
4034)
4035)
4036*119 (PortIoIn
4037uid 3476,0
4038shape (CompositeShape
4039uid 3477,0
4040va (VaSet
4041vasetType 1
4042fg "0,0,32768"
4043)
4044optionalChildren [
4045(Pentagon
4046uid 3478,0
4047sl 0
4048ro 270
4049xt "19000,104625,20500,105375"
4050)
4051(Line
4052uid 3479,0
4053sl 0
4054ro 270
4055xt "20500,105000,21000,105000"
4056pts [
4057"20500,105000"
4058"21000,105000"
4059]
4060)
4061]
4062)
4063stc 0
4064sf 1
4065tg (WTG
4066uid 3480,0
4067ps "PortIoTextPlaceStrategy"
4068stg "STSignalDisplayStrategy"
4069f (Text
4070uid 3481,0
4071va (VaSet
4072)
4073xt "13400,104500,18000,105500"
4074st "D0_SROUT"
4075ju 2
4076blo "18000,105300"
4077tm "WireNameMgr"
4078)
4079)
4080)
4081*120 (PortIoIn
4082uid 3482,0
4083shape (CompositeShape
4084uid 3483,0
4085va (VaSet
4086vasetType 1
4087fg "0,0,32768"
4088)
4089optionalChildren [
4090(Pentagon
4091uid 3484,0
4092sl 0
4093ro 270
4094xt "19000,105625,20500,106375"
4095)
4096(Line
4097uid 3485,0
4098sl 0
4099ro 270
4100xt "20500,106000,21000,106000"
4101pts [
4102"20500,106000"
4103"21000,106000"
4104]
4105)
4106]
4107)
4108stc 0
4109sf 1
4110tg (WTG
4111uid 3486,0
4112ps "PortIoTextPlaceStrategy"
4113stg "STSignalDisplayStrategy"
4114f (Text
4115uid 3487,0
4116va (VaSet
4117)
4118xt "13400,105500,18000,106500"
4119st "D1_SROUT"
4120ju 2
4121blo "18000,106300"
4122tm "WireNameMgr"
4123)
4124)
4125)
4126*121 (PortIoIn
4127uid 3488,0
4128shape (CompositeShape
4129uid 3489,0
4130va (VaSet
4131vasetType 1
4132fg "0,0,32768"
4133)
4134optionalChildren [
4135(Pentagon
4136uid 3490,0
4137sl 0
4138ro 270
4139xt "19000,106625,20500,107375"
4140)
4141(Line
4142uid 3491,0
4143sl 0
4144ro 270
4145xt "20500,107000,21000,107000"
4146pts [
4147"20500,107000"
4148"21000,107000"
4149]
4150)
4151]
4152)
4153stc 0
4154sf 1
4155tg (WTG
4156uid 3492,0
4157ps "PortIoTextPlaceStrategy"
4158stg "STSignalDisplayStrategy"
4159f (Text
4160uid 3493,0
4161va (VaSet
4162)
4163xt "13400,106500,18000,107500"
4164st "D2_SROUT"
4165ju 2
4166blo "18000,107300"
4167tm "WireNameMgr"
4168)
4169)
4170)
4171*122 (PortIoIn
4172uid 3494,0
4173shape (CompositeShape
4174uid 3495,0
4175va (VaSet
4176vasetType 1
4177fg "0,0,32768"
4178)
4179optionalChildren [
4180(Pentagon
4181uid 3496,0
4182sl 0
4183ro 270
4184xt "19000,107625,20500,108375"
4185)
4186(Line
4187uid 3497,0
4188sl 0
4189ro 270
4190xt "20500,108000,21000,108000"
4191pts [
4192"20500,108000"
4193"21000,108000"
4194]
4195)
4196]
4197)
4198stc 0
4199sf 1
4200tg (WTG
4201uid 3498,0
4202ps "PortIoTextPlaceStrategy"
4203stg "STSignalDisplayStrategy"
4204f (Text
4205uid 3499,0
4206va (VaSet
4207)
4208xt "13400,107500,18000,108500"
4209st "D3_SROUT"
4210ju 2
4211blo "18000,108300"
4212tm "WireNameMgr"
4213)
4214)
4215)
4216*123 (Net
4217uid 3500,0
4218decl (Decl
4219n "D0_SROUT"
4220t "std_logic"
4221o 6
4222suid 91,0
4223)
4224declText (MLText
4225uid 3501,0
4226va (VaSet
4227font "Courier New,8,0"
4228)
4229xt "39000,7800,54000,8600"
4230st "D0_SROUT : std_logic
4231"
4232)
4233)
4234*124 (Net
4235uid 3502,0
4236decl (Decl
4237n "D1_SROUT"
4238t "std_logic"
4239o 7
4240suid 92,0
4241)
4242declText (MLText
4243uid 3503,0
4244va (VaSet
4245font "Courier New,8,0"
4246)
4247xt "39000,8600,54000,9400"
4248st "D1_SROUT : std_logic
4249"
4250)
4251)
4252*125 (Net
4253uid 3504,0
4254decl (Decl
4255n "D2_SROUT"
4256t "std_logic"
4257o 8
4258suid 93,0
4259)
4260declText (MLText
4261uid 3505,0
4262va (VaSet
4263font "Courier New,8,0"
4264)
4265xt "39000,9400,54000,10200"
4266st "D2_SROUT : std_logic
4267"
4268)
4269)
4270*126 (Net
4271uid 3506,0
4272decl (Decl
4273n "D3_SROUT"
4274t "std_logic"
4275o 9
4276suid 94,0
4277)
4278declText (MLText
4279uid 3507,0
4280va (VaSet
4281font "Courier New,8,0"
4282)
4283xt "39000,10200,54000,11000"
4284st "D3_SROUT : std_logic
4285"
4286)
4287)
4288*127 (PortIoOut
4289uid 3508,0
4290shape (CompositeShape
4291uid 3509,0
4292va (VaSet
4293vasetType 1
4294fg "0,0,32768"
4295)
4296optionalChildren [
4297(Pentagon
4298uid 3510,0
4299sl 0
4300ro 90
4301xt "10000,125625,11500,126375"
4302)
4303(Line
4304uid 3511,0
4305sl 0
4306ro 90
4307xt "11500,126000,12000,126000"
4308pts [
4309"12000,126000"
4310"11500,126000"
4311]
4312)
4313]
4314)
4315stc 0
4316sf 1
4317tg (WTG
4318uid 3512,0
4319ps "PortIoTextPlaceStrategy"
4320stg "STSignalDisplayStrategy"
4321f (Text
4322uid 3513,0
4323va (VaSet
4324)
4325xt "7100,125500,9000,126500"
4326st "D_A"
4327ju 2
4328blo "9000,126300"
4329tm "WireNameMgr"
4330)
4331)
4332)
4333*128 (Net
4334uid 3514,0
4335decl (Decl
4336n "D_A"
4337t "std_logic_vector"
4338b "(3 DOWNTO 0)"
4339o 30
4340suid 95,0
4341i "(others => '0')"
4342)
4343declText (MLText
4344uid 3515,0
4345va (VaSet
4346font "Courier New,8,0"
4347)
4348xt "39000,27000,73500,27800"
4349st "D_A : std_logic_vector(3 DOWNTO 0) := (others => '0')
4350"
4351)
4352)
4353*129 (PortIoOut
4354uid 3516,0
4355shape (CompositeShape
4356uid 3517,0
4357va (VaSet
4358vasetType 1
4359fg "0,0,32768"
4360)
4361optionalChildren [
4362(Pentagon
4363uid 3518,0
4364sl 0
4365ro 90
4366xt "19000,109625,20500,110375"
4367)
4368(Line
4369uid 3519,0
4370sl 0
4371ro 90
4372xt "20500,110000,21000,110000"
4373pts [
4374"21000,110000"
4375"20500,110000"
4376]
4377)
4378]
4379)
4380stc 0
4381sf 1
4382tg (WTG
4383uid 3520,0
4384ps "PortIoTextPlaceStrategy"
4385stg "STSignalDisplayStrategy"
4386f (Text
4387uid 3521,0
4388va (VaSet
4389)
4390xt "14500,109500,18000,110500"
4391st "DWRITE"
4392ju 2
4393blo "18000,110300"
4394tm "WireNameMgr"
4395)
4396)
4397)
4398*130 (Net
4399uid 3522,0
4400decl (Decl
4401n "DWRITE"
4402t "std_logic"
4403o 29
4404suid 96,0
4405i "'0'"
4406)
4407declText (MLText
4408uid 3523,0
4409va (VaSet
4410font "Courier New,8,0"
4411)
4412xt "39000,26200,67500,27000"
4413st "DWRITE : std_logic := '0'
4414"
4415)
4416)
4417*131 (PortIoOut
4418uid 3536,0
4419shape (CompositeShape
4420uid 3537,0
4421va (VaSet
4422vasetType 1
4423fg "0,0,32768"
4424)
4425optionalChildren [
4426(Pentagon
4427uid 3538,0
4428sl 0
4429ro 270
4430xt "111500,86625,113000,87375"
4431)
4432(Line
4433uid 3539,0
4434sl 0
4435ro 270
4436xt "111000,87000,111500,87000"
4437pts [
4438"111000,87000"
4439"111500,87000"
4440]
4441)
4442]
4443)
4444stc 0
4445sf 1
4446tg (WTG
4447uid 3540,0
4448ps "PortIoTextPlaceStrategy"
4449stg "STSignalDisplayStrategy"
4450f (Text
4451uid 3541,0
4452va (VaSet
4453)
4454xt "114000,86500,117600,87500"
4455st "DAC_CS"
4456blo "114000,87300"
4457tm "WireNameMgr"
4458)
4459)
4460)
4461*132 (HdlText
4462uid 3542,0
4463optionalChildren [
4464*133 (EmbeddedText
4465uid 3612,0
4466commentText (CommentText
4467uid 3613,0
4468ps "CenterOffsetStrategy"
4469shape (Rectangle
4470uid 3614,0
4471va (VaSet
4472vasetType 1
4473fg "65535,65535,65535"
4474lineColor "0,0,32768"
4475lineWidth 2
4476)
4477xt "88000,90000,100000,96000"
4478)
4479oxt "0,0,18000,5000"
4480text (MLText
4481uid 3615,0
4482va (VaSet
4483)
4484xt "88200,90200,100100,96200"
4485st "
4486-- T_CS 5
4487T0_CS <= sensor_cs (0);
4488T1_CS <= sensor_cs (1);
4489T2_CS <= sensor_cs (2);
4490T3_CS <= sensor_cs (3);
4491"
4492tm "HdlTextMgr"
4493wrapOption 3
4494visibleHeight 6000
4495visibleWidth 12000
4496)
4497)
4498)
4499]
4500shape (Rectangle
4501uid 3543,0
4502va (VaSet
4503vasetType 1
4504fg "65535,65535,37120"
4505lineColor "0,0,32768"
4506lineWidth 2
4507)
4508xt "100000,88000,108000,96000"
4509)
4510oxt "0,0,8000,10000"
4511ttg (MlTextGroup
4512uid 3544,0
4513ps "CenterOffsetStrategy"
4514stg "VerticalLayoutStrategy"
4515textVec [
4516*134 (Text
4517uid 3545,0
4518va (VaSet
4519font "Arial,8,1"
4520)
4521xt "103150,89000,105550,90000"
4522st "T_CS"
4523blo "103150,89800"
4524tm "HdlTextNameMgr"
4525)
4526*135 (Text
4527uid 3546,0
4528va (VaSet
4529font "Arial,8,1"
4530)
4531xt "103150,90000,103950,91000"
4532st "5"
4533blo "103150,90800"
4534tm "HdlTextNumberMgr"
4535)
4536]
4537)
4538viewicon (ZoomableIcon
4539uid 3547,0
4540sl 0
4541va (VaSet
4542vasetType 1
4543fg "49152,49152,49152"
4544)
4545xt "100250,94250,101750,95750"
4546iconName "TextFile.png"
4547iconMaskName "TextFile.msk"
4548ftype 21
4549)
4550viewiconposition 0
4551)
4552*136 (PortIoOut
4553uid 3548,0
4554shape (CompositeShape
4555uid 3549,0
4556va (VaSet
4557vasetType 1
4558fg "0,0,32768"
4559)
4560optionalChildren [
4561(Pentagon
4562uid 3550,0
4563sl 0
4564ro 270
4565xt "111500,88625,113000,89375"
4566)
4567(Line
4568uid 3551,0
4569sl 0
4570ro 270
4571xt "111000,89000,111500,89000"
4572pts [
4573"111000,89000"
4574"111500,89000"
4575]
4576)
4577]
4578)
4579stc 0
4580sf 1
4581tg (WTG
4582uid 3552,0
4583ps "PortIoTextPlaceStrategy"
4584stg "STSignalDisplayStrategy"
4585f (Text
4586uid 3553,0
4587va (VaSet
4588)
4589xt "114000,88500,116800,89500"
4590st "T0_CS"
4591blo "114000,89300"
4592tm "WireNameMgr"
4593)
4594)
4595)
4596*137 (PortIoOut
4597uid 3554,0
4598shape (CompositeShape
4599uid 3555,0
4600va (VaSet
4601vasetType 1
4602fg "0,0,32768"
4603)
4604optionalChildren [
4605(Pentagon
4606uid 3556,0
4607sl 0
4608ro 270
4609xt "111500,89625,113000,90375"
4610)
4611(Line
4612uid 3557,0
4613sl 0
4614ro 270
4615xt "111000,90000,111500,90000"
4616pts [
4617"111000,90000"
4618"111500,90000"
4619]
4620)
4621]
4622)
4623stc 0
4624sf 1
4625tg (WTG
4626uid 3558,0
4627ps "PortIoTextPlaceStrategy"
4628stg "STSignalDisplayStrategy"
4629f (Text
4630uid 3559,0
4631va (VaSet
4632)
4633xt "114000,89500,116800,90500"
4634st "T1_CS"
4635blo "114000,90300"
4636tm "WireNameMgr"
4637)
4638)
4639)
4640*138 (PortIoOut
4641uid 3560,0
4642shape (CompositeShape
4643uid 3561,0
4644va (VaSet
4645vasetType 1
4646fg "0,0,32768"
4647)
4648optionalChildren [
4649(Pentagon
4650uid 3562,0
4651sl 0
4652ro 270
4653xt "111500,90625,113000,91375"
4654)
4655(Line
4656uid 3563,0
4657sl 0
4658ro 270
4659xt "111000,91000,111500,91000"
4660pts [
4661"111000,91000"
4662"111500,91000"
4663]
4664)
4665]
4666)
4667stc 0
4668sf 1
4669tg (WTG
4670uid 3564,0
4671ps "PortIoTextPlaceStrategy"
4672stg "STSignalDisplayStrategy"
4673f (Text
4674uid 3565,0
4675va (VaSet
4676)
4677xt "114000,90500,116800,91500"
4678st "T2_CS"
4679blo "114000,91300"
4680tm "WireNameMgr"
4681)
4682)
4683)
4684*139 (PortIoOut
4685uid 3566,0
4686shape (CompositeShape
4687uid 3567,0
4688va (VaSet
4689vasetType 1
4690fg "0,0,32768"
4691)
4692optionalChildren [
4693(Pentagon
4694uid 3568,0
4695sl 0
4696ro 270
4697xt "111500,91625,113000,92375"
4698)
4699(Line
4700uid 3569,0
4701sl 0
4702ro 270
4703xt "111000,92000,111500,92000"
4704pts [
4705"111000,92000"
4706"111500,92000"
4707]
4708)
4709]
4710)
4711stc 0
4712sf 1
4713tg (WTG
4714uid 3570,0
4715ps "PortIoTextPlaceStrategy"
4716stg "STSignalDisplayStrategy"
4717f (Text
4718uid 3571,0
4719va (VaSet
4720)
4721xt "114000,91500,116800,92500"
4722st "T3_CS"
4723blo "114000,92300"
4724tm "WireNameMgr"
4725)
4726)
4727)
4728*140 (Net
4729uid 3604,0
4730decl (Decl
4731n "T0_CS"
4732t "std_logic"
4733o 46
4734suid 101,0
4735)
4736declText (MLText
4737uid 3605,0
4738va (VaSet
4739font "Courier New,8,0"
4740)
4741xt "39000,39800,54000,40600"
4742st "T0_CS : std_logic
4743"
4744)
4745)
4746*141 (Net
4747uid 3606,0
4748decl (Decl
4749n "T1_CS"
4750t "std_logic"
4751o 47
4752suid 102,0
4753)
4754declText (MLText
4755uid 3607,0
4756va (VaSet
4757font "Courier New,8,0"
4758)
4759xt "39000,40600,54000,41400"
4760st "T1_CS : std_logic
4761"
4762)
4763)
4764*142 (Net
4765uid 3608,0
4766decl (Decl
4767n "T2_CS"
4768t "std_logic"
4769o 48
4770suid 103,0
4771)
4772declText (MLText
4773uid 3609,0
4774va (VaSet
4775font "Courier New,8,0"
4776)
4777xt "39000,41400,54000,42200"
4778st "T2_CS : std_logic
4779"
4780)
4781)
4782*143 (Net
4783uid 3610,0
4784decl (Decl
4785n "T3_CS"
4786t "std_logic"
4787o 49
4788suid 104,0
4789)
4790declText (MLText
4791uid 3611,0
4792va (VaSet
4793font "Courier New,8,0"
4794)
4795xt "39000,42200,54000,43000"
4796st "T3_CS : std_logic
4797"
4798)
4799)
4800*144 (PortIoOut
4801uid 3624,0
4802shape (CompositeShape
4803uid 3625,0
4804va (VaSet
4805vasetType 1
4806fg "0,0,32768"
4807)
4808optionalChildren [
4809(Pentagon
4810uid 3626,0
4811sl 0
4812ro 270
4813xt "111500,97625,113000,98375"
4814)
4815(Line
4816uid 3627,0
4817sl 0
4818ro 270
4819xt "111000,98000,111500,98000"
4820pts [
4821"111000,98000"
4822"111500,98000"
4823]
4824)
4825]
4826)
4827stc 0
4828sf 1
4829tg (WTG
4830uid 3628,0
4831ps "PortIoTextPlaceStrategy"
4832stg "STSignalDisplayStrategy"
4833f (Text
4834uid 3629,0
4835va (VaSet
4836)
4837xt "113750,97500,116550,98500"
4838st "S_CLK"
4839blo "113750,98300"
4840tm "WireNameMgr"
4841)
4842)
4843)
4844*145 (Net
4845uid 3630,0
4846decl (Decl
4847n "S_CLK"
4848t "std_logic"
4849o 45
4850suid 105,0
4851)
4852declText (MLText
4853uid 3631,0
4854va (VaSet
4855font "Courier New,8,0"
4856)
4857xt "39000,39000,54000,39800"
4858st "S_CLK : std_logic
4859"
4860)
4861)
4862*146 (Net
4863uid 3632,0
4864decl (Decl
4865n "W_A"
4866t "std_logic_vector"
4867b "(9 DOWNTO 0)"
4868o 51
4869suid 106,0
4870)
4871declText (MLText
4872uid 3633,0
4873va (VaSet
4874font "Courier New,8,0"
4875)
4876xt "39000,43800,64000,44600"
4877st "W_A : std_logic_vector(9 DOWNTO 0)
4878"
4879)
4880)
4881*147 (Net
4882uid 3634,0
4883decl (Decl
4884n "W_D"
4885t "std_logic_vector"
4886b "(15 DOWNTO 0)"
4887o 57
4888suid 107,0
4889)
4890declText (MLText
4891uid 3635,0
4892va (VaSet
4893font "Courier New,8,0"
4894)
4895xt "39000,48600,64500,49400"
4896st "W_D : std_logic_vector(15 DOWNTO 0)
4897"
4898)
4899)
4900*148 (Net
4901uid 3636,0
4902decl (Decl
4903n "W_RES"
4904t "std_logic"
4905o 54
4906suid 108,0
4907i "'1'"
4908)
4909declText (MLText
4910uid 3637,0
4911va (VaSet
4912font "Courier New,8,0"
4913)
4914xt "39000,46200,67500,47000"
4915st "W_RES : std_logic := '1'
4916"
4917)
4918)
4919*149 (Net
4920uid 3638,0
4921decl (Decl
4922n "W_RD"
4923t "std_logic"
4924o 53
4925suid 109,0
4926i "'1'"
4927)
4928declText (MLText
4929uid 3639,0
4930va (VaSet
4931font "Courier New,8,0"
4932)
4933xt "39000,45400,67500,46200"
4934st "W_RD : std_logic := '1'
4935"
4936)
4937)
4938*150 (Net
4939uid 3640,0
4940decl (Decl
4941n "W_WR"
4942t "std_logic"
4943o 55
4944suid 110,0
4945i "'1'"
4946)
4947declText (MLText
4948uid 3641,0
4949va (VaSet
4950font "Courier New,8,0"
4951)
4952xt "39000,47000,67500,47800"
4953st "W_WR : std_logic := '1'
4954"
4955)
4956)
4957*151 (Net
4958uid 3642,0
4959decl (Decl
4960n "W_INT"
4961t "std_logic"
4962o 17
4963suid 111,0
4964)
4965declText (MLText
4966uid 3643,0
4967va (VaSet
4968font "Courier New,8,0"
4969)
4970xt "39000,16600,54000,17400"
4971st "W_INT : std_logic
4972"
4973)
4974)
4975*152 (Net
4976uid 3644,0
4977decl (Decl
4978n "W_CS"
4979t "std_logic"
4980o 52
4981suid 112,0
4982i "'1'"
4983)
4984declText (MLText
4985uid 3645,0
4986va (VaSet
4987font "Courier New,8,0"
4988)
4989xt "39000,44600,67500,45400"
4990st "W_CS : std_logic := '1'
4991"
4992)
4993)
4994*153 (PortIoInOut
4995uid 3674,0
4996shape (CompositeShape
4997uid 3675,0
4998va (VaSet
4999vasetType 1
5000fg "0,0,32768"
5001)
5002optionalChildren [
5003(Hexagon
5004uid 3676,0
5005sl 0
5006xt "111500,98625,113000,99375"
5007)
5008(Line
5009uid 3677,0
5010sl 0
5011xt "111000,99000,111500,99000"
5012pts [
5013"111000,99000"
5014"111500,99000"
5015]
5016)
5017]
5018)
5019stc 0
5020sf 1
5021tg (WTG
5022uid 3678,0
5023ps "PortIoTextPlaceStrategy"
5024stg "STSignalDisplayStrategy"
5025f (Text
5026uid 3679,0
5027va (VaSet
5028)
5029xt "114000,98500,116400,99500"
5030st "MISO"
5031blo "114000,99300"
5032tm "WireNameMgr"
5033)
5034)
5035)
5036*154 (Net
5037uid 3680,0
5038decl (Decl
5039n "MOSI"
5040t "std_logic"
5041o 35
5042suid 113,0
5043i "'0'"
5044)
5045declText (MLText
5046uid 3681,0
5047va (VaSet
5048font "Courier New,8,0"
5049)
5050xt "39000,31000,67500,31800"
5051st "MOSI : std_logic := '0'
5052"
5053)
5054)
5055*155 (PortIoOut
5056uid 3688,0
5057shape (CompositeShape
5058uid 3689,0
5059va (VaSet
5060vasetType 1
5061fg "0,0,32768"
5062)
5063optionalChildren [
5064(Pentagon
5065uid 3690,0
5066sl 0
5067ro 270
5068xt "111500,99625,113000,100375"
5069)
5070(Line
5071uid 3691,0
5072sl 0
5073ro 270
5074xt "111000,100000,111500,100000"
5075pts [
5076"111000,100000"
5077"111500,100000"
5078]
5079)
5080]
5081)
5082stc 0
5083sf 1
5084tg (WTG
5085uid 3692,0
5086ps "PortIoTextPlaceStrategy"
5087stg "STSignalDisplayStrategy"
5088f (Text
5089uid 3693,0
5090va (VaSet
5091)
5092xt "114000,99500,116400,100500"
5093st "MOSI"
5094blo "114000,100300"
5095tm "WireNameMgr"
5096)
5097)
5098)
5099*156 (Net
5100uid 3694,0
5101decl (Decl
5102n "MISO"
5103t "std_logic"
5104preAdd 0
5105posAdd 0
5106o 56
5107suid 114,0
5108)
5109declText (MLText
5110uid 3695,0
5111va (VaSet
5112font "Courier New,8,0"
5113)
5114xt "39000,47800,54000,48600"
5115st "MISO : std_logic
5116"
5117)
5118)
5119*157 (HdlText
5120uid 3700,0
5121optionalChildren [
5122*158 (EmbeddedText
5123uid 3706,0
5124commentText (CommentText
5125uid 3707,0
5126ps "CenterOffsetStrategy"
5127shape (Rectangle
5128uid 3708,0
5129va (VaSet
5130vasetType 1
5131fg "65535,65535,65535"
5132lineColor "0,0,32768"
5133lineWidth 2
5134)
5135xt "82000,106000,99000,118000"
5136)
5137oxt "0,0,18000,5000"
5138text (MLText
5139uid 3709,0
5140va (VaSet
5141)
5142xt "82200,106200,98600,118200"
5143st "
5144-- MISC 6
5145
5146RS485_C_RE <= '0';
5147RS485_C_DE <= '0';
5148RS485_C_DO <= RS485_C_DI;
5149
5150
5151
5152-- DENABLE <= '0'; -- domino wave stopped
5153-- DENABLE <= '1'; -- domino wave running
5154
5155
5156EE_CS <= '1';
5157"
5158tm "HdlTextMgr"
5159wrapOption 3
5160visibleHeight 12000
5161visibleWidth 17000
5162)
5163)
5164)
5165]
5166shape (Rectangle
5167uid 3701,0
5168va (VaSet
5169vasetType 1
5170fg "65535,65535,37120"
5171lineColor "0,0,32768"
5172lineWidth 2
5173)
5174xt "100000,102000,108000,115000"
5175)
5176oxt "0,0,8000,10000"
5177ttg (MlTextGroup
5178uid 3702,0
5179ps "CenterOffsetStrategy"
5180stg "VerticalLayoutStrategy"
5181textVec [
5182*159 (Text
5183uid 3703,0
5184va (VaSet
5185font "Arial,8,1"
5186)
5187xt "103150,106000,105550,107000"
5188st "MISC"
5189blo "103150,106800"
5190tm "HdlTextNameMgr"
5191)
5192*160 (Text
5193uid 3704,0
5194va (VaSet
5195font "Arial,8,1"
5196)
5197xt "103150,107000,103950,108000"
5198st "6"
5199blo "103150,107800"
5200tm "HdlTextNumberMgr"
5201)
5202]
5203)
5204viewicon (ZoomableIcon
5205uid 3705,0
5206sl 0
5207va (VaSet
5208vasetType 1
5209fg "49152,49152,49152"
5210)
5211xt "100250,113250,101750,114750"
5212iconName "TextFile.png"
5213iconMaskName "TextFile.msk"
5214ftype 21
5215)
5216viewiconposition 0
5217)
5218*161 (PortIoOut
5219uid 3710,0
5220shape (CompositeShape
5221uid 3711,0
5222va (VaSet
5223vasetType 1
5224fg "0,0,32768"
5225)
5226optionalChildren [
5227(Pentagon
5228uid 3712,0
5229sl 0
5230ro 270
5231xt "91500,143625,93000,144375"
5232)
5233(Line
5234uid 3713,0
5235sl 0
5236ro 270
5237xt "91000,144000,91500,144000"
5238pts [
5239"91000,144000"
5240"91500,144000"
5241]
5242)
5243]
5244)
5245stc 0
5246sf 1
5247tg (WTG
5248uid 3714,0
5249ps "PortIoTextPlaceStrategy"
5250stg "STSignalDisplayStrategy"
5251f (Text
5252uid 3715,0
5253va (VaSet
5254)
5255xt "94000,143500,97000,144500"
5256st "TRG_V"
5257blo "94000,144300"
5258tm "WireNameMgr"
5259)
5260)
5261)
5262*162 (PortIoOut
5263uid 3716,0
5264shape (CompositeShape
5265uid 3717,0
5266va (VaSet
5267vasetType 1
5268fg "0,0,32768"
5269)
5270optionalChildren [
5271(Pentagon
5272uid 3718,0
5273sl 0
5274ro 270
5275xt "111500,103625,113000,104375"
5276)
5277(Line
5278uid 3719,0
5279sl 0
5280ro 270
5281xt "111000,104000,111500,104000"
5282pts [
5283"111000,104000"
5284"111500,104000"
5285]
5286)
5287]
5288)
5289stc 0
5290sf 1
5291tg (WTG
5292uid 3720,0
5293ps "PortIoTextPlaceStrategy"
5294stg "STSignalDisplayStrategy"
5295f (Text
5296uid 3721,0
5297va (VaSet
5298)
5299xt "114000,103500,119600,104500"
5300st "RS485_C_RE"
5301blo "114000,104300"
5302tm "WireNameMgr"
5303)
5304)
5305)
5306*163 (PortIoOut
5307uid 3722,0
5308shape (CompositeShape
5309uid 3723,0
5310va (VaSet
5311vasetType 1
5312fg "0,0,32768"
5313)
5314optionalChildren [
5315(Pentagon
5316uid 3724,0
5317sl 0
5318ro 270
5319xt "111500,104625,113000,105375"
5320)
5321(Line
5322uid 3725,0
5323sl 0
5324ro 270
5325xt "111000,105000,111500,105000"
5326pts [
5327"111000,105000"
5328"111500,105000"
5329]
5330)
5331]
5332)
5333stc 0
5334sf 1
5335tg (WTG
5336uid 3726,0
5337ps "PortIoTextPlaceStrategy"
5338stg "STSignalDisplayStrategy"
5339f (Text
5340uid 3727,0
5341va (VaSet
5342)
5343xt "114000,104500,119600,105500"
5344st "RS485_C_DE"
5345blo "114000,105300"
5346tm "WireNameMgr"
5347)
5348)
5349)
5350*164 (PortIoOut
5351uid 3728,0
5352shape (CompositeShape
5353uid 3729,0
5354va (VaSet
5355vasetType 1
5356fg "0,0,32768"
5357)
5358optionalChildren [
5359(Pentagon
5360uid 3730,0
5361sl 0
5362ro 270
5363xt "139500,149625,141000,150375"
5364)
5365(Line
5366uid 3731,0
5367sl 0
5368ro 270
5369xt "139000,150000,139500,150000"
5370pts [
5371"139000,150000"
5372"139500,150000"
5373]
5374)
5375]
5376)
5377stc 0
5378sf 1
5379tg (WTG
5380uid 3732,0
5381ps "PortIoTextPlaceStrategy"
5382stg "STSignalDisplayStrategy"
5383f (Text
5384uid 3733,0
5385va (VaSet
5386)
5387xt "142000,149500,147500,150500"
5388st "RS485_E_RE"
5389blo "142000,150300"
5390tm "WireNameMgr"
5391)
5392)
5393)
5394*165 (PortIoOut
5395uid 3734,0
5396shape (CompositeShape
5397uid 3735,0
5398va (VaSet
5399vasetType 1
5400fg "0,0,32768"
5401)
5402optionalChildren [
5403(Pentagon
5404uid 3736,0
5405sl 0
5406ro 270
5407xt "137500,148625,139000,149375"
5408)
5409(Line
5410uid 3737,0
5411sl 0
5412ro 270
5413xt "137000,149000,137500,149000"
5414pts [
5415"137000,149000"
5416"137500,149000"
5417]
5418)
5419]
5420)
5421stc 0
5422sf 1
5423tg (WTG
5424uid 3738,0
5425ps "PortIoTextPlaceStrategy"
5426stg "STSignalDisplayStrategy"
5427f (Text
5428uid 3739,0
5429va (VaSet
5430)
5431xt "140000,148500,145500,149500"
5432st "RS485_E_DE"
5433blo "140000,149300"
5434tm "WireNameMgr"
5435)
5436)
5437)
5438*166 (PortIoOut
5439uid 3740,0
5440shape (CompositeShape
5441uid 3741,0
5442va (VaSet
5443vasetType 1
5444fg "0,0,32768"
5445)
5446optionalChildren [
5447(Pentagon
5448uid 3742,0
5449sl 0
5450ro 270
5451xt "111500,120625,113000,121375"
5452)
5453(Line
5454uid 3743,0
5455sl 0
5456ro 270
5457xt "111000,121000,111500,121000"
5458pts [
5459"111000,121000"
5460"111500,121000"
5461]
5462)
5463]
5464)
5465stc 0
5466sf 1
5467tg (WTG
5468uid 3744,0
5469ps "PortIoTextPlaceStrategy"
5470stg "STSignalDisplayStrategy"
5471f (Text
5472uid 3745,0
5473va (VaSet
5474)
5475xt "114000,120500,118000,121500"
5476st "DENABLE"
5477blo "114000,121300"
5478tm "WireNameMgr"
5479)
5480)
5481)
5482*167 (PortIoOut
5483uid 3752,0
5484shape (CompositeShape
5485uid 3753,0
5486va (VaSet
5487vasetType 1
5488fg "0,0,32768"
5489)
5490optionalChildren [
5491(Pentagon
5492uid 3754,0
5493sl 0
5494ro 270
5495xt "111500,109625,113000,110375"
5496)
5497(Line
5498uid 3755,0
5499sl 0
5500ro 270
5501xt "111000,110000,111500,110000"
5502pts [
5503"111000,110000"
5504"111500,110000"
5505]
5506)
5507]
5508)
5509stc 0
5510sf 1
5511tg (WTG
5512uid 3756,0
5513ps "PortIoTextPlaceStrategy"
5514stg "STSignalDisplayStrategy"
5515f (Text
5516uid 3757,0
5517va (VaSet
5518)
5519xt "114000,109500,116900,110500"
5520st "EE_CS"
5521blo "114000,110300"
5522tm "WireNameMgr"
5523)
5524)
5525)
5526*168 (Net
5527uid 3864,0
5528decl (Decl
5529n "TRG_V"
5530t "std_logic"
5531o 50
5532suid 126,0
5533)
5534declText (MLText
5535uid 3865,0
5536va (VaSet
5537font "Courier New,8,0"
5538)
5539xt "39000,43000,54000,43800"
5540st "TRG_V : std_logic
5541"
5542)
5543)
5544*169 (Net
5545uid 3866,0
5546decl (Decl
5547n "RS485_C_RE"
5548t "std_logic"
5549o 40
5550suid 127,0
5551)
5552declText (MLText
5553uid 3867,0
5554va (VaSet
5555font "Courier New,8,0"
5556)
5557xt "39000,35000,54000,35800"
5558st "RS485_C_RE : std_logic
5559"
5560)
5561)
5562*170 (Net
5563uid 3868,0
5564decl (Decl
5565n "RS485_C_DE"
5566t "std_logic"
5567o 38
5568suid 128,0
5569)
5570declText (MLText
5571uid 3869,0
5572va (VaSet
5573font "Courier New,8,0"
5574)
5575xt "39000,33400,54000,34200"
5576st "RS485_C_DE : std_logic
5577"
5578)
5579)
5580*171 (Net
5581uid 3870,0
5582decl (Decl
5583n "RS485_E_RE"
5584t "std_logic"
5585o 42
5586suid 129,0
5587)
5588declText (MLText
5589uid 3871,0
5590va (VaSet
5591font "Courier New,8,0"
5592)
5593xt "39000,36600,54000,37400"
5594st "RS485_E_RE : std_logic
5595"
5596)
5597)
5598*172 (Net
5599uid 3872,0
5600decl (Decl
5601n "RS485_E_DE"
5602t "std_logic"
5603o 41
5604suid 130,0
5605)
5606declText (MLText
5607uid 3873,0
5608va (VaSet
5609font "Courier New,8,0"
5610)
5611xt "39000,35800,54000,36600"
5612st "RS485_E_DE : std_logic
5613"
5614)
5615)
5616*173 (Net
5617uid 3874,0
5618decl (Decl
5619n "DENABLE"
5620t "std_logic"
5621o 28
5622suid 131,0
5623i "'0'"
5624)
5625declText (MLText
5626uid 3875,0
5627va (VaSet
5628font "Courier New,8,0"
5629)
5630xt "39000,25400,67500,26200"
5631st "DENABLE : std_logic := '0'
5632"
5633)
5634)
5635*174 (Net
5636uid 3878,0
5637decl (Decl
5638n "EE_CS"
5639t "std_logic"
5640o 33
5641suid 133,0
5642)
5643declText (MLText
5644uid 3879,0
5645va (VaSet
5646font "Courier New,8,0"
5647)
5648xt "39000,29400,54000,30200"
5649st "EE_CS : std_logic
5650"
5651)
5652)
5653*175 (PortIoOut
5654uid 3995,0
5655shape (CompositeShape
5656uid 3996,0
5657va (VaSet
5658vasetType 1
5659fg "0,0,32768"
5660)
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6584fg "0,65535,65535"
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6586xt "42250,71625,43000,72375"
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6588tg (CPTG
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6591stg "VerticalLayoutStrategy"
6592f (Text
6593uid 9998,0
6594sl 0
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6597font "arial,8,0"
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6599xt "123669,199342,125469,200342"
6600st "dout"
6601blo "123669,200142"
6602)
6603)
6604thePort (LogicalPort
6605m 1
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6609o 61
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6642tg (CPTG
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6645stg "RightVerticalLayoutStrategy"
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6651font "arial,8,0"
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6653xt "126635,200294,128435,201294"
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6655ju 2
6656blo "128435,201094"
6657)
6658)
6659thePort (LogicalPort
6660decl (Decl
6661n "din0"
6662t "std_logic"
6663o 73
6664suid 2,0
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6666)
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6670uid 10006,0
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6682"48000,71000"
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6684)
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6710ju 2
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6712)
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6714thePort (LogicalPort
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6897header ""
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6899elements [
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6903awe 1
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6912ptn "String"
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6915visOptions (mwParamsVisibilityOptions
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6983sf 1
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6999*228 (Net
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7031fg "65535,65535,65535"
7032lineColor "0,0,32768"
7033lineWidth 2
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7044-- eb3 9
7045--A0_T(0) <= ready;
7046--A0_T(1) <= shifting;
7047--A0_T(2) <= CLK25_PSOUT;
7048--A0_T(3) <= PS_DIR_IN;
7049--A0_T(4) <= PS_DO_IN;
7050--A0_T(5) <= PSINCDEC_OUT;
7051
7052
7053
7054A1_T(0) <= SRIN;
7055A1_T(1) <= PSDONE_extraOUT;
7056A1_T(2) <= PSCLK_OUT;
7057A1_T(3) <= LOCKED_extraOUT;
7058
7059A1_T(4) <= drs_channel_id(0);
7060A1_T(5) <= drs_channel_id(1);
7061A1_T(6) <= drs_channel_id(2);
7062A1_T(7) <= drs_channel_id(3);
7063
7064A0_T(5 downto 0) <= POSITION_ID;
7065A0_T(6) <= REFCLK;
7066A0_T(7) <= RS485_E_DI;
7067RS485_E_RE <= '0';
7068RS485_E_DE <= '0';
7069
7070D_T2 <= D_PLLLCK;
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7072tm "HdlTextMgr"
7073wrapOption 3
7074visibleHeight 25000
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7120sl 0
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7189n "PS_DIR_IN"
7190t "std_logic"
7191o 70
7192suid 187,0
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7194declText (MLText
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7204*237 (Net
7205uid 10544,0
7206decl (Decl
7207n "PSINCDEC_OUT"
7208t "std_logic"
7209o 69
7210suid 190,0
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7212declText (MLText
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7214va (VaSet
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7218st "SIGNAL PSINCDEC_OUT : std_logic
7219"
7220)
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7223uid 10552,0
7224decl (Decl
7225n "DCM_locked"
7226t "std_logic"
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7228posAdd 0
7229o 64
7230suid 191,0
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7232declText (MLText
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7240)
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7242*239 (Net
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7245n "ready"
7246t "std_logic"
7247preAdd 0
7248posAdd 0
7249o 79
7250suid 192,0
7251i "'0'"
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7253declText (MLText
7254uid 10561,0
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7260"
7261)
7262)
7263*240 (Net
7264uid 10568,0
7265decl (Decl
7266n "shifting"
7267t "std_logic"
7268prec "-- status:"
7269preAdd 0
7270posAdd 0
7271o 81
7272suid 193,0
7273i "'0'"
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7275declText (MLText
7276uid 10569,0
7277va (VaSet
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7280xt "39000,67200,71000,68800"
7281st "-- status:
7282SIGNAL shifting : std_logic := '0'
7283"
7284)
7285)
7286*241 (Net
7287uid 10576,0
7288decl (Decl
7289n "PSDONE_extraOUT"
7290t "std_logic"
7291o 67
7292suid 194,0
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7294declText (MLText
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7296va (VaSet
7297font "Courier New,8,0"
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7300st "SIGNAL PSDONE_extraOUT : std_logic
7301"
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7303)
7304*242 (Net
7305uid 10584,0
7306decl (Decl
7307n "PSCLK_OUT"
7308t "std_logic"
7309o 66
7310suid 195,0
7311)
7312declText (MLText
7313uid 10585,0
7314va (VaSet
7315font "Courier New,8,0"
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7318st "SIGNAL PSCLK_OUT : std_logic
7319"
7320)
7321)
7322*243 (Net
7323uid 10592,0
7324decl (Decl
7325n "LOCKED_extraOUT"
7326t "std_logic"
7327o 65
7328suid 196,0
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7330declText (MLText
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7336st "SIGNAL LOCKED_extraOUT : std_logic
7337"
7338)
7339)
7340*244 (PortIoIn
7341uid 11090,0
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7350uid 11092,0
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7355(Line
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7358ro 270
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7360pts [
7361"95500,103000"
7362"96000,103000"
7363]
7364)
7365]
7366)
7367stc 0
7368sf 1
7369tg (WTG
7370uid 11094,0
7371ps "PortIoTextPlaceStrategy"
7372stg "STSignalDisplayStrategy"
7373f (Text
7374uid 11095,0
7375va (VaSet
7376)
7377xt "87700,102500,93000,103500"
7378st "RS485_C_DI"
7379ju 2
7380blo "93000,103300"
7381tm "WireNameMgr"
7382)
7383)
7384)
7385*245 (Net
7386uid 11102,0
7387decl (Decl
7388n "RS485_C_DI"
7389t "std_logic"
7390o 13
7391suid 197,0
7392)
7393declText (MLText
7394uid 11103,0
7395va (VaSet
7396font "Courier New,8,0"
7397)
7398xt "39000,13400,54000,14200"
7399st "RS485_C_DI : std_logic
7400"
7401)
7402)
7403*246 (PortIoOut
7404uid 11104,0
7405shape (CompositeShape
7406uid 11105,0
7407va (VaSet
7408vasetType 1
7409fg "0,0,32768"
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7411optionalChildren [
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7413uid 11106,0
7414sl 0
7415ro 270
7416xt "111500,111625,113000,112375"
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7418(Line
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7421ro 270
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7423pts [
7424"111000,112000"
7425"111500,112000"
7426]
7427)
7428]
7429)
7430stc 0
7431sf 1
7432tg (WTG
7433uid 11108,0
7434ps "PortIoTextPlaceStrategy"
7435stg "STSignalDisplayStrategy"
7436f (Text
7437uid 11109,0
7438va (VaSet
7439)
7440xt "114000,111500,119700,112500"
7441st "RS485_C_DO"
7442blo "114000,112300"
7443tm "WireNameMgr"
7444)
7445)
7446)
7447*247 (Net
7448uid 11116,0
7449decl (Decl
7450n "RS485_C_DO"
7451t "std_logic"
7452o 39
7453suid 198,0
7454)
7455declText (MLText
7456uid 11117,0
7457va (VaSet
7458font "Courier New,8,0"
7459)
7460xt "39000,34200,54000,35000"
7461st "RS485_C_DO : std_logic
7462"
7463)
7464)
7465*248 (PortIoIn
7466uid 11508,0
7467shape (CompositeShape
7468uid 11509,0
7469va (VaSet
7470vasetType 1
7471fg "0,0,32768"
7472)
7473optionalChildren [
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7475uid 11510,0
7476sl 0
7477ro 270
7478xt "106000,149625,107500,150375"
7479)
7480(Line
7481uid 11511,0
7482sl 0
7483ro 270
7484xt "107500,150000,108000,150000"
7485pts [
7486"107500,150000"
7487"108000,150000"
7488]
7489)
7490]
7491)
7492stc 0
7493sf 1
7494tg (WTG
7495uid 11512,0
7496ps "PortIoTextPlaceStrategy"
7497stg "STSignalDisplayStrategy"
7498f (Text
7499uid 11513,0
7500va (VaSet
7501)
7502xt "99800,149500,105000,150500"
7503st "RS485_E_DI"
7504ju 2
7505blo "105000,150300"
7506tm "WireNameMgr"
7507)
7508)
7509)
7510*249 (Net
7511uid 11520,0
7512decl (Decl
7513n "RS485_E_DI"
7514t "std_logic"
7515o 14
7516suid 200,0
7517)
7518declText (MLText
7519uid 11521,0
7520va (VaSet
7521font "Courier New,8,0"
7522)
7523xt "39000,14200,54000,15000"
7524st "RS485_E_DI : std_logic
7525"
7526)
7527)
7528*250 (Net
7529uid 11534,0
7530decl (Decl
7531n "RS485_E_DO"
7532t "std_logic"
7533o 15
7534suid 201,0
7535)
7536declText (MLText
7537uid 11535,0
7538va (VaSet
7539font "Courier New,8,0"
7540)
7541xt "39000,15000,54000,15800"
7542st "RS485_E_DO : std_logic
7543"
7544)
7545)
7546*251 (PortIoIn
7547uid 11922,0
7548shape (CompositeShape
7549uid 11923,0
7550va (VaSet
7551vasetType 1
7552fg "0,0,32768"
7553)
7554optionalChildren [
7555(Pentagon
7556uid 11924,0
7557sl 0
7558ro 270
7559xt "85000,157625,86500,158375"
7560)
7561(Line
7562uid 11925,0
7563sl 0
7564ro 270
7565xt "86500,158000,87000,158000"
7566pts [
7567"86500,158000"
7568"87000,158000"
7569]
7570)
7571]
7572)
7573stc 0
7574sf 1
7575tg (WTG
7576uid 11926,0
7577ps "PortIoTextPlaceStrategy"
7578stg "STSignalDisplayStrategy"
7579f (Text
7580uid 11927,0
7581va (VaSet
7582)
7583xt "78400,157500,84000,158500"
7584st "RS485_E_DO"
7585ju 2
7586blo "84000,158300"
7587tm "WireNameMgr"
7588)
7589)
7590)
7591*252 (PortIoOut
7592uid 12326,0
7593shape (CompositeShape
7594uid 12327,0
7595va (VaSet
7596vasetType 1
7597fg "0,0,32768"
7598)
7599optionalChildren [
7600(Pentagon
7601uid 12328,0
7602sl 0
7603ro 270
7604xt "87500,139625,89000,140375"
7605)
7606(Line
7607uid 12329,0
7608sl 0
7609ro 270
7610xt "87000,140000,87500,140000"
7611pts [
7612"87000,140000"
7613"87500,140000"
7614]
7615)
7616]
7617)
7618stc 0
7619sf 1
7620tg (WTG
7621uid 12330,0
7622ps "PortIoTextPlaceStrategy"
7623stg "STSignalDisplayStrategy"
7624f (Text
7625uid 12331,0
7626va (VaSet
7627)
7628xt "89000,139500,91300,140500"
7629st "SRIN"
7630blo "89000,140300"
7631tm "WireNameMgr"
7632)
7633)
7634)
7635*253 (Net
7636uid 12334,0
7637decl (Decl
7638n "SRIN"
7639t "std_logic"
7640o 44
7641suid 203,0
7642i "'0'"
7643)
7644declText (MLText
7645uid 12335,0
7646va (VaSet
7647font "Courier New,8,0"
7648)
7649xt "39000,38200,67500,39000"
7650st "SRIN : std_logic := '0'
7651"
7652)
7653)
7654*254 (PortIoOut
7655uid 12539,0
7656shape (CompositeShape
7657uid 12540,0
7658va (VaSet
7659vasetType 1
7660fg "0,0,32768"
7661)
7662optionalChildren [
7663(Pentagon
7664uid 12541,0
7665sl 0
7666ro 270
7667xt "87500,140625,89000,141375"
7668)
7669(Line
7670uid 12542,0
7671sl 0
7672ro 270
7673xt "87000,141000,87500,141000"
7674pts [
7675"87000,141000"
7676"87500,141000"
7677]
7678)
7679]
7680)
7681stc 0
7682sf 1
7683tg (WTG
7684uid 12543,0
7685ps "PortIoTextPlaceStrategy"
7686stg "STSignalDisplayStrategy"
7687f (Text
7688uid 12544,0
7689va (VaSet
7690)
7691xt "90000,140500,95100,141500"
7692st "AMBER_LED"
7693blo "90000,141300"
7694tm "WireNameMgr"
7695)
7696)
7697)
7698*255 (PortIoOut
7699uid 12553,0
7700shape (CompositeShape
7701uid 12554,0
7702va (VaSet
7703vasetType 1
7704fg "0,0,32768"
7705)
7706optionalChildren [
7707(Pentagon
7708uid 12555,0
7709sl 0
7710ro 270
7711xt "87500,141625,89000,142375"
7712)
7713(Line
7714uid 12556,0
7715sl 0
7716ro 270
7717xt "87000,142000,87500,142000"
7718pts [
7719"87000,142000"
7720"87500,142000"
7721]
7722)
7723]
7724)
7725stc 0
7726sf 1
7727tg (WTG
7728uid 12557,0
7729ps "PortIoTextPlaceStrategy"
7730stg "STSignalDisplayStrategy"
7731f (Text
7732uid 12558,0
7733va (VaSet
7734)
7735xt "90000,141500,95100,142500"
7736st "GREEN_LED"
7737blo "90000,142300"
7738tm "WireNameMgr"
7739)
7740)
7741)
7742*256 (PortIoOut
7743uid 12567,0
7744shape (CompositeShape
7745uid 12568,0
7746va (VaSet
7747vasetType 1
7748fg "0,0,32768"
7749)
7750optionalChildren [
7751(Pentagon
7752uid 12569,0
7753sl 0
7754ro 270
7755xt "87500,142625,89000,143375"
7756)
7757(Line
7758uid 12570,0
7759sl 0
7760ro 270
7761xt "87000,143000,87500,143000"
7762pts [
7763"87000,143000"
7764"87500,143000"
7765]
7766)
7767]
7768)
7769stc 0
7770sf 1
7771tg (WTG
7772uid 12571,0
7773ps "PortIoTextPlaceStrategy"
7774stg "STSignalDisplayStrategy"
7775f (Text
7776uid 12572,0
7777va (VaSet
7778)
7779xt "90000,142500,94000,143500"
7780st "RED_LED"
7781blo "90000,143300"
7782tm "WireNameMgr"
7783)
7784)
7785)
7786*257 (Net
7787uid 12762,0
7788decl (Decl
7789n "AMBER_LED"
7790t "std_logic"
7791o 21
7792suid 207,0
7793)
7794declText (MLText
7795uid 12763,0
7796va (VaSet
7797font "Courier New,8,0"
7798)
7799xt "39000,19800,54000,20600"
7800st "AMBER_LED : std_logic
7801"
7802)
7803)
7804*258 (Net
7805uid 12764,0
7806decl (Decl
7807n "GREEN_LED"
7808t "std_logic"
7809o 34
7810suid 208,0
7811)
7812declText (MLText
7813uid 12765,0
7814va (VaSet
7815font "Courier New,8,0"
7816)
7817xt "39000,30200,54000,31000"
7818st "GREEN_LED : std_logic
7819"
7820)
7821)
7822*259 (Net
7823uid 12766,0
7824decl (Decl
7825n "RED_LED"
7826t "std_logic"
7827o 37
7828suid 209,0
7829)
7830declText (MLText
7831uid 12767,0
7832va (VaSet
7833font "Courier New,8,0"
7834)
7835xt "39000,32600,54000,33400"
7836st "RED_LED : std_logic
7837"
7838)
7839)
7840*260 (PortIoIn
7841uid 13516,0
7842shape (CompositeShape
7843uid 13517,0
7844va (VaSet
7845vasetType 1
7846fg "0,0,32768"
7847)
7848optionalChildren [
7849(Pentagon
7850uid 13518,0
7851sl 0
7852ro 270
7853xt "110000,147625,111500,148375"
7854)
7855(Line
7856uid 13519,0
7857sl 0
7858ro 270
7859xt "111500,148000,112000,148000"
7860pts [
7861"111500,148000"
7862"112000,148000"
7863]
7864)
7865]
7866)
7867stc 0
7868sf 1
7869tg (WTG
7870uid 13520,0
7871ps "PortIoTextPlaceStrategy"
7872stg "STSignalDisplayStrategy"
7873f (Text
7874uid 13521,0
7875va (VaSet
7876)
7877xt "103300,147500,109000,148500"
7878st "POSITION_ID"
7879ju 2
7880blo "109000,148300"
7881tm "WireNameMgr"
7882)
7883)
7884)
7885*261 (Net
7886uid 13528,0
7887decl (Decl
7888n "POSITION_ID"
7889t "std_logic_vector"
7890b "( 5 DOWNTO 0 )"
7891o 11
7892suid 210,0
7893)
7894declText (MLText
7895uid 13529,0
7896va (VaSet
7897font "Courier New,8,0"
7898)
7899xt "39000,11800,65000,12600"
7900st "POSITION_ID : std_logic_vector( 5 DOWNTO 0 )
7901"
7902)
7903)
7904*262 (PortIoIn
7905uid 13628,0
7906shape (CompositeShape
7907uid 13629,0
7908va (VaSet
7909vasetType 1
7910fg "0,0,32768"
7911)
7912optionalChildren [
7913(Pentagon
7914uid 13630,0
7915sl 0
7916ro 270
7917xt "110000,148625,111500,149375"
7918)
7919(Line
7920uid 13631,0
7921sl 0
7922ro 270
7923xt "111500,149000,112000,149000"
7924pts [
7925"111500,149000"
7926"112000,149000"
7927]
7928)
7929]
7930)
7931stc 0
7932sf 1
7933tg (WTG
7934uid 13632,0
7935ps "PortIoTextPlaceStrategy"
7936stg "STSignalDisplayStrategy"
7937f (Text
7938uid 13633,0
7939va (VaSet
7940)
7941xt "105500,148500,109000,149500"
7942st "REFCLK"
7943ju 2
7944blo "109000,149300"
7945tm "WireNameMgr"
7946)
7947)
7948)
7949*263 (Net
7950uid 13640,0
7951decl (Decl
7952n "REFCLK"
7953t "std_logic"
7954o 12
7955suid 211,0
7956)
7957declText (MLText
7958uid 13641,0
7959va (VaSet
7960font "Courier New,8,0"
7961)
7962xt "39000,12600,54000,13400"
7963st "REFCLK : std_logic
7964"
7965)
7966)
7967*264 (Wire
7968uid 245,0
7969shape (OrthoPolyLine
7970uid 246,0
7971va (VaSet
7972vasetType 3
7973)
7974xt "21000,68000,51250,68000"
7975pts [
7976"51250,68000"
7977"21000,68000"
7978]
7979)
7980start &27
7981end &66
7982ss 0
7983sat 32
7984eat 32
7985stc 0
7986st 0
7987sf 1
7988si 0
7989tg (WTG
7990uid 249,0
7991ps "ConnStartEndStrategy"
7992stg "STSignalDisplayStrategy"
7993f (Text
7994uid 250,0
7995va (VaSet
7996isHidden 1
7997)
7998xt "53250,67000,56050,68000"
7999st "X_50M"
8000blo "53250,67800"
8001tm "WireNameMgr"
8002)
8003)
8004on &87
8005)
8006*265 (Wire
8007uid 277,0
8008shape (OrthoPolyLine
8009uid 278,0
8010va (VaSet
8011vasetType 3
8012lineWidth 2
8013)
8014xt "32000,81000,51250,81000"
8015pts [
8016"51250,81000"
8017"32000,81000"
8018]
8019)
8020start &17
8021end &67
8022sat 32
8023eat 2
8024sty 1
8025st 0
8026sf 1
8027si 0
8028tg (WTG
8029uid 281,0
8030ps "ConnStartEndStrategy"
8031stg "STSignalDisplayStrategy"
8032f (Text
8033uid 282,0
8034va (VaSet
8035)
8036xt "44000,80000,49900,81000"
8037st "board_id : (3:0)"
8038blo "44000,80800"
8039tm "WireNameMgr"
8040)
8041)
8042on &71
8043)
8044*266 (Wire
8045uid 285,0
8046shape (OrthoPolyLine
8047uid 286,0
8048va (VaSet
8049vasetType 3
8050lineWidth 2
8051)
8052xt "32000,82000,51250,82000"
8053pts [
8054"51250,82000"
8055"32000,82000"
8056]
8057)
8058start &18
8059end &67
8060sat 32
8061eat 2
8062sty 1
8063st 0
8064sf 1
8065si 0
8066tg (WTG
8067uid 289,0
8068ps "ConnStartEndStrategy"
8069stg "STSignalDisplayStrategy"
8070f (Text
8071uid 290,0
8072va (VaSet
8073)
8074xt "45000,81000,50700,82000"
8075st "crate_id : (1:0)"
8076blo "45000,81800"
8077tm "WireNameMgr"
8078)
8079)
8080on &72
8081)
8082*267 (Wire
8083uid 362,0
8084shape (OrthoPolyLine
8085uid 363,0
8086va (VaSet
8087vasetType 3
8088)
8089xt "21000,90000,51250,90000"
8090pts [
8091"21000,90000"
8092"51250,90000"
8093]
8094)
8095start &95
8096end &16
8097sat 32
8098eat 32
8099stc 0
8100st 0
8101sf 1
8102si 0
8103tg (WTG
8104uid 364,0
8105ps "ConnStartEndStrategy"
8106stg "STSignalDisplayStrategy"
8107f (Text
8108uid 365,0
8109va (VaSet
8110isHidden 1
8111)
8112xt "22000,89000,25600,90000"
8113st "OE_ADC"
8114blo "22000,89800"
8115tm "WireNameMgr"
8116)
8117)
8118on &96
8119)
8120*268 (Wire
8121uid 418,0
8122shape (OrthoPolyLine
8123uid 419,0
8124va (VaSet
8125vasetType 3
8126)
8127xt "80750,71000,111000,71000"
8128pts [
8129"80750,71000"
8130"111000,71000"
8131]
8132)
8133start &13
8134end &73
8135sat 32
8136eat 32
8137stc 0
8138st 0
8139sf 1
8140si 0
8141tg (WTG
8142uid 422,0
8143ps "ConnStartEndStrategy"
8144stg "STSignalDisplayStrategy"
8145f (Text
8146uid 423,0
8147va (VaSet
8148isHidden 1
8149)
8150xt "82000,70000,85100,71000"
8151st "W_RES"
8152blo "82000,70800"
8153tm "WireNameMgr"
8154)
8155)
8156on &148
8157)
8158*269 (Wire
8159uid 426,0
8160shape (OrthoPolyLine
8161uid 427,0
8162va (VaSet
8163vasetType 3
8164lineWidth 2
8165)
8166xt "80750,68000,111000,68000"
8167pts [
8168"80750,68000"
8169"111000,68000"
8170]
8171)
8172start &19
8173end &74
8174sat 32
8175eat 32
8176sty 1
8177stc 0
8178st 0
8179sf 1
8180si 0
8181tg (WTG
8182uid 430,0
8183ps "ConnStartEndStrategy"
8184stg "STSignalDisplayStrategy"
8185f (Text
8186uid 431,0
8187va (VaSet
8188isHidden 1
8189)
8190xt "82000,67000,84000,68000"
8191st "W_A"
8192blo "82000,67800"
8193tm "WireNameMgr"
8194)
8195)
8196on &146
8197)
8198*270 (Wire
8199uid 434,0
8200shape (OrthoPolyLine
8201uid 435,0
8202va (VaSet
8203vasetType 3
8204)
8205xt "80750,75000,111000,75000"
8206pts [
8207"80750,75000"
8208"111000,75000"
8209]
8210)
8211start &20
8212end &75
8213sat 32
8214eat 32
8215stc 0
8216st 0
8217sf 1
8218si 0
8219tg (WTG
8220uid 438,0
8221ps "ConnStartEndStrategy"
8222stg "STSignalDisplayStrategy"
8223f (Text
8224uid 439,0
8225va (VaSet
8226isHidden 1
8227)
8228xt "82000,74000,84600,75000"
8229st "W_CS"
8230blo "82000,74800"
8231tm "WireNameMgr"
8232)
8233)
8234on &152
8235)
8236*271 (Wire
8237uid 442,0
8238shape (OrthoPolyLine
8239uid 443,0
8240va (VaSet
8241vasetType 3
8242lineWidth 2
8243)
8244xt "80750,69000,111000,69000"
8245pts [
8246"80750,69000"
8247"111000,69000"
8248]
8249)
8250start &21
8251end &76
8252sat 32
8253eat 32
8254sty 1
8255stc 0
8256st 0
8257sf 1
8258si 0
8259tg (WTG
8260uid 446,0
8261ps "ConnStartEndStrategy"
8262stg "STSignalDisplayStrategy"
8263f (Text
8264uid 447,0
8265va (VaSet
8266isHidden 1
8267)
8268xt "82000,68000,84100,69000"
8269st "W_D"
8270blo "82000,68800"
8271tm "WireNameMgr"
8272)
8273)
8274on &147
8275)
8276*272 (Wire
8277uid 450,0
8278shape (OrthoPolyLine
8279uid 451,0
8280va (VaSet
8281vasetType 3
8282)
8283xt "80750,74000,111000,74000"
8284pts [
8285"111000,74000"
8286"80750,74000"
8287]
8288)
8289start &77
8290end &22
8291sat 32
8292eat 32
8293stc 0
8294st 0
8295sf 1
8296si 0
8297tg (WTG
8298uid 454,0
8299ps "ConnStartEndStrategy"
8300stg "STSignalDisplayStrategy"
8301f (Text
8302uid 455,0
8303va (VaSet
8304isHidden 1
8305)
8306xt "82000,73000,84800,74000"
8307st "W_INT"
8308blo "82000,73800"
8309tm "WireNameMgr"
8310)
8311)
8312on &151
8313)
8314*273 (Wire
8315uid 458,0
8316shape (OrthoPolyLine
8317uid 459,0
8318va (VaSet
8319vasetType 3
8320)
8321xt "80750,72000,111000,72000"
8322pts [
8323"80750,72000"
8324"111000,72000"
8325]
8326)
8327start &23
8328end &78
8329sat 32
8330eat 32
8331stc 0
8332st 0
8333sf 1
8334si 0
8335tg (WTG
8336uid 462,0
8337ps "ConnStartEndStrategy"
8338stg "STSignalDisplayStrategy"
8339f (Text
8340uid 463,0
8341va (VaSet
8342isHidden 1
8343)
8344xt "82000,71000,84700,72000"
8345st "W_RD"
8346blo "82000,71800"
8347tm "WireNameMgr"
8348)
8349)
8350on &149
8351)
8352*274 (Wire
8353uid 466,0
8354shape (OrthoPolyLine
8355uid 467,0
8356va (VaSet
8357vasetType 3
8358)
8359xt "80750,73000,111000,73000"
8360pts [
8361"80750,73000"
8362"111000,73000"
8363]
8364)
8365start &24
8366end &79
8367sat 32
8368eat 32
8369stc 0
8370st 0
8371sf 1
8372si 0
8373tg (WTG
8374uid 470,0
8375ps "ConnStartEndStrategy"
8376stg "STSignalDisplayStrategy"
8377f (Text
8378uid 471,0
8379va (VaSet
8380isHidden 1
8381)
8382xt "82000,72000,84800,73000"
8383st "W_WR"
8384blo "82000,72800"
8385tm "WireNameMgr"
8386)
8387)
8388on &150
8389)
8390*275 (Wire
8391uid 1467,0
8392shape (OrthoPolyLine
8393uid 1468,0
8394va (VaSet
8395vasetType 3
8396)
8397xt "32000,95000,51250,95000"
8398pts [
8399"32000,95000"
8400"51250,95000"
8401]
8402)
8403start &99
8404end &28
8405sat 2
8406eat 32
8407st 0
8408sf 1
8409si 0
8410tg (WTG
8411uid 1471,0
8412ps "ConnStartEndStrategy"
8413stg "STSignalDisplayStrategy"
8414f (Text
8415uid 1472,0
8416va (VaSet
8417)
8418xt "34000,94000,39900,95000"
8419st "adc_data_array"
8420blo "34000,94800"
8421tm "WireNameMgr"
8422)
8423)
8424on &80
8425)
8426*276 (Wire
8427uid 1730,0
8428shape (OrthoPolyLine
8429uid 1731,0
8430va (VaSet
8431vasetType 3
8432lineWidth 2
8433)
8434xt "21000,89000,51250,89000"
8435pts [
8436"21000,89000"
8437"51250,89000"
8438]
8439)
8440start &97
8441end &29
8442sat 32
8443eat 32
8444sty 1
8445stc 0
8446st 0
8447sf 1
8448si 0
8449tg (WTG
8450uid 1734,0
8451ps "ConnStartEndStrategy"
8452stg "STSignalDisplayStrategy"
8453f (Text
8454uid 1735,0
8455va (VaSet
8456isHidden 1
8457)
8458xt "22000,88000,25000,89000"
8459st "A_OTR"
8460blo "22000,88800"
8461tm "WireNameMgr"
8462)
8463)
8464on &98
8465)
8466*277 (Wire
8467uid 1833,0
8468shape (OrthoPolyLine
8469uid 1834,0
8470va (VaSet
8471vasetType 3
8472lineWidth 2
8473)
8474xt "12000,126000,21000,126000"
8475pts [
8476"21000,126000"
8477"12000,126000"
8478]
8479)
8480start &185
8481end &127
8482sat 2
8483eat 32
8484sty 1
8485stc 0
8486st 0
8487sf 1
8488si 0
8489tg (WTG
8490uid 1837,0
8491ps "ConnStartEndStrategy"
8492stg "STSignalDisplayStrategy"
8493f (Text
8494uid 1838,0
8495va (VaSet
8496isHidden 1
8497)
8498xt "13000,125000,14900,126000"
8499st "D_A"
8500blo "13000,125800"
8501tm "WireNameMgr"
8502)
8503)
8504on &128
8505)
8506*278 (Wire
8507uid 1841,0
8508shape (OrthoPolyLine
8509uid 1842,0
8510va (VaSet
8511vasetType 3
8512)
8513xt "21000,110000,51250,110000"
8514pts [
8515"51250,110000"
8516"21000,110000"
8517]
8518)
8519start &31
8520end &129
8521sat 32
8522eat 32
8523stc 0
8524st 0
8525sf 1
8526si 0
8527tg (WTG
8528uid 1845,0
8529ps "ConnStartEndStrategy"
8530stg "STSignalDisplayStrategy"
8531f (Text
8532uid 1846,0
8533va (VaSet
8534isHidden 1
8535)
8536xt "22000,109000,25500,110000"
8537st "DWRITE"
8538blo "22000,109800"
8539tm "WireNameMgr"
8540)
8541)
8542on &130
8543)
8544*279 (Wire
8545uid 1865,0
8546shape (OrthoPolyLine
8547uid 1866,0
8548va (VaSet
8549vasetType 3
8550)
8551xt "21000,105000,51250,105000"
8552pts [
8553"21000,105000"
8554"51250,105000"
8555]
8556)
8557start &119
8558end &32
8559sat 32
8560eat 32
8561stc 0
8562st 0
8563sf 1
8564si 0
8565tg (WTG
8566uid 1869,0
8567ps "ConnStartEndStrategy"
8568stg "STSignalDisplayStrategy"
8569f (Text
8570uid 1870,0
8571va (VaSet
8572isHidden 1
8573)
8574xt "22000,104000,26600,105000"
8575st "D0_SROUT"
8576blo "22000,104800"
8577tm "WireNameMgr"
8578)
8579)
8580on &123
8581)
8582*280 (Wire
8583uid 1873,0
8584shape (OrthoPolyLine
8585uid 1874,0
8586va (VaSet
8587vasetType 3
8588)
8589xt "21000,106000,51250,106000"
8590pts [
8591"21000,106000"
8592"51250,106000"
8593]
8594)
8595start &120
8596end &33
8597sat 32
8598eat 32
8599stc 0
8600st 0
8601sf 1
8602si 0
8603tg (WTG
8604uid 1877,0
8605ps "ConnStartEndStrategy"
8606stg "STSignalDisplayStrategy"
8607f (Text
8608uid 1878,0
8609va (VaSet
8610isHidden 1
8611)
8612xt "22000,105000,26600,106000"
8613st "D1_SROUT"
8614blo "22000,105800"
8615tm "WireNameMgr"
8616)
8617)
8618on &124
8619)
8620*281 (Wire
8621uid 1881,0
8622shape (OrthoPolyLine
8623uid 1882,0
8624va (VaSet
8625vasetType 3
8626)
8627xt "21000,107000,51250,107000"
8628pts [
8629"21000,107000"
8630"51250,107000"
8631]
8632)
8633start &121
8634end &34
8635sat 32
8636eat 32
8637stc 0
8638st 0
8639sf 1
8640si 0
8641tg (WTG
8642uid 1885,0
8643ps "ConnStartEndStrategy"
8644stg "STSignalDisplayStrategy"
8645f (Text
8646uid 1886,0
8647va (VaSet
8648isHidden 1
8649)
8650xt "22000,106000,26600,107000"
8651st "D2_SROUT"
8652blo "22000,106800"
8653tm "WireNameMgr"
8654)
8655)
8656on &125
8657)
8658*282 (Wire
8659uid 1889,0
8660shape (OrthoPolyLine
8661uid 1890,0
8662va (VaSet
8663vasetType 3
8664)
8665xt "21000,108000,51250,108000"
8666pts [
8667"21000,108000"
8668"51250,108000"
8669]
8670)
8671start &122
8672end &35
8673sat 32
8674eat 32
8675stc 0
8676st 0
8677sf 1
8678si 0
8679tg (WTG
8680uid 1893,0
8681ps "ConnStartEndStrategy"
8682stg "STSignalDisplayStrategy"
8683f (Text
8684uid 1894,0
8685va (VaSet
8686isHidden 1
8687)
8688xt "22000,107000,26600,108000"
8689st "D3_SROUT"
8690blo "22000,107800"
8691tm "WireNameMgr"
8692)
8693)
8694on &126
8695)
8696*283 (Wire
8697uid 2409,0
8698shape (OrthoPolyLine
8699uid 2410,0
8700va (VaSet
8701vasetType 3
8702)
8703xt "21000,111000,51250,111000"
8704pts [
8705"51250,111000"
8706"21000,111000"
8707]
8708)
8709start &36
8710end &82
8711sat 32
8712eat 32
8713stc 0
8714st 0
8715sf 1
8716si 0
8717tg (WTG
8718uid 2413,0
8719ps "ConnStartEndStrategy"
8720stg "STSignalDisplayStrategy"
8721f (Text
8722uid 2414,0
8723va (VaSet
8724isHidden 1
8725)
8726xt "22000,110000,26200,111000"
8727st "RSRLOAD"
8728blo "22000,110800"
8729tm "WireNameMgr"
8730)
8731)
8732on &81
8733)
8734*284 (Wire
8735uid 2423,0
8736shape (OrthoPolyLine
8737uid 2424,0
8738va (VaSet
8739vasetType 3
8740)
8741xt "32000,113000,51250,113000"
8742pts [
8743"51250,113000"
8744"32000,113000"
8745]
8746)
8747start &37
8748end &111
8749sat 32
8750eat 1
8751stc 0
8752st 0
8753sf 1
8754si 0
8755tg (WTG
8756uid 2427,0
8757ps "ConnStartEndStrategy"
8758stg "STSignalDisplayStrategy"
8759f (Text
8760uid 2428,0
8761va (VaSet
8762isHidden 1
8763)
8764xt "66250,109000,69250,110000"
8765st "SRCLK"
8766blo "66250,109800"
8767tm "WireNameMgr"
8768)
8769)
8770on &83
8771)
8772*285 (Wire
8773uid 3009,0
8774shape (OrthoPolyLine
8775uid 3010,0
8776va (VaSet
8777vasetType 3
8778)
8779xt "80750,98000,111000,98000"
8780pts [
8781"80750,98000"
8782"111000,98000"
8783]
8784)
8785start &39
8786end &144
8787sat 32
8788eat 32
8789stc 0
8790st 0
8791sf 1
8792si 0
8793tg (WTG
8794uid 3011,0
8795ps "ConnStartEndStrategy"
8796stg "STSignalDisplayStrategy"
8797f (Text
8798uid 3012,0
8799va (VaSet
8800isHidden 1
8801)
8802xt "82000,97000,84800,98000"
8803st "S_CLK"
8804blo "82000,97800"
8805tm "WireNameMgr"
8806)
8807)
8808on &145
8809)
8810*286 (Wire
8811uid 3015,0
8812shape (OrthoPolyLine
8813uid 3016,0
8814va (VaSet
8815vasetType 3
8816)
8817xt "80750,99000,111000,99000"
8818pts [
8819"80750,99000"
8820"111000,99000"
8821]
8822)
8823start &41
8824end &153
8825sat 32
8826eat 32
8827stc 0
8828st 0
8829sf 1
8830si 0
8831tg (WTG
8832uid 3017,0
8833ps "ConnStartEndStrategy"
8834stg "STSignalDisplayStrategy"
8835f (Text
8836uid 3018,0
8837va (VaSet
8838isHidden 1
8839)
8840xt "82750,98000,85150,99000"
8841st "MISO"
8842blo "82750,98800"
8843tm "WireNameMgr"
8844)
8845)
8846on &156
8847)
8848*287 (Wire
8849uid 3021,0
8850shape (OrthoPolyLine
8851uid 3022,0
8852va (VaSet
8853vasetType 3
8854lineWidth 2
8855)
8856xt "80750,89000,100000,89000"
8857pts [
8858"80750,89000"
8859"100000,89000"
8860]
8861)
8862start &40
8863end &132
8864sat 32
8865eat 1
8866sty 1
8867st 0
8868sf 1
8869si 0
8870tg (WTG
8871uid 3023,0
8872ps "ConnStartEndStrategy"
8873stg "STSignalDisplayStrategy"
8874f (Text
8875uid 3024,0
8876va (VaSet
8877)
8878xt "92000,88000,98500,89000"
8879st "sensor_cs : (3:0)"
8880blo "92000,88800"
8881tm "WireNameMgr"
8882)
8883)
8884on &84
8885)
8886*288 (Wire
8887uid 3027,0
8888shape (OrthoPolyLine
8889uid 3028,0
8890va (VaSet
8891vasetType 3
8892)
8893xt "94000,87000,111000,87000"
8894pts [
8895"94000,87000"
8896"111000,87000"
8897]
8898)
8899start &195
8900end &131
8901ss 0
8902sat 32
8903eat 32
8904stc 0
8905st 0
8906sf 1
8907si 0
8908tg (WTG
8909uid 3031,0
8910ps "ConnStartEndStrategy"
8911stg "STSignalDisplayStrategy"
8912f (Text
8913uid 3032,0
8914va (VaSet
8915isHidden 1
8916)
8917xt "95000,86000,98600,87000"
8918st "DAC_CS"
8919blo "95000,86800"
8920tm "WireNameMgr"
8921)
8922)
8923on &85
8924)
8925*289 (Wire
8926uid 3218,0
8927shape (OrthoPolyLine
8928uid 3219,0
8929va (VaSet
8930vasetType 3
8931)
8932xt "22000,78000,51250,78000"
8933pts [
8934"22000,78000"
8935"51250,78000"
8936]
8937)
8938start &65
8939end &15
8940sat 32
8941eat 32
8942stc 0
8943st 0
8944sf 1
8945si 0
8946tg (WTG
8947uid 3220,0
8948ps "ConnStartEndStrategy"
8949stg "STSignalDisplayStrategy"
8950f (Text
8951uid 3221,0
8952va (VaSet
8953isHidden 1
8954)
8955xt "33000,77000,35100,78000"
8956st "TRG"
8957blo "33000,77800"
8958tm "WireNameMgr"
8959)
8960)
8961on &88
8962)
8963*290 (Wire
8964uid 3260,0
8965shape (OrthoPolyLine
8966uid 3261,0
8967va (VaSet
8968vasetType 3
8969lineWidth 2
8970)
8971xt "21000,70000,24000,70000"
8972pts [
8973"21000,70000"
8974"24000,70000"
8975]
8976)
8977start &86
8978end &89
8979sat 32
8980eat 2
8981sty 1
8982stc 0
8983st 0
8984sf 1
8985si 0
8986tg (WTG
8987uid 3264,0
8988ps "ConnStartEndStrategy"
8989stg "STSignalDisplayStrategy"
8990f (Text
8991uid 3265,0
8992va (VaSet
8993isHidden 1
8994)
8995xt "23000,69000,25800,70000"
8996st "A_CLK"
8997blo "23000,69800"
8998tm "WireNameMgr"
8999)
9000)
9001on &93
9002)
9003*291 (Wire
9004uid 3270,0
9005shape (OrthoPolyLine
9006uid 3271,0
9007va (VaSet
9008vasetType 3
9009)
9010xt "29000,70000,43000,72000"
9011pts [
9012"43000,72000"
9013"43000,70000"
9014"32000,70000"
9015"29000,70000"
9016]
9017)
9018start &208
9019end &89
9020sat 32
9021eat 1
9022st 0
9023sf 1
9024si 0
9025tg (WTG
9026uid 3274,0
9027ps "ConnStartEndStrategy"
9028stg "STSignalDisplayStrategy"
9029f (Text
9030uid 3275,0
9031va (VaSet
9032)
9033xt "35000,69000,39500,70000"
9034st "CLK_25_PS"
9035blo "35000,69800"
9036tm "WireNameMgr"
9037)
9038)
9039on &94
9040)
9041*292 (Wire
9042uid 3318,0
9043shape (OrthoPolyLine
9044uid 3319,0
9045va (VaSet
9046vasetType 3
9047lineWidth 2
9048)
9049xt "21000,95000,24000,95000"
9050pts [
9051"21000,95000"
9052"24000,95000"
9053]
9054)
9055start &103
9056end &99
9057sat 32
9058eat 1
9059sty 1
9060stc 0
9061st 0
9062sf 1
9063si 0
9064tg (WTG
9065uid 3322,0
9066ps "ConnStartEndStrategy"
9067stg "STSignalDisplayStrategy"
9068f (Text
9069uid 3323,0
9070va (VaSet
9071isHidden 1
9072)
9073xt "23000,94000,25300,95000"
9074st "A0_D"
9075blo "23000,94800"
9076tm "WireNameMgr"
9077)
9078)
9079on &107
9080)
9081*293 (Wire
9082uid 3352,0
9083shape (OrthoPolyLine
9084uid 3353,0
9085va (VaSet
9086vasetType 3
9087lineWidth 2
9088)
9089xt "21000,96000,24000,96000"
9090pts [
9091"21000,96000"
9092"24000,96000"
9093]
9094)
9095start &104
9096end &99
9097sat 32
9098eat 1
9099sty 1
9100stc 0
9101st 0
9102sf 1
9103si 0
9104tg (WTG
9105uid 3356,0
9106ps "ConnStartEndStrategy"
9107stg "STSignalDisplayStrategy"
9108f (Text
9109uid 3357,0
9110va (VaSet
9111isHidden 1
9112)
9113xt "23000,95000,25300,96000"
9114st "A1_D"
9115blo "23000,95800"
9116tm "WireNameMgr"
9117)
9118)
9119on &108
9120)
9121*294 (Wire
9122uid 3360,0
9123shape (OrthoPolyLine
9124uid 3361,0
9125va (VaSet
9126vasetType 3
9127lineWidth 2
9128)
9129xt "21000,97000,24000,97000"
9130pts [
9131"21000,97000"
9132"24000,97000"
9133]
9134)
9135start &105
9136end &99
9137sat 32
9138eat 1
9139sty 1
9140stc 0
9141st 0
9142sf 1
9143si 0
9144tg (WTG
9145uid 3364,0
9146ps "ConnStartEndStrategy"
9147stg "STSignalDisplayStrategy"
9148f (Text
9149uid 3365,0
9150va (VaSet
9151isHidden 1
9152)
9153xt "23000,96000,25300,97000"
9154st "A2_D"
9155blo "23000,96800"
9156tm "WireNameMgr"
9157)
9158)
9159on &109
9160)
9161*295 (Wire
9162uid 3368,0
9163shape (OrthoPolyLine
9164uid 3369,0
9165va (VaSet
9166vasetType 3
9167lineWidth 2
9168)
9169xt "21000,98000,24000,98000"
9170pts [
9171"21000,98000"
9172"24000,98000"
9173]
9174)
9175start &106
9176end &99
9177sat 32
9178eat 1
9179sty 1
9180stc 0
9181st 0
9182sf 1
9183si 0
9184tg (WTG
9185uid 3372,0
9186ps "ConnStartEndStrategy"
9187stg "STSignalDisplayStrategy"
9188f (Text
9189uid 3373,0
9190va (VaSet
9191isHidden 1
9192)
9193xt "23000,97000,25300,98000"
9194st "A3_D"
9195blo "23000,97800"
9196tm "WireNameMgr"
9197)
9198)
9199on &110
9200)
9201*296 (Wire
9202uid 3430,0
9203shape (OrthoPolyLine
9204uid 3431,0
9205va (VaSet
9206vasetType 3
9207)
9208xt "21000,113000,24000,113000"
9209pts [
9210"21000,113000"
9211"24000,113000"
9212]
9213)
9214start &175
9215end &111
9216sat 32
9217eat 2
9218stc 0
9219st 0
9220sf 1
9221si 0
9222tg (WTG
9223uid 3434,0
9224ps "ConnStartEndStrategy"
9225stg "STSignalDisplayStrategy"
9226f (Text
9227uid 3435,0
9228va (VaSet
9229isHidden 1
9230)
9231xt "23000,112000,27400,113000"
9232st "D0_SRCLK"
9233blo "23000,112800"
9234tm "WireNameMgr"
9235)
9236)
9237on &115
9238)
9239*297 (Wire
9240uid 3438,0
9241shape (OrthoPolyLine
9242uid 3439,0
9243va (VaSet
9244vasetType 3
9245)
9246xt "21000,114000,24000,114000"
9247pts [
9248"21000,114000"
9249"24000,114000"
9250]
9251)
9252start &176
9253end &111
9254sat 32
9255eat 2
9256stc 0
9257st 0
9258sf 1
9259si 0
9260tg (WTG
9261uid 3442,0
9262ps "ConnStartEndStrategy"
9263stg "STSignalDisplayStrategy"
9264f (Text
9265uid 3443,0
9266va (VaSet
9267isHidden 1
9268)
9269xt "23000,113000,27400,114000"
9270st "D1_SRCLK"
9271blo "23000,113800"
9272tm "WireNameMgr"
9273)
9274)
9275on &116
9276)
9277*298 (Wire
9278uid 3446,0
9279shape (OrthoPolyLine
9280uid 3447,0
9281va (VaSet
9282vasetType 3
9283)
9284xt "21000,115000,24000,115000"
9285pts [
9286"21000,115000"
9287"24000,115000"
9288]
9289)
9290start &177
9291end &111
9292sat 32
9293eat 2
9294stc 0
9295st 0
9296sf 1
9297si 0
9298tg (WTG
9299uid 3450,0
9300ps "ConnStartEndStrategy"
9301stg "STSignalDisplayStrategy"
9302f (Text
9303uid 3451,0
9304va (VaSet
9305isHidden 1
9306)
9307xt "23000,114000,27400,115000"
9308st "D2_SRCLK"
9309blo "23000,114800"
9310tm "WireNameMgr"
9311)
9312)
9313on &117
9314)
9315*299 (Wire
9316uid 3454,0
9317shape (OrthoPolyLine
9318uid 3455,0
9319va (VaSet
9320vasetType 3
9321)
9322xt "21000,116000,24000,116000"
9323pts [
9324"21000,116000"
9325"24000,116000"
9326]
9327)
9328start &178
9329end &111
9330sat 32
9331eat 2
9332stc 0
9333st 0
9334sf 1
9335si 0
9336tg (WTG
9337uid 3458,0
9338ps "ConnStartEndStrategy"
9339stg "STSignalDisplayStrategy"
9340f (Text
9341uid 3459,0
9342va (VaSet
9343isHidden 1
9344)
9345xt "23000,115000,27400,116000"
9346st "D3_SRCLK"
9347blo "23000,115800"
9348tm "WireNameMgr"
9349)
9350)
9351on &118
9352)
9353*300 (Wire
9354uid 3574,0
9355shape (OrthoPolyLine
9356uid 3575,0
9357va (VaSet
9358vasetType 3
9359)
9360xt "108000,89000,111000,89000"
9361pts [
9362"111000,89000"
9363"108000,89000"
9364]
9365)
9366start &136
9367end &132
9368sat 32
9369eat 2
9370stc 0
9371st 0
9372sf 1
9373si 0
9374tg (WTG
9375uid 3578,0
9376ps "ConnStartEndStrategy"
9377stg "STSignalDisplayStrategy"
9378f (Text
9379uid 3579,0
9380va (VaSet
9381isHidden 1
9382)
9383xt "108000,88000,110800,89000"
9384st "T0_CS"
9385blo "108000,88800"
9386tm "WireNameMgr"
9387)
9388)
9389on &140
9390)
9391*301 (Wire
9392uid 3582,0
9393shape (OrthoPolyLine
9394uid 3583,0
9395va (VaSet
9396vasetType 3
9397)
9398xt "108000,90000,111000,90000"
9399pts [
9400"111000,90000"
9401"108000,90000"
9402]
9403)
9404start &137
9405end &132
9406sat 32
9407eat 2
9408stc 0
9409st 0
9410sf 1
9411si 0
9412tg (WTG
9413uid 3586,0
9414ps "ConnStartEndStrategy"
9415stg "STSignalDisplayStrategy"
9416f (Text
9417uid 3587,0
9418va (VaSet
9419isHidden 1
9420)
9421xt "108000,89000,110800,90000"
9422st "T1_CS"
9423blo "108000,89800"
9424tm "WireNameMgr"
9425)
9426)
9427on &141
9428)
9429*302 (Wire
9430uid 3590,0
9431shape (OrthoPolyLine
9432uid 3591,0
9433va (VaSet
9434vasetType 3
9435)
9436xt "108000,91000,111000,91000"
9437pts [
9438"111000,91000"
9439"108000,91000"
9440]
9441)
9442start &138
9443end &132
9444sat 32
9445eat 2
9446stc 0
9447st 0
9448sf 1
9449si 0
9450tg (WTG
9451uid 3594,0
9452ps "ConnStartEndStrategy"
9453stg "STSignalDisplayStrategy"
9454f (Text
9455uid 3595,0
9456va (VaSet
9457isHidden 1
9458)
9459xt "108000,90000,110800,91000"
9460st "T2_CS"
9461blo "108000,90800"
9462tm "WireNameMgr"
9463)
9464)
9465on &142
9466)
9467*303 (Wire
9468uid 3598,0
9469shape (OrthoPolyLine
9470uid 3599,0
9471va (VaSet
9472vasetType 3
9473)
9474xt "108000,92000,111000,92000"
9475pts [
9476"111000,92000"
9477"108000,92000"
9478]
9479)
9480start &139
9481end &132
9482sat 32
9483eat 2
9484stc 0
9485st 0
9486sf 1
9487si 0
9488tg (WTG
9489uid 3602,0
9490ps "ConnStartEndStrategy"
9491stg "STSignalDisplayStrategy"
9492f (Text
9493uid 3603,0
9494va (VaSet
9495isHidden 1
9496)
9497xt "108000,91000,110800,92000"
9498st "T3_CS"
9499blo "108000,91800"
9500tm "WireNameMgr"
9501)
9502)
9503on &143
9504)
9505*304 (Wire
9506uid 3682,0
9507shape (OrthoPolyLine
9508uid 3683,0
9509va (VaSet
9510vasetType 3
9511)
9512xt "80750,100000,111000,100000"
9513pts [
9514"80750,100000"
9515"111000,100000"
9516]
9517)
9518start &42
9519end &155
9520sat 32
9521eat 32
9522stc 0
9523st 0
9524sf 1
9525si 0
9526tg (WTG
9527uid 3686,0
9528ps "ConnStartEndStrategy"
9529stg "STSignalDisplayStrategy"
9530f (Text
9531uid 3687,0
9532va (VaSet
9533isHidden 1
9534)
9535xt "82000,99000,84400,100000"
9536st "MOSI"
9537blo "82000,99800"
9538tm "WireNameMgr"
9539)
9540)
9541on &154
9542)
9543*305 (Wire
9544uid 3778,0
9545shape (OrthoPolyLine
9546uid 3779,0
9547va (VaSet
9548vasetType 3
9549)
9550xt "80750,144000,91000,144000"
9551pts [
9552"91000,144000"
9553"80750,144000"
9554]
9555)
9556start &161
9557end &61
9558es 0
9559sat 32
9560eat 32
9561stc 0
9562st 0
9563sf 1
9564si 0
9565tg (WTG
9566uid 3782,0
9567ps "ConnStartEndStrategy"
9568stg "STSignalDisplayStrategy"
9569f (Text
9570uid 3783,0
9571va (VaSet
9572isHidden 1
9573)
9574xt "81000,143000,84000,144000"
9575st "TRG_V"
9576blo "81000,143800"
9577tm "WireNameMgr"
9578)
9579)
9580on &168
9581)
9582*306 (Wire
9583uid 3786,0
9584shape (OrthoPolyLine
9585uid 3787,0
9586va (VaSet
9587vasetType 3
9588)
9589xt "108000,104000,111000,104000"
9590pts [
9591"111000,104000"
9592"108000,104000"
9593]
9594)
9595start &162
9596end &157
9597sat 32
9598eat 2
9599stc 0
9600st 0
9601sf 1
9602si 0
9603tg (WTG
9604uid 3790,0
9605ps "ConnStartEndStrategy"
9606stg "STSignalDisplayStrategy"
9607f (Text
9608uid 3791,0
9609va (VaSet
9610isHidden 1
9611)
9612xt "108000,103000,113600,104000"
9613st "RS485_C_RE"
9614blo "108000,103800"
9615tm "WireNameMgr"
9616)
9617)
9618on &169
9619)
9620*307 (Wire
9621uid 3794,0
9622shape (OrthoPolyLine
9623uid 3795,0
9624va (VaSet
9625vasetType 3
9626)
9627xt "108000,105000,111000,105000"
9628pts [
9629"111000,105000"
9630"108000,105000"
9631]
9632)
9633start &163
9634end &157
9635sat 32
9636eat 2
9637stc 0
9638st 0
9639sf 1
9640si 0
9641tg (WTG
9642uid 3798,0
9643ps "ConnStartEndStrategy"
9644stg "STSignalDisplayStrategy"
9645f (Text
9646uid 3799,0
9647va (VaSet
9648isHidden 1
9649)
9650xt "108000,104000,113600,105000"
9651st "RS485_C_DE"
9652blo "108000,104800"
9653tm "WireNameMgr"
9654)
9655)
9656on &170
9657)
9658*308 (Wire
9659uid 3802,0
9660shape (OrthoPolyLine
9661uid 3803,0
9662va (VaSet
9663vasetType 3
9664)
9665xt "136000,150000,139000,150000"
9666pts [
9667"139000,150000"
9668"136000,150000"
9669]
9670)
9671start &164
9672sat 32
9673eat 16
9674stc 0
9675st 0
9676sf 1
9677si 0
9678tg (WTG
9679uid 3806,0
9680ps "ConnStartEndStrategy"
9681stg "STSignalDisplayStrategy"
9682f (Text
9683uid 3807,0
9684va (VaSet
9685isHidden 1
9686)
9687xt "136000,149000,141500,150000"
9688st "RS485_E_RE"
9689blo "136000,149800"
9690tm "WireNameMgr"
9691)
9692)
9693on &171
9694)
9695*309 (Wire
9696uid 3810,0
9697shape (OrthoPolyLine
9698uid 3811,0
9699va (VaSet
9700vasetType 3
9701)
9702xt "134000,149000,137000,149000"
9703pts [
9704"137000,149000"
9705"134000,149000"
9706]
9707)
9708start &165
9709sat 32
9710eat 16
9711stc 0
9712st 0
9713sf 1
9714si 0
9715tg (WTG
9716uid 3814,0
9717ps "ConnStartEndStrategy"
9718stg "STSignalDisplayStrategy"
9719f (Text
9720uid 3815,0
9721va (VaSet
9722isHidden 1
9723)
9724xt "134000,148000,139500,149000"
9725st "RS485_E_DE"
9726blo "134000,148800"
9727tm "WireNameMgr"
9728)
9729)
9730on &172
9731)
9732*310 (Wire
9733uid 3834,0
9734shape (OrthoPolyLine
9735uid 3835,0
9736va (VaSet
9737vasetType 3
9738)
9739xt "108000,110000,111000,110000"
9740pts [
9741"111000,110000"
9742"108000,110000"
9743]
9744)
9745start &167
9746end &157
9747sat 32
9748eat 2
9749stc 0
9750st 0
9751sf 1
9752si 0
9753tg (WTG
9754uid 3838,0
9755ps "ConnStartEndStrategy"
9756stg "STSignalDisplayStrategy"
9757f (Text
9758uid 3839,0
9759va (VaSet
9760isHidden 1
9761)
9762xt "108000,109000,110900,110000"
9763st "EE_CS"
9764blo "108000,109800"
9765tm "WireNameMgr"
9766)
9767)
9768on &174
9769)
9770*311 (Wire
9771uid 4942,0
9772shape (OrthoPolyLine
9773uid 4943,0
9774va (VaSet
9775vasetType 3
9776lineWidth 2
9777)
9778xt "80750,120000,111000,120000"
9779pts [
9780"80750,120000"
9781"111000,120000"
9782]
9783)
9784start &14
9785end &179
9786sat 32
9787eat 32
9788sty 1
9789stc 0
9790st 0
9791sf 1
9792si 0
9793tg (WTG
9794uid 4948,0
9795ps "ConnStartEndStrategy"
9796stg "STSignalDisplayStrategy"
9797f (Text
9798uid 4949,0
9799va (VaSet
9800isHidden 1
9801)
9802xt "82750,117000,84650,118000"
9803st "D_T"
9804blo "82750,117800"
9805tm "WireNameMgr"
9806)
9807)
9808on &180
9809)
9810*312 (Wire
9811uid 6431,0
9812shape (OrthoPolyLine
9813uid 6432,0
9814va (VaSet
9815vasetType 3
9816)
9817xt "80750,121000,111000,121000"
9818pts [
9819"80750,121000"
9820"111000,121000"
9821]
9822)
9823start &43
9824end &166
9825sat 32
9826eat 32
9827stc 0
9828st 0
9829sf 1
9830si 0
9831tg (WTG
9832uid 6435,0
9833ps "ConnStartEndStrategy"
9834stg "STSignalDisplayStrategy"
9835f (Text
9836uid 6436,0
9837va (VaSet
9838isHidden 1
9839)
9840xt "92000,120000,96000,121000"
9841st "DENABLE"
9842blo "92000,120800"
9843tm "WireNameMgr"
9844)
9845)
9846on &173
9847)
9848*313 (Wire
9849uid 7144,0
9850shape (OrthoPolyLine
9851uid 7145,0
9852va (VaSet
9853vasetType 3
9854lineWidth 2
9855)
9856xt "126000,139000,135000,139000"
9857pts [
9858"126000,139000"
9859"135000,139000"
9860]
9861)
9862start &229
9863end &189
9864sat 2
9865eat 32
9866sty 1
9867st 0
9868sf 1
9869si 0
9870tg (WTG
9871uid 7148,0
9872ps "ConnStartEndStrategy"
9873stg "STSignalDisplayStrategy"
9874f (Text
9875uid 7149,0
9876va (VaSet
9877isHidden 1
9878)
9879xt "131000,151000,135800,152000"
9880st "A1_T : (7:0)"
9881blo "131000,151800"
9882tm "WireNameMgr"
9883)
9884)
9885on &190
9886)
9887*314 (Wire
9888uid 7477,0
9889shape (OrthoPolyLine
9890uid 7478,0
9891va (VaSet
9892vasetType 3
9893)
9894xt "80750,87000,91000,87000"
9895pts [
9896"80750,87000"
9897"91000,87000"
9898]
9899)
9900start &38
9901end &193
9902es 0
9903sat 32
9904eat 32
9905st 0
9906sf 1
9907si 0
9908tg (WTG
9909uid 7483,0
9910ps "ConnStartEndStrategy"
9911stg "STSignalDisplayStrategy"
9912f (Text
9913uid 7484,0
9914va (VaSet
9915)
9916xt "83000,86000,85700,87000"
9917st "dummy"
9918blo "83000,86800"
9919tm "WireNameMgr"
9920)
9921)
9922on &191
9923)
9924*315 (Wire
9925uid 8853,0
9926shape (OrthoPolyLine
9927uid 8854,0
9928va (VaSet
9929vasetType 3
9930lineWidth 2
9931)
9932xt "18000,109000,51250,124000"
9933pts [
9934"51250,109000"
9935"18000,109000"
9936"18000,124000"
9937"21000,124000"
9938]
9939)
9940start &30
9941end &185
9942sat 32
9943eat 1
9944sty 1
9945st 0
9946sf 1
9947si 0
9948tg (WTG
9949uid 8857,0
9950ps "ConnStartEndStrategy"
9951stg "STSignalDisplayStrategy"
9952f (Text
9953uid 8858,0
9954va (VaSet
9955)
9956xt "42000,108000,50500,109000"
9957st "drs_channel_id : (3:0)"
9958blo "42000,108800"
9959tm "WireNameMgr"
9960)
9961)
9962on &205
9963)
9964*316 (Wire
9965uid 9502,0
9966shape (OrthoPolyLine
9967uid 9503,0
9968va (VaSet
9969vasetType 3
9970)
9971xt "46000,69000,51250,69000"
9972pts [
9973"51250,69000"
9974"46000,69000"
9975]
9976)
9977start &26
9978sat 32
9979eat 16
9980st 0
9981sf 1
9982si 0
9983tg (WTG
9984uid 9506,0
9985ps "ConnStartEndStrategy"
9986stg "STSignalDisplayStrategy"
9987f (Text
9988uid 9507,0
9989va (VaSet
9990)
9991xt "47000,68000,50100,69000"
9992st "CLK_50"
9993blo "47000,68800"
9994tm "WireNameMgr"
9995)
9996)
9997on &206
9998)
9999*317 (Wire
10000uid 10034,0
10001shape (OrthoPolyLine
10002uid 10035,0
10003va (VaSet
10004vasetType 3
10005)
10006xt "49000,70000,51250,71000"
10007pts [
10008"51250,70000"
10009"49000,70000"
10010"49000,71000"
10011]
10012)
10013start &25
10014end &213
10015sat 32
10016eat 32
10017st 0
10018sf 1
10019si 0
10020tg (WTG
10021uid 10036,0
10022ps "ConnStartEndStrategy"
10023stg "STSignalDisplayStrategy"
10024f (Text
10025uid 10037,0
10026va (VaSet
10027isHidden 1
10028)
10029xt "45250,69000,50550,70000"
10030st "CLK_25_PS1"
10031blo "45250,69800"
10032tm "WireNameMgr"
10033)
10034)
10035on &225
10036)
10037*318 (Wire
10038uid 10052,0
10039shape (OrthoPolyLine
10040uid 10053,0
10041va (VaSet
10042vasetType 3
10043)
10044xt "49000,73000,51250,73000"
10045pts [
10046"51250,73000"
10047"49000,73000"
10048]
10049)
10050start &44
10051end &211
10052sat 32
10053eat 32
10054st 0
10055sf 1
10056si 0
10057tg (WTG
10058uid 10054,0
10059ps "ConnStartEndStrategy"
10060stg "STSignalDisplayStrategy"
10061f (Text
10062uid 10055,0
10063va (VaSet
10064isHidden 1
10065)
10066xt "47000,72000,51500,73000"
10067st "adc_clk_en"
10068blo "47000,72800"
10069tm "WireNameMgr"
10070)
10071)
10072on &226
10073)
10074*319 (Wire
10075uid 10302,0
10076shape (OrthoPolyLine
10077uid 10303,0
10078va (VaSet
10079vasetType 3
10080lineWidth 2
10081)
10082xt "126000,148000,131000,148000"
10083pts [
10084"126000,148000"
10085"131000,148000"
10086]
10087)
10088start &229
10089end &227
10090sat 2
10091eat 32
10092sty 1
10093st 0
10094sf 1
10095si 0
10096tg (WTG
10097uid 10306,0
10098ps "ConnStartEndStrategy"
10099stg "STSignalDisplayStrategy"
10100f (Text
10101uid 10307,0
10102va (VaSet
10103isHidden 1
10104)
10105xt "127000,167000,131800,168000"
10106st "A0_T : (7:0)"
10107blo "127000,167800"
10108tm "WireNameMgr"
10109)
10110)
10111on &228
10112)
10113*320 (Wire
10114uid 10498,0
10115shape (OrthoPolyLine
10116uid 10499,0
10117va (VaSet
10118vasetType 3
10119)
10120xt "80750,123000,88000,123000"
10121pts [
10122"80750,123000"
10123"88000,123000"
10124]
10125)
10126start &56
10127sat 32
10128eat 16
10129st 0
10130sf 1
10131si 0
10132tg (WTG
10133uid 10502,0
10134ps "ConnStartEndStrategy"
10135stg "STSignalDisplayStrategy"
10136f (Text
10137uid 10503,0
10138va (VaSet
10139)
10140xt "82000,122000,86800,123000"
10141st "CLK50_OUT"
10142blo "82000,122800"
10143tm "WireNameMgr"
10144)
10145)
10146on &233
10147)
10148*321 (Wire
10149uid 10506,0
10150shape (OrthoPolyLine
10151uid 10507,0
10152va (VaSet
10153vasetType 3
10154)
10155xt "80750,124000,88000,124000"
10156pts [
10157"80750,124000"
10158"88000,124000"
10159]
10160)
10161start &54
10162sat 32
10163eat 16
10164st 0
10165sf 1
10166si 0
10167tg (WTG
10168uid 10510,0
10169ps "ConnStartEndStrategy"
10170stg "STSignalDisplayStrategy"
10171f (Text
10172uid 10511,0
10173va (VaSet
10174)
10175xt "82000,123000,86800,124000"
10176st "CLK25_OUT"
10177blo "82000,123800"
10178tm "WireNameMgr"
10179)
10180)
10181on &234
10182)
10183*322 (Wire
10184uid 10514,0
10185shape (OrthoPolyLine
10186uid 10515,0
10187va (VaSet
10188vasetType 3
10189)
10190xt "80750,125000,89000,125000"
10191pts [
10192"80750,125000"
10193"89000,125000"
10194]
10195)
10196start &55
10197sat 32
10198eat 16
10199st 0
10200sf 1
10201si 0
10202tg (WTG
10203uid 10518,0
10204ps "ConnStartEndStrategy"
10205stg "STSignalDisplayStrategy"
10206f (Text
10207uid 10519,0
10208va (VaSet
10209)
10210xt "82000,124000,88200,125000"
10211st "CLK25_PSOUT"
10212blo "82000,124800"
10213tm "WireNameMgr"
10214)
10215)
10216on &235
10217)
10218*323 (Wire
10219uid 10522,0
10220shape (OrthoPolyLine
10221uid 10523,0
10222va (VaSet
10223vasetType 3
10224)
10225xt "80750,126000,87000,126000"
10226pts [
10227"80750,126000"
10228"87000,126000"
10229]
10230)
10231start &48
10232sat 32
10233eat 16
10234st 0
10235sf 1
10236si 0
10237tg (WTG
10238uid 10526,0
10239ps "ConnStartEndStrategy"
10240stg "STSignalDisplayStrategy"
10241f (Text
10242uid 10527,0
10243va (VaSet
10244)
10245xt "82000,125000,86400,126000"
10246st "PS_DIR_IN"
10247blo "82000,125800"
10248tm "WireNameMgr"
10249)
10250)
10251on &236
10252)
10253*324 (Wire
10254uid 10546,0
10255shape (OrthoPolyLine
10256uid 10547,0
10257va (VaSet
10258vasetType 3
10259)
10260xt "80750,128000,90000,128000"
10261pts [
10262"80750,128000"
10263"90000,128000"
10264]
10265)
10266start &51
10267sat 32
10268eat 16
10269st 0
10270sf 1
10271si 0
10272tg (WTG
10273uid 10550,0
10274ps "ConnStartEndStrategy"
10275stg "STSignalDisplayStrategy"
10276f (Text
10277uid 10551,0
10278va (VaSet
10279)
10280xt "82000,127000,89000,128000"
10281st "PSINCDEC_OUT"
10282blo "82000,127800"
10283tm "WireNameMgr"
10284)
10285)
10286on &237
10287)
10288*325 (Wire
10289uid 10554,0
10290shape (OrthoPolyLine
10291uid 10555,0
10292va (VaSet
10293vasetType 3
10294)
10295xt "80750,130000,88000,130000"
10296pts [
10297"80750,130000"
10298"88000,130000"
10299]
10300)
10301start &45
10302sat 32
10303eat 16
10304st 0
10305sf 1
10306si 0
10307tg (WTG
10308uid 10558,0
10309ps "ConnStartEndStrategy"
10310stg "STSignalDisplayStrategy"
10311f (Text
10312uid 10559,0
10313va (VaSet
10314)
10315xt "82000,129000,87200,130000"
10316st "DCM_locked"
10317blo "82000,129800"
10318tm "WireNameMgr"
10319)
10320)
10321on &238
10322)
10323*326 (Wire
10324uid 10562,0
10325shape (OrthoPolyLine
10326uid 10563,0
10327va (VaSet
10328vasetType 3
10329)
10330xt "80750,132000,85000,132000"
10331pts [
10332"80750,132000"
10333"85000,132000"
10334]
10335)
10336start &52
10337sat 32
10338eat 16
10339st 0
10340sf 1
10341si 0
10342tg (WTG
10343uid 10566,0
10344ps "ConnStartEndStrategy"
10345stg "STSignalDisplayStrategy"
10346f (Text
10347uid 10567,0
10348va (VaSet
10349)
10350xt "82000,131000,84200,132000"
10351st "ready"
10352blo "82000,131800"
10353tm "WireNameMgr"
10354)
10355)
10356on &239
10357)
10358*327 (Wire
10359uid 10570,0
10360shape (OrthoPolyLine
10361uid 10571,0
10362va (VaSet
10363vasetType 3
10364)
10365xt "80750,133000,86000,133000"
10366pts [
10367"80750,133000"
10368"86000,133000"
10369]
10370)
10371start &53
10372sat 32
10373eat 16
10374st 0
10375sf 1
10376si 0
10377tg (WTG
10378uid 10574,0
10379ps "ConnStartEndStrategy"
10380stg "STSignalDisplayStrategy"
10381f (Text
10382uid 10575,0
10383va (VaSet
10384)
10385xt "82000,132000,84900,133000"
10386st "shifting"
10387blo "82000,132800"
10388tm "WireNameMgr"
10389)
10390)
10391on &240
10392)
10393*328 (Wire
10394uid 10578,0
10395shape (OrthoPolyLine
10396uid 10579,0
10397va (VaSet
10398vasetType 3
10399)
10400xt "80750,134000,91000,134000"
10401pts [
10402"80750,134000"
10403"91000,134000"
10404]
10405)
10406start &50
10407sat 32
10408eat 16
10409st 0
10410sf 1
10411si 0
10412tg (WTG
10413uid 10582,0
10414ps "ConnStartEndStrategy"
10415stg "STSignalDisplayStrategy"
10416f (Text
10417uid 10583,0
10418va (VaSet
10419)
10420xt "82000,133000,89800,134000"
10421st "PSDONE_extraOUT"
10422blo "82000,133800"
10423tm "WireNameMgr"
10424)
10425)
10426on &241
10427)
10428*329 (Wire
10429uid 10586,0
10430shape (OrthoPolyLine
10431uid 10587,0
10432va (VaSet
10433vasetType 3
10434)
10435xt "80750,135000,88000,135000"
10436pts [
10437"80750,135000"
10438"88000,135000"
10439]
10440)
10441start &49
10442sat 32
10443eat 16
10444st 0
10445sf 1
10446si 0
10447tg (WTG
10448uid 10590,0
10449ps "ConnStartEndStrategy"
10450stg "STSignalDisplayStrategy"
10451f (Text
10452uid 10591,0
10453va (VaSet
10454)
10455xt "82000,134000,87000,135000"
10456st "PSCLK_OUT"
10457blo "82000,134800"
10458tm "WireNameMgr"
10459)
10460)
10461on &242
10462)
10463*330 (Wire
10464uid 10594,0
10465shape (OrthoPolyLine
10466uid 10595,0
10467va (VaSet
10468vasetType 3
10469)
10470xt "80750,136000,91000,136000"
10471pts [
10472"80750,136000"
10473"91000,136000"
10474]
10475)
10476start &46
10477sat 32
10478eat 16
10479st 0
10480sf 1
10481si 0
10482tg (WTG
10483uid 10598,0
10484ps "ConnStartEndStrategy"
10485stg "STSignalDisplayStrategy"
10486f (Text
10487uid 10599,0
10488va (VaSet
10489)
10490xt "82000,135000,89700,136000"
10491st "LOCKED_extraOUT"
10492blo "82000,135800"
10493tm "WireNameMgr"
10494)
10495)
10496on &243
10497)
10498*331 (Wire
10499uid 11096,0
10500shape (OrthoPolyLine
10501uid 11097,0
10502va (VaSet
10503vasetType 3
10504)
10505xt "96000,103000,100000,103000"
10506pts [
10507"96000,103000"
10508"100000,103000"
10509]
10510)
10511start &244
10512end &157
10513sat 32
10514eat 1
10515st 0
10516sf 1
10517si 0
10518tg (WTG
10519uid 11100,0
10520ps "ConnStartEndStrategy"
10521stg "STSignalDisplayStrategy"
10522f (Text
10523uid 11101,0
10524va (VaSet
10525isHidden 1
10526)
10527xt "126000,96000,131300,97000"
10528st "RS485_C_DI"
10529blo "126000,96800"
10530tm "WireNameMgr"
10531)
10532)
10533on &245
10534)
10535*332 (Wire
10536uid 11110,0
10537shape (OrthoPolyLine
10538uid 11111,0
10539va (VaSet
10540vasetType 3
10541)
10542xt "108000,112000,111000,112000"
10543pts [
10544"108000,112000"
10545"111000,112000"
10546]
10547)
10548start &157
10549end &246
10550sat 2
10551eat 32
10552st 0
10553sf 1
10554si 0
10555tg (WTG
10556uid 11114,0
10557ps "ConnStartEndStrategy"
10558stg "STSignalDisplayStrategy"
10559f (Text
10560uid 11115,0
10561va (VaSet
10562isHidden 1
10563)
10564xt "110000,111000,115700,112000"
10565st "RS485_C_DO"
10566blo "110000,111800"
10567tm "WireNameMgr"
10568)
10569)
10570on &247
10571)
10572*333 (Wire
10573uid 11514,0
10574shape (OrthoPolyLine
10575uid 11515,0
10576va (VaSet
10577vasetType 3
10578)
10579xt "108000,150000,112000,150000"
10580pts [
10581"108000,150000"
10582"112000,150000"
10583]
10584)
10585start &248
10586sat 32
10587eat 16
10588st 0
10589sf 1
10590si 0
10591tg (WTG
10592uid 11518,0
10593ps "ConnStartEndStrategy"
10594stg "STSignalDisplayStrategy"
10595f (Text
10596uid 11519,0
10597va (VaSet
10598isHidden 1
10599)
10600xt "110000,149000,115200,150000"
10601st "RS485_E_DI"
10602blo "110000,149800"
10603tm "WireNameMgr"
10604)
10605)
10606on &249
10607)
10608*334 (Wire
10609uid 11528,0
10610shape (OrthoPolyLine
10611uid 11529,0
10612va (VaSet
10613vasetType 3
10614)
10615xt "87000,158000,91000,158000"
10616pts [
10617"91000,158000"
10618"87000,158000"
10619]
10620)
10621end &251
10622sat 16
10623eat 32
10624st 0
10625sf 1
10626si 0
10627tg (WTG
10628uid 11532,0
10629ps "ConnStartEndStrategy"
10630stg "STSignalDisplayStrategy"
10631f (Text
10632uid 11533,0
10633va (VaSet
10634isHidden 1
10635)
10636xt "93000,157000,98600,158000"
10637st "RS485_E_DO"
10638blo "93000,157800"
10639tm "WireNameMgr"
10640)
10641)
10642on &250
10643)
10644*335 (Wire
10645uid 12320,0
10646shape (OrthoPolyLine
10647uid 12321,0
10648va (VaSet
10649vasetType 3
10650)
10651xt "80750,140000,87000,140000"
10652pts [
10653"80750,140000"
10654"87000,140000"
10655]
10656)
10657start &57
10658end &252
10659sat 32
10660eat 32
10661stc 0
10662st 0
10663sf 1
10664si 0
10665tg (WTG
10666uid 12324,0
10667ps "ConnStartEndStrategy"
10668stg "STSignalDisplayStrategy"
10669f (Text
10670uid 12325,0
10671va (VaSet
10672isHidden 1
10673)
10674xt "82000,139000,84300,140000"
10675st "SRIN"
10676blo "82000,139800"
10677tm "WireNameMgr"
10678)
10679)
10680on &253
10681)
10682*336 (Wire
10683uid 12545,0
10684shape (OrthoPolyLine
10685uid 12546,0
10686va (VaSet
10687vasetType 3
10688)
10689xt "80750,141000,87000,141000"
10690pts [
10691"80750,141000"
10692"87000,141000"
10693]
10694)
10695start &58
10696end &254
10697ss 0
10698sat 32
10699eat 32
10700st 0
10701sf 1
10702si 0
10703tg (WTG
10704uid 12549,0
10705ps "ConnStartEndStrategy"
10706stg "STSignalDisplayStrategy"
10707f (Text
10708uid 12550,0
10709va (VaSet
10710isHidden 1
10711)
10712xt "83000,140000,88100,141000"
10713st "AMBER_LED"
10714blo "83000,140800"
10715tm "WireNameMgr"
10716)
10717)
10718on &257
10719)
10720*337 (Wire
10721uid 12559,0
10722shape (OrthoPolyLine
10723uid 12560,0
10724va (VaSet
10725vasetType 3
10726)
10727xt "80750,142000,87000,143000"
10728pts [
10729"80750,143000"
10730"87000,142000"
10731]
10732)
10733start &60
10734end &255
10735sat 32
10736eat 32
10737st 0
10738sf 1
10739si 0
10740tg (WTG
10741uid 12563,0
10742ps "ConnStartEndStrategy"
10743stg "STSignalDisplayStrategy"
10744f (Text
10745uid 12564,0
10746va (VaSet
10747isHidden 1
10748)
10749xt "83000,142000,88100,143000"
10750st "GREEN_LED"
10751blo "83000,142800"
10752tm "WireNameMgr"
10753)
10754)
10755on &258
10756)
10757*338 (Wire
10758uid 12573,0
10759shape (OrthoPolyLine
10760uid 12574,0
10761va (VaSet
10762vasetType 3
10763)
10764xt "80750,142000,87000,143000"
10765pts [
10766"80750,142000"
10767"87000,143000"
10768]
10769)
10770start &59
10771end &256
10772sat 32
10773eat 32
10774st 0
10775sf 1
10776si 0
10777tg (WTG
10778uid 12577,0
10779ps "ConnStartEndStrategy"
10780stg "STSignalDisplayStrategy"
10781f (Text
10782uid 12578,0
10783va (VaSet
10784isHidden 1
10785)
10786xt "83000,141000,87000,142000"
10787st "RED_LED"
10788blo "83000,141800"
10789tm "WireNameMgr"
10790)
10791)
10792on &259
10793)
10794*339 (Wire
10795uid 13522,0
10796shape (OrthoPolyLine
10797uid 13523,0
10798va (VaSet
10799vasetType 3
10800lineWidth 2
10801)
10802xt "112000,148000,120000,148000"
10803pts [
10804"112000,148000"
10805"120000,148000"
10806]
10807)
10808start &260
10809end &229
10810sat 32
10811eat 1
10812sty 1
10813st 0
10814sf 1
10815si 0
10816tg (WTG
10817uid 13526,0
10818ps "ConnStartEndStrategy"
10819stg "STSignalDisplayStrategy"
10820f (Text
10821uid 13527,0
10822va (VaSet
10823isHidden 1
10824)
10825xt "114000,147000,121900,148000"
10826st "POSITION_ID : (5:0)"
10827blo "114000,147800"
10828tm "WireNameMgr"
10829)
10830)
10831on &261
10832)
10833*340 (Wire
10834uid 13538,0
10835shape (OrthoPolyLine
10836uid 13539,0
10837va (VaSet
10838vasetType 3
10839)
10840xt "110000,139000,120000,139000"
10841pts [
10842"110000,139000"
10843"120000,139000"
10844]
10845)
10846end &229
10847sat 16
10848eat 1
10849st 0
10850sf 1
10851si 0
10852tg (WTG
10853uid 13544,0
10854ps "ConnStartEndStrategy"
10855stg "STSignalDisplayStrategy"
10856f (Text
10857uid 13545,0
10858va (VaSet
10859)
10860xt "112000,138000,119700,139000"
10861st "LOCKED_extraOUT"
10862blo "112000,138800"
10863tm "WireNameMgr"
10864)
10865)
10866on &243
10867)
10868*341 (Wire
10869uid 13546,0
10870shape (OrthoPolyLine
10871uid 13547,0
10872va (VaSet
10873vasetType 3
10874)
10875xt "110000,140000,120000,140000"
10876pts [
10877"110000,140000"
10878"120000,140000"
10879]
10880)
10881end &229
10882sat 16
10883eat 1
10884st 0
10885sf 1
10886si 0
10887tg (WTG
10888uid 13552,0
10889ps "ConnStartEndStrategy"
10890stg "STSignalDisplayStrategy"
10891f (Text
10892uid 13553,0
10893va (VaSet
10894)
10895xt "112000,139000,117000,140000"
10896st "PSCLK_OUT"
10897blo "112000,139800"
10898tm "WireNameMgr"
10899)
10900)
10901on &242
10902)
10903*342 (Wire
10904uid 13554,0
10905shape (OrthoPolyLine
10906uid 13555,0
10907va (VaSet
10908vasetType 3
10909)
10910xt "110000,141000,120000,141000"
10911pts [
10912"110000,141000"
10913"120000,141000"
10914]
10915)
10916end &229
10917sat 16
10918eat 1
10919st 0
10920sf 1
10921si 0
10922tg (WTG
10923uid 13560,0
10924ps "ConnStartEndStrategy"
10925stg "STSignalDisplayStrategy"
10926f (Text
10927uid 13561,0
10928va (VaSet
10929)
10930xt "112000,140000,119800,141000"
10931st "PSDONE_extraOUT"
10932blo "112000,140800"
10933tm "WireNameMgr"
10934)
10935)
10936on &241
10937)
10938*343 (Wire
10939uid 13570,0
10940shape (OrthoPolyLine
10941uid 13571,0
10942va (VaSet
10943vasetType 3
10944)
10945xt "110000,143000,120000,143000"
10946pts [
10947"110000,143000"
10948"120000,143000"
10949]
10950)
10951end &229
10952sat 16
10953eat 1
10954st 0
10955sf 1
10956si 0
10957tg (WTG
10958uid 13576,0
10959ps "ConnStartEndStrategy"
10960stg "STSignalDisplayStrategy"
10961f (Text
10962uid 13577,0
10963va (VaSet
10964)
10965xt "112000,142000,114300,143000"
10966st "SRIN"
10967blo "112000,142800"
10968tm "WireNameMgr"
10969)
10970)
10971on &253
10972)
10973*344 (Wire
10974uid 13578,0
10975shape (OrthoPolyLine
10976uid 13579,0
10977va (VaSet
10978vasetType 3
10979lineWidth 2
10980)
10981xt "110000,144000,120000,144000"
10982pts [
10983"110000,144000"
10984"120000,144000"
10985]
10986)
10987end &229
10988sat 16
10989eat 1
10990sty 1
10991st 0
10992sf 1
10993si 0
10994tg (WTG
10995uid 13584,0
10996ps "ConnStartEndStrategy"
10997stg "STSignalDisplayStrategy"
10998f (Text
10999uid 13585,0
11000va (VaSet
11001)
11002xt "112000,143000,120500,144000"
11003st "drs_channel_id : (3:0)"
11004blo "112000,143800"
11005tm "WireNameMgr"
11006)
11007)
11008on &205
11009)
11010*345 (Wire
11011uid 13610,0
11012shape (OrthoPolyLine
11013uid 13611,0
11014va (VaSet
11015vasetType 3
11016)
11017xt "116000,158000,120000,158000"
11018pts [
11019"116000,158000"
11020"120000,158000"
11021]
11022)
11023start &181
11024end &229
11025sat 32
11026eat 1
11027st 0
11028sf 1
11029si 0
11030tg (WTG
11031uid 13616,0
11032ps "ConnStartEndStrategy"
11033stg "STSignalDisplayStrategy"
11034f (Text
11035uid 13617,0
11036va (VaSet
11037isHidden 1
11038)
11039xt "116000,157000,122800,158000"
11040st "D_PLLLCK : (3:0)"
11041blo "116000,157800"
11042tm "WireNameMgr"
11043)
11044)
11045on &182
11046)
11047*346 (Wire
11048uid 13618,0
11049shape (OrthoPolyLine
11050uid 13619,0
11051va (VaSet
11052vasetType 3
11053lineWidth 2
11054)
11055xt "126000,158000,131000,158000"
11056pts [
11057"126000,158000"
11058"131000,158000"
11059]
11060)
11061start &229
11062end &183
11063sat 2
11064eat 32
11065sty 1
11066st 0
11067sf 1
11068si 0
11069tg (WTG
11070uid 13624,0
11071ps "ConnStartEndStrategy"
11072stg "STSignalDisplayStrategy"
11073f (Text
11074uid 13625,0
11075va (VaSet
11076isHidden 1
11077)
11078xt "128000,163000,132900,164000"
11079st "D_T2 : (3:0)"
11080blo "128000,163800"
11081tm "WireNameMgr"
11082)
11083)
11084on &184
11085)
11086*347 (Wire
11087uid 13634,0
11088shape (OrthoPolyLine
11089uid 13635,0
11090va (VaSet
11091vasetType 3
11092)
11093xt "112000,149000,120000,149000"
11094pts [
11095"112000,149000"
11096"120000,149000"
11097]
11098)
11099start &262
11100end &229
11101sat 32
11102eat 1
11103st 0
11104sf 1
11105si 0
11106tg (WTG
11107uid 13638,0
11108ps "ConnStartEndStrategy"
11109stg "STSignalDisplayStrategy"
11110f (Text
11111uid 13639,0
11112va (VaSet
11113isHidden 1
11114)
11115xt "114000,148000,117500,149000"
11116st "REFCLK"
11117blo "114000,148800"
11118tm "WireNameMgr"
11119)
11120)
11121on &263
11122)
11123*348 (Wire
11124uid 13650,0
11125shape (OrthoPolyLine
11126uid 13651,0
11127va (VaSet
11128vasetType 3
11129)
11130xt "112000,150000,120000,150000"
11131pts [
11132"112000,150000"
11133"120000,150000"
11134]
11135)
11136end &229
11137sat 16
11138eat 1
11139st 0
11140sf 1
11141si 0
11142tg (WTG
11143uid 13656,0
11144ps "ConnStartEndStrategy"
11145stg "STSignalDisplayStrategy"
11146f (Text
11147uid 13657,0
11148va (VaSet
11149)
11150xt "114000,149000,119200,150000"
11151st "RS485_E_DI"
11152blo "114000,149800"
11153tm "WireNameMgr"
11154)
11155)
11156on &249
11157)
11158*349 (Wire
11159uid 13658,0
11160shape (OrthoPolyLine
11161uid 13659,0
11162va (VaSet
11163vasetType 3
11164)
11165xt "126000,149000,134000,149000"
11166pts [
11167"126000,149000"
11168"134000,149000"
11169]
11170)
11171start &229
11172sat 2
11173eat 16
11174st 0
11175sf 1
11176si 0
11177tg (WTG
11178uid 13664,0
11179ps "ConnStartEndStrategy"
11180stg "STSignalDisplayStrategy"
11181f (Text
11182uid 13665,0
11183va (VaSet
11184)
11185xt "128000,148000,133500,149000"
11186st "RS485_E_DE"
11187blo "128000,148800"
11188tm "WireNameMgr"
11189)
11190)
11191on &172
11192)
11193*350 (Wire
11194uid 13666,0
11195shape (OrthoPolyLine
11196uid 13667,0
11197va (VaSet
11198vasetType 3
11199)
11200xt "126000,150000,136000,150000"
11201pts [
11202"126000,150000"
11203"136000,150000"
11204]
11205)
11206start &229
11207sat 2
11208eat 16
11209st 0
11210sf 1
11211si 0
11212tg (WTG
11213uid 13672,0
11214ps "ConnStartEndStrategy"
11215stg "STSignalDisplayStrategy"
11216f (Text
11217uid 13673,0
11218va (VaSet
11219)
11220xt "128000,149000,133500,150000"
11221st "RS485_E_RE"
11222blo "128000,149800"
11223tm "WireNameMgr"
11224)
11225)
11226on &171
11227)
11228]
11229bg "65535,65535,65535"
11230grid (Grid
11231origin "0,0"
11232isVisible 1
11233isActive 1
11234xSpacing 1000
11235xySpacing 1000
11236xShown 1
11237yShown 1
11238color "26368,26368,26368"
11239)
11240packageList *351 (PackageList
11241uid 41,0
11242stg "VerticalLayoutStrategy"
11243textVec [
11244*352 (Text
11245uid 42,0
11246va (VaSet
11247font "arial,8,1"
11248)
11249xt "0,0,5400,1000"
11250st "Package List"
11251blo "0,800"
11252)
11253*353 (MLText
11254uid 43,0
11255va (VaSet
11256)
11257xt "0,1000,14500,9000"
11258st "LIBRARY ieee;
11259USE ieee.std_logic_1164.all;
11260USE ieee.std_logic_arith.all;
11261USE IEEE.NUMERIC_STD.all;
11262USE ieee.std_logic_unsigned.all;
11263
11264LIBRARY FACT_FAD_lib;
11265USE FACT_FAD_lib.fad_definitions.all;"
11266tm "PackageList"
11267)
11268]
11269)
11270compDirBlock (MlTextGroup
11271uid 44,0
11272stg "VerticalLayoutStrategy"
11273textVec [
11274*354 (Text
11275uid 45,0
11276va (VaSet
11277isHidden 1
11278font "Arial,8,1"
11279)
11280xt "20000,0,28100,1000"
11281st "Compiler Directives"
11282blo "20000,800"
11283)
11284*355 (Text
11285uid 46,0
11286va (VaSet
11287isHidden 1
11288font "Arial,8,1"
11289)
11290xt "20000,1000,29600,2000"
11291st "Pre-module directives:"
11292blo "20000,1800"
11293)
11294*356 (MLText
11295uid 47,0
11296va (VaSet
11297isHidden 1
11298)
11299xt "20000,2000,27500,4000"
11300st "`resetall
11301`timescale 1ns/10ps"
11302tm "BdCompilerDirectivesTextMgr"
11303)
11304*357 (Text
11305uid 48,0
11306va (VaSet
11307isHidden 1
11308font "Arial,8,1"
11309)
11310xt "20000,4000,30100,5000"
11311st "Post-module directives:"
11312blo "20000,4800"
11313)
11314*358 (MLText
11315uid 49,0
11316va (VaSet
11317isHidden 1
11318)
11319xt "20000,0,20000,0"
11320tm "BdCompilerDirectivesTextMgr"
11321)
11322*359 (Text
11323uid 50,0
11324va (VaSet
11325isHidden 1
11326font "Arial,8,1"
11327)
11328xt "20000,5000,29900,6000"
11329st "End-module directives:"
11330blo "20000,5800"
11331)
11332*360 (MLText
11333uid 51,0
11334va (VaSet
11335isHidden 1
11336)
11337xt "20000,6000,20000,6000"
11338tm "BdCompilerDirectivesTextMgr"
11339)
11340]
11341associable 1
11342)
11343windowSize "0,0,1281,1024"
11344viewArea "70599,117336,126603,163521"
11345cachedDiagramExtent "0,0,699000,450107"
11346pageSetupInfo (PageSetupInfo
11347ptrCmd ""
11348toPrinter 1
11349exportedDirectories [
11350"$HDS_PROJECT_DIR/HTMLExport"
11351]
11352exportStdIncludeRefs 1
11353exportStdPackageRefs 1
11354)
11355hasePageBreakOrigin 1
11356pageBreakOrigin "0,0"
11357lastUid 14001,0
11358defaultCommentText (CommentText
11359shape (Rectangle
11360layer 0
11361va (VaSet
11362vasetType 1
11363fg "65280,65280,46080"
11364lineColor "0,0,32768"
11365)
11366xt "0,0,15000,5000"
11367)
11368text (MLText
11369va (VaSet
11370fg "0,0,32768"
11371)
11372xt "200,200,2000,1200"
11373st "
11374Text
11375"
11376tm "CommentText"
11377wrapOption 3
11378visibleHeight 4600
11379visibleWidth 14600
11380)
11381)
11382defaultPanel (Panel
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11384va (VaSet
11385vasetType 1
11386fg "65535,65535,65535"
11387lineColor "32768,0,0"
11388lineWidth 2
11389)
11390xt "0,0,20000,20000"
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11392title (TextAssociate
11393ps "TopLeftStrategy"
11394text (Text
11395va (VaSet
11396font "Arial,8,1"
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11398xt "1000,1000,3800,2000"
11399st "Panel0"
11400blo "1000,1800"
11401tm "PanelText"
11402)
11403)
11404)
11405defaultBlk (Blk
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11408vasetType 1
11409fg "39936,56832,65280"
11410lineColor "0,0,32768"
11411lineWidth 2
11412)
11413xt "0,0,8000,10000"
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11415ttg (MlTextGroup
11416ps "CenterOffsetStrategy"
11417stg "VerticalLayoutStrategy"
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11421font "Arial,8,1"
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11426tm "BdLibraryNameMgr"
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11428*362 (Text
11429va (VaSet
11430font "Arial,8,1"
11431)
11432xt "2200,4500,5600,5500"
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11434blo "2200,5300"
11435tm "BlkNameMgr"
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11437*363 (Text
11438va (VaSet
11439font "Arial,8,1"
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11441xt "2200,5500,3200,6500"
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11443blo "2200,6300"
11444tm "InstanceNameMgr"
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11447)
11448ga (GenericAssociation
11449ps "EdgeToEdgeStrategy"
11450matrix (Matrix
11451text (MLText
11452va (VaSet
11453font "Courier New,8,0"
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11455xt "2200,13500,2200,13500"
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11457header ""
11458)
11459elements [
11460]
11461)
11462viewicon (ZoomableIcon
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11464va (VaSet
11465vasetType 1
11466fg "49152,49152,49152"
11467)
11468xt "0,0,1500,1500"
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11470iconMaskName "UnknownFile.msk"
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11472viewiconposition 0
11473)
11474defaultMWComponent (MWC
11475shape (Rectangle
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11477vasetType 1
11478fg "0,65535,0"
11479lineColor "0,32896,0"
11480lineWidth 2
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11482xt "0,0,8000,10000"
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11484ttg (MlTextGroup
11485ps "CenterOffsetStrategy"
11486stg "VerticalLayoutStrategy"
11487textVec [
11488*364 (Text
11489va (VaSet
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11496*365 (Text
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11504*366 (Text
11505va (VaSet
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11510blo "550,6300"
11511tm "InstanceNameMgr"
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11513]
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11515ga (GenericAssociation
11516ps "EdgeToEdgeStrategy"
11517matrix (Matrix
11518text (MLText
11519va (VaSet
11520font "Courier New,8,0"
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11522xt "-6450,1500,-6450,1500"
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11524header ""
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11526elements [
11527]
11528)
11529portVis (PortSigDisplay
11530)
11531prms (Property
11532pclass "params"
11533pname "params"
11534ptn "String"
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11536visOptions (mwParamsVisibilityOptions
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11539defaultSaComponent (SaComponent
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11542vasetType 1
11543fg "0,65535,0"
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11545lineWidth 2
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11547xt "0,0,8000,10000"
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11549ttg (MlTextGroup
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11551stg "VerticalLayoutStrategy"
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11553*367 (Text
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11560tm "BdLibraryNameMgr"
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11562*368 (Text
11563va (VaSet
11564font "Arial,8,1"
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11566xt "900,4500,7100,5500"
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11571*369 (Text
11572va (VaSet
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11579)
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11581)
11582ga (GenericAssociation
11583ps "EdgeToEdgeStrategy"
11584matrix (Matrix
11585text (MLText
11586va (VaSet
11587font "Courier New,8,0"
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11589xt "-6100,1500,-6100,1500"
11590)
11591header ""
11592)
11593elements [
11594]
11595)
11596viewicon (ZoomableIcon
11597sl 0
11598va (VaSet
11599vasetType 1
11600fg "49152,49152,49152"
11601)
11602xt "0,0,1500,1500"
11603iconName "UnknownFile.png"
11604iconMaskName "UnknownFile.msk"
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11606viewiconposition 0
11607portVis (PortSigDisplay
11608)
11609archFileType "UNKNOWN"
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11611defaultVhdlComponent (VhdlComponent
11612shape (Rectangle
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11614vasetType 1
11615fg "0,65535,0"
11616lineColor "0,32896,0"
11617lineWidth 2
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11619xt "0,0,8000,10000"
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11621ttg (MlTextGroup
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11623stg "VerticalLayoutStrategy"
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11633*371 (Text
11634va (VaSet
11635font "Arial,8,1"
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11642va (VaSet
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11649)
11650]
11651)
11652ga (GenericAssociation
11653ps "EdgeToEdgeStrategy"
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11655text (MLText
11656va (VaSet
11657font "Courier New,8,0"
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11663elements [
11664]
11665)
11666portVis (PortSigDisplay
11667)
11668entityPath ""
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11672defaultVerilogComponent (VerilogComponent
11673shape (Rectangle
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11675vasetType 1
11676fg "0,65535,0"
11677lineColor "0,32896,0"
11678lineWidth 2
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11680xt "-450,0,8450,10000"
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11684stg "VerticalLayoutStrategy"
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11702*375 (Text
11703va (VaSet
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11709tm "InstanceNameMgr"
11710)
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11713ga (GenericAssociation
11714ps "EdgeToEdgeStrategy"
11715matrix (Matrix
11716text (MLText
11717va (VaSet
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11727entityPath ""
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11729defaultHdlText (HdlText
11730shape (Rectangle
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11733fg "65535,65535,37120"
11734lineColor "0,0,32768"
11735lineWidth 2
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11737xt "0,0,8000,10000"
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11739ttg (MlTextGroup
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11741stg "VerticalLayoutStrategy"
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11744va (VaSet
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11752*377 (Text
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11762)
11763viewicon (ZoomableIcon
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11766vasetType 1
11767fg "49152,49152,49152"
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11769xt "0,0,1500,1500"
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11771iconMaskName "UnknownFile.msk"
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11773viewiconposition 0
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11775defaultEmbeddedText (EmbeddedText
11776commentText (CommentText
11777ps "CenterOffsetStrategy"
11778shape (Rectangle
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11780vasetType 1
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11782lineColor "0,0,32768"
11783lineWidth 2
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11785xt "0,0,18000,5000"
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11787text (MLText
11788va (VaSet
11789)
11790xt "200,200,2000,1200"
11791st "
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11793"
11794tm "HdlTextMgr"
11795wrapOption 3
11796visibleHeight 4600
11797visibleWidth 17600
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11801defaultGlobalConnector (GlobalConnector
11802shape (Circle
11803va (VaSet
11804vasetType 1
11805fg "65535,65535,0"
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11807xt "-1000,-1000,1000,1000"
11808radius 1000
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11810name (Text
11811va (VaSet
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11814xt "-500,-500,500,500"
11815st "G"
11816blo "-500,300"
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11818)
11819defaultRipper (Ripper
11820ps "OnConnectorStrategy"
11821shape (Line2D
11822pts [
11823"0,0"
11824"1000,1000"
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11826va (VaSet
11827vasetType 1
11828)
11829xt "0,0,1000,1000"
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11831)
11832defaultBdJunction (BdJunction
11833ps "OnConnectorStrategy"
11834shape (Circle
11835va (VaSet
11836vasetType 1
11837)
11838xt "-400,-400,400,400"
11839radius 400
11840)
11841)
11842defaultPortIoIn (PortIoIn
11843shape (CompositeShape
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11845vasetType 1
11846fg "0,0,32768"
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11848optionalChildren [
11849(Pentagon
11850sl 0
11851ro 270
11852xt "-2000,-375,-500,375"
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11854(Line
11855sl 0
11856ro 270
11857xt "-500,0,0,0"
11858pts [
11859"-500,0"
11860"0,0"
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11862)
11863]
11864)
11865stc 0
11866sf 1
11867tg (WTG
11868ps "PortIoTextPlaceStrategy"
11869stg "STSignalDisplayStrategy"
11870f (Text
11871va (VaSet
11872)
11873xt "-1375,-1000,-1375,-1000"
11874ju 2
11875blo "-1375,-1000"
11876tm "WireNameMgr"
11877)
11878)
11879)
11880defaultPortIoOut (PortIoOut
11881shape (CompositeShape
11882va (VaSet
11883vasetType 1
11884fg "0,0,32768"
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11886optionalChildren [
11887(Pentagon
11888sl 0
11889ro 270
11890xt "500,-375,2000,375"
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11892(Line
11893sl 0
11894ro 270
11895xt "0,0,500,0"
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11898"500,0"
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11900)
11901]
11902)
11903stc 0
11904sf 1
11905tg (WTG
11906ps "PortIoTextPlaceStrategy"
11907stg "STSignalDisplayStrategy"
11908f (Text
11909va (VaSet
11910)
11911xt "625,-1000,625,-1000"
11912blo "625,-1000"
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11914)
11915)
11916)
11917defaultPortIoInOut (PortIoInOut
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11921fg "0,0,32768"
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11923optionalChildren [
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11928(Line
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11935)
11936]
11937)
11938stc 0
11939sf 1
11940tg (WTG
11941ps "PortIoTextPlaceStrategy"
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11944va (VaSet
11945)
11946xt "0,-375,0,-375"
11947blo "0,-375"
11948tm "WireNameMgr"
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11950)
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11952defaultPortIoBuffer (PortIoBuffer
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11954va (VaSet
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11956fg "65535,65535,65535"
11957lineColor "0,0,32768"
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11959optionalChildren [
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11964(Line
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11969"500,0"
11970]
11971)
11972]
11973)
11974stc 0
11975sf 1
11976tg (WTG
11977ps "PortIoTextPlaceStrategy"
11978stg "STSignalDisplayStrategy"
11979f (Text
11980va (VaSet
11981)
11982xt "0,-375,0,-375"
11983blo "0,-375"
11984tm "WireNameMgr"
11985)
11986)
11987)
11988defaultSignal (Wire
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11991vasetType 3
11992)
11993pts [
11994"0,0"
11995"0,0"
11996]
11997)
11998ss 0
11999es 0
12000sat 32
12001eat 32
12002st 0
12003sf 1
12004si 0
12005tg (WTG
12006ps "ConnStartEndStrategy"
12007stg "STSignalDisplayStrategy"
12008f (Text
12009va (VaSet
12010)
12011xt "0,0,1900,1000"
12012st "sig0"
12013blo "0,800"
12014tm "WireNameMgr"
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12016)
12017)
12018defaultBus (Wire
12019shape (OrthoPolyLine
12020va (VaSet
12021vasetType 3
12022lineWidth 2
12023)
12024pts [
12025"0,0"
12026"0,0"
12027]
12028)
12029ss 0
12030es 0
12031sat 32
12032eat 32
12033sty 1
12034st 0
12035sf 1
12036si 0
12037tg (WTG
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12042)
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12044st "dbus0"
12045blo "0,800"
12046tm "WireNameMgr"
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12050defaultBundle (Bundle
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12052va (VaSet
12053vasetType 3
12054lineColor "32768,0,0"
12055lineWidth 2
12056)
12057pts [
12058"0,0"
12059"0,0"
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12062ss 0
12063es 0
12064sat 32
12065eat 32
12066textGroup (BiTextGroup
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12068stg "VerticalLayoutStrategy"
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12070va (VaSet
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12075tm "BundleNameMgr"
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12077second (MLText
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12082tm "BundleContentsMgr"
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12085bundleNet &0
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12087defaultPortMapFrame (PortMapFrame
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12093lineColor "0,0,32768"
12094lineWidth 2
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12096xt "0,0,10000,12000"
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12098portMapText (BiTextGroup
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12100stg "VerticalLayoutStrategy"
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12102va (VaSet
12103)
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12105second (MLText
12106va (VaSet
12107)
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12112defaultGenFrame (Frame
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12116fg "65535,65535,65535"
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12118lineStyle 2
12119lineWidth 2
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12125text (MLText
12126va (VaSet
12127)
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12130tm "FrameTitleTextMgr"
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12133seqNum (FrameSequenceNumber
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12137vasetType 1
12138fg "65535,65535,65535"
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12140xt "50,50,1250,1450"
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12142num (Text
12143va (VaSet
12144)
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12147blo "250,1050"
12148tm "FrameSeqNumMgr"
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12153stg "VerticalLayoutStrategy"
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12163*379 (MLText
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12165)
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12172defaultBlockFrame (Frame
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12176fg "65535,65535,65535"
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12178lineStyle 1
12179lineWidth 2
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12181xt "0,0,20000,20000"
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12183title (TextAssociate
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12189st "b0: BLOCK (guard)"
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12200xt "50,50,1250,1450"
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12202num (Text
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12207blo "250,1050"
12208tm "FrameSeqNumMgr"
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12213stg "VerticalLayoutStrategy"
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12223*381 (MLText
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12233defaultSaCptPort (CptPort
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12236ro 90
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12239fg "0,65535,0"
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12241xt "0,0,750,750"
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12243tg (CPTG
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12247va (VaSet
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12250st "Port"
12251blo "0,1550"
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12254thePort (LogicalPort
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12256n "Port"
12257t ""
12258o 0
12259)
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12267fg "65535,65535,65535"
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12269xt "0,0,750,750"
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12271tg (CPTG
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12276)
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12280)
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12282thePort (LogicalPort
12283m 3
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12285n "Port"
12286t ""
12287o 0
12288)
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12296archDeclarativeBlock (BdArchDeclBlock
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12298stg "BdArchDeclBlockLS"
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12300uid 2,0
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12317preUserLabel (Text
12318uid 4,0
12319va (VaSet
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12323xt "37000,1800,40800,2800"
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12327preUserText (MLText
12328uid 5,0
12329va (VaSet
12330isHidden 1
12331font "Courier New,8,0"
12332)
12333xt "37000,1800,37000,1800"
12334tm "BdDeclarativeTextMgr"
12335)
12336diagSignalLabel (Text
12337uid 6,0
12338va (VaSet
12339font "Arial,8,1"
12340)
12341xt "37000,49400,44100,50400"
12342st "Diagram Signals:"
12343blo "37000,50200"
12344)
12345postUserLabel (Text
12346uid 7,0
12347va (VaSet
12348isHidden 1
12349font "Arial,8,1"
12350)
12351xt "37000,1800,41700,2800"
12352st "Post User:"
12353blo "37000,2600"
12354)
12355postUserText (MLText
12356uid 8,0
12357va (VaSet
12358isHidden 1
12359font "Courier New,8,0"
12360)
12361xt "37000,1800,37000,1800"
12362tm "BdDeclarativeTextMgr"
12363)
12364)
12365commonDM (CommonDM
12366ldm (LogicalDM
12367suid 212,0
12368usingSuid 1
12369emptyRow *382 (LEmptyRow
12370)
12371uid 54,0
12372optionalChildren [
12373*383 (RefLabelRowHdr
12374)
12375*384 (TitleRowHdr
12376)
12377*385 (FilterRowHdr
12378)
12379*386 (RefLabelColHdr
12380tm "RefLabelColHdrMgr"
12381)
12382*387 (RowExpandColHdr
12383tm "RowExpandColHdrMgr"
12384)
12385*388 (GroupColHdr
12386tm "GroupColHdrMgr"
12387)
12388*389 (NameColHdr
12389tm "BlockDiagramNameColHdrMgr"
12390)
12391*390 (ModeColHdr
12392tm "BlockDiagramModeColHdrMgr"
12393)
12394*391 (TypeColHdr
12395tm "BlockDiagramTypeColHdrMgr"
12396)
12397*392 (BoundsColHdr
12398tm "BlockDiagramBoundsColHdrMgr"
12399)
12400*393 (InitColHdr
12401tm "BlockDiagramInitColHdrMgr"
12402)
12403*394 (EolColHdr
12404tm "BlockDiagramEolColHdrMgr"
12405)
12406*395 (LeafLogPort
12407port (LogicalPort
12408m 4
12409decl (Decl
12410n "board_id"
12411t "std_logic_vector"
12412b "(3 downto 0)"
12413preAdd 0
12414posAdd 0
12415o 75
12416suid 5,0
12417)
12418)
12419uid 327,0
12420)
12421*396 (LeafLogPort
12422port (LogicalPort
12423m 4
12424decl (Decl
12425n "crate_id"
12426t "std_logic_vector"
12427b "(1 downto 0)"
12428o 76
12429suid 6,0
12430)
12431)
12432uid 329,0
12433)
12434*397 (LeafLogPort
12435port (LogicalPort
12436m 4
12437decl (Decl
12438n "adc_data_array"
12439t "adc_data_array_type"
12440o 74
12441suid 29,0
12442)
12443)
12444uid 1491,0
12445)
12446*398 (LeafLogPort
12447port (LogicalPort
12448m 1
12449decl (Decl
12450n "RSRLOAD"
12451t "std_logic"
12452o 43
12453suid 57,0
12454i "'0'"
12455)
12456)
12457uid 2435,0
12458)
12459*399 (LeafLogPort
12460port (LogicalPort
12461m 4
12462decl (Decl
12463n "SRCLK"
12464t "std_logic"
12465o 72
12466suid 58,0
12467i "'0'"
12468)
12469)
12470uid 2437,0
12471)
12472*400 (LeafLogPort
12473port (LogicalPort
12474m 4
12475decl (Decl
12476n "sensor_cs"
12477t "std_logic_vector"
12478b "(3 DOWNTO 0)"
12479o 80
12480suid 65,0
12481)
12482)
12483uid 3037,0
12484)
12485*401 (LeafLogPort
12486port (LogicalPort
12487m 1
12488decl (Decl
12489n "DAC_CS"
12490t "std_logic"
12491o 27
12492suid 66,0
12493)
12494)
12495uid 3039,0
12496)
12497*402 (LeafLogPort
12498port (LogicalPort
12499decl (Decl
12500n "X_50M"
12501t "STD_LOGIC"
12502preAdd 0
12503posAdd 0
12504o 18
12505suid 67,0
12506)
12507)
12508uid 3276,0
12509)
12510*403 (LeafLogPort
12511port (LogicalPort
12512decl (Decl
12513n "TRG"
12514t "STD_LOGIC"
12515o 16
12516suid 68,0
12517)
12518)
12519uid 3278,0
12520)
12521*404 (LeafLogPort
12522port (LogicalPort
12523m 1
12524decl (Decl
12525n "A_CLK"
12526t "std_logic_vector"
12527b "(3 downto 0)"
12528o 22
12529suid 71,0
12530)
12531)
12532uid 3280,0
12533)
12534*405 (LeafLogPort
12535port (LogicalPort
12536m 4
12537decl (Decl
12538n "CLK_25_PS"
12539t "std_logic"
12540o 61
12541suid 72,0
12542)
12543)
12544uid 3282,0
12545)
12546*406 (LeafLogPort
12547port (LogicalPort
12548m 1
12549decl (Decl
12550n "OE_ADC"
12551t "STD_LOGIC"
12552preAdd 0
12553posAdd 0
12554o 36
12555suid 73,0
12556)
12557)
12558uid 3382,0
12559)
12560*407 (LeafLogPort
12561port (LogicalPort
12562decl (Decl
12563n "A_OTR"
12564t "std_logic_vector"
12565b "(3 DOWNTO 0)"
12566o 5
12567suid 74,0
12568)
12569)
12570uid 3384,0
12571)
12572*408 (LeafLogPort
12573port (LogicalPort
12574decl (Decl
12575n "A0_D"
12576t "std_logic_vector"
12577b "(11 DOWNTO 0)"
12578o 1
12579suid 79,0
12580)
12581)
12582uid 3386,0
12583)
12584*409 (LeafLogPort
12585port (LogicalPort
12586decl (Decl
12587n "A1_D"
12588t "std_logic_vector"
12589b "(11 DOWNTO 0)"
12590o 2
12591suid 80,0
12592)
12593)
12594uid 3388,0
12595)
12596*410 (LeafLogPort
12597port (LogicalPort
12598decl (Decl
12599n "A2_D"
12600t "std_logic_vector"
12601b "(11 DOWNTO 0)"
12602o 3
12603suid 81,0
12604)
12605)
12606uid 3390,0
12607)
12608*411 (LeafLogPort
12609port (LogicalPort
12610decl (Decl
12611n "A3_D"
12612t "std_logic_vector"
12613b "(11 DOWNTO 0)"
12614o 4
12615suid 82,0
12616)
12617)
12618uid 3392,0
12619)
12620*412 (LeafLogPort
12621port (LogicalPort
12622m 1
12623decl (Decl
12624n "D0_SRCLK"
12625t "STD_LOGIC"
12626o 23
12627suid 87,0
12628)
12629)
12630uid 3468,0
12631)
12632*413 (LeafLogPort
12633port (LogicalPort
12634m 1
12635decl (Decl
12636n "D1_SRCLK"
12637t "STD_LOGIC"
12638o 24
12639suid 88,0
12640)
12641)
12642uid 3470,0
12643)
12644*414 (LeafLogPort
12645port (LogicalPort
12646m 1
12647decl (Decl
12648n "D2_SRCLK"
12649t "STD_LOGIC"
12650o 25
12651suid 89,0
12652)
12653)
12654uid 3472,0
12655)
12656*415 (LeafLogPort
12657port (LogicalPort
12658m 1
12659decl (Decl
12660n "D3_SRCLK"
12661t "STD_LOGIC"
12662o 26
12663suid 90,0
12664)
12665)
12666uid 3474,0
12667)
12668*416 (LeafLogPort
12669port (LogicalPort
12670decl (Decl
12671n "D0_SROUT"
12672t "std_logic"
12673o 6
12674suid 91,0
12675)
12676)
12677uid 3524,0
12678)
12679*417 (LeafLogPort
12680port (LogicalPort
12681decl (Decl
12682n "D1_SROUT"
12683t "std_logic"
12684o 7
12685suid 92,0
12686)
12687)
12688uid 3526,0
12689)
12690*418 (LeafLogPort
12691port (LogicalPort
12692decl (Decl
12693n "D2_SROUT"
12694t "std_logic"
12695o 8
12696suid 93,0
12697)
12698)
12699uid 3528,0
12700)
12701*419 (LeafLogPort
12702port (LogicalPort
12703decl (Decl
12704n "D3_SROUT"
12705t "std_logic"
12706o 9
12707suid 94,0
12708)
12709)
12710uid 3530,0
12711)
12712*420 (LeafLogPort
12713port (LogicalPort
12714m 1
12715decl (Decl
12716n "D_A"
12717t "std_logic_vector"
12718b "(3 DOWNTO 0)"
12719o 30
12720suid 95,0
12721i "(others => '0')"
12722)
12723)
12724uid 3532,0
12725)
12726*421 (LeafLogPort
12727port (LogicalPort
12728m 1
12729decl (Decl
12730n "DWRITE"
12731t "std_logic"
12732o 29
12733suid 96,0
12734i "'0'"
12735)
12736)
12737uid 3534,0
12738)
12739*422 (LeafLogPort
12740port (LogicalPort
12741m 1
12742decl (Decl
12743n "T0_CS"
12744t "std_logic"
12745o 46
12746suid 101,0
12747)
12748)
12749uid 3646,0
12750)
12751*423 (LeafLogPort
12752port (LogicalPort
12753m 1
12754decl (Decl
12755n "T1_CS"
12756t "std_logic"
12757o 47
12758suid 102,0
12759)
12760)
12761uid 3648,0
12762)
12763*424 (LeafLogPort
12764port (LogicalPort
12765m 1
12766decl (Decl
12767n "T2_CS"
12768t "std_logic"
12769o 48
12770suid 103,0
12771)
12772)
12773uid 3650,0
12774)
12775*425 (LeafLogPort
12776port (LogicalPort
12777m 1
12778decl (Decl
12779n "T3_CS"
12780t "std_logic"
12781o 49
12782suid 104,0
12783)
12784)
12785uid 3652,0
12786)
12787*426 (LeafLogPort
12788port (LogicalPort
12789m 1
12790decl (Decl
12791n "S_CLK"
12792t "std_logic"
12793o 45
12794suid 105,0
12795)
12796)
12797uid 3654,0
12798)
12799*427 (LeafLogPort
12800port (LogicalPort
12801m 1
12802decl (Decl
12803n "W_A"
12804t "std_logic_vector"
12805b "(9 DOWNTO 0)"
12806o 51
12807suid 106,0
12808)
12809)
12810uid 3656,0
12811)
12812*428 (LeafLogPort
12813port (LogicalPort
12814m 2
12815decl (Decl
12816n "W_D"
12817t "std_logic_vector"
12818b "(15 DOWNTO 0)"
12819o 57
12820suid 107,0
12821)
12822)
12823uid 3658,0
12824)
12825*429 (LeafLogPort
12826port (LogicalPort
12827m 1
12828decl (Decl
12829n "W_RES"
12830t "std_logic"
12831o 54
12832suid 108,0
12833i "'1'"
12834)
12835)
12836uid 3660,0
12837)
12838*430 (LeafLogPort
12839port (LogicalPort
12840m 1
12841decl (Decl
12842n "W_RD"
12843t "std_logic"
12844o 53
12845suid 109,0
12846i "'1'"
12847)
12848)
12849uid 3662,0
12850)
12851*431 (LeafLogPort
12852port (LogicalPort
12853m 1
12854decl (Decl
12855n "W_WR"
12856t "std_logic"
12857o 55
12858suid 110,0
12859i "'1'"
12860)
12861)
12862uid 3664,0
12863)
12864*432 (LeafLogPort
12865port (LogicalPort
12866decl (Decl
12867n "W_INT"
12868t "std_logic"
12869o 17
12870suid 111,0
12871)
12872)
12873uid 3666,0
12874)
12875*433 (LeafLogPort
12876port (LogicalPort
12877m 1
12878decl (Decl
12879n "W_CS"
12880t "std_logic"
12881o 52
12882suid 112,0
12883i "'1'"
12884)
12885)
12886uid 3668,0
12887)
12888*434 (LeafLogPort
12889port (LogicalPort
12890m 1
12891decl (Decl
12892n "MOSI"
12893t "std_logic"
12894o 35
12895suid 113,0
12896i "'0'"
12897)
12898)
12899uid 3696,0
12900)
12901*435 (LeafLogPort
12902port (LogicalPort
12903m 2
12904decl (Decl
12905n "MISO"
12906t "std_logic"
12907preAdd 0
12908posAdd 0
12909o 56
12910suid 114,0
12911)
12912)
12913uid 3698,0
12914)
12915*436 (LeafLogPort
12916port (LogicalPort
12917m 1
12918decl (Decl
12919n "TRG_V"
12920t "std_logic"
12921o 50
12922suid 126,0
12923)
12924)
12925uid 3886,0
12926)
12927*437 (LeafLogPort
12928port (LogicalPort
12929m 1
12930decl (Decl
12931n "RS485_C_RE"
12932t "std_logic"
12933o 40
12934suid 127,0
12935)
12936)
12937uid 3888,0
12938)
12939*438 (LeafLogPort
12940port (LogicalPort
12941m 1
12942decl (Decl
12943n "RS485_C_DE"
12944t "std_logic"
12945o 38
12946suid 128,0
12947)
12948)
12949uid 3890,0
12950)
12951*439 (LeafLogPort
12952port (LogicalPort
12953m 1
12954decl (Decl
12955n "RS485_E_RE"
12956t "std_logic"
12957o 42
12958suid 129,0
12959)
12960)
12961uid 3892,0
12962)
12963*440 (LeafLogPort
12964port (LogicalPort
12965m 1
12966decl (Decl
12967n "RS485_E_DE"
12968t "std_logic"
12969o 41
12970suid 130,0
12971)
12972)
12973uid 3894,0
12974)
12975*441 (LeafLogPort
12976port (LogicalPort
12977m 1
12978decl (Decl
12979n "DENABLE"
12980t "std_logic"
12981o 28
12982suid 131,0
12983i "'0'"
12984)
12985)
12986uid 3896,0
12987)
12988*442 (LeafLogPort
12989port (LogicalPort
12990m 1
12991decl (Decl
12992n "EE_CS"
12993t "std_logic"
12994o 33
12995suid 133,0
12996)
12997)
12998uid 3900,0
12999)
13000*443 (LeafLogPort
13001port (LogicalPort
13002m 1
13003decl (Decl
13004n "D_T"
13005t "std_logic_vector"
13006b "(7 DOWNTO 0)"
13007o 31
13008suid 141,0
13009i "(OTHERS => '0')"
13010)
13011)
13012uid 5322,0
13013)
13014*444 (LeafLogPort
13015port (LogicalPort
13016decl (Decl
13017n "D_PLLLCK"
13018t "std_logic_vector"
13019b "(3 DOWNTO 0)"
13020o 10
13021suid 152,0
13022)
13023)
13024uid 6777,0
13025scheme 0
13026)
13027*445 (LeafLogPort
13028port (LogicalPort
13029m 1
13030decl (Decl
13031n "D_T2"
13032t "std_logic_vector"
13033b "(3 DOWNTO 0)"
13034o 32
13035suid 154,0
13036i "(others => '0')"
13037)
13038)
13039uid 6872,0
13040scheme 0
13041)
13042*446 (LeafLogPort
13043port (LogicalPort
13044m 1
13045decl (Decl
13046n "A1_T"
13047t "std_logic_vector"
13048b "(7 DOWNTO 0)"
13049o 20
13050suid 155,0
13051i "(OTHERS => '0')"
13052)
13053)
13054uid 7134,0
13055scheme 0
13056)
13057*447 (LeafLogPort
13058port (LogicalPort
13059m 4
13060decl (Decl
13061n "dummy"
13062t "std_logic"
13063o 78
13064suid 157,0
13065)
13066)
13067uid 7473,0
13068scheme 0
13069)
13070*448 (LeafLogPort
13071port (LogicalPort
13072m 4
13073decl (Decl
13074n "drs_channel_id"
13075t "std_logic_vector"
13076b "(3 downto 0)"
13077o 77
13078suid 159,0
13079i "(others => '0')"
13080)
13081)
13082uid 8875,0
13083)
13084*449 (LeafLogPort
13085port (LogicalPort
13086m 4
13087decl (Decl
13088n "CLK_50"
13089t "std_logic"
13090o 63
13091suid 163,0
13092)
13093)
13094uid 9516,0
13095)
13096*450 (LeafLogPort
13097port (LogicalPort
13098m 4
13099decl (Decl
13100n "CLK_25_PS1"
13101t "std_logic"
13102o 62
13103suid 164,0
13104)
13105)
13106uid 10056,0
13107)
13108*451 (LeafLogPort
13109port (LogicalPort
13110m 4
13111decl (Decl
13112n "adc_clk_en"
13113t "std_logic"
13114o 73
13115suid 165,0
13116i "'0'"
13117)
13118)
13119uid 10058,0
13120)
13121*452 (LeafLogPort
13122port (LogicalPort
13123m 1
13124decl (Decl
13125n "A0_T"
13126t "std_logic_vector"
13127b "(7 DOWNTO 0)"
13128o 19
13129suid 166,0
13130i "(others => '0')"
13131)
13132)
13133uid 10294,0
13134scheme 0
13135)
13136*453 (LeafLogPort
13137port (LogicalPort
13138m 4
13139decl (Decl
13140n "CLK50_OUT"
13141t "std_logic"
13142o 60
13143suid 184,0
13144)
13145)
13146uid 10704,0
13147)
13148*454 (LeafLogPort
13149port (LogicalPort
13150m 4
13151decl (Decl
13152n "CLK25_OUT"
13153t "std_logic"
13154o 58
13155suid 185,0
13156)
13157)
13158uid 10706,0
13159)
13160*455 (LeafLogPort
13161port (LogicalPort
13162m 4
13163decl (Decl
13164n "CLK25_PSOUT"
13165t "std_logic"
13166o 59
13167suid 186,0
13168)
13169)
13170uid 10708,0
13171)
13172*456 (LeafLogPort
13173port (LogicalPort
13174m 4
13175decl (Decl
13176n "PS_DIR_IN"
13177t "std_logic"
13178o 70
13179suid 187,0
13180)
13181)
13182uid 10710,0
13183)
13184*457 (LeafLogPort
13185port (LogicalPort
13186m 4
13187decl (Decl
13188n "PSINCDEC_OUT"
13189t "std_logic"
13190o 69
13191suid 190,0
13192)
13193)
13194uid 10716,0
13195)
13196*458 (LeafLogPort
13197port (LogicalPort
13198m 4
13199decl (Decl
13200n "DCM_locked"
13201t "std_logic"
13202preAdd 0
13203posAdd 0
13204o 64
13205suid 191,0
13206)
13207)
13208uid 10718,0
13209)
13210*459 (LeafLogPort
13211port (LogicalPort
13212m 4
13213decl (Decl
13214n "ready"
13215t "std_logic"
13216preAdd 0
13217posAdd 0
13218o 79
13219suid 192,0
13220i "'0'"
13221)
13222)
13223uid 10720,0
13224)
13225*460 (LeafLogPort
13226port (LogicalPort
13227m 4
13228decl (Decl
13229n "shifting"
13230t "std_logic"
13231prec "-- status:"
13232preAdd 0
13233posAdd 0
13234o 81
13235suid 193,0
13236i "'0'"
13237)
13238)
13239uid 10722,0
13240)
13241*461 (LeafLogPort
13242port (LogicalPort
13243m 4
13244decl (Decl
13245n "PSDONE_extraOUT"
13246t "std_logic"
13247o 67
13248suid 194,0
13249)
13250)
13251uid 10724,0
13252)
13253*462 (LeafLogPort
13254port (LogicalPort
13255m 4
13256decl (Decl
13257n "PSCLK_OUT"
13258t "std_logic"
13259o 66
13260suid 195,0
13261)
13262)
13263uid 10726,0
13264)
13265*463 (LeafLogPort
13266port (LogicalPort
13267m 4
13268decl (Decl
13269n "LOCKED_extraOUT"
13270t "std_logic"
13271o 65
13272suid 196,0
13273)
13274)
13275uid 10728,0
13276)
13277*464 (LeafLogPort
13278port (LogicalPort
13279decl (Decl
13280n "RS485_C_DI"
13281t "std_logic"
13282o 13
13283suid 197,0
13284)
13285)
13286uid 11084,0
13287scheme 0
13288)
13289*465 (LeafLogPort
13290port (LogicalPort
13291m 1
13292decl (Decl
13293n "RS485_C_DO"
13294t "std_logic"
13295o 39
13296suid 198,0
13297)
13298)
13299uid 11086,0
13300scheme 0
13301)
13302*466 (LeafLogPort
13303port (LogicalPort
13304decl (Decl
13305n "RS485_E_DI"
13306t "std_logic"
13307o 14
13308suid 200,0
13309)
13310)
13311uid 11504,0
13312scheme 0
13313)
13314*467 (LeafLogPort
13315port (LogicalPort
13316decl (Decl
13317n "RS485_E_DO"
13318t "std_logic"
13319o 15
13320suid 201,0
13321)
13322)
13323uid 11506,0
13324scheme 0
13325)
13326*468 (LeafLogPort
13327port (LogicalPort
13328m 1
13329decl (Decl
13330n "SRIN"
13331t "std_logic"
13332o 44
13333suid 203,0
13334i "'0'"
13335)
13336)
13337uid 12336,0
13338)
13339*469 (LeafLogPort
13340port (LogicalPort
13341m 1
13342decl (Decl
13343n "AMBER_LED"
13344t "std_logic"
13345o 21
13346suid 207,0
13347)
13348)
13349uid 12768,0
13350)
13351*470 (LeafLogPort
13352port (LogicalPort
13353m 1
13354decl (Decl
13355n "GREEN_LED"
13356t "std_logic"
13357o 34
13358suid 208,0
13359)
13360)
13361uid 12770,0
13362)
13363*471 (LeafLogPort
13364port (LogicalPort
13365m 1
13366decl (Decl
13367n "RED_LED"
13368t "std_logic"
13369o 37
13370suid 209,0
13371)
13372)
13373uid 12772,0
13374)
13375*472 (LeafLogPort
13376port (LogicalPort
13377decl (Decl
13378n "POSITION_ID"
13379t "std_logic_vector"
13380b "( 5 DOWNTO 0 )"
13381o 11
13382suid 210,0
13383)
13384)
13385uid 13514,0
13386scheme 0
13387)
13388*473 (LeafLogPort
13389port (LogicalPort
13390decl (Decl
13391n "REFCLK"
13392t "std_logic"
13393o 12
13394suid 211,0
13395)
13396)
13397uid 13626,0
13398scheme 0
13399)
13400]
13401)
13402pdm (PhysicalDM
13403displayShortBounds 1
13404editShortBounds 1
13405uid 67,0
13406optionalChildren [
13407*474 (Sheet
13408sheetRow (SheetRow
13409headerVa (MVa
13410cellColor "49152,49152,49152"
13411fontColor "0,0,0"
13412font "Tahoma,10,0"
13413)
13414cellVa (MVa
13415cellColor "65535,65535,65535"
13416fontColor "0,0,0"
13417font "Tahoma,10,0"
13418)
13419groupVa (MVa
13420cellColor "39936,56832,65280"
13421fontColor "0,0,0"
13422font "Tahoma,10,0"
13423)
13424emptyMRCItem *475 (MRCItem
13425litem &382
13426pos 79
13427dimension 20
13428)
13429uid 69,0
13430optionalChildren [
13431*476 (MRCItem
13432litem &383
13433pos 0
13434dimension 20
13435uid 70,0
13436)
13437*477 (MRCItem
13438litem &384
13439pos 1
13440dimension 23
13441uid 71,0
13442)
13443*478 (MRCItem
13444litem &385
13445pos 2
13446hidden 1
13447dimension 20
13448uid 72,0
13449)
13450*479 (MRCItem
13451litem &395
13452pos 52
13453dimension 20
13454uid 328,0
13455)
13456*480 (MRCItem
13457litem &396
13458pos 53
13459dimension 20
13460uid 330,0
13461)
13462*481 (MRCItem
13463litem &397
13464pos 54
13465dimension 20
13466uid 1492,0
13467)
13468*482 (MRCItem
13469litem &398
13470pos 0
13471dimension 20
13472uid 2436,0
13473)
13474*483 (MRCItem
13475litem &399
13476pos 55
13477dimension 20
13478uid 2438,0
13479)
13480*484 (MRCItem
13481litem &400
13482pos 56
13483dimension 20
13484uid 3038,0
13485)
13486*485 (MRCItem
13487litem &401
13488pos 1
13489dimension 20
13490uid 3040,0
13491)
13492*486 (MRCItem
13493litem &402
13494pos 2
13495dimension 20
13496uid 3277,0
13497)
13498*487 (MRCItem
13499litem &403
13500pos 3
13501dimension 20
13502uid 3279,0
13503)
13504*488 (MRCItem
13505litem &404
13506pos 4
13507dimension 20
13508uid 3281,0
13509)
13510*489 (MRCItem
13511litem &405
13512pos 57
13513dimension 20
13514uid 3283,0
13515)
13516*490 (MRCItem
13517litem &406
13518pos 5
13519dimension 20
13520uid 3383,0
13521)
13522*491 (MRCItem
13523litem &407 <