source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd@ 10123

Last change on this file since 10123 was 10123, checked in by neise, 12 years ago
jumper selectable MAC and IP address choice. D_T7 jumper selects if in_can (no jumper) or not in cam(jumper set) D_T6 jumper selects if in Dortmund (jumper set) or at ETHZ (jumper not set)
File size: 178.6 KB
Line 
1DocumentHdrVersion "1.1"
2Header (DocumentHdr
3version 2
4dmPackageRefs [
5(DmPackageRef
6library "ieee"
7unitName "std_logic_1164"
8)
9(DmPackageRef
10library "ieee"
11unitName "std_logic_arith"
12)
13(DmPackageRef
14library "IEEE"
15unitName "NUMERIC_STD"
16)
17(DmPackageRef
18library "ieee"
19unitName "std_logic_unsigned"
20)
21(DmPackageRef
22library "FACT_FAD_lib"
23unitName "fad_definitions"
24)
25]
26instances [
27(Instance
28name "I_board_main"
29duLibraryName "FACT_FAD_lib"
30duName "FAD_main"
31elements [
32(GiElement
33name "RAMADDRWIDTH64b"
34type "integer"
35value "LOG2_OF_RAM_SIZE_64B"
36)
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38mwi 0
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60embeddedInstances [
61(EmbeddedInstance
62name "eb_ID"
63number "1"
64)
65(EmbeddedInstance
66name "ADC_CLK"
67number "2"
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69(EmbeddedInstance
70name "ADC_DATA"
71number "3"
72)
73(EmbeddedInstance
74name "SRCLK"
75number "4"
76)
77(EmbeddedInstance
78name "T_CS"
79number "5"
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81(EmbeddedInstance
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98libraryRefs [
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100"FACT_FAD_lib"
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102)
103version "29.1"
104appVersion "2009.2 (Build 10)"
105noEmbeddedEditors 1
106model (BlockDiag
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111value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
112)
113(vvPair
114variable "HDSDir"
115value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
116)
117(vvPair
118variable "SideDataDesignDir"
119value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.info"
120)
121(vvPair
122variable "SideDataUserDir"
123value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_@board\\struct.bd.user"
124)
125(vvPair
126variable "SourceDir"
127value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
128)
129(vvPair
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133(vvPair
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149(vvPair
150variable "date"
151value "27.01.2011"
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159value "Donnerstag"
160)
161(vvPair
162variable "dd"
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179value "struct.bd"
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189(vvPair
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194variable "language"
195value "VHDL"
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197(vvPair
198variable "library"
199value "FACT_FAD_lib"
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202variable "library_downstream_HdsLintPlugin"
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205(vvPair
206variable "library_downstream_ISEPARInvoke"
207value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
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209(vvPair
210variable "library_downstream_ImpactInvoke"
211value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
212)
213(vvPair
214variable "library_downstream_ModelSimCompiler"
215value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
216)
217(vvPair
218variable "library_downstream_XSTDataPrep"
219value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
220)
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222variable "mm"
223value "01"
224)
225(vvPair
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244)
245(vvPair
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247value "<Undefined Variable>"
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249(vvPair
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251value "FACT_FAD"
252)
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256)
257(vvPair
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267value "<TBD>"
268)
269(vvPair
270variable "task_NC-SimPath"
271value "<TBD>"
272)
273(vvPair
274variable "task_PrecisionRTLPath"
275value "<TBD>"
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277(vvPair
278variable "task_QuestaSimPath"
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281(vvPair
282variable "task_VCSPath"
283value "<TBD>"
284)
285(vvPair
286variable "this_ext"
287value "bd"
288)
289(vvPair
290variable "this_file"
291value "struct"
292)
293(vvPair
294variable "this_file_logical"
295value "struct"
296)
297(vvPair
298variable "time"
299value "17:58:52"
300)
301(vvPair
302variable "unit"
303value "FAD_Board"
304)
305(vvPair
306variable "user"
307value "dneise"
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309(vvPair
310variable "version"
311value "2009.2 (Build 10)"
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313(vvPair
314variable "view"
315value "struct"
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317(vvPair
318variable "year"
319value "2011"
320)
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989)
990*22 (CptPort
991uid 191,0
992ps "OnEdgeStrategy"
993shape (Triangle
994uid 192,0
995ro 270
996va (VaSet
997vasetType 1
998fg "0,65535,0"
999)
1000xt "80000,73625,80750,74375"
1001)
1002tg (CPTG
1003uid 193,0
1004ps "CptPortTextPlaceStrategy"
1005stg "RightVerticalLayoutStrategy"
1006f (Text
1007uid 194,0
1008va (VaSet
1009)
1010xt "76300,73500,79000,74500"
1011st "wiz_int"
1012ju 2
1013blo "79000,74300"
1014)
1015)
1016thePort (LogicalPort
1017decl (Decl
1018n "wiz_int"
1019t "std_logic"
1020o 12
1021suid 31,0
1022)
1023)
1024)
1025*23 (CptPort
1026uid 195,0
1027ps "OnEdgeStrategy"
1028shape (Triangle
1029uid 196,0
1030ro 90
1031va (VaSet
1032vasetType 1
1033fg "0,65535,0"
1034)
1035xt "80000,71625,80750,72375"
1036)
1037tg (CPTG
1038uid 197,0
1039ps "CptPortTextPlaceStrategy"
1040stg "RightVerticalLayoutStrategy"
1041f (Text
1042uid 198,0
1043va (VaSet
1044)
1045xt "76400,71500,79000,72500"
1046st "wiz_rd"
1047ju 2
1048blo "79000,72300"
1049)
1050)
1051thePort (LogicalPort
1052m 1
1053decl (Decl
1054n "wiz_rd"
1055t "std_logic"
1056o 46
1057suid 30,0
1058i "'1'"
1059)
1060)
1061)
1062*24 (CptPort
1063uid 199,0
1064ps "OnEdgeStrategy"
1065shape (Triangle
1066uid 200,0
1067ro 90
1068va (VaSet
1069vasetType 1
1070fg "0,65535,0"
1071)
1072xt "80000,72625,80750,73375"
1073)
1074tg (CPTG
1075uid 201,0
1076ps "CptPortTextPlaceStrategy"
1077stg "RightVerticalLayoutStrategy"
1078f (Text
1079uid 202,0
1080va (VaSet
1081)
1082xt "76300,72500,79000,73500"
1083st "wiz_wr"
1084ju 2
1085blo "79000,73300"
1086)
1087)
1088thePort (LogicalPort
1089m 1
1090decl (Decl
1091n "wiz_wr"
1092t "std_logic"
1093o 48
1094suid 29,0
1095i "'1'"
1096)
1097)
1098)
1099*25 (CptPort
1100uid 1304,0
1101ps "OnEdgeStrategy"
1102shape (Triangle
1103uid 1305,0
1104ro 270
1105va (VaSet
1106vasetType 1
1107fg "0,65535,0"
1108)
1109xt "51250,69625,52000,70375"
1110)
1111tg (CPTG
1112uid 1306,0
1113ps "CptPortTextPlaceStrategy"
1114stg "VerticalLayoutStrategy"
1115f (Text
1116uid 1307,0
1117va (VaSet
1118)
1119xt "53000,69500,57500,70500"
1120st "CLK_25_PS"
1121blo "53000,70300"
1122)
1123)
1124thePort (LogicalPort
1125m 1
1126decl (Decl
1127n "CLK_25_PS"
1128t "std_logic"
1129o 16
1130suid 35,0
1131)
1132)
1133)
1134*26 (CptPort
1135uid 1369,0
1136ps "OnEdgeStrategy"
1137shape (Triangle
1138uid 1370,0
1139ro 270
1140va (VaSet
1141vasetType 1
1142fg "0,65535,0"
1143)
1144xt "51250,68625,52000,69375"
1145)
1146tg (CPTG
1147uid 1371,0
1148ps "CptPortTextPlaceStrategy"
1149stg "VerticalLayoutStrategy"
1150f (Text
1151uid 1372,0
1152va (VaSet
1153)
1154xt "53000,68500,56100,69500"
1155st "CLK_50"
1156blo "53000,69300"
1157)
1158)
1159thePort (LogicalPort
1160m 1
1161decl (Decl
1162n "CLK_50"
1163t "std_logic"
1164o 17
1165suid 37,0
1166)
1167)
1168)
1169*27 (CptPort
1170uid 1385,0
1171ps "OnEdgeStrategy"
1172shape (Triangle
1173uid 1386,0
1174ro 90
1175va (VaSet
1176vasetType 1
1177fg "0,65535,0"
1178)
1179xt "51250,67625,52000,68375"
1180)
1181tg (CPTG
1182uid 1387,0
1183ps "CptPortTextPlaceStrategy"
1184stg "VerticalLayoutStrategy"
1185f (Text
1186uid 1388,0
1187va (VaSet
1188)
1189xt "53000,67500,54900,68500"
1190st "CLK"
1191blo "53000,68300"
1192)
1193)
1194thePort (LogicalPort
1195decl (Decl
1196n "CLK"
1197t "std_logic"
1198o 1
1199suid 38,0
1200)
1201)
1202)
1203*28 (CptPort
1204uid 1389,0
1205ps "OnEdgeStrategy"
1206shape (Triangle
1207uid 1390,0
1208ro 90
1209va (VaSet
1210vasetType 1
1211fg "0,65535,0"
1212)
1213xt "51250,94625,52000,95375"
1214)
1215tg (CPTG
1216uid 1391,0
1217ps "CptPortTextPlaceStrategy"
1218stg "VerticalLayoutStrategy"
1219f (Text
1220uid 1392,0
1221va (VaSet
1222)
1223xt "53000,94500,58900,95500"
1224st "adc_data_array"
1225blo "53000,95300"
1226)
1227)
1228thePort (LogicalPort
1229decl (Decl
1230n "adc_data_array"
1231t "adc_data_array_type"
1232o 7
1233suid 39,0
1234)
1235)
1236)
1237*29 (CptPort
1238uid 1511,0
1239ps "OnEdgeStrategy"
1240shape (Triangle
1241uid 1512,0
1242ro 90
1243va (VaSet
1244vasetType 1
1245fg "0,65535,0"
1246)
1247xt "51250,88625,52000,89375"
1248)
1249tg (CPTG
1250uid 1513,0
1251ps "CptPortTextPlaceStrategy"
1252stg "VerticalLayoutStrategy"
1253f (Text
1254uid 1514,0
1255va (VaSet
1256)
1257xt "53000,88500,61000,89500"
1258st "adc_otr_array : (3:0)"
1259blo "53000,89300"
1260)
1261)
1262thePort (LogicalPort
1263decl (Decl
1264n "adc_otr_array"
1265t "std_logic_vector"
1266b "(3 DOWNTO 0)"
1267o 8
1268suid 40,0
1269)
1270)
1271)
1272*30 (CptPort
1273uid 1572,0
1274ps "OnEdgeStrategy"
1275shape (Triangle
1276uid 1573,0
1277ro 270
1278va (VaSet
1279vasetType 1
1280fg "0,65535,0"
1281)
1282xt "51250,108625,52000,109375"
1283)
1284tg (CPTG
1285uid 1574,0
1286ps "CptPortTextPlaceStrategy"
1287stg "VerticalLayoutStrategy"
1288f (Text
1289uid 1575,0
1290va (VaSet
1291)
1292xt "53000,108500,61500,109500"
1293st "drs_channel_id : (3:0)"
1294blo "53000,109300"
1295)
1296)
1297thePort (LogicalPort
1298m 1
1299decl (Decl
1300n "drs_channel_id"
1301t "std_logic_vector"
1302b "(3 downto 0)"
1303o 33
1304suid 48,0
1305i "(others => '0')"
1306)
1307)
1308)
1309*31 (CptPort
1310uid 1576,0
1311ps "OnEdgeStrategy"
1312shape (Triangle
1313uid 1577,0
1314ro 270
1315va (VaSet
1316vasetType 1
1317fg "0,65535,0"
1318)
1319xt "51250,109625,52000,110375"
1320)
1321tg (CPTG
1322uid 1578,0
1323ps "CptPortTextPlaceStrategy"
1324stg "VerticalLayoutStrategy"
1325f (Text
1326uid 1579,0
1327va (VaSet
1328)
1329xt "53000,109500,57300,110500"
1330st "drs_dwrite"
1331blo "53000,110300"
1332)
1333)
1334thePort (LogicalPort
1335m 1
1336decl (Decl
1337n "drs_dwrite"
1338t "std_logic"
1339o 34
1340suid 49,0
1341i "'1'"
1342)
1343)
1344)
1345*32 (CptPort
1346uid 1588,0
1347ps "OnEdgeStrategy"
1348shape (Triangle
1349uid 1589,0
1350ro 90
1351va (VaSet
1352vasetType 1
1353fg "0,65535,0"
1354)
1355xt "51250,104625,52000,105375"
1356)
1357tg (CPTG
1358uid 1590,0
1359ps "CptPortTextPlaceStrategy"
1360stg "VerticalLayoutStrategy"
1361f (Text
1362uid 1591,0
1363va (VaSet
1364)
1365xt "53000,104500,58400,105500"
1366st "SROUT_in_0"
1367blo "53000,105300"
1368)
1369)
1370thePort (LogicalPort
1371decl (Decl
1372n "SROUT_in_0"
1373t "std_logic"
1374o 3
1375suid 42,0
1376)
1377)
1378)
1379*33 (CptPort
1380uid 1592,0
1381ps "OnEdgeStrategy"
1382shape (Triangle
1383uid 1593,0
1384ro 90
1385va (VaSet
1386vasetType 1
1387fg "0,65535,0"
1388)
1389xt "51250,105625,52000,106375"
1390)
1391tg (CPTG
1392uid 1594,0
1393ps "CptPortTextPlaceStrategy"
1394stg "VerticalLayoutStrategy"
1395f (Text
1396uid 1595,0
1397va (VaSet
1398)
1399xt "53000,105500,58400,106500"
1400st "SROUT_in_1"
1401blo "53000,106300"
1402)
1403)
1404thePort (LogicalPort
1405decl (Decl
1406n "SROUT_in_1"
1407t "std_logic"
1408o 4
1409suid 43,0
1410)
1411)
1412)
1413*34 (CptPort
1414uid 1596,0
1415ps "OnEdgeStrategy"
1416shape (Triangle
1417uid 1597,0
1418ro 90
1419va (VaSet
1420vasetType 1
1421fg "0,65535,0"
1422)
1423xt "51250,106625,52000,107375"
1424)
1425tg (CPTG
1426uid 1598,0
1427ps "CptPortTextPlaceStrategy"
1428stg "VerticalLayoutStrategy"
1429f (Text
1430uid 1599,0
1431va (VaSet
1432)
1433xt "53000,106500,58400,107500"
1434st "SROUT_in_2"
1435blo "53000,107300"
1436)
1437)
1438thePort (LogicalPort
1439decl (Decl
1440n "SROUT_in_2"
1441t "std_logic"
1442o 5
1443suid 44,0
1444)
1445)
1446)
1447*35 (CptPort
1448uid 1600,0
1449ps "OnEdgeStrategy"
1450shape (Triangle
1451uid 1601,0
1452ro 90
1453va (VaSet
1454vasetType 1
1455fg "0,65535,0"
1456)
1457xt "51250,107625,52000,108375"
1458)
1459tg (CPTG
1460uid 1602,0
1461ps "CptPortTextPlaceStrategy"
1462stg "VerticalLayoutStrategy"
1463f (Text
1464uid 1603,0
1465va (VaSet
1466)
1467xt "53000,107500,58400,108500"
1468st "SROUT_in_3"
1469blo "53000,108300"
1470)
1471)
1472thePort (LogicalPort
1473decl (Decl
1474n "SROUT_in_3"
1475t "std_logic"
1476o 6
1477suid 45,0
1478)
1479)
1480)
1481*36 (CptPort
1482uid 2379,0
1483ps "OnEdgeStrategy"
1484shape (Triangle
1485uid 2380,0
1486ro 270
1487va (VaSet
1488vasetType 1
1489fg "0,65535,0"
1490)
1491xt "51250,110625,52000,111375"
1492)
1493tg (CPTG
1494uid 2381,0
1495ps "CptPortTextPlaceStrategy"
1496stg "VerticalLayoutStrategy"
1497f (Text
1498uid 2382,0
1499va (VaSet
1500)
1501xt "53000,110500,57200,111500"
1502st "RSRLOAD"
1503blo "53000,111300"
1504)
1505)
1506thePort (LogicalPort
1507m 1
1508decl (Decl
1509n "RSRLOAD"
1510t "std_logic"
1511o 24
1512suid 56,0
1513i "'0'"
1514)
1515)
1516)
1517*37 (CptPort
1518uid 2383,0
1519ps "OnEdgeStrategy"
1520shape (Triangle
1521uid 2384,0
1522ro 270
1523va (VaSet
1524vasetType 1
1525fg "0,65535,0"
1526)
1527xt "51250,112625,52000,113375"
1528)
1529tg (CPTG
1530uid 2385,0
1531ps "CptPortTextPlaceStrategy"
1532stg "VerticalLayoutStrategy"
1533f (Text
1534uid 2386,0
1535va (VaSet
1536)
1537xt "53000,112500,56000,113500"
1538st "SRCLK"
1539blo "53000,113300"
1540)
1541)
1542thePort (LogicalPort
1543m 1
1544decl (Decl
1545n "SRCLK"
1546t "std_logic"
1547o 25
1548suid 57,0
1549i "'0'"
1550)
1551)
1552)
1553*38 (CptPort
1554uid 2969,0
1555ps "OnEdgeStrategy"
1556shape (Triangle
1557uid 2970,0
1558ro 90
1559va (VaSet
1560vasetType 1
1561fg "0,65535,0"
1562)
1563xt "80000,86625,80750,87375"
1564)
1565tg (CPTG
1566uid 2971,0
1567ps "CptPortTextPlaceStrategy"
1568stg "RightVerticalLayoutStrategy"
1569f (Text
1570uid 2972,0
1571va (VaSet
1572)
1573xt "76200,86500,79000,87500"
1574st "dac_cs"
1575ju 2
1576blo "79000,87300"
1577)
1578)
1579thePort (LogicalPort
1580m 1
1581decl (Decl
1582n "dac_cs"
1583t "std_logic"
1584o 31
1585suid 64,0
1586)
1587)
1588)
1589*39 (CptPort
1590uid 2973,0
1591ps "OnEdgeStrategy"
1592shape (Triangle
1593uid 2974,0
1594ro 90
1595va (VaSet
1596vasetType 1
1597fg "0,65535,0"
1598)
1599xt "80000,97625,80750,98375"
1600)
1601tg (CPTG
1602uid 2975,0
1603ps "CptPortTextPlaceStrategy"
1604stg "RightVerticalLayoutStrategy"
1605f (Text
1606uid 2976,0
1607va (VaSet
1608)
1609xt "77300,97500,79000,98500"
1610st "sclk"
1611ju 2
1612blo "79000,98300"
1613)
1614)
1615thePort (LogicalPort
1616m 1
1617decl (Decl
1618n "sclk"
1619t "std_logic"
1620o 41
1621suid 62,0
1622)
1623)
1624)
1625*40 (CptPort
1626uid 2977,0
1627ps "OnEdgeStrategy"
1628shape (Triangle
1629uid 2978,0
1630ro 90
1631va (VaSet
1632vasetType 1
1633fg "0,65535,0"
1634)
1635xt "80000,88625,80750,89375"
1636)
1637tg (CPTG
1638uid 2979,0
1639ps "CptPortTextPlaceStrategy"
1640stg "RightVerticalLayoutStrategy"
1641f (Text
1642uid 2980,0
1643va (VaSet
1644)
1645xt "72500,88500,79000,89500"
1646st "sensor_cs : (3:0)"
1647ju 2
1648blo "79000,89300"
1649)
1650)
1651thePort (LogicalPort
1652m 1
1653decl (Decl
1654n "sensor_cs"
1655t "std_logic_vector"
1656b "(3 DOWNTO 0)"
1657o 42
1658suid 65,0
1659)
1660)
1661)
1662*41 (CptPort
1663uid 2981,0
1664ps "OnEdgeStrategy"
1665shape (Diamond
1666uid 2982,0
1667ro 90
1668va (VaSet
1669vasetType 1
1670fg "0,65535,0"
1671)
1672xt "80000,98625,80750,99375"
1673)
1674tg (CPTG
1675uid 2983,0
1676ps "CptPortTextPlaceStrategy"
1677stg "RightVerticalLayoutStrategy"
1678f (Text
1679uid 2984,0
1680va (VaSet
1681)
1682xt "77600,98500,79000,99500"
1683st "sio"
1684ju 2
1685blo "79000,99300"
1686)
1687)
1688thePort (LogicalPort
1689m 2
1690decl (Decl
1691n "sio"
1692t "std_logic"
1693preAdd 0
1694posAdd 0
1695o 49
1696suid 63,0
1697)
1698)
1699)
1700*42 (CptPort
1701uid 3670,0
1702ps "OnEdgeStrategy"
1703shape (Triangle
1704uid 3671,0
1705ro 90
1706va (VaSet
1707vasetType 1
1708fg "0,65535,0"
1709)
1710xt "80000,99625,80750,100375"
1711)
1712tg (CPTG
1713uid 3672,0
1714ps "CptPortTextPlaceStrategy"
1715stg "RightVerticalLayoutStrategy"
1716f (Text
1717uid 3673,0
1718va (VaSet
1719)
1720xt "77000,99500,79000,100500"
1721st "mosi"
1722ju 2
1723blo "79000,100300"
1724)
1725)
1726thePort (LogicalPort
1727m 1
1728decl (Decl
1729n "mosi"
1730t "std_logic"
1731o 37
1732suid 66,0
1733i "'0'"
1734)
1735)
1736)
1737*43 (CptPort
1738uid 6427,0
1739ps "OnEdgeStrategy"
1740shape (Triangle
1741uid 6428,0
1742ro 90
1743va (VaSet
1744vasetType 1
1745fg "0,65535,0"
1746)
1747xt "80000,120625,80750,121375"
1748)
1749tg (CPTG
1750uid 6429,0
1751ps "CptPortTextPlaceStrategy"
1752stg "RightVerticalLayoutStrategy"
1753f (Text
1754uid 6430,0
1755va (VaSet
1756)
1757xt "76000,120500,79000,121500"
1758st "denable"
1759ju 2
1760blo "79000,121300"
1761)
1762)
1763thePort (LogicalPort
1764m 1
1765decl (Decl
1766n "denable"
1767t "std_logic"
1768eolc "-- default domino wave off"
1769posAdd 0
1770o 32
1771suid 67,0
1772i "'0'"
1773)
1774)
1775)
1776*44 (CptPort
1777uid 10046,0
1778ps "OnEdgeStrategy"
1779shape (Triangle
1780uid 10047,0
1781ro 270
1782va (VaSet
1783vasetType 1
1784fg "0,65535,0"
1785)
1786xt "51250,72625,52000,73375"
1787)
1788tg (CPTG
1789uid 10048,0
1790ps "CptPortTextPlaceStrategy"
1791stg "VerticalLayoutStrategy"
1792f (Text
1793uid 10049,0
1794va (VaSet
1795)
1796xt "53000,72500,57500,73500"
1797st "adc_clk_en"
1798blo "53000,73300"
1799)
1800)
1801thePort (LogicalPort
1802m 1
1803decl (Decl
1804n "adc_clk_en"
1805t "std_logic"
1806o 27
1807suid 69,0
1808i "'0'"
1809)
1810)
1811)
1812*45 (CptPort
1813uid 10246,0
1814ps "OnEdgeStrategy"
1815shape (Triangle
1816uid 10247,0
1817ro 90
1818va (VaSet
1819vasetType 1
1820fg "0,65535,0"
1821)
1822xt "80000,129625,80750,130375"
1823)
1824tg (CPTG
1825uid 10248,0
1826ps "CptPortTextPlaceStrategy"
1827stg "RightVerticalLayoutStrategy"
1828f (Text
1829uid 10249,0
1830va (VaSet
1831)
1832xt "73800,129500,79000,130500"
1833st "DCM_locked"
1834ju 2
1835blo "79000,130300"
1836)
1837)
1838thePort (LogicalPort
1839m 1
1840decl (Decl
1841n "DCM_locked"
1842t "std_logic"
1843preAdd 0
1844posAdd 0
1845o 18
1846suid 76,0
1847)
1848)
1849)
1850*46 (CptPort
1851uid 10254,0
1852ps "OnEdgeStrategy"
1853shape (Triangle
1854uid 10255,0
1855ro 90
1856va (VaSet
1857vasetType 1
1858fg "0,65535,0"
1859)
1860xt "80000,135625,80750,136375"
1861)
1862tg (CPTG
1863uid 10256,0
1864ps "CptPortTextPlaceStrategy"
1865stg "RightVerticalLayoutStrategy"
1866f (Text
1867uid 10257,0
1868va (VaSet
1869)
1870xt "71300,135500,79000,136500"
1871st "LOCKED_extraOUT"
1872ju 2
1873blo "79000,136300"
1874)
1875)
1876thePort (LogicalPort
1877m 1
1878decl (Decl
1879n "LOCKED_extraOUT"
1880t "std_logic"
1881o 19
1882suid 70,0
1883)
1884)
1885)
1886*47 (CptPort
1887uid 10258,0
1888ps "OnEdgeStrategy"
1889shape (Triangle
1890uid 10259,0
1891ro 90
1892va (VaSet
1893vasetType 1
1894fg "0,65535,0"
1895)
1896xt "80000,138625,80750,139375"
1897)
1898tg (CPTG
1899uid 10260,0
1900ps "CptPortTextPlaceStrategy"
1901stg "RightVerticalLayoutStrategy"
1902f (Text
1903uid 10261,0
1904va (VaSet
1905)
1906xt "74200,138500,79000,139500"
1907st "offset : (7:0)"
1908ju 2
1909blo "79000,139300"
1910)
1911)
1912thePort (LogicalPort
1913m 1
1914decl (Decl
1915n "offset"
1916t "std_logic_vector"
1917b "(7 downto 0)"
1918preAdd 0
1919posAdd 0
1920o 38
1921suid 77,0
1922i "(OTHERS => '0')"
1923)
1924)
1925)
1926*48 (CptPort
1927uid 10262,0
1928ps "OnEdgeStrategy"
1929shape (Triangle
1930uid 10263,0
1931ro 90
1932va (VaSet
1933vasetType 1
1934fg "0,65535,0"
1935)
1936xt "80000,125625,80750,126375"
1937)
1938tg (CPTG
1939uid 10264,0
1940ps "CptPortTextPlaceStrategy"
1941stg "RightVerticalLayoutStrategy"
1942f (Text
1943uid 10265,0
1944va (VaSet
1945)
1946xt "74600,125500,79000,126500"
1947st "PS_DIR_IN"
1948ju 2
1949blo "79000,126300"
1950)
1951)
1952thePort (LogicalPort
1953m 1
1954decl (Decl
1955n "PS_DIR_IN"
1956t "std_logic"
1957o 23
1958suid 80,0
1959)
1960)
1961)
1962*49 (CptPort
1963uid 10270,0
1964ps "OnEdgeStrategy"
1965shape (Triangle
1966uid 10271,0
1967ro 90
1968va (VaSet
1969vasetType 1
1970fg "0,65535,0"
1971)
1972xt "80000,134625,80750,135375"
1973)
1974tg (CPTG
1975uid 10272,0
1976ps "CptPortTextPlaceStrategy"
1977stg "RightVerticalLayoutStrategy"
1978f (Text
1979uid 10273,0
1980va (VaSet
1981)
1982xt "74000,134500,79000,135500"
1983st "PSCLK_OUT"
1984ju 2
1985blo "79000,135300"
1986)
1987)
1988thePort (LogicalPort
1989m 1
1990decl (Decl
1991n "PSCLK_OUT"
1992t "std_logic"
1993o 20
1994suid 74,0
1995)
1996)
1997)
1998*50 (CptPort
1999uid 10274,0
2000ps "OnEdgeStrategy"
2001shape (Triangle
2002uid 10275,0
2003ro 90
2004va (VaSet
2005vasetType 1
2006fg "0,65535,0"
2007)
2008xt "80000,133625,80750,134375"
2009)
2010tg (CPTG
2011uid 10276,0
2012ps "CptPortTextPlaceStrategy"
2013stg "RightVerticalLayoutStrategy"
2014f (Text
2015uid 10277,0
2016va (VaSet
2017)
2018xt "71200,133500,79000,134500"
2019st "PSDONE_extraOUT"
2020ju 2
2021blo "79000,134300"
2022)
2023)
2024thePort (LogicalPort
2025m 1
2026decl (Decl
2027n "PSDONE_extraOUT"
2028t "std_logic"
2029o 21
2030suid 71,0
2031)
2032)
2033)
2034*51 (CptPort
2035uid 10282,0
2036ps "OnEdgeStrategy"
2037shape (Triangle
2038uid 10283,0
2039ro 90
2040va (VaSet
2041vasetType 1
2042fg "0,65535,0"
2043)
2044xt "80000,127625,80750,128375"
2045)
2046tg (CPTG
2047uid 10284,0
2048ps "CptPortTextPlaceStrategy"
2049stg "RightVerticalLayoutStrategy"
2050f (Text
2051uid 10285,0
2052va (VaSet
2053)
2054xt "72000,127500,79000,128500"
2055st "PSINCDEC_OUT"
2056ju 2
2057blo "79000,128300"
2058)
2059)
2060thePort (LogicalPort
2061m 1
2062decl (Decl
2063n "PSINCDEC_OUT"
2064t "std_logic"
2065o 22
2066suid 72,0
2067)
2068)
2069)
2070*52 (CptPort
2071uid 10286,0
2072ps "OnEdgeStrategy"
2073shape (Triangle
2074uid 10287,0
2075ro 90
2076va (VaSet
2077vasetType 1
2078fg "0,65535,0"
2079)
2080xt "80000,131625,80750,132375"
2081)
2082tg (CPTG
2083uid 10288,0
2084ps "CptPortTextPlaceStrategy"
2085stg "RightVerticalLayoutStrategy"
2086f (Text
2087uid 10289,0
2088va (VaSet
2089)
2090xt "76800,131500,79000,132500"
2091st "ready"
2092ju 2
2093blo "79000,132300"
2094)
2095)
2096thePort (LogicalPort
2097m 1
2098decl (Decl
2099n "ready"
2100t "std_logic"
2101preAdd 0
2102posAdd 0
2103o 39
2104suid 79,0
2105i "'0'"
2106)
2107)
2108)
2109*53 (CptPort
2110uid 10290,0
2111ps "OnEdgeStrategy"
2112shape (Triangle
2113uid 10291,0
2114ro 90
2115va (VaSet
2116vasetType 1
2117fg "0,65535,0"
2118)
2119xt "80000,132625,80750,133375"
2120)
2121tg (CPTG
2122uid 10292,0
2123ps "CptPortTextPlaceStrategy"
2124stg "RightVerticalLayoutStrategy"
2125f (Text
2126uid 10293,0
2127va (VaSet
2128)
2129xt "76100,132500,79000,133500"
2130st "shifting"
2131ju 2
2132blo "79000,133300"
2133)
2134)
2135thePort (LogicalPort
2136m 1
2137decl (Decl
2138n "shifting"
2139t "std_logic"
2140prec "-- status:"
2141preAdd 0
2142posAdd 0
2143o 43
2144suid 78,0
2145i "'0'"
2146)
2147)
2148)
2149*54 (CptPort
2150uid 10320,0
2151ps "OnEdgeStrategy"
2152shape (Triangle
2153uid 10321,0
2154ro 90
2155va (VaSet
2156vasetType 1
2157fg "0,65535,0"
2158)
2159xt "80000,123625,80750,124375"
2160)
2161tg (CPTG
2162uid 10322,0
2163ps "CptPortTextPlaceStrategy"
2164stg "RightVerticalLayoutStrategy"
2165f (Text
2166uid 10323,0
2167va (VaSet
2168)
2169xt "74200,123500,79000,124500"
2170st "CLK25_OUT"
2171ju 2
2172blo "79000,124300"
2173)
2174)
2175thePort (LogicalPort
2176m 1
2177decl (Decl
2178n "CLK25_OUT"
2179t "std_logic"
2180o 13
2181suid 83,0
2182)
2183)
2184)
2185*55 (CptPort
2186uid 10324,0
2187ps "OnEdgeStrategy"
2188shape (Triangle
2189uid 10325,0
2190ro 90
2191va (VaSet
2192vasetType 1
2193fg "0,65535,0"
2194)
2195xt "80000,124625,80750,125375"
2196)
2197tg (CPTG
2198uid 10326,0
2199ps "CptPortTextPlaceStrategy"
2200stg "RightVerticalLayoutStrategy"
2201f (Text
2202uid 10327,0
2203va (VaSet
2204)
2205xt "72800,124500,79000,125500"
2206st "CLK25_PSOUT"
2207ju 2
2208blo "79000,125300"
2209)
2210)
2211thePort (LogicalPort
2212m 1
2213decl (Decl
2214n "CLK25_PSOUT"
2215t "std_logic"
2216o 14
2217suid 84,0
2218)
2219)
2220)
2221*56 (CptPort
2222uid 10328,0
2223ps "OnEdgeStrategy"
2224shape (Triangle
2225uid 10329,0
2226ro 90
2227va (VaSet
2228vasetType 1
2229fg "0,65535,0"
2230)
2231xt "80000,122625,80750,123375"
2232)
2233tg (CPTG
2234uid 10330,0
2235ps "CptPortTextPlaceStrategy"
2236stg "RightVerticalLayoutStrategy"
2237f (Text
2238uid 10331,0
2239va (VaSet
2240)
2241xt "74200,122500,79000,123500"
2242st "CLK50_OUT"
2243ju 2
2244blo "79000,123300"
2245)
2246)
2247thePort (LogicalPort
2248m 1
2249decl (Decl
2250n "CLK50_OUT"
2251t "std_logic"
2252o 15
2253suid 82,0
2254)
2255)
2256)
2257*57 (CptPort
2258uid 12314,0
2259ps "OnEdgeStrategy"
2260shape (Triangle
2261uid 12315,0
2262ro 90
2263va (VaSet
2264vasetType 1
2265fg "0,65535,0"
2266)
2267xt "80000,139625,80750,140375"
2268)
2269tg (CPTG
2270uid 12316,0
2271ps "CptPortTextPlaceStrategy"
2272stg "RightVerticalLayoutStrategy"
2273f (Text
2274uid 12317,0
2275va (VaSet
2276)
2277xt "75300,139500,79000,140500"
2278st "SRIN_out"
2279ju 2
2280blo "79000,140300"
2281)
2282)
2283thePort (LogicalPort
2284m 1
2285decl (Decl
2286n "SRIN_out"
2287t "std_logic"
2288o 26
2289suid 85,0
2290i "'0'"
2291)
2292)
2293)
2294*58 (CptPort
2295uid 12521,0
2296ps "OnEdgeStrategy"
2297shape (Triangle
2298uid 12522,0
2299ro 90
2300va (VaSet
2301vasetType 1
2302fg "0,65535,0"
2303)
2304xt "80000,140625,80750,141375"
2305)
2306tg (CPTG
2307uid 12523,0
2308ps "CptPortTextPlaceStrategy"
2309stg "RightVerticalLayoutStrategy"
2310f (Text
2311uid 12524,0
2312va (VaSet
2313)
2314xt "76500,140500,79000,141500"
2315st "amber"
2316ju 2
2317blo "79000,141300"
2318)
2319)
2320thePort (LogicalPort
2321m 1
2322decl (Decl
2323n "amber"
2324t "std_logic"
2325o 30
2326suid 87,0
2327)
2328)
2329)
2330*59 (CptPort
2331uid 12525,0
2332ps "OnEdgeStrategy"
2333shape (Triangle
2334uid 12526,0
2335ro 90
2336va (VaSet
2337vasetType 1
2338fg "0,65535,0"
2339)
2340xt "80000,141625,80750,142375"
2341)
2342tg (CPTG
2343uid 12527,0
2344ps "CptPortTextPlaceStrategy"
2345stg "RightVerticalLayoutStrategy"
2346f (Text
2347uid 12528,0
2348va (VaSet
2349)
2350xt "76600,141500,79000,142500"
2351st "green"
2352ju 2
2353blo "79000,142300"
2354)
2355)
2356thePort (LogicalPort
2357m 1
2358decl (Decl
2359n "green"
2360t "std_logic"
2361o 35
2362suid 86,0
2363)
2364)
2365)
2366*60 (CptPort
2367uid 12529,0
2368ps "OnEdgeStrategy"
2369shape (Triangle
2370uid 12530,0
2371ro 90
2372va (VaSet
2373vasetType 1
2374fg "0,65535,0"
2375)
2376xt "80000,142625,80750,143375"
2377)
2378tg (CPTG
2379uid 12531,0
2380ps "CptPortTextPlaceStrategy"
2381stg "RightVerticalLayoutStrategy"
2382f (Text
2383uid 12532,0
2384va (VaSet
2385)
2386xt "77500,142500,79000,143500"
2387st "red"
2388ju 2
2389blo "79000,143300"
2390)
2391)
2392thePort (LogicalPort
2393m 1
2394decl (Decl
2395n "red"
2396t "std_logic"
2397o 40
2398suid 88,0
2399)
2400)
2401)
2402*61 (CptPort
2403uid 13843,0
2404ps "OnEdgeStrategy"
2405shape (Triangle
2406uid 13844,0
2407ro 90
2408va (VaSet
2409vasetType 1
2410fg "0,65535,0"
2411)
2412xt "80000,143625,80750,144375"
2413)
2414tg (CPTG
2415uid 13845,0
2416ps "CptPortTextPlaceStrategy"
2417stg "RightVerticalLayoutStrategy"
2418f (Text
2419uid 13846,0
2420va (VaSet
2421)
2422xt "70500,143500,79000,144500"
2423st "additional_flasher_out"
2424ju 2
2425blo "79000,144300"
2426)
2427)
2428thePort (LogicalPort
2429m 1
2430decl (Decl
2431n "additional_flasher_out"
2432t "std_logic"
2433o 29
2434suid 90,0
2435)
2436)
2437)
2438*62 (CptPort
2439uid 14682,0
2440ps "OnEdgeStrategy"
2441shape (Triangle
2442uid 14683,0
2443ro 90
2444va (VaSet
2445vasetType 1
2446fg "0,65535,0"
2447)
2448xt "51250,138625,52000,139375"
2449)
2450tg (CPTG
2451uid 14684,0
2452ps "CptPortTextPlaceStrategy"
2453stg "VerticalLayoutStrategy"
2454f (Text
2455uid 14685,0
2456va (VaSet
2457)
2458xt "53000,138500,58500,139500"
2459st "D_T_in : (1:0)"
2460blo "53000,139300"
2461)
2462)
2463thePort (LogicalPort
2464decl (Decl
2465n "D_T_in"
2466t "std_logic_vector"
2467b "(1 DOWNTO 0)"
2468o 2
2469suid 91,0
2470)
2471)
2472)
2473]
2474shape (Rectangle
2475uid 170,0
2476va (VaSet
2477vasetType 1
2478fg "0,65535,0"
2479lineColor "0,32896,0"
2480lineWidth 2
2481)
2482xt "52000,66000,80000,145000"
2483)
2484oxt "15000,-1000,43000,27000"
2485ttg (MlTextGroup
2486uid 171,0
2487ps "CenterOffsetStrategy"
2488stg "VerticalLayoutStrategy"
2489textVec [
2490*63 (Text
2491uid 172,0
2492va (VaSet
2493font "Arial,8,1"
2494)
2495xt "55200,141000,61400,142000"
2496st "FACT_FAD_lib"
2497blo "55200,141800"
2498tm "BdLibraryNameMgr"
2499)
2500*64 (Text
2501uid 173,0
2502va (VaSet
2503font "Arial,8,1"
2504)
2505xt "55200,142000,59400,143000"
2506st "FAD_main"
2507blo "55200,142800"
2508tm "CptNameMgr"
2509)
2510*65 (Text
2511uid 174,0
2512va (VaSet
2513font "Arial,8,1"
2514)
2515xt "55200,143000,61000,144000"
2516st "I_board_main"
2517blo "55200,143800"
2518tm "InstanceNameMgr"
2519)
2520]
2521)
2522ga (GenericAssociation
2523uid 175,0
2524ps "EdgeToEdgeStrategy"
2525matrix (Matrix
2526uid 176,0
2527text (MLText
2528uid 177,0
2529va (VaSet
2530font "Courier New,8,0"
2531)
2532xt "52000,65200,81500,66000"
2533st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B ( integer ) "
2534)
2535header ""
2536)
2537elements [
2538(GiElement
2539name "RAMADDRWIDTH64b"
2540type "integer"
2541value "LOG2_OF_RAM_SIZE_64B"
2542)
2543]
2544)
2545viewicon (ZoomableIcon
2546uid 178,0
2547sl 0
2548va (VaSet
2549vasetType 1
2550fg "49152,49152,49152"
2551)
2552xt "52250,143250,53750,144750"
2553iconName "BlockDiagram.png"
2554iconMaskName "BlockDiagram.msk"
2555ftype 1
2556)
2557viewiconposition 0
2558portVis (PortSigDisplay
2559)
2560archFileType "UNKNOWN"
2561)
2562*66 (PortIoIn
2563uid 231,0
2564shape (CompositeShape
2565uid 232,0
2566va (VaSet
2567vasetType 1
2568fg "0,0,32768"
2569)
2570optionalChildren [
2571(Pentagon
2572uid 233,0
2573sl 0
2574ro 270
2575xt "20000,77625,21500,78375"
2576)
2577(Line
2578uid 234,0
2579sl 0
2580ro 270
2581xt "21500,78000,22000,78000"
2582pts [
2583"21500,78000"
2584"22000,78000"
2585]
2586)
2587]
2588)
2589stc 0
2590sf 1
2591tg (WTG
2592uid 235,0
2593ps "PortIoTextPlaceStrategy"
2594stg "STSignalDisplayStrategy"
2595f (Text
2596uid 236,0
2597va (VaSet
2598)
2599xt "16900,77500,19000,78500"
2600st "TRG"
2601ju 2
2602blo "19000,78300"
2603tm "WireNameMgr"
2604)
2605)
2606)
2607*67 (PortIoIn
2608uid 251,0
2609shape (CompositeShape
2610uid 252,0
2611va (VaSet
2612vasetType 1
2613fg "0,0,32768"
2614)
2615optionalChildren [
2616(Pentagon
2617uid 253,0
2618sl 0
2619ro 270
2620xt "19000,67625,20500,68375"
2621)
2622(Line
2623uid 254,0
2624sl 0
2625ro 270
2626xt "20500,68000,21000,68000"
2627pts [
2628"20500,68000"
2629"21000,68000"
2630]
2631)
2632]
2633)
2634stc 0
2635sf 1
2636tg (WTG
2637uid 255,0
2638ps "PortIoTextPlaceStrategy"
2639stg "STSignalDisplayStrategy"
2640f (Text
2641uid 256,0
2642va (VaSet
2643)
2644xt "15200,67500,18000,68500"
2645st "X_50M"
2646ju 2
2647blo "18000,68300"
2648tm "WireNameMgr"
2649)
2650)
2651)
2652*68 (HdlText
2653uid 265,0
2654optionalChildren [
2655*69 (EmbeddedText
2656uid 271,0
2657commentText (CommentText
2658uid 272,0
2659ps "CenterOffsetStrategy"
2660shape (Rectangle
2661uid 273,0
2662va (VaSet
2663vasetType 1
2664fg "65535,65535,65535"
2665lineColor "0,0,32768"
2666lineWidth 2
2667)
2668xt "32000,83000,44000,87000"
2669)
2670oxt "12000,27000,20000,31000"
2671text (MLText
2672uid 274,0
2673va (VaSet
2674)
2675xt "32200,83200,43700,86200"
2676st "
2677-- hard-wired IDs
2678board_id <= LINE(5 downto 2);
2679crate_id <= LINE(1 downto 0);
2680"
2681tm "HdlTextMgr"
2682wrapOption 3
2683visibleHeight 4000
2684visibleWidth 12000
2685)
2686)
2687)
2688]
2689shape (Rectangle
2690uid 266,0
2691va (VaSet
2692vasetType 1
2693fg "65535,65535,37120"
2694lineColor "0,0,32768"
2695lineWidth 2
2696)
2697xt "24000,80000,32000,87000"
2698)
2699oxt "12000,23000,17000,27000"
2700ttg (MlTextGroup
2701uid 267,0
2702ps "CenterOffsetStrategy"
2703stg "VerticalLayoutStrategy"
2704textVec [
2705*70 (Text
2706uid 268,0
2707va (VaSet
2708font "Arial,8,1"
2709)
2710xt "26150,81000,28650,82000"
2711st "eb_ID"
2712blo "26150,81800"
2713tm "HdlTextNameMgr"
2714)
2715*71 (Text
2716uid 269,0
2717va (VaSet
2718font "Arial,8,1"
2719)
2720xt "26150,82000,26950,83000"
2721st "1"
2722blo "26150,82800"
2723tm "HdlTextNumberMgr"
2724)
2725]
2726)
2727viewicon (ZoomableIcon
2728uid 270,0
2729sl 0
2730va (VaSet
2731vasetType 1
2732fg "49152,49152,49152"
2733)
2734xt "24250,85250,25750,86750"
2735iconName "TextFile.png"
2736iconMaskName "TextFile.msk"
2737ftype 21
2738)
2739viewiconposition 0
2740)
2741*72 (Net
2742uid 275,0
2743decl (Decl
2744n "board_id"
2745t "std_logic_vector"
2746b "(3 downto 0)"
2747preAdd 0
2748posAdd 0
2749o 75
2750suid 5,0
2751)
2752declText (MLText
2753uid 276,0
2754va (VaSet
2755font "Courier New,8,0"
2756)
2757xt "39000,63200,67500,64000"
2758st "SIGNAL board_id : std_logic_vector(3 downto 0)"
2759)
2760)
2761*73 (Net
2762uid 283,0
2763decl (Decl
2764n "crate_id"
2765t "std_logic_vector"
2766b "(1 downto 0)"
2767o 76
2768suid 6,0
2769)
2770declText (MLText
2771uid 284,0
2772va (VaSet
2773font "Courier New,8,0"
2774)
2775xt "39000,64000,67500,64800"
2776st "SIGNAL crate_id : std_logic_vector(1 downto 0)"
2777)
2778)
2779*74 (PortIoOut
2780uid 472,0
2781shape (CompositeShape
2782uid 473,0
2783va (VaSet
2784vasetType 1
2785fg "0,0,32768"
2786)
2787optionalChildren [
2788(Pentagon
2789uid 474,0
2790sl 0
2791ro 270
2792xt "111500,70625,113000,71375"
2793)
2794(Line
2795uid 475,0
2796sl 0
2797ro 270
2798xt "111000,71000,111500,71000"
2799pts [
2800"111000,71000"
2801"111500,71000"
2802]
2803)
2804]
2805)
2806stc 0
2807sf 1
2808tg (WTG
2809uid 476,0
2810ps "PortIoTextPlaceStrategy"
2811stg "STSignalDisplayStrategy"
2812f (Text
2813uid 477,0
2814va (VaSet
2815)
2816xt "114000,70500,117100,71500"
2817st "W_RES"
2818blo "114000,71300"
2819tm "WireNameMgr"
2820)
2821)
2822)
2823*75 (PortIoOut
2824uid 478,0
2825shape (CompositeShape
2826uid 479,0
2827va (VaSet
2828vasetType 1
2829fg "0,0,32768"
2830)
2831optionalChildren [
2832(Pentagon
2833uid 480,0
2834sl 0
2835ro 270
2836xt "111500,67625,113000,68375"
2837)
2838(Line
2839uid 481,0
2840sl 0
2841ro 270
2842xt "111000,68000,111500,68000"
2843pts [
2844"111000,68000"
2845"111500,68000"
2846]
2847)
2848]
2849)
2850stc 0
2851sf 1
2852tg (WTG
2853uid 482,0
2854ps "PortIoTextPlaceStrategy"
2855stg "STSignalDisplayStrategy"
2856f (Text
2857uid 483,0
2858va (VaSet
2859)
2860xt "114000,67500,116000,68500"
2861st "W_A"
2862blo "114000,68300"
2863tm "WireNameMgr"
2864)
2865)
2866)
2867*76 (PortIoOut
2868uid 484,0
2869shape (CompositeShape
2870uid 485,0
2871va (VaSet
2872vasetType 1
2873fg "0,0,32768"
2874)
2875optionalChildren [
2876(Pentagon
2877uid 486,0
2878sl 0
2879ro 270
2880xt "111500,74625,113000,75375"
2881)
2882(Line
2883uid 487,0
2884sl 0
2885ro 270
2886xt "111000,75000,111500,75000"
2887pts [
2888"111000,75000"
2889"111500,75000"
2890]
2891)
2892]
2893)
2894stc 0
2895sf 1
2896tg (WTG
2897uid 488,0
2898ps "PortIoTextPlaceStrategy"
2899stg "STSignalDisplayStrategy"
2900f (Text
2901uid 489,0
2902va (VaSet
2903)
2904xt "114000,74500,116600,75500"
2905st "W_CS"
2906blo "114000,75300"
2907tm "WireNameMgr"
2908)
2909)
2910)
2911*77 (PortIoInOut
2912uid 490,0
2913shape (CompositeShape
2914uid 491,0
2915va (VaSet
2916vasetType 1
2917fg "0,0,32768"
2918)
2919optionalChildren [
2920(Hexagon
2921uid 492,0
2922sl 0
2923xt "111500,68625,113000,69375"
2924)
2925(Line
2926uid 493,0
2927sl 0
2928xt "111000,69000,111500,69000"
2929pts [
2930"111000,69000"
2931"111500,69000"
2932]
2933)
2934]
2935)
2936stc 0
2937sf 1
2938tg (WTG
2939uid 494,0
2940ps "PortIoTextPlaceStrategy"
2941stg "STSignalDisplayStrategy"
2942f (Text
2943uid 495,0
2944va (VaSet
2945)
2946xt "114000,68500,116100,69500"
2947st "W_D"
2948blo "114000,69300"
2949tm "WireNameMgr"
2950)
2951)
2952)
2953*78 (PortIoIn
2954uid 496,0
2955shape (CompositeShape
2956uid 497,0
2957va (VaSet
2958vasetType 1
2959fg "0,0,32768"
2960)
2961optionalChildren [
2962(Pentagon
2963uid 498,0
2964sl 0
2965ro 90
2966xt "111500,73625,113000,74375"
2967)
2968(Line
2969uid 499,0
2970sl 0
2971ro 90
2972xt "111000,74000,111500,74000"
2973pts [
2974"111500,74000"
2975"111000,74000"
2976]
2977)
2978]
2979)
2980stc 0
2981sf 1
2982tg (WTG
2983uid 500,0
2984ps "PortIoTextPlaceStrategy"
2985stg "STSignalDisplayStrategy"
2986f (Text
2987uid 501,0
2988va (VaSet
2989)
2990xt "114000,73500,116800,74500"
2991st "W_INT"
2992blo "114000,74300"
2993tm "WireNameMgr"
2994)
2995)
2996)
2997*79 (PortIoOut
2998uid 502,0
2999shape (CompositeShape
3000uid 503,0
3001va (VaSet
3002vasetType 1
3003fg "0,0,32768"
3004)
3005optionalChildren [
3006(Pentagon
3007uid 504,0
3008sl 0
3009ro 270
3010xt "111500,71625,113000,72375"
3011)
3012(Line
3013uid 505,0
3014sl 0
3015ro 270
3016xt "111000,72000,111500,72000"
3017pts [
3018"111000,72000"
3019"111500,72000"
3020]
3021)
3022]
3023)
3024stc 0
3025sf 1
3026tg (WTG
3027uid 506,0
3028ps "PortIoTextPlaceStrategy"
3029stg "STSignalDisplayStrategy"
3030f (Text
3031uid 507,0
3032va (VaSet
3033)
3034xt "114000,71500,116700,72500"
3035st "W_RD"
3036blo "114000,72300"
3037tm "WireNameMgr"
3038)
3039)
3040)
3041*80 (PortIoOut
3042uid 508,0
3043shape (CompositeShape
3044uid 509,0
3045va (VaSet
3046vasetType 1
3047fg "0,0,32768"
3048)
3049optionalChildren [
3050(Pentagon
3051uid 510,0
3052sl 0
3053ro 270
3054xt "111500,72625,113000,73375"
3055)
3056(Line
3057uid 511,0
3058sl 0
3059ro 270
3060xt "111000,73000,111500,73000"
3061pts [
3062"111000,73000"
3063"111500,73000"
3064]
3065)
3066]
3067)
3068stc 0
3069sf 1
3070tg (WTG
3071uid 512,0
3072ps "PortIoTextPlaceStrategy"
3073stg "STSignalDisplayStrategy"
3074f (Text
3075uid 513,0
3076va (VaSet
3077)
3078xt "114000,72500,116800,73500"
3079st "W_WR"
3080blo "114000,73300"
3081tm "WireNameMgr"
3082)
3083)
3084)
3085*81 (Net
3086uid 1465,0
3087decl (Decl
3088n "adc_data_array"
3089t "adc_data_array_type"
3090o 74
3091suid 29,0
3092)
3093declText (MLText
3094uid 1466,0
3095va (VaSet
3096font "Courier New,8,0"
3097)
3098xt "39000,62400,63000,63200"
3099st "SIGNAL adc_data_array : adc_data_array_type"
3100)
3101)
3102*82 (Net
3103uid 2407,0
3104decl (Decl
3105n "RSRLOAD"
3106t "std_logic"
3107o 43
3108suid 57,0
3109i "'0'"
3110)
3111declText (MLText
3112uid 2408,0
3113va (VaSet
3114font "Courier New,8,0"
3115)
3116xt "39000,38200,67500,39000"
3117st "RSRLOAD : std_logic := '0'"
3118)
3119)
3120*83 (PortIoOut
3121uid 2415,0
3122shape (CompositeShape
3123uid 2416,0
3124va (VaSet
3125vasetType 1
3126fg "0,0,32768"
3127)
3128optionalChildren [
3129(Pentagon
3130uid 2417,0
3131sl 0
3132ro 90
3133xt "19000,110625,20500,111375"
3134)
3135(Line
3136uid 2418,0
3137sl 0
3138ro 90
3139xt "20500,111000,21000,111000"
3140pts [
3141"21000,111000"
3142"20500,111000"
3143]
3144)
3145]
3146)
3147stc 0
3148sf 1
3149tg (WTG
3150uid 2419,0
3151ps "PortIoTextPlaceStrategy"
3152stg "STSignalDisplayStrategy"
3153f (Text
3154uid 2420,0
3155va (VaSet
3156)
3157xt "13800,110500,18000,111500"
3158st "RSRLOAD"
3159ju 2
3160blo "18000,111300"
3161tm "WireNameMgr"
3162)
3163)
3164)
3165*84 (Net
3166uid 2421,0
3167decl (Decl
3168n "SRCLK"
3169t "std_logic"
3170o 72
3171suid 58,0
3172i "'0'"
3173)
3174declText (MLText
3175uid 2422,0
3176va (VaSet
3177font "Courier New,8,0"
3178)
3179xt "39000,60800,71000,61600"
3180st "SIGNAL SRCLK : std_logic := '0'"
3181)
3182)
3183*85 (Net
3184uid 3019,0
3185decl (Decl
3186n "sensor_cs"
3187t "std_logic_vector"
3188b "(3 DOWNTO 0)"
3189o 80
3190suid 65,0
3191)
3192declText (MLText
3193uid 3020,0
3194va (VaSet
3195font "Courier New,8,0"
3196)
3197xt "39000,68000,67500,68800"
3198st "SIGNAL sensor_cs : std_logic_vector(3 DOWNTO 0)"
3199)
3200)
3201*86 (Net
3202uid 3025,0
3203decl (Decl
3204n "DAC_CS"
3205t "std_logic"
3206o 27
3207suid 66,0
3208)
3209declText (MLText
3210uid 3026,0
3211va (VaSet
3212font "Courier New,8,0"
3213)
3214xt "39000,25400,54000,26200"
3215st "DAC_CS : std_logic"
3216)
3217)
3218*87 (PortIoOut
3219uid 3153,0
3220shape (CompositeShape
3221uid 3154,0
3222va (VaSet
3223vasetType 1
3224fg "0,0,32768"
3225)
3226optionalChildren [
3227(Pentagon
3228uid 3155,0
3229sl 0
3230ro 90
3231xt "19000,69625,20500,70375"
3232)
3233(Line
3234uid 3156,0
3235sl 0
3236ro 90
3237xt "20500,70000,21000,70000"
3238pts [
3239"21000,70000"
3240"20500,70000"
3241]
3242)
3243]
3244)
3245stc 0
3246sf 1
3247tg (WTG
3248uid 3157,0
3249ps "PortIoTextPlaceStrategy"
3250stg "STSignalDisplayStrategy"
3251f (Text
3252uid 3158,0
3253va (VaSet
3254)
3255xt "15200,69500,18000,70500"
3256st "A_CLK"
3257ju 2
3258blo "18000,70300"
3259tm "WireNameMgr"
3260)
3261)
3262)
3263*88 (Net
3264uid 3216,0
3265decl (Decl
3266n "X_50M"
3267t "STD_LOGIC"
3268preAdd 0
3269posAdd 0
3270o 18
3271suid 67,0
3272)
3273declText (MLText
3274uid 3217,0
3275va (VaSet
3276font "Courier New,8,0"
3277)
3278xt "39000,18200,54000,19000"
3279st "X_50M : STD_LOGIC"
3280)
3281)
3282*89 (Net
3283uid 3226,0
3284decl (Decl
3285n "TRG"
3286t "STD_LOGIC"
3287o 16
3288suid 68,0
3289)
3290declText (MLText
3291uid 3227,0
3292va (VaSet
3293font "Courier New,8,0"
3294)
3295xt "39000,16600,54000,17400"
3296st "TRG : STD_LOGIC"
3297)
3298)
3299*90 (HdlText
3300uid 3248,0
3301optionalChildren [
3302*91 (EmbeddedText
3303uid 3254,0
3304commentText (CommentText
3305uid 3255,0
3306ps "CenterOffsetStrategy"
3307shape (Rectangle
3308uid 3256,0
3309va (VaSet
3310vasetType 1
3311fg "65535,65535,65535"
3312lineColor "0,0,32768"
3313lineWidth 2
3314)
3315xt "29000,71000,41000,77000"
3316)
3317oxt "0,0,18000,5000"
3318text (MLText
3319uid 3257,0
3320va (VaSet
3321)
3322xt "29200,71200,41100,77200"
3323st "
3324-- ADC_CLK 2
3325A_CLK (0) <= CLK_25_PS;
3326A_CLK (1) <= CLK_25_PS;
3327A_CLK (2) <= CLK_25_PS;
3328A_CLK (3) <= CLK_25_PS;
3329"
3330tm "HdlTextMgr"
3331wrapOption 3
3332visibleHeight 6000
3333visibleWidth 12000
3334)
3335)
3336)
3337]
3338shape (Rectangle
3339uid 3249,0
3340va (VaSet
3341vasetType 1
3342fg "65535,65535,37120"
3343lineColor "0,0,32768"
3344lineWidth 2
3345)
3346xt "24000,69000,29000,77000"
3347)
3348oxt "0,0,8000,10000"
3349ttg (MlTextGroup
3350uid 3250,0
3351ps "CenterOffsetStrategy"
3352stg "VerticalLayoutStrategy"
3353textVec [
3354*92 (Text
3355uid 3251,0
3356va (VaSet
3357font "Arial,8,1"
3358)
3359xt "24150,73000,28350,74000"
3360st "ADC_CLK"
3361blo "24150,73800"
3362tm "HdlTextNameMgr"
3363)
3364*93 (Text
3365uid 3252,0
3366va (VaSet
3367font "Arial,8,1"
3368)
3369xt "24150,74000,24950,75000"
3370st "2"
3371blo "24150,74800"
3372tm "HdlTextNumberMgr"
3373)
3374]
3375)
3376viewicon (ZoomableIcon
3377uid 3253,0
3378sl 0
3379va (VaSet
3380vasetType 1
3381fg "49152,49152,49152"
3382)
3383xt "24250,75250,25750,76750"
3384iconName "TextFile.png"
3385iconMaskName "TextFile.msk"
3386ftype 21
3387)
3388viewiconposition 0
3389)
3390*94 (Net
3391uid 3266,0
3392decl (Decl
3393n "A_CLK"
3394t "std_logic_vector"
3395b "(3 downto 0)"
3396o 22
3397suid 71,0
3398)
3399declText (MLText
3400uid 3267,0
3401va (VaSet
3402font "Courier New,8,0"
3403)
3404xt "39000,21400,64000,22200"
3405st "A_CLK : std_logic_vector(3 downto 0)"
3406)
3407)
3408*95 (Net
3409uid 3268,0
3410decl (Decl
3411n "CLK_25_PS"
3412t "std_logic"
3413o 61
3414suid 72,0
3415)
3416declText (MLText
3417uid 3269,0
3418va (VaSet
3419font "Courier New,8,0"
3420)
3421xt "39000,53600,57500,54400"
3422st "SIGNAL CLK_25_PS : std_logic"
3423)
3424)
3425*96 (PortIoOut
3426uid 3284,0
3427shape (CompositeShape
3428uid 3285,0
3429va (VaSet
3430vasetType 1
3431fg "0,0,32768"
3432)
3433optionalChildren [
3434(Pentagon
3435uid 3286,0
3436sl 0
3437ro 90
3438xt "19000,89625,20500,90375"
3439)
3440(Line
3441uid 3287,0
3442sl 0
3443ro 90
3444xt "20500,90000,21000,90000"
3445pts [
3446"21000,90000"
3447"20500,90000"
3448]
3449)
3450]
3451)
3452stc 0
3453sf 1
3454tg (WTG
3455uid 3288,0
3456ps "PortIoTextPlaceStrategy"
3457stg "STSignalDisplayStrategy"
3458f (Text
3459uid 3289,0
3460va (VaSet
3461)
3462xt "14400,89500,18000,90500"
3463st "OE_ADC"
3464ju 2
3465blo "18000,90300"
3466tm "WireNameMgr"
3467)
3468)
3469)
3470*97 (Net
3471uid 3290,0
3472decl (Decl
3473n "OE_ADC"
3474t "STD_LOGIC"
3475preAdd 0
3476posAdd 0
3477o 36
3478suid 73,0
3479)
3480declText (MLText
3481uid 3291,0
3482va (VaSet
3483font "Courier New,8,0"
3484)
3485xt "39000,32600,54000,33400"
3486st "OE_ADC : STD_LOGIC"
3487)
3488)
3489*98 (PortIoIn
3490uid 3292,0
3491shape (CompositeShape
3492uid 3293,0
3493va (VaSet
3494vasetType 1
3495fg "0,0,32768"
3496)
3497optionalChildren [
3498(Pentagon
3499uid 3294,0
3500sl 0
3501ro 270
3502xt "19000,88625,20500,89375"
3503)
3504(Line
3505uid 3295,0
3506sl 0
3507ro 270
3508xt "20500,89000,21000,89000"
3509pts [
3510"20500,89000"
3511"21000,89000"
3512]
3513)
3514]
3515)
3516stc 0
3517sf 1
3518tg (WTG
3519uid 3296,0
3520ps "PortIoTextPlaceStrategy"
3521stg "STSignalDisplayStrategy"
3522f (Text
3523uid 3297,0
3524va (VaSet
3525)
3526xt "15000,88500,18000,89500"
3527st "A_OTR"
3528ju 2
3529blo "18000,89300"
3530tm "WireNameMgr"
3531)
3532)
3533)
3534*99 (Net
3535uid 3298,0
3536decl (Decl
3537n "A_OTR"
3538t "std_logic_vector"
3539b "(3 DOWNTO 0)"
3540o 5
3541suid 74,0
3542)
3543declText (MLText
3544uid 3299,0
3545va (VaSet
3546font "Courier New,8,0"
3547)
3548xt "39000,7000,64000,7800"
3549st "A_OTR : std_logic_vector(3 DOWNTO 0)"
3550)
3551)
3552*100 (HdlText
3553uid 3300,0
3554optionalChildren [
3555*101 (EmbeddedText
3556uid 3306,0
3557commentText (CommentText
3558uid 3307,0
3559ps "CenterOffsetStrategy"
3560shape (Rectangle
3561uid 3308,0
3562va (VaSet
3563vasetType 1
3564fg "65535,65535,65535"
3565lineColor "0,0,32768"
3566lineWidth 2
3567)
3568xt "32000,96000,44000,102000"
3569)
3570oxt "0,0,18000,5000"
3571text (MLText
3572uid 3309,0
3573va (VaSet
3574)
3575xt "32200,96200,44200,102200"
3576st "
3577-- ADC_DATA 3
3578adc_data_array (0) <= A0_D;
3579adc_data_array (1) <= A1_D;
3580adc_data_array (2) <= A2_D;
3581adc_data_array (3) <= A3_D;
3582"
3583tm "HdlTextMgr"
3584wrapOption 3
3585visibleHeight 6000
3586visibleWidth 12000
3587)
3588)
3589)
3590]
3591shape (Rectangle
3592uid 3301,0
3593va (VaSet
3594vasetType 1
3595fg "65535,65535,37120"
3596lineColor "0,0,32768"
3597lineWidth 2
3598)
3599xt "24000,94000,32000,102000"
3600)
3601oxt "0,0,8000,10000"
3602ttg (MlTextGroup
3603uid 3302,0
3604ps "CenterOffsetStrategy"
3605stg "VerticalLayoutStrategy"
3606textVec [
3607*102 (Text
3608uid 3303,0
3609va (VaSet
3610font "Arial,8,1"
3611)
3612xt "27150,95000,31750,96000"
3613st "ADC_DATA"
3614blo "27150,95800"
3615tm "HdlTextNameMgr"
3616)
3617*103 (Text
3618uid 3304,0
3619va (VaSet
3620font "Arial,8,1"
3621)
3622xt "27150,96000,27950,97000"
3623st "3"
3624blo "27150,96800"
3625tm "HdlTextNumberMgr"
3626)
3627]
3628)
3629viewicon (ZoomableIcon
3630uid 3305,0
3631sl 0
3632va (VaSet
3633vasetType 1
3634fg "49152,49152,49152"
3635)
3636xt "24250,100250,25750,101750"
3637iconName "TextFile.png"
3638iconMaskName "TextFile.msk"
3639ftype 21
3640)
3641viewiconposition 0
3642)
3643*104 (PortIoIn
3644uid 3310,0
3645shape (CompositeShape
3646uid 3311,0
3647va (VaSet
3648vasetType 1
3649fg "0,0,32768"
3650)
3651optionalChildren [
3652(Pentagon
3653uid 3312,0
3654sl 0
3655ro 270
3656xt "19000,94625,20500,95375"
3657)
3658(Line
3659uid 3313,0
3660sl 0
3661ro 270
3662xt "20500,95000,21000,95000"
3663pts [
3664"20500,95000"
3665"21000,95000"
3666]
3667)
3668]
3669)
3670stc 0
3671sf 1
3672tg (WTG
3673uid 3314,0
3674ps "PortIoTextPlaceStrategy"
3675stg "STSignalDisplayStrategy"
3676f (Text
3677uid 3315,0
3678va (VaSet
3679)
3680xt "15700,94500,18000,95500"
3681st "A0_D"
3682ju 2
3683blo "18000,95300"
3684tm "WireNameMgr"
3685)
3686)
3687)
3688*105 (PortIoIn
3689uid 3332,0
3690shape (CompositeShape
3691uid 3333,0
3692va (VaSet
3693vasetType 1
3694fg "0,0,32768"
3695)
3696optionalChildren [
3697(Pentagon
3698uid 3334,0
3699sl 0
3700ro 270
3701xt "19000,95625,20500,96375"
3702)
3703(Line
3704uid 3335,0
3705sl 0
3706ro 270
3707xt "20500,96000,21000,96000"
3708pts [
3709"20500,96000"
3710"21000,96000"
3711]
3712)
3713]
3714)
3715stc 0
3716sf 1
3717tg (WTG
3718uid 3336,0
3719ps "PortIoTextPlaceStrategy"
3720stg "STSignalDisplayStrategy"
3721f (Text
3722uid 3337,0
3723va (VaSet
3724)
3725xt "15700,95500,18000,96500"
3726st "A1_D"
3727ju 2
3728blo "18000,96300"
3729tm "WireNameMgr"
3730)
3731)
3732)
3733*106 (PortIoIn
3734uid 3338,0
3735shape (CompositeShape
3736uid 3339,0
3737va (VaSet
3738vasetType 1
3739fg "0,0,32768"
3740)
3741optionalChildren [
3742(Pentagon
3743uid 3340,0
3744sl 0
3745ro 270
3746xt "19000,96625,20500,97375"
3747)
3748(Line
3749uid 3341,0
3750sl 0
3751ro 270
3752xt "20500,97000,21000,97000"
3753pts [
3754"20500,97000"
3755"21000,97000"
3756]
3757)
3758]
3759)
3760stc 0
3761sf 1
3762tg (WTG
3763uid 3342,0
3764ps "PortIoTextPlaceStrategy"
3765stg "STSignalDisplayStrategy"
3766f (Text
3767uid 3343,0
3768va (VaSet
3769)
3770xt "15700,96500,18000,97500"
3771st "A2_D"
3772ju 2
3773blo "18000,97300"
3774tm "WireNameMgr"
3775)
3776)
3777)
3778*107 (PortIoIn
3779uid 3344,0
3780shape (CompositeShape
3781uid 3345,0
3782va (VaSet
3783vasetType 1
3784fg "0,0,32768"
3785)
3786optionalChildren [
3787(Pentagon
3788uid 3346,0
3789sl 0
3790ro 270
3791xt "19000,97625,20500,98375"
3792)
3793(Line
3794uid 3347,0
3795sl 0
3796ro 270
3797xt "20500,98000,21000,98000"
3798pts [
3799"20500,98000"
3800"21000,98000"
3801]
3802)
3803]
3804)
3805stc 0
3806sf 1
3807tg (WTG
3808uid 3348,0
3809ps "PortIoTextPlaceStrategy"
3810stg "STSignalDisplayStrategy"
3811f (Text
3812uid 3349,0
3813va (VaSet
3814)
3815xt "15700,97500,18000,98500"
3816st "A3_D"
3817ju 2
3818blo "18000,98300"
3819tm "WireNameMgr"
3820)
3821)
3822)
3823*108 (Net
3824uid 3374,0
3825decl (Decl
3826n "A0_D"
3827t "std_logic_vector"
3828b "(11 DOWNTO 0)"
3829o 1
3830suid 79,0
3831)
3832declText (MLText
3833uid 3375,0
3834va (VaSet
3835font "Courier New,8,0"
3836)
3837xt "39000,3800,64500,4600"
3838st "A0_D : std_logic_vector(11 DOWNTO 0)"
3839)
3840)
3841*109 (Net
3842uid 3376,0
3843decl (Decl
3844n "A1_D"
3845t "std_logic_vector"
3846b "(11 DOWNTO 0)"
3847o 2
3848suid 80,0
3849)
3850declText (MLText
3851uid 3377,0
3852va (VaSet
3853font "Courier New,8,0"
3854)
3855xt "39000,4600,64500,5400"
3856st "A1_D : std_logic_vector(11 DOWNTO 0)"
3857)
3858)
3859*110 (Net
3860uid 3378,0
3861decl (Decl
3862n "A2_D"
3863t "std_logic_vector"
3864b "(11 DOWNTO 0)"
3865o 3
3866suid 81,0
3867)
3868declText (MLText
3869uid 3379,0
3870va (VaSet
3871font "Courier New,8,0"
3872)
3873xt "39000,5400,64500,6200"
3874st "A2_D : std_logic_vector(11 DOWNTO 0)"
3875)
3876)
3877*111 (Net
3878uid 3380,0
3879decl (Decl
3880n "A3_D"
3881t "std_logic_vector"
3882b "(11 DOWNTO 0)"
3883o 4
3884suid 82,0
3885)
3886declText (MLText
3887uid 3381,0
3888va (VaSet
3889font "Courier New,8,0"
3890)
3891xt "39000,6200,64500,7000"
3892st "A3_D : std_logic_vector(11 DOWNTO 0)"
3893)
3894)
3895*112 (HdlText
3896uid 3394,0
3897optionalChildren [
3898*113 (EmbeddedText
3899uid 3400,0
3900commentText (CommentText
3901uid 3401,0
3902ps "CenterOffsetStrategy"
3903shape (Rectangle
3904uid 3402,0
3905va (VaSet
3906vasetType 1
3907fg "65535,65535,65535"
3908lineColor "0,0,32768"
3909lineWidth 2
3910)
3911xt "32000,114000,44000,120000"
3912)
3913oxt "0,0,18000,5000"
3914text (MLText
3915uid 3403,0
3916va (VaSet
3917)
3918xt "32200,114200,44200,120200"
3919st "
3920-- SRCLK 4
3921D0_SRCLK <= SRCLK;
3922D1_SRCLK <= SRCLK;
3923D2_SRCLK <= SRCLK;
3924D3_SRCLK <= SRCLK;
3925"
3926tm "HdlTextMgr"
3927wrapOption 3
3928visibleHeight 6000
3929visibleWidth 12000
3930)
3931)
3932)
3933]
3934shape (Rectangle
3935uid 3395,0
3936va (VaSet
3937vasetType 1
3938fg "65535,65535,37120"
3939lineColor "0,0,32768"
3940lineWidth 2
3941)
3942xt "24000,112000,32000,120000"
3943)
3944oxt "0,0,8000,10000"
3945ttg (MlTextGroup
3946uid 3396,0
3947ps "CenterOffsetStrategy"
3948stg "VerticalLayoutStrategy"
3949textVec [
3950*114 (Text
3951uid 3397,0
3952va (VaSet
3953font "Arial,8,1"
3954)
3955xt "27150,113000,30350,114000"
3956st "SRCLK"
3957blo "27150,113800"
3958tm "HdlTextNameMgr"
3959)
3960*115 (Text
3961uid 3398,0
3962va (VaSet
3963font "Arial,8,1"
3964)
3965xt "27150,114000,27950,115000"
3966st "4"
3967blo "27150,114800"
3968tm "HdlTextNumberMgr"
3969)
3970]
3971)
3972viewicon (ZoomableIcon
3973uid 3399,0
3974sl 0
3975va (VaSet
3976vasetType 1
3977fg "49152,49152,49152"
3978)
3979xt "24250,118250,25750,119750"
3980iconName "TextFile.png"
3981iconMaskName "TextFile.msk"
3982ftype 21
3983)
3984viewiconposition 0
3985)
3986*116 (Net
3987uid 3460,0
3988decl (Decl
3989n "D0_SRCLK"
3990t "STD_LOGIC"
3991o 23
3992suid 87,0
3993)
3994declText (MLText
3995uid 3461,0
3996va (VaSet
3997font "Courier New,8,0"
3998)
3999xt "39000,22200,54000,23000"
4000st "D0_SRCLK : STD_LOGIC"
4001)
4002)
4003*117 (Net
4004uid 3462,0
4005decl (Decl
4006n "D1_SRCLK"
4007t "STD_LOGIC"
4008o 24
4009suid 88,0
4010)
4011declText (MLText
4012uid 3463,0
4013va (VaSet
4014font "Courier New,8,0"
4015)
4016xt "39000,23000,54000,23800"
4017st "D1_SRCLK : STD_LOGIC"
4018)
4019)
4020*118 (Net
4021uid 3464,0
4022decl (Decl
4023n "D2_SRCLK"
4024t "STD_LOGIC"
4025o 25
4026suid 89,0
4027)
4028declText (MLText
4029uid 3465,0
4030va (VaSet
4031font "Courier New,8,0"
4032)
4033xt "39000,23800,54000,24600"
4034st "D2_SRCLK : STD_LOGIC"
4035)
4036)
4037*119 (Net
4038uid 3466,0
4039decl (Decl
4040n "D3_SRCLK"
4041t "STD_LOGIC"
4042o 26
4043suid 90,0
4044)
4045declText (MLText
4046uid 3467,0
4047va (VaSet
4048font "Courier New,8,0"
4049)
4050xt "39000,24600,54000,25400"
4051st "D3_SRCLK : STD_LOGIC"
4052)
4053)
4054*120 (PortIoIn
4055uid 3476,0
4056shape (CompositeShape
4057uid 3477,0
4058va (VaSet
4059vasetType 1
4060fg "0,0,32768"
4061)
4062optionalChildren [
4063(Pentagon
4064uid 3478,0
4065sl 0
4066ro 270
4067xt "19000,104625,20500,105375"
4068)
4069(Line
4070uid 3479,0
4071sl 0
4072ro 270
4073xt "20500,105000,21000,105000"
4074pts [
4075"20500,105000"
4076"21000,105000"
4077]
4078)
4079]
4080)
4081stc 0
4082sf 1
4083tg (WTG
4084uid 3480,0
4085ps "PortIoTextPlaceStrategy"
4086stg "STSignalDisplayStrategy"
4087f (Text
4088uid 3481,0
4089va (VaSet
4090)
4091xt "13400,104500,18000,105500"
4092st "D0_SROUT"
4093ju 2
4094blo "18000,105300"
4095tm "WireNameMgr"
4096)
4097)
4098)
4099*121 (PortIoIn
4100uid 3482,0
4101shape (CompositeShape
4102uid 3483,0
4103va (VaSet
4104vasetType 1
4105fg "0,0,32768"
4106)
4107optionalChildren [
4108(Pentagon
4109uid 3484,0
4110sl 0
4111ro 270
4112xt "19000,105625,20500,106375"
4113)
4114(Line
4115uid 3485,0
4116sl 0
4117ro 270
4118xt "20500,106000,21000,106000"
4119pts [
4120"20500,106000"
4121"21000,106000"
4122]
4123)
4124]
4125)
4126stc 0
4127sf 1
4128tg (WTG
4129uid 3486,0
4130ps "PortIoTextPlaceStrategy"
4131stg "STSignalDisplayStrategy"
4132f (Text
4133uid 3487,0
4134va (VaSet
4135)
4136xt "13400,105500,18000,106500"
4137st "D1_SROUT"
4138ju 2
4139blo "18000,106300"
4140tm "WireNameMgr"
4141)
4142)
4143)
4144*122 (PortIoIn
4145uid 3488,0
4146shape (CompositeShape
4147uid 3489,0
4148va (VaSet
4149vasetType 1
4150fg "0,0,32768"
4151)
4152optionalChildren [
4153(Pentagon
4154uid 3490,0
4155sl 0
4156ro 270
4157xt "19000,106625,20500,107375"
4158)
4159(Line
4160uid 3491,0
4161sl 0
4162ro 270
4163xt "20500,107000,21000,107000"
4164pts [
4165"20500,107000"
4166"21000,107000"
4167]
4168)
4169]
4170)
4171stc 0
4172sf 1
4173tg (WTG
4174uid 3492,0
4175ps "PortIoTextPlaceStrategy"
4176stg "STSignalDisplayStrategy"
4177f (Text
4178uid 3493,0
4179va (VaSet
4180)
4181xt "13400,106500,18000,107500"
4182st "D2_SROUT"
4183ju 2
4184blo "18000,107300"
4185tm "WireNameMgr"
4186)
4187)
4188)
4189*123 (PortIoIn
4190uid 3494,0
4191shape (CompositeShape
4192uid 3495,0
4193va (VaSet
4194vasetType 1
4195fg "0,0,32768"
4196)
4197optionalChildren [
4198(Pentagon
4199uid 3496,0
4200sl 0
4201ro 270
4202xt "19000,107625,20500,108375"
4203)
4204(Line
4205uid 3497,0
4206sl 0
4207ro 270
4208xt "20500,108000,21000,108000"
4209pts [
4210"20500,108000"
4211"21000,108000"
4212]
4213)
4214]
4215)
4216stc 0
4217sf 1
4218tg (WTG
4219uid 3498,0
4220ps "PortIoTextPlaceStrategy"
4221stg "STSignalDisplayStrategy"
4222f (Text
4223uid 3499,0
4224va (VaSet
4225)
4226xt "13400,107500,18000,108500"
4227st "D3_SROUT"
4228ju 2
4229blo "18000,108300"
4230tm "WireNameMgr"
4231)
4232)
4233)
4234*124 (Net
4235uid 3500,0
4236decl (Decl
4237n "D0_SROUT"
4238t "std_logic"
4239o 6
4240suid 91,0
4241)
4242declText (MLText
4243uid 3501,0
4244va (VaSet
4245font "Courier New,8,0"
4246)
4247xt "39000,7800,54000,8600"
4248st "D0_SROUT : std_logic"
4249)
4250)
4251*125 (Net
4252uid 3502,0
4253decl (Decl
4254n "D1_SROUT"
4255t "std_logic"
4256o 7
4257suid 92,0
4258)
4259declText (MLText
4260uid 3503,0
4261va (VaSet
4262font "Courier New,8,0"
4263)
4264xt "39000,8600,54000,9400"
4265st "D1_SROUT : std_logic"
4266)
4267)
4268*126 (Net
4269uid 3504,0
4270decl (Decl
4271n "D2_SROUT"
4272t "std_logic"
4273o 8
4274suid 93,0
4275)
4276declText (MLText
4277uid 3505,0
4278va (VaSet
4279font "Courier New,8,0"
4280)
4281xt "39000,9400,54000,10200"
4282st "D2_SROUT : std_logic"
4283)
4284)
4285*127 (Net
4286uid 3506,0
4287decl (Decl
4288n "D3_SROUT"
4289t "std_logic"
4290o 9
4291suid 94,0
4292)
4293declText (MLText
4294uid 3507,0
4295va (VaSet
4296font "Courier New,8,0"
4297)
4298xt "39000,10200,54000,11000"
4299st "D3_SROUT : std_logic"
4300)
4301)
4302*128 (PortIoOut
4303uid 3508,0
4304shape (CompositeShape
4305uid 3509,0
4306va (VaSet
4307vasetType 1
4308fg "0,0,32768"
4309)
4310optionalChildren [
4311(Pentagon
4312uid 3510,0
4313sl 0
4314ro 90
4315xt "10000,125625,11500,126375"
4316)
4317(Line
4318uid 3511,0
4319sl 0
4320ro 90
4321xt "11500,126000,12000,126000"
4322pts [
4323"12000,126000"
4324"11500,126000"
4325]
4326)
4327]
4328)
4329stc 0
4330sf 1
4331tg (WTG
4332uid 3512,0
4333ps "PortIoTextPlaceStrategy"
4334stg "STSignalDisplayStrategy"
4335f (Text
4336uid 3513,0
4337va (VaSet
4338)
4339xt "7100,125500,9000,126500"
4340st "D_A"
4341ju 2
4342blo "9000,126300"
4343tm "WireNameMgr"
4344)
4345)
4346)
4347*129 (Net
4348uid 3514,0
4349decl (Decl
4350n "D_A"
4351t "std_logic_vector"
4352b "(3 DOWNTO 0)"
4353o 30
4354suid 95,0
4355i "(others => '0')"
4356)
4357declText (MLText
4358uid 3515,0
4359va (VaSet
4360font "Courier New,8,0"
4361)
4362xt "39000,27800,73500,28600"
4363st "D_A : std_logic_vector(3 DOWNTO 0) := (others => '0')"
4364)
4365)
4366*130 (PortIoOut
4367uid 3516,0
4368shape (CompositeShape
4369uid 3517,0
4370va (VaSet
4371vasetType 1
4372fg "0,0,32768"
4373)
4374optionalChildren [
4375(Pentagon
4376uid 3518,0
4377sl 0
4378ro 90
4379xt "19000,109625,20500,110375"
4380)
4381(Line
4382uid 3519,0
4383sl 0
4384ro 90
4385xt "20500,110000,21000,110000"
4386pts [
4387"21000,110000"
4388"20500,110000"
4389]
4390)
4391]
4392)
4393stc 0
4394sf 1
4395tg (WTG
4396uid 3520,0
4397ps "PortIoTextPlaceStrategy"
4398stg "STSignalDisplayStrategy"
4399f (Text
4400uid 3521,0
4401va (VaSet
4402)
4403xt "14500,109500,18000,110500"
4404st "DWRITE"
4405ju 2
4406blo "18000,110300"
4407tm "WireNameMgr"
4408)
4409)
4410)
4411*131 (Net
4412uid 3522,0
4413decl (Decl
4414n "DWRITE"
4415t "std_logic"
4416o 29
4417suid 96,0
4418i "'0'"
4419)
4420declText (MLText
4421uid 3523,0
4422va (VaSet
4423font "Courier New,8,0"
4424)
4425xt "39000,27000,67500,27800"
4426st "DWRITE : std_logic := '0'"
4427)
4428)
4429*132 (PortIoOut
4430uid 3536,0
4431shape (CompositeShape
4432uid 3537,0
4433va (VaSet
4434vasetType 1
4435fg "0,0,32768"
4436)
4437optionalChildren [
4438(Pentagon
4439uid 3538,0
4440sl 0
4441ro 270
4442xt "111500,86625,113000,87375"
4443)
4444(Line
4445uid 3539,0
4446sl 0
4447ro 270
4448xt "111000,87000,111500,87000"
4449pts [
4450"111000,87000"
4451"111500,87000"
4452]
4453)
4454]
4455)
4456stc 0
4457sf 1
4458tg (WTG
4459uid 3540,0
4460ps "PortIoTextPlaceStrategy"
4461stg "STSignalDisplayStrategy"
4462f (Text
4463uid 3541,0
4464va (VaSet
4465)
4466xt "114000,86500,117600,87500"
4467st "DAC_CS"
4468blo "114000,87300"
4469tm "WireNameMgr"
4470)
4471)
4472)
4473*133 (HdlText
4474uid 3542,0
4475optionalChildren [
4476*134 (EmbeddedText
4477uid 3612,0
4478commentText (CommentText
4479uid 3613,0
4480ps "CenterOffsetStrategy"
4481shape (Rectangle
4482uid 3614,0
4483va (VaSet
4484vasetType 1
4485fg "65535,65535,65535"
4486lineColor "0,0,32768"
4487lineWidth 2
4488)
4489xt "88000,90000,100000,96000"
4490)
4491oxt "0,0,18000,5000"
4492text (MLText
4493uid 3615,0
4494va (VaSet
4495)
4496xt "88200,90200,100100,96200"
4497st "
4498-- T_CS 5
4499T0_CS <= sensor_cs (0);
4500T1_CS <= sensor_cs (1);
4501T2_CS <= sensor_cs (2);
4502T3_CS <= sensor_cs (3);
4503"
4504tm "HdlTextMgr"
4505wrapOption 3
4506visibleHeight 6000
4507visibleWidth 12000
4508)
4509)
4510)
4511]
4512shape (Rectangle
4513uid 3543,0
4514va (VaSet
4515vasetType 1
4516fg "65535,65535,37120"
4517lineColor "0,0,32768"
4518lineWidth 2
4519)
4520xt "100000,88000,108000,96000"
4521)
4522oxt "0,0,8000,10000"
4523ttg (MlTextGroup
4524uid 3544,0
4525ps "CenterOffsetStrategy"
4526stg "VerticalLayoutStrategy"
4527textVec [
4528*135 (Text
4529uid 3545,0
4530va (VaSet
4531font "Arial,8,1"
4532)
4533xt "103150,89000,105550,90000"
4534st "T_CS"
4535blo "103150,89800"
4536tm "HdlTextNameMgr"
4537)
4538*136 (Text
4539uid 3546,0
4540va (VaSet
4541font "Arial,8,1"
4542)
4543xt "103150,90000,103950,91000"
4544st "5"
4545blo "103150,90800"
4546tm "HdlTextNumberMgr"
4547)
4548]
4549)
4550viewicon (ZoomableIcon
4551uid 3547,0
4552sl 0
4553va (VaSet
4554vasetType 1
4555fg "49152,49152,49152"
4556)
4557xt "100250,94250,101750,95750"
4558iconName "TextFile.png"
4559iconMaskName "TextFile.msk"
4560ftype 21
4561)
4562viewiconposition 0
4563)
4564*137 (PortIoOut
4565uid 3548,0
4566shape (CompositeShape
4567uid 3549,0
4568va (VaSet
4569vasetType 1
4570fg "0,0,32768"
4571)
4572optionalChildren [
4573(Pentagon
4574uid 3550,0
4575sl 0
4576ro 270
4577xt "111500,88625,113000,89375"
4578)
4579(Line
4580uid 3551,0
4581sl 0
4582ro 270
4583xt "111000,89000,111500,89000"
4584pts [
4585"111000,89000"
4586"111500,89000"
4587]
4588)
4589]
4590)
4591stc 0
4592sf 1
4593tg (WTG
4594uid 3552,0
4595ps "PortIoTextPlaceStrategy"
4596stg "STSignalDisplayStrategy"
4597f (Text
4598uid 3553,0
4599va (VaSet
4600)
4601xt "114000,88500,116800,89500"
4602st "T0_CS"
4603blo "114000,89300"
4604tm "WireNameMgr"
4605)
4606)
4607)
4608*138 (PortIoOut
4609uid 3554,0
4610shape (CompositeShape
4611uid 3555,0
4612va (VaSet
4613vasetType 1
4614fg "0,0,32768"
4615)
4616optionalChildren [
4617(Pentagon
4618uid 3556,0
4619sl 0
4620ro 270
4621xt "111500,89625,113000,90375"
4622)
4623(Line
4624uid 3557,0
4625sl 0
4626ro 270
4627xt "111000,90000,111500,90000"
4628pts [
4629"111000,90000"
4630"111500,90000"
4631]
4632)
4633]
4634)
4635stc 0
4636sf 1
4637tg (WTG
4638uid 3558,0
4639ps "PortIoTextPlaceStrategy"
4640stg "STSignalDisplayStrategy"
4641f (Text
4642uid 3559,0
4643va (VaSet
4644)
4645xt "114000,89500,116800,90500"
4646st "T1_CS"
4647blo "114000,90300"
4648tm "WireNameMgr"
4649)
4650)
4651)
4652*139 (PortIoOut
4653uid 3560,0
4654shape (CompositeShape
4655uid 3561,0
4656va (VaSet
4657vasetType 1
4658fg "0,0,32768"
4659)
4660optionalChildren [
4661(Pentagon
4662uid 3562,0
4663sl 0
4664ro 270
4665xt "111500,90625,113000,91375"
4666)
4667(Line
4668uid 3563,0
4669sl 0
4670ro 270
4671xt "111000,91000,111500,91000"
4672pts [
4673"111000,91000"
4674"111500,91000"
4675]
4676)
4677]
4678)
4679stc 0
4680sf 1
4681tg (WTG
4682uid 3564,0
4683ps "PortIoTextPlaceStrategy"
4684stg "STSignalDisplayStrategy"
4685f (Text
4686uid 3565,0
4687va (VaSet
4688)
4689xt "114000,90500,116800,91500"
4690st "T2_CS"
4691blo "114000,91300"
4692tm "WireNameMgr"
4693)
4694)
4695)
4696*140 (PortIoOut
4697uid 3566,0
4698shape (CompositeShape
4699uid 3567,0
4700va (VaSet
4701vasetType 1
4702fg "0,0,32768"
4703)
4704optionalChildren [
4705(Pentagon
4706uid 3568,0
4707sl 0
4708ro 270
4709xt "111500,91625,113000,92375"
4710)
4711(Line
4712uid 3569,0
4713sl 0
4714ro 270
4715xt "111000,92000,111500,92000"
4716pts [
4717"111000,92000"
4718"111500,92000"
4719]
4720)
4721]
4722)
4723stc 0
4724sf 1
4725tg (WTG
4726uid 3570,0
4727ps "PortIoTextPlaceStrategy"
4728stg "STSignalDisplayStrategy"
4729f (Text
4730uid 3571,0
4731va (VaSet
4732)
4733xt "114000,91500,116800,92500"
4734st "T3_CS"
4735blo "114000,92300"
4736tm "WireNameMgr"
4737)
4738)
4739)
4740*141 (Net
4741uid 3604,0
4742decl (Decl
4743n "T0_CS"
4744t "std_logic"
4745o 46
4746suid 101,0
4747)
4748declText (MLText
4749uid 3605,0
4750va (VaSet
4751font "Courier New,8,0"
4752)
4753xt "39000,40600,54000,41400"
4754st "T0_CS : std_logic"
4755)
4756)
4757*142 (Net
4758uid 3606,0
4759decl (Decl
4760n "T1_CS"
4761t "std_logic"
4762o 47
4763suid 102,0
4764)
4765declText (MLText
4766uid 3607,0
4767va (VaSet
4768font "Courier New,8,0"
4769)
4770xt "39000,41400,54000,42200"
4771st "T1_CS : std_logic"
4772)
4773)
4774*143 (Net
4775uid 3608,0
4776decl (Decl
4777n "T2_CS"
4778t "std_logic"
4779o 48
4780suid 103,0
4781)
4782declText (MLText
4783uid 3609,0
4784va (VaSet
4785font "Courier New,8,0"
4786)
4787xt "39000,42200,54000,43000"
4788st "T2_CS : std_logic"
4789)
4790)
4791*144 (Net
4792uid 3610,0
4793decl (Decl
4794n "T3_CS"
4795t "std_logic"
4796o 49
4797suid 104,0
4798)
4799declText (MLText
4800uid 3611,0
4801va (VaSet
4802font "Courier New,8,0"
4803)
4804xt "39000,43000,54000,43800"
4805st "T3_CS : std_logic"
4806)
4807)
4808*145 (PortIoOut
4809uid 3624,0
4810shape (CompositeShape
4811uid 3625,0
4812va (VaSet
4813vasetType 1
4814fg "0,0,32768"
4815)
4816optionalChildren [
4817(Pentagon
4818uid 3626,0
4819sl 0
4820ro 270
4821xt "111500,97625,113000,98375"
4822)
4823(Line
4824uid 3627,0
4825sl 0
4826ro 270
4827xt "111000,98000,111500,98000"
4828pts [
4829"111000,98000"
4830"111500,98000"
4831]
4832)
4833]
4834)
4835stc 0
4836sf 1
4837tg (WTG
4838uid 3628,0
4839ps "PortIoTextPlaceStrategy"
4840stg "STSignalDisplayStrategy"
4841f (Text
4842uid 3629,0
4843va (VaSet
4844)
4845xt "113750,97500,116550,98500"
4846st "S_CLK"
4847blo "113750,98300"
4848tm "WireNameMgr"
4849)
4850)
4851)
4852*146 (Net
4853uid 3630,0
4854decl (Decl
4855n "S_CLK"
4856t "std_logic"
4857o 45
4858suid 105,0
4859)
4860declText (MLText
4861uid 3631,0
4862va (VaSet
4863font "Courier New,8,0"
4864)
4865xt "39000,39800,54000,40600"
4866st "S_CLK : std_logic"
4867)
4868)
4869*147 (Net
4870uid 3632,0
4871decl (Decl
4872n "W_A"
4873t "std_logic_vector"
4874b "(9 DOWNTO 0)"
4875o 51
4876suid 106,0
4877)
4878declText (MLText
4879uid 3633,0
4880va (VaSet
4881font "Courier New,8,0"
4882)
4883xt "39000,44600,64000,45400"
4884st "W_A : std_logic_vector(9 DOWNTO 0)"
4885)
4886)
4887*148 (Net
4888uid 3634,0
4889decl (Decl
4890n "W_D"
4891t "std_logic_vector"
4892b "(15 DOWNTO 0)"
4893o 57
4894suid 107,0
4895)
4896declText (MLText
4897uid 3635,0
4898va (VaSet
4899font "Courier New,8,0"
4900)
4901xt "39000,49400,64500,50200"
4902st "W_D : std_logic_vector(15 DOWNTO 0)"
4903)
4904)
4905*149 (Net
4906uid 3636,0
4907decl (Decl
4908n "W_RES"
4909t "std_logic"
4910o 54
4911suid 108,0
4912i "'1'"
4913)
4914declText (MLText
4915uid 3637,0
4916va (VaSet
4917font "Courier New,8,0"
4918)
4919xt "39000,47000,67500,47800"
4920st "W_RES : std_logic := '1'"
4921)
4922)
4923*150 (Net
4924uid 3638,0
4925decl (Decl
4926n "W_RD"
4927t "std_logic"
4928o 53
4929suid 109,0
4930i "'1'"
4931)
4932declText (MLText
4933uid 3639,0
4934va (VaSet
4935font "Courier New,8,0"
4936)
4937xt "39000,46200,67500,47000"
4938st "W_RD : std_logic := '1'"
4939)
4940)
4941*151 (Net
4942uid 3640,0
4943decl (Decl
4944n "W_WR"
4945t "std_logic"
4946o 55
4947suid 110,0
4948i "'1'"
4949)
4950declText (MLText
4951uid 3641,0
4952va (VaSet
4953font "Courier New,8,0"
4954)
4955xt "39000,47800,67500,48600"
4956st "W_WR : std_logic := '1'"
4957)
4958)
4959*152 (Net
4960uid 3642,0
4961decl (Decl
4962n "W_INT"
4963t "std_logic"
4964o 17
4965suid 111,0
4966)
4967declText (MLText
4968uid 3643,0
4969va (VaSet
4970font "Courier New,8,0"
4971)
4972xt "39000,17400,54000,18200"
4973st "W_INT : std_logic"
4974)
4975)
4976*153 (Net
4977uid 3644,0
4978decl (Decl
4979n "W_CS"
4980t "std_logic"
4981o 52
4982suid 112,0
4983i "'1'"
4984)
4985declText (MLText
4986uid 3645,0
4987va (VaSet
4988font "Courier New,8,0"
4989)
4990xt "39000,45400,67500,46200"
4991st "W_CS : std_logic := '1'"
4992)
4993)
4994*154 (PortIoInOut
4995uid 3674,0
4996shape (CompositeShape
4997uid 3675,0
4998va (VaSet
4999vasetType 1
5000fg "0,0,32768"
5001)
5002optionalChildren [
5003(Hexagon
5004uid 3676,0
5005sl 0
5006xt "111500,98625,113000,99375"
5007)
5008(Line
5009uid 3677,0
5010sl 0
5011xt "111000,99000,111500,99000"
5012pts [
5013"111000,99000"
5014"111500,99000"
5015]
5016)
5017]
5018)
5019stc 0
5020sf 1
5021tg (WTG
5022uid 3678,0
5023ps "PortIoTextPlaceStrategy"
5024stg "STSignalDisplayStrategy"
5025f (Text
5026uid 3679,0
5027va (VaSet
5028)
5029xt "114000,98500,116400,99500"
5030st "MISO"
5031blo "114000,99300"
5032tm "WireNameMgr"
5033)
5034)
5035)
5036*155 (Net
5037uid 3680,0
5038decl (Decl
5039n "MOSI"
5040t "std_logic"
5041o 35
5042suid 113,0
5043i "'0'"
5044)
5045declText (MLText
5046uid 3681,0
5047va (VaSet
5048font "Courier New,8,0"
5049)
5050xt "39000,31800,67500,32600"
5051st "MOSI : std_logic := '0'"
5052)
5053)
5054*156 (PortIoOut
5055uid 3688,0
5056shape (CompositeShape
5057uid 3689,0
5058va (VaSet
5059vasetType 1
5060fg "0,0,32768"
5061)
5062optionalChildren [
5063(Pentagon
5064uid 3690,0
5065sl 0
5066ro 270
5067xt "111500,99625,113000,100375"
5068)
5069(Line
5070uid 3691,0
5071sl 0
5072ro 270
5073xt "111000,100000,111500,100000"
5074pts [
5075"111000,100000"
5076"111500,100000"
5077]
5078)
5079]
5080)
5081stc 0
5082sf 1
5083tg (WTG
5084uid 3692,0
5085ps "PortIoTextPlaceStrategy"
5086stg "STSignalDisplayStrategy"
5087f (Text
5088uid 3693,0
5089va (VaSet
5090)
5091xt "114000,99500,116400,100500"
5092st "MOSI"
5093blo "114000,100300"
5094tm "WireNameMgr"
5095)
5096)
5097)
5098*157 (Net
5099uid 3694,0
5100decl (Decl
5101n "MISO"
5102t "std_logic"
5103preAdd 0
5104posAdd 0
5105o 56
5106suid 114,0
5107)
5108declText (MLText
5109uid 3695,0
5110va (VaSet
5111font "Courier New,8,0"
5112)
5113xt "39000,48600,54000,49400"
5114st "MISO : std_logic"
5115)
5116)
5117*158 (HdlText
5118uid 3700,0
5119optionalChildren [
5120*159 (EmbeddedText
5121uid 3706,0
5122commentText (CommentText
5123uid 3707,0
5124ps "CenterOffsetStrategy"
5125shape (Rectangle
5126uid 3708,0
5127va (VaSet
5128vasetType 1
5129fg "65535,65535,65535"
5130lineColor "0,0,32768"
5131lineWidth 2
5132)
5133xt "82000,106000,99000,118000"
5134)
5135oxt "0,0,18000,5000"
5136text (MLText
5137uid 3709,0
5138va (VaSet
5139)
5140xt "82200,106200,98600,118200"
5141st "
5142-- MISC 6
5143
5144RS485_C_RE <= '0';
5145RS485_C_DE <= '0';
5146RS485_C_DO <= RS485_C_DI;
5147
5148
5149
5150-- DENABLE <= '0'; -- domino wave stopped
5151-- DENABLE <= '1'; -- domino wave running
5152
5153
5154EE_CS <= '1';
5155"
5156tm "HdlTextMgr"
5157wrapOption 3
5158visibleHeight 12000
5159visibleWidth 17000
5160)
5161)
5162)
5163]
5164shape (Rectangle
5165uid 3701,0
5166va (VaSet
5167vasetType 1
5168fg "65535,65535,37120"
5169lineColor "0,0,32768"
5170lineWidth 2
5171)
5172xt "100000,102000,108000,115000"
5173)
5174oxt "0,0,8000,10000"
5175ttg (MlTextGroup
5176uid 3702,0
5177ps "CenterOffsetStrategy"
5178stg "VerticalLayoutStrategy"
5179textVec [
5180*160 (Text
5181uid 3703,0
5182va (VaSet
5183font "Arial,8,1"
5184)
5185xt "103150,106000,105550,107000"
5186st "MISC"
5187blo "103150,106800"
5188tm "HdlTextNameMgr"
5189)
5190*161 (Text
5191uid 3704,0
5192va (VaSet
5193font "Arial,8,1"
5194)
5195xt "103150,107000,103950,108000"
5196st "6"
5197blo "103150,107800"
5198tm "HdlTextNumberMgr"
5199)
5200]
5201)
5202viewicon (ZoomableIcon
5203uid 3705,0
5204sl 0
5205va (VaSet
5206vasetType 1
5207fg "49152,49152,49152"
5208)
5209xt "100250,113250,101750,114750"
5210iconName "TextFile.png"
5211iconMaskName "TextFile.msk"
5212ftype 21
5213)
5214viewiconposition 0
5215)
5216*162 (PortIoOut
5217uid 3710,0
5218shape (CompositeShape
5219uid 3711,0
5220va (VaSet
5221vasetType 1
5222fg "0,0,32768"
5223)
5224optionalChildren [
5225(Pentagon
5226uid 3712,0
5227sl 0
5228ro 270
5229xt "91500,143625,93000,144375"
5230)
5231(Line
5232uid 3713,0
5233sl 0
5234ro 270
5235xt "91000,144000,91500,144000"
5236pts [
5237"91000,144000"
5238"91500,144000"
5239]
5240)
5241]
5242)
5243stc 0
5244sf 1
5245tg (WTG
5246uid 3714,0
5247ps "PortIoTextPlaceStrategy"
5248stg "STSignalDisplayStrategy"
5249f (Text
5250uid 3715,0
5251va (VaSet
5252)
5253xt "94000,143500,97000,144500"
5254st "TRG_V"
5255blo "94000,144300"
5256tm "WireNameMgr"
5257)
5258)
5259)
5260*163 (PortIoOut
5261uid 3716,0
5262shape (CompositeShape
5263uid 3717,0
5264va (VaSet
5265vasetType 1
5266fg "0,0,32768"
5267)
5268optionalChildren [
5269(Pentagon
5270uid 3718,0
5271sl 0
5272ro 270
5273xt "111500,103625,113000,104375"
5274)
5275(Line
5276uid 3719,0
5277sl 0
5278ro 270
5279xt "111000,104000,111500,104000"
5280pts [
5281"111000,104000"
5282"111500,104000"
5283]
5284)
5285]
5286)
5287stc 0
5288sf 1
5289tg (WTG
5290uid 3720,0
5291ps "PortIoTextPlaceStrategy"
5292stg "STSignalDisplayStrategy"
5293f (Text
5294uid 3721,0
5295va (VaSet
5296)
5297xt "114000,103500,119600,104500"
5298st "RS485_C_RE"
5299blo "114000,104300"
5300tm "WireNameMgr"
5301)
5302)
5303)
5304*164 (PortIoOut
5305uid 3722,0
5306shape (CompositeShape
5307uid 3723,0
5308va (VaSet
5309vasetType 1
5310fg "0,0,32768"
5311)
5312optionalChildren [
5313(Pentagon
5314uid 3724,0
5315sl 0
5316ro 270
5317xt "111500,104625,113000,105375"
5318)
5319(Line
5320uid 3725,0
5321sl 0
5322ro 270
5323xt "111000,105000,111500,105000"
5324pts [
5325"111000,105000"
5326"111500,105000"
5327]
5328)
5329]
5330)
5331stc 0
5332sf 1
5333tg (WTG
5334uid 3726,0
5335ps "PortIoTextPlaceStrategy"
5336stg "STSignalDisplayStrategy"
5337f (Text
5338uid 3727,0
5339va (VaSet
5340)
5341xt "114000,104500,119600,105500"
5342st "RS485_C_DE"
5343blo "114000,105300"
5344tm "WireNameMgr"
5345)
5346)
5347)
5348*165 (PortIoOut
5349uid 3728,0
5350shape (CompositeShape
5351uid 3729,0
5352va (VaSet
5353vasetType 1
5354fg "0,0,32768"
5355)
5356optionalChildren [
5357(Pentagon
5358uid 3730,0
5359sl 0
5360ro 270
5361xt "139500,149625,141000,150375"
5362)
5363(Line
5364uid 3731,0
5365sl 0
5366ro 270
5367xt "139000,150000,139500,150000"
5368pts [
5369"139000,150000"
5370"139500,150000"
5371]
5372)
5373]
5374)
5375stc 0
5376sf 1
5377tg (WTG
5378uid 3732,0
5379ps "PortIoTextPlaceStrategy"
5380stg "STSignalDisplayStrategy"
5381f (Text
5382uid 3733,0
5383va (VaSet
5384)
5385xt "142000,149500,147500,150500"
5386st "RS485_E_RE"
5387blo "142000,150300"
5388tm "WireNameMgr"
5389)
5390)
5391)
5392*166 (PortIoOut
5393uid 3734,0
5394shape (CompositeShape
5395uid 3735,0
5396va (VaSet
5397vasetType 1
5398fg "0,0,32768"
5399)
5400optionalChildren [
5401(Pentagon
5402uid 3736,0
5403sl 0
5404ro 270
5405xt "137500,148625,139000,149375"
5406)
5407(Line
5408uid 3737,0
5409sl 0
5410ro 270
5411xt "137000,149000,137500,149000"
5412pts [
5413"137000,149000"
5414"137500,149000"
5415]
5416)
5417]
5418)
5419stc 0
5420sf 1
5421tg (WTG
5422uid 3738,0
5423ps "PortIoTextPlaceStrategy"
5424stg "STSignalDisplayStrategy"
5425f (Text
5426uid 3739,0
5427va (VaSet
5428)
5429xt "140000,148500,145500,149500"
5430st "RS485_E_DE"
5431blo "140000,149300"
5432tm "WireNameMgr"
5433)
5434)
5435)
5436*167 (PortIoOut
5437uid 3740,0
5438shape (CompositeShape
5439uid 3741,0
5440va (VaSet
5441vasetType 1
5442fg "0,0,32768"
5443)
5444optionalChildren [
5445(Pentagon
5446uid 3742,0
5447sl 0
5448ro 270
5449xt "111500,120625,113000,121375"
5450)
5451(Line
5452uid 3743,0
5453sl 0
5454ro 270
5455xt "111000,121000,111500,121000"
5456pts [
5457"111000,121000"
5458"111500,121000"
5459]
5460)
5461]
5462)
5463stc 0
5464sf 1
5465tg (WTG
5466uid 3744,0
5467ps "PortIoTextPlaceStrategy"
5468stg "STSignalDisplayStrategy"
5469f (Text
5470uid 3745,0
5471va (VaSet
5472)
5473xt "114000,120500,118000,121500"
5474st "DENABLE"
5475blo "114000,121300"
5476tm "WireNameMgr"
5477)
5478)
5479)
5480*168 (PortIoOut
5481uid 3752,0
5482shape (CompositeShape
5483uid 3753,0
5484va (VaSet
5485vasetType 1
5486fg "0,0,32768"
5487)
5488optionalChildren [
5489(Pentagon
5490uid 3754,0
5491sl 0
5492ro 270
5493xt "111500,109625,113000,110375"
5494)
5495(Line
5496uid 3755,0
5497sl 0
5498ro 270
5499xt "111000,110000,111500,110000"
5500pts [
5501"111000,110000"
5502"111500,110000"
5503]
5504)
5505]
5506)
5507stc 0
5508sf 1
5509tg (WTG
5510uid 3756,0
5511ps "PortIoTextPlaceStrategy"
5512stg "STSignalDisplayStrategy"
5513f (Text
5514uid 3757,0
5515va (VaSet
5516)
5517xt "114000,109500,116900,110500"
5518st "EE_CS"
5519blo "114000,110300"
5520tm "WireNameMgr"
5521)
5522)
5523)
5524*169 (Net
5525uid 3864,0
5526decl (Decl
5527n "TRG_V"
5528t "std_logic"
5529o 50
5530suid 126,0
5531)
5532declText (MLText
5533uid 3865,0
5534va (VaSet
5535font "Courier New,8,0"
5536)
5537xt "39000,43800,54000,44600"
5538st "TRG_V : std_logic"
5539)
5540)
5541*170 (Net
5542uid 3866,0
5543decl (Decl
5544n "RS485_C_RE"
5545t "std_logic"
5546o 40
5547suid 127,0
5548)
5549declText (MLText
5550uid 3867,0
5551va (VaSet
5552font "Courier New,8,0"
5553)
5554xt "39000,35800,54000,36600"
5555st "RS485_C_RE : std_logic"
5556)
5557)
5558*171 (Net
5559uid 3868,0
5560decl (Decl
5561n "RS485_C_DE"
5562t "std_logic"
5563o 38
5564suid 128,0
5565)
5566declText (MLText
5567uid 3869,0
5568va (VaSet
5569font "Courier New,8,0"
5570)
5571xt "39000,34200,54000,35000"
5572st "RS485_C_DE : std_logic"
5573)
5574)
5575*172 (Net
5576uid 3870,0
5577decl (Decl
5578n "RS485_E_RE"
5579t "std_logic"
5580o 42
5581suid 129,0
5582)
5583declText (MLText
5584uid 3871,0
5585va (VaSet
5586font "Courier New,8,0"
5587)
5588xt "39000,37400,54000,38200"
5589st "RS485_E_RE : std_logic"
5590)
5591)
5592*173 (Net
5593uid 3872,0
5594decl (Decl
5595n "RS485_E_DE"
5596t "std_logic"
5597o 41
5598suid 130,0
5599)
5600declText (MLText
5601uid 3873,0
5602va (VaSet
5603font "Courier New,8,0"
5604)
5605xt "39000,36600,54000,37400"
5606st "RS485_E_DE : std_logic"
5607)
5608)
5609*174 (Net
5610uid 3874,0
5611decl (Decl
5612n "DENABLE"
5613t "std_logic"
5614o 28
5615suid 131,0
5616i "'0'"
5617)
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6572tg (CPTG
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6588thePort (LogicalPort
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6965sf 1
6966tg (WTG
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6981*229 (Net
6982uid 10308,0
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6984n "A0_T"
6985t "std_logic_vector"
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6987o 19
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7012fg "65535,65535,65535"
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7025-- eb3 9
7026--A0_T(0) <= ready;
7027--A0_T(1) <= shifting;
7028--A0_T(2) <= CLK25_PSOUT;
7029--A0_T(3) <= PS_DIR_IN;
7030--A0_T(4) <= PS_DO_IN;
7031--A0_T(5) <= PSINCDEC_OUT;
7032
7033
7034
7035A1_T(0) <= SRIN;
7036A1_T(1) <= PSDONE_extraOUT;
7037A1_T(2) <= PSCLK_OUT;
7038A1_T(3) <= LOCKED_extraOUT;
7039
7040A1_T(4) <= drs_channel_id(0);
7041A1_T(5) <= drs_channel_id(1);
7042A1_T(6) <= drs_channel_id(2);
7043A1_T(7) <= drs_channel_id(3);
7044
7045A0_T(5 downto 0) <= (others => '0');
7046A0_T(6) <= REFCLK;
7047A0_T(7) <= RS485_E_DI;
7048RS485_E_RE <= '0';
7049RS485_E_DE <= '0';
7050
7051D_T2 <= D_PLLLCK;
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7101sl 0
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7147*236 (Net
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7168t "std_logic"
7169o 70
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7172declText (MLText
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7178st "SIGNAL PS_DIR_IN : std_logic"
7179)
7180)
7181*238 (Net
7182uid 10544,0
7183decl (Decl
7184n "PSINCDEC_OUT"
7185t "std_logic"
7186o 69
7187suid 190,0
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7196)
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7198*239 (Net
7199uid 10552,0
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7201n "DCM_locked"
7202t "std_logic"
7203preAdd 0
7204posAdd 0
7205o 64
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7208declText (MLText
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7211font "Courier New,8,0"
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7213xt "39000,56000,57500,56800"
7214st "SIGNAL DCM_locked : std_logic"
7215)
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7217*240 (Net
7218uid 10560,0
7219decl (Decl
7220n "ready"
7221t "std_logic"
7222preAdd 0
7223posAdd 0
7224o 79
7225suid 192,0
7226i "'0'"
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7237*241 (Net
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7239decl (Decl
7240n "shifting"
7241t "std_logic"
7242prec "-- status:"
7243preAdd 0
7244posAdd 0
7245o 81
7246suid 193,0
7247i "'0'"
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7251va (VaSet
7252font "Courier New,8,0"
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7254xt "39000,68800,71000,70400"
7255st "-- status:
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7257)
7258)
7259*242 (Net
7260uid 10576,0
7261decl (Decl
7262n "PSDONE_extraOUT"
7263t "std_logic"
7264o 67
7265suid 194,0
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7274)
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7276*243 (Net
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7280t "std_logic"
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7299suid 196,0
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7308)
7309)
7310*245 (PortIoIn
7311uid 11090,0
7312shape (CompositeShape
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7325(Line
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7330pts [
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7332"96000,103000"
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7334)
7335]
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7337stc 0
7338sf 1
7339tg (WTG
7340uid 11094,0
7341ps "PortIoTextPlaceStrategy"
7342stg "STSignalDisplayStrategy"
7343f (Text
7344uid 11095,0
7345va (VaSet
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7347xt "87700,102500,93000,103500"
7348st "RS485_C_DI"
7349ju 2
7350blo "93000,103300"
7351tm "WireNameMgr"
7352)
7353)
7354)
7355*246 (Net
7356uid 11102,0
7357decl (Decl
7358n "RS485_C_DI"
7359t "std_logic"
7360o 13
7361suid 197,0
7362)
7363declText (MLText
7364uid 11103,0
7365va (VaSet
7366font "Courier New,8,0"
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7368xt "39000,14200,54000,15000"
7369st "RS485_C_DI : std_logic"
7370)
7371)
7372*247 (PortIoOut
7373uid 11104,0
7374shape (CompositeShape
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7376va (VaSet
7377vasetType 1
7378fg "0,0,32768"
7379)
7380optionalChildren [
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7392pts [
7393"111000,112000"
7394"111500,112000"
7395]
7396)
7397]
7398)
7399stc 0
7400sf 1
7401tg (WTG
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7403ps "PortIoTextPlaceStrategy"
7404stg "STSignalDisplayStrategy"
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7406uid 11109,0
7407va (VaSet
7408)
7409xt "114000,111500,119700,112500"
7410st "RS485_C_DO"
7411blo "114000,112300"
7412tm "WireNameMgr"
7413)
7414)
7415)
7416*248 (Net
7417uid 11116,0
7418decl (Decl
7419n "RS485_C_DO"
7420t "std_logic"
7421o 39
7422suid 198,0
7423)
7424declText (MLText
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7426va (VaSet
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7429xt "39000,35000,54000,35800"
7430st "RS485_C_DO : std_logic"
7431)
7432)
7433*249 (PortIoIn
7434uid 11508,0
7435shape (CompositeShape
7436uid 11509,0
7437va (VaSet
7438vasetType 1
7439fg "0,0,32768"
7440)
7441optionalChildren [
7442(Pentagon
7443uid 11510,0
7444sl 0
7445ro 270
7446xt "106000,149625,107500,150375"
7447)
7448(Line
7449uid 11511,0
7450sl 0
7451ro 270
7452xt "107500,150000,108000,150000"
7453pts [
7454"107500,150000"
7455"108000,150000"
7456]
7457)
7458]
7459)
7460stc 0
7461sf 1
7462tg (WTG
7463uid 11512,0
7464ps "PortIoTextPlaceStrategy"
7465stg "STSignalDisplayStrategy"
7466f (Text
7467uid 11513,0
7468va (VaSet
7469)
7470xt "99800,149500,105000,150500"
7471st "RS485_E_DI"
7472ju 2
7473blo "105000,150300"
7474tm "WireNameMgr"
7475)
7476)
7477)
7478*250 (Net
7479uid 11520,0
7480decl (Decl
7481n "RS485_E_DI"
7482t "std_logic"
7483o 14
7484suid 200,0
7485)
7486declText (MLText
7487uid 11521,0
7488va (VaSet
7489font "Courier New,8,0"
7490)
7491xt "39000,15000,54000,15800"
7492st "RS485_E_DI : std_logic"
7493)
7494)
7495*251 (Net
7496uid 11534,0
7497decl (Decl
7498n "RS485_E_DO"
7499t "std_logic"
7500o 15
7501suid 201,0
7502)
7503declText (MLText
7504uid 11535,0
7505va (VaSet
7506font "Courier New,8,0"
7507)
7508xt "39000,15800,54000,16600"
7509st "RS485_E_DO : std_logic"
7510)
7511)
7512*252 (PortIoIn
7513uid 11922,0
7514shape (CompositeShape
7515uid 11923,0
7516va (VaSet
7517vasetType 1
7518fg "0,0,32768"
7519)
7520optionalChildren [
7521(Pentagon
7522uid 11924,0
7523sl 0
7524ro 270
7525xt "85000,157625,86500,158375"
7526)
7527(Line
7528uid 11925,0
7529sl 0
7530ro 270
7531xt "86500,158000,87000,158000"
7532pts [
7533"86500,158000"
7534"87000,158000"
7535]
7536)
7537]
7538)
7539stc 0
7540sf 1
7541tg (WTG
7542uid 11926,0
7543ps "PortIoTextPlaceStrategy"
7544stg "STSignalDisplayStrategy"
7545f (Text
7546uid 11927,0
7547va (VaSet
7548)
7549xt "78400,157500,84000,158500"
7550st "RS485_E_DO"
7551ju 2
7552blo "84000,158300"
7553tm "WireNameMgr"
7554)
7555)
7556)
7557*253 (PortIoOut
7558uid 12326,0
7559shape (CompositeShape
7560uid 12327,0
7561va (VaSet
7562vasetType 1
7563fg "0,0,32768"
7564)
7565optionalChildren [
7566(Pentagon
7567uid 12328,0
7568sl 0
7569ro 270
7570xt "87500,139625,89000,140375"
7571)
7572(Line
7573uid 12329,0
7574sl 0
7575ro 270
7576xt "87000,140000,87500,140000"
7577pts [
7578"87000,140000"
7579"87500,140000"
7580]
7581)
7582]
7583)
7584stc 0
7585sf 1
7586tg (WTG
7587uid 12330,0
7588ps "PortIoTextPlaceStrategy"
7589stg "STSignalDisplayStrategy"
7590f (Text
7591uid 12331,0
7592va (VaSet
7593)
7594xt "89000,139500,91300,140500"
7595st "SRIN"
7596blo "89000,140300"
7597tm "WireNameMgr"
7598)
7599)
7600)
7601*254 (Net
7602uid 12334,0
7603decl (Decl
7604n "SRIN"
7605t "std_logic"
7606o 44
7607suid 203,0
7608i "'0'"
7609)
7610declText (MLText
7611uid 12335,0
7612va (VaSet
7613font "Courier New,8,0"
7614)
7615xt "39000,39000,67500,39800"
7616st "SRIN : std_logic := '0'"
7617)
7618)
7619*255 (PortIoOut
7620uid 12539,0
7621shape (CompositeShape
7622uid 12540,0
7623va (VaSet
7624vasetType 1
7625fg "0,0,32768"
7626)
7627optionalChildren [
7628(Pentagon
7629uid 12541,0
7630sl 0
7631ro 270
7632xt "87500,140625,89000,141375"
7633)
7634(Line
7635uid 12542,0
7636sl 0
7637ro 270
7638xt "87000,141000,87500,141000"
7639pts [
7640"87000,141000"
7641"87500,141000"
7642]
7643)
7644]
7645)
7646stc 0
7647sf 1
7648tg (WTG
7649uid 12543,0
7650ps "PortIoTextPlaceStrategy"
7651stg "STSignalDisplayStrategy"
7652f (Text
7653uid 12544,0
7654va (VaSet
7655)
7656xt "90000,140500,95100,141500"
7657st "AMBER_LED"
7658blo "90000,141300"
7659tm "WireNameMgr"
7660)
7661)
7662)
7663*256 (PortIoOut
7664uid 12553,0
7665shape (CompositeShape
7666uid 12554,0
7667va (VaSet
7668vasetType 1
7669fg "0,0,32768"
7670)
7671optionalChildren [
7672(Pentagon
7673uid 12555,0
7674sl 0
7675ro 270
7676xt "87500,141625,89000,142375"
7677)
7678(Line
7679uid 12556,0
7680sl 0
7681ro 270
7682xt "87000,142000,87500,142000"
7683pts [
7684"87000,142000"
7685"87500,142000"
7686]
7687)
7688]
7689)
7690stc 0
7691sf 1
7692tg (WTG
7693uid 12557,0
7694ps "PortIoTextPlaceStrategy"
7695stg "STSignalDisplayStrategy"
7696f (Text
7697uid 12558,0
7698va (VaSet
7699)
7700xt "90000,141500,95100,142500"
7701st "GREEN_LED"
7702blo "90000,142300"
7703tm "WireNameMgr"
7704)
7705)
7706)
7707*257 (PortIoOut
7708uid 12567,0
7709shape (CompositeShape
7710uid 12568,0
7711va (VaSet
7712vasetType 1
7713fg "0,0,32768"
7714)
7715optionalChildren [
7716(Pentagon
7717uid 12569,0
7718sl 0
7719ro 270
7720xt "87500,142625,89000,143375"
7721)
7722(Line
7723uid 12570,0
7724sl 0
7725ro 270
7726xt "87000,143000,87500,143000"
7727pts [
7728"87000,143000"
7729"87500,143000"
7730]
7731)
7732]
7733)
7734stc 0
7735sf 1
7736tg (WTG
7737uid 12571,0
7738ps "PortIoTextPlaceStrategy"
7739stg "STSignalDisplayStrategy"
7740f (Text
7741uid 12572,0
7742va (VaSet
7743)
7744xt "90000,142500,94000,143500"
7745st "RED_LED"
7746blo "90000,143300"
7747tm "WireNameMgr"
7748)
7749)
7750)
7751*258 (Net
7752uid 12762,0
7753decl (Decl
7754n "AMBER_LED"
7755t "std_logic"
7756o 21
7757suid 207,0
7758)
7759declText (MLText
7760uid 12763,0
7761va (VaSet
7762font "Courier New,8,0"
7763)
7764xt "39000,20600,54000,21400"
7765st "AMBER_LED : std_logic"
7766)
7767)
7768*259 (Net
7769uid 12764,0
7770decl (Decl
7771n "GREEN_LED"
7772t "std_logic"
7773o 34
7774suid 208,0
7775)
7776declText (MLText
7777uid 12765,0
7778va (VaSet
7779font "Courier New,8,0"
7780)
7781xt "39000,31000,54000,31800"
7782st "GREEN_LED : std_logic"
7783)
7784)
7785*260 (Net
7786uid 12766,0
7787decl (Decl
7788n "RED_LED"
7789t "std_logic"
7790o 37
7791suid 209,0
7792)
7793declText (MLText
7794uid 12767,0
7795va (VaSet
7796font "Courier New,8,0"
7797)
7798xt "39000,33400,54000,34200"
7799st "RED_LED : std_logic"
7800)
7801)
7802*261 (PortIoIn
7803uid 13516,0
7804shape (CompositeShape
7805uid 13517,0
7806va (VaSet
7807vasetType 1
7808fg "0,0,32768"
7809)
7810optionalChildren [
7811(Pentagon
7812uid 13518,0
7813sl 0
7814ro 270
7815xt "10000,80625,11500,81375"
7816)
7817(Line
7818uid 13519,0
7819sl 0
7820ro 270
7821xt "11500,81000,12000,81000"
7822pts [
7823"11500,81000"
7824"12000,81000"
7825]
7826)
7827]
7828)
7829stc 0
7830sf 1
7831tg (WTG
7832uid 13520,0
7833ps "PortIoTextPlaceStrategy"
7834stg "STSignalDisplayStrategy"
7835f (Text
7836uid 13521,0
7837va (VaSet
7838)
7839xt "6900,80500,9000,81500"
7840st "LINE"
7841ju 2
7842blo "9000,81300"
7843tm "WireNameMgr"
7844)
7845)
7846)
7847*262 (Net
7848uid 13528,0
7849decl (Decl
7850n "LINE"
7851t "std_logic_vector"
7852b "( 5 DOWNTO 0 )"
7853o 11
7854suid 210,0
7855)
7856declText (MLText
7857uid 13529,0
7858va (VaSet
7859font "Courier New,8,0"
7860)
7861xt "39000,12600,65000,13400"
7862st "LINE : std_logic_vector( 5 DOWNTO 0 )"
7863)
7864)
7865*263 (PortIoIn
7866uid 13628,0
7867shape (CompositeShape
7868uid 13629,0
7869va (VaSet
7870vasetType 1
7871fg "0,0,32768"
7872)
7873optionalChildren [
7874(Pentagon
7875uid 13630,0
7876sl 0
7877ro 270
7878xt "110000,148625,111500,149375"
7879)
7880(Line
7881uid 13631,0
7882sl 0
7883ro 270
7884xt "111500,149000,112000,149000"
7885pts [
7886"111500,149000"
7887"112000,149000"
7888]
7889)
7890]
7891)
7892stc 0
7893sf 1
7894tg (WTG
7895uid 13632,0
7896ps "PortIoTextPlaceStrategy"
7897stg "STSignalDisplayStrategy"
7898f (Text
7899uid 13633,0
7900va (VaSet
7901)
7902xt "105500,148500,109000,149500"
7903st "REFCLK"
7904ju 2
7905blo "109000,149300"
7906tm "WireNameMgr"
7907)
7908)
7909)
7910*264 (Net
7911uid 13640,0
7912decl (Decl
7913n "REFCLK"
7914t "std_logic"
7915o 12
7916suid 211,0
7917)
7918declText (MLText
7919uid 13641,0
7920va (VaSet
7921font "Courier New,8,0"
7922)
7923xt "39000,13400,54000,14200"
7924st "REFCLK : std_logic"
7925)
7926)
7927*265 (PortIoIn
7928uid 14322,0
7929shape (CompositeShape
7930uid 14323,0
7931va (VaSet
7932vasetType 1
7933fg "0,0,32768"
7934)
7935optionalChildren [
7936(Pentagon
7937uid 14324,0
7938sl 0
7939ro 270
7940xt "37000,138625,38500,139375"
7941)
7942(Line
7943uid 14325,0
7944sl 0
7945ro 270
7946xt "38500,139000,39000,139000"
7947pts [
7948"38500,139000"
7949"39000,139000"
7950]
7951)
7952]
7953)
7954stc 0
7955sf 1
7956tg (WTG
7957uid 14326,0
7958ps "PortIoTextPlaceStrategy"
7959stg "STSignalDisplayStrategy"
7960f (Text
7961uid 14327,0
7962va (VaSet
7963)
7964xt "33100,138500,36000,139500"
7965st "D_T_in"
7966ju 2
7967blo "36000,139300"
7968tm "WireNameMgr"
7969)
7970)
7971)
7972*266 (Net
7973uid 14334,0
7974decl (Decl
7975n "D_T_in"
7976t "std_logic_vector"
7977b "(1 DOWNTO 0)"
7978o 80
7979suid 213,0
7980)
7981declText (MLText
7982uid 14335,0
7983va (VaSet
7984font "Courier New,8,0"
7985)
7986xt "39000,11800,64000,12600"
7987st "D_T_in : std_logic_vector(1 DOWNTO 0)"
7988)
7989)
7990*267 (HdlText
7991uid 14346,0
7992optionalChildren [
7993*268 (EmbeddedText
7994uid 14352,0
7995commentText (CommentText
7996uid 14353,0
7997ps "CenterOffsetStrategy"
7998shape (Rectangle
7999uid 14354,0
8000va (VaSet
8001vasetType 1
8002fg "65535,65535,65535"
8003lineColor "0,0,32768"
8004lineWidth 2
8005)
8006xt "63000,156000,76000,169000"
8007)
8008oxt "0,0,18000,5000"
8009text (MLText
8010uid 14355,0
8011va (VaSet
8012)
8013xt "63200,156200,76000,158200"
8014st "
8015D_T(5 downto 0) <= (others => '0');
8016"
8017tm "HdlTextMgr"
8018wrapOption 3
8019visibleHeight 13000
8020visibleWidth 13000
8021)
8022)
8023)
8024]
8025shape (Rectangle
8026uid 14347,0
8027va (VaSet
8028vasetType 1
8029fg "65535,65535,37120"
8030lineColor "0,0,32768"
8031lineWidth 2
8032)
8033xt "66000,153000,70000,156000"
8034)
8035oxt "0,0,8000,10000"
8036ttg (MlTextGroup
8037uid 14348,0
8038ps "CenterOffsetStrategy"
8039stg "VerticalLayoutStrategy"
8040textVec [
8041*269 (Text
8042uid 14349,0
8043va (VaSet
8044font "Arial,8,1"
8045)
8046xt "68150,153000,69850,154000"
8047st "eb1"
8048blo "68150,153800"
8049tm "HdlTextNameMgr"
8050)
8051*270 (Text
8052uid 14350,0
8053va (VaSet
8054font "Arial,8,1"
8055)
8056xt "68150,154000,68950,155000"
8057st "7"
8058blo "68150,154800"
8059tm "HdlTextNumberMgr"
8060)
8061]
8062)
8063viewicon (ZoomableIcon
8064uid 14351,0
8065sl 0
8066va (VaSet
8067vasetType 1
8068fg "49152,49152,49152"
8069)
8070xt "66250,154250,67750,155750"
8071iconName "TextFile.png"
8072iconMaskName "TextFile.msk"
8073ftype 21
8074)
8075viewiconposition 0
8076)
8077*271 (Net
8078uid 15173,0
8079decl (Decl
8080n "led"
8081t "std_logic_vector"
8082b "(7 DOWNTO 0)"
8083posAdd 0
8084o 81
8085suid 215,0
8086i "(OTHERS => '0')"
8087)
8088declText (MLText
8089uid 15174,0
8090va (VaSet
8091font "Courier New,8,0"
8092)
8093xt "39000,66400,77000,67200"
8094st "SIGNAL led : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')"
8095)
8096)
8097*272 (Wire
8098uid 245,0
8099shape (OrthoPolyLine
8100uid 246,0
8101va (VaSet
8102vasetType 3
8103)
8104xt "21000,68000,51250,68000"
8105pts [
8106"51250,68000"
8107"21000,68000"
8108]
8109)
8110start &27
8111end &67
8112ss 0
8113sat 32
8114eat 32
8115stc 0
8116st 0
8117sf 1
8118si 0
8119tg (WTG
8120uid 249,0
8121ps "ConnStartEndStrategy"
8122stg "STSignalDisplayStrategy"
8123f (Text
8124uid 250,0
8125va (VaSet
8126isHidden 1
8127)
8128xt "53250,67000,56050,68000"
8129st "X_50M"
8130blo "53250,67800"
8131tm "WireNameMgr"
8132)
8133)
8134on &88
8135)
8136*273 (Wire
8137uid 277,0
8138shape (OrthoPolyLine
8139uid 278,0
8140va (VaSet
8141vasetType 3
8142lineWidth 2
8143)
8144xt "32000,81000,51250,81000"
8145pts [
8146"51250,81000"
8147"32000,81000"
8148]
8149)
8150start &17
8151end &68
8152sat 32
8153eat 2
8154sty 1
8155st 0
8156sf 1
8157si 0
8158tg (WTG
8159uid 281,0
8160ps "ConnStartEndStrategy"
8161stg "STSignalDisplayStrategy"
8162f (Text
8163uid 282,0
8164va (VaSet
8165)
8166xt "44000,80000,49900,81000"
8167st "board_id : (3:0)"
8168blo "44000,80800"
8169tm "WireNameMgr"
8170)
8171)
8172on &72
8173)
8174*274 (Wire
8175uid 285,0
8176shape (OrthoPolyLine
8177uid 286,0
8178va (VaSet
8179vasetType 3
8180lineWidth 2
8181)
8182xt "32000,82000,51250,82000"
8183pts [
8184"51250,82000"
8185"32000,82000"
8186]
8187)
8188start &18
8189end &68
8190sat 32
8191eat 2
8192sty 1
8193st 0
8194sf 1
8195si 0
8196tg (WTG
8197uid 289,0
8198ps "ConnStartEndStrategy"
8199stg "STSignalDisplayStrategy"
8200f (Text
8201uid 290,0
8202va (VaSet
8203)
8204xt "45000,81000,50700,82000"
8205st "crate_id : (1:0)"
8206blo "45000,81800"
8207tm "WireNameMgr"
8208)
8209)
8210on &73
8211)
8212*275 (Wire
8213uid 362,0
8214shape (OrthoPolyLine
8215uid 363,0
8216va (VaSet
8217vasetType 3
8218)
8219xt "21000,90000,51250,90000"
8220pts [
8221"21000,90000"
8222"51250,90000"
8223]
8224)
8225start &96
8226end &16
8227sat 32
8228eat 32
8229stc 0
8230st 0
8231sf 1
8232si 0
8233tg (WTG
8234uid 364,0
8235ps "ConnStartEndStrategy"
8236stg "STSignalDisplayStrategy"
8237f (Text
8238uid 365,0
8239va (VaSet
8240isHidden 1
8241)
8242xt "22000,89000,25600,90000"
8243st "OE_ADC"
8244blo "22000,89800"
8245tm "WireNameMgr"
8246)
8247)
8248on &97
8249)
8250*276 (Wire
8251uid 418,0
8252shape (OrthoPolyLine
8253uid 419,0
8254va (VaSet
8255vasetType 3
8256)
8257xt "80750,71000,111000,71000"
8258pts [
8259"80750,71000"
8260"111000,71000"
8261]
8262)
8263start &13
8264end &74
8265sat 32
8266eat 32
8267stc 0
8268st 0
8269sf 1
8270si 0
8271tg (WTG
8272uid 422,0
8273ps "ConnStartEndStrategy"
8274stg "STSignalDisplayStrategy"
8275f (Text
8276uid 423,0
8277va (VaSet
8278isHidden 1
8279)
8280xt "82000,70000,85100,71000"
8281st "W_RES"
8282blo "82000,70800"
8283tm "WireNameMgr"
8284)
8285)
8286on &149
8287)
8288*277 (Wire
8289uid 426,0
8290shape (OrthoPolyLine
8291uid 427,0
8292va (VaSet
8293vasetType 3
8294lineWidth 2
8295)
8296xt "80750,68000,111000,68000"
8297pts [
8298"80750,68000"
8299"111000,68000"
8300]
8301)
8302start &19
8303end &75
8304sat 32
8305eat 32
8306sty 1
8307stc 0
8308st 0
8309sf 1
8310si 0
8311tg (WTG
8312uid 430,0
8313ps "ConnStartEndStrategy"
8314stg "STSignalDisplayStrategy"
8315f (Text
8316uid 431,0
8317va (VaSet
8318isHidden 1
8319)
8320xt "82000,67000,84000,68000"
8321st "W_A"
8322blo "82000,67800"
8323tm "WireNameMgr"
8324)
8325)
8326on &147
8327)
8328*278 (Wire
8329uid 434,0
8330shape (OrthoPolyLine
8331uid 435,0
8332va (VaSet
8333vasetType 3
8334)
8335xt "80750,75000,111000,75000"
8336pts [
8337"80750,75000"
8338"111000,75000"
8339]
8340)
8341start &20
8342end &76
8343sat 32
8344eat 32
8345stc 0
8346st 0
8347sf 1
8348si 0
8349tg (WTG
8350uid 438,0
8351ps "ConnStartEndStrategy"
8352stg "STSignalDisplayStrategy"
8353f (Text
8354uid 439,0
8355va (VaSet
8356isHidden 1
8357)
8358xt "82000,74000,84600,75000"
8359st "W_CS"
8360blo "82000,74800"
8361tm "WireNameMgr"
8362)
8363)
8364on &153
8365)
8366*279 (Wire
8367uid 442,0
8368shape (OrthoPolyLine
8369uid 443,0
8370va (VaSet
8371vasetType 3
8372lineWidth 2
8373)
8374xt "80750,69000,111000,69000"
8375pts [
8376"80750,69000"
8377"111000,69000"
8378]
8379)
8380start &21
8381end &77
8382sat 32
8383eat 32
8384sty 1
8385stc 0
8386st 0
8387sf 1
8388si 0
8389tg (WTG
8390uid 446,0
8391ps "ConnStartEndStrategy"
8392stg "STSignalDisplayStrategy"
8393f (Text
8394uid 447,0
8395va (VaSet
8396isHidden 1
8397)
8398xt "82000,68000,84100,69000"
8399st "W_D"
8400blo "82000,68800"
8401tm "WireNameMgr"
8402)
8403)
8404on &148
8405)
8406*280 (Wire
8407uid 450,0
8408shape (OrthoPolyLine
8409uid 451,0
8410va (VaSet
8411vasetType 3
8412)
8413xt "80750,74000,111000,74000"
8414pts [
8415"111000,74000"
8416"80750,74000"
8417]
8418)
8419start &78
8420end &22
8421sat 32
8422eat 32
8423stc 0
8424st 0
8425sf 1
8426si 0
8427tg (WTG
8428uid 454,0
8429ps "ConnStartEndStrategy"
8430stg "STSignalDisplayStrategy"
8431f (Text
8432uid 455,0
8433va (VaSet
8434isHidden 1
8435)
8436xt "82000,73000,84800,74000"
8437st "W_INT"
8438blo "82000,73800"
8439tm "WireNameMgr"
8440)
8441)
8442on &152
8443)
8444*281 (Wire
8445uid 458,0
8446shape (OrthoPolyLine
8447uid 459,0
8448va (VaSet
8449vasetType 3
8450)
8451xt "80750,72000,111000,72000"
8452pts [
8453"80750,72000"
8454"111000,72000"
8455]
8456)
8457start &23
8458end &79
8459sat 32
8460eat 32
8461stc 0
8462st 0
8463sf 1
8464si 0
8465tg (WTG
8466uid 462,0
8467ps "ConnStartEndStrategy"
8468stg "STSignalDisplayStrategy"
8469f (Text
8470uid 463,0
8471va (VaSet
8472isHidden 1
8473)
8474xt "82000,71000,84700,72000"
8475st "W_RD"
8476blo "82000,71800"
8477tm "WireNameMgr"
8478)
8479)
8480on &150
8481)
8482*282 (Wire
8483uid 466,0
8484shape (OrthoPolyLine
8485uid 467,0
8486va (VaSet
8487vasetType 3
8488)
8489xt "80750,73000,111000,73000"
8490pts [
8491"80750,73000"
8492"111000,73000"
8493]
8494)
8495start &24
8496end &80
8497sat 32
8498eat 32
8499stc 0
8500st 0
8501sf 1
8502si 0
8503tg (WTG
8504uid 470,0
8505ps "ConnStartEndStrategy"
8506stg "STSignalDisplayStrategy"
8507f (Text
8508uid 471,0
8509va (VaSet
8510isHidden 1
8511)
8512xt "82000,72000,84800,73000"
8513st "W_WR"
8514blo "82000,72800"
8515tm "WireNameMgr"
8516)
8517)
8518on &151
8519)
8520*283 (Wire
8521uid 1467,0
8522shape (OrthoPolyLine
8523uid 1468,0
8524va (VaSet
8525vasetType 3
8526)
8527xt "32000,95000,51250,95000"
8528pts [
8529"32000,95000"
8530"51250,95000"
8531]
8532)
8533start &100
8534end &28
8535sat 2
8536eat 32
8537st 0
8538sf 1
8539si 0
8540tg (WTG
8541uid 1471,0
8542ps "ConnStartEndStrategy"
8543stg "STSignalDisplayStrategy"
8544f (Text
8545uid 1472,0
8546va (VaSet
8547)
8548xt "34000,94000,39900,95000"
8549st "adc_data_array"
8550blo "34000,94800"
8551tm "WireNameMgr"
8552)
8553)
8554on &81
8555)
8556*284 (Wire
8557uid 1730,0
8558shape (OrthoPolyLine
8559uid 1731,0
8560va (VaSet
8561vasetType 3
8562lineWidth 2
8563)
8564xt "21000,89000,51250,89000"
8565pts [
8566"21000,89000"
8567"51250,89000"
8568]
8569)
8570start &98
8571end &29
8572sat 32
8573eat 32
8574sty 1
8575stc 0
8576st 0
8577sf 1
8578si 0
8579tg (WTG
8580uid 1734,0
8581ps "ConnStartEndStrategy"
8582stg "STSignalDisplayStrategy"
8583f (Text
8584uid 1735,0
8585va (VaSet
8586isHidden 1
8587)
8588xt "22000,88000,25000,89000"
8589st "A_OTR"
8590blo "22000,88800"
8591tm "WireNameMgr"
8592)
8593)
8594on &99
8595)
8596*285 (Wire
8597uid 1833,0
8598shape (OrthoPolyLine
8599uid 1834,0
8600va (VaSet
8601vasetType 3
8602lineWidth 2
8603)
8604xt "12000,126000,21000,126000"
8605pts [
8606"21000,126000"
8607"12000,126000"
8608]
8609)
8610start &186
8611end &128
8612sat 2
8613eat 32
8614sty 1
8615stc 0
8616st 0
8617sf 1
8618si 0
8619tg (WTG
8620uid 1837,0
8621ps "ConnStartEndStrategy"
8622stg "STSignalDisplayStrategy"
8623f (Text
8624uid 1838,0
8625va (VaSet
8626isHidden 1
8627)
8628xt "13000,125000,14900,126000"
8629st "D_A"
8630blo "13000,125800"
8631tm "WireNameMgr"
8632)
8633)
8634on &129
8635)
8636*286 (Wire
8637uid 1841,0
8638shape (OrthoPolyLine
8639uid 1842,0
8640va (VaSet
8641vasetType 3
8642)
8643xt "21000,110000,51250,110000"
8644pts [
8645"51250,110000"
8646"21000,110000"
8647]
8648)
8649start &31
8650end &130
8651sat 32
8652eat 32
8653stc 0
8654st 0
8655sf 1
8656si 0
8657tg (WTG
8658uid 1845,0
8659ps "ConnStartEndStrategy"
8660stg "STSignalDisplayStrategy"
8661f (Text
8662uid 1846,0
8663va (VaSet
8664isHidden 1
8665)
8666xt "22000,109000,25500,110000"
8667st "DWRITE"
8668blo "22000,109800"
8669tm "WireNameMgr"
8670)
8671)
8672on &131
8673)
8674*287 (Wire
8675uid 1865,0
8676shape (OrthoPolyLine
8677uid 1866,0
8678va (VaSet
8679vasetType 3
8680)
8681xt "21000,105000,51250,105000"
8682pts [
8683"21000,105000"
8684"51250,105000"
8685]
8686)
8687start &120
8688end &32
8689sat 32
8690eat 32
8691stc 0
8692st 0
8693sf 1
8694si 0
8695tg (WTG
8696uid 1869,0
8697ps "ConnStartEndStrategy"
8698stg "STSignalDisplayStrategy"
8699f (Text
8700uid 1870,0
8701va (VaSet
8702isHidden 1
8703)
8704xt "22000,104000,26600,105000"
8705st "D0_SROUT"
8706blo "22000,104800"
8707tm "WireNameMgr"
8708)
8709)
8710on &124
8711)
8712*288 (Wire
8713uid 1873,0
8714shape (OrthoPolyLine
8715uid 1874,0
8716va (VaSet
8717vasetType 3
8718)
8719xt "21000,106000,51250,106000"
8720pts [
8721"21000,106000"
8722"51250,106000"
8723]
8724)
8725start &121
8726end &33
8727sat 32
8728eat 32
8729stc 0
8730st 0
8731sf 1
8732si 0
8733tg (WTG
8734uid 1877,0
8735ps "ConnStartEndStrategy"
8736stg "STSignalDisplayStrategy"
8737f (Text
8738uid 1878,0
8739va (VaSet
8740isHidden 1
8741)
8742xt "22000,105000,26600,106000"
8743st "D1_SROUT"
8744blo "22000,105800"
8745tm "WireNameMgr"
8746)
8747)
8748on &125
8749)
8750*289 (Wire
8751uid 1881,0
8752shape (OrthoPolyLine
8753uid 1882,0
8754va (VaSet
8755vasetType 3
8756)
8757xt "21000,107000,51250,107000"
8758pts [
8759"21000,107000"
8760"51250,107000"
8761]
8762)
8763start &122
8764end &34
8765sat 32
8766eat 32
8767stc 0
8768st 0
8769sf 1
8770si 0
8771tg (WTG
8772uid 1885,0
8773ps "ConnStartEndStrategy"
8774stg "STSignalDisplayStrategy"
8775f (Text
8776uid 1886,0
8777va (VaSet
8778isHidden 1
8779)
8780xt "22000,106000,26600,107000"
8781st "D2_SROUT"
8782blo "22000,106800"
8783tm "WireNameMgr"
8784)
8785)
8786on &126
8787)
8788*290 (Wire
8789uid 1889,0
8790shape (OrthoPolyLine
8791uid 1890,0
8792va (VaSet
8793vasetType 3
8794)
8795xt "21000,108000,51250,108000"
8796pts [
8797"21000,108000"
8798"51250,108000"
8799]
8800)
8801start &123
8802end &35
8803sat 32
8804eat 32
8805stc 0
8806st 0
8807sf 1
8808si 0
8809tg (WTG
8810uid 1893,0
8811ps "ConnStartEndStrategy"
8812stg "STSignalDisplayStrategy"
8813f (Text
8814uid 1894,0
8815va (VaSet
8816isHidden 1
8817)
8818xt "22000,107000,26600,108000"
8819st "D3_SROUT"
8820blo "22000,107800"
8821tm "WireNameMgr"
8822)
8823)
8824on &127
8825)
8826*291 (Wire
8827uid 2409,0
8828shape (OrthoPolyLine
8829uid 2410,0
8830va (VaSet
8831vasetType 3
8832)
8833xt "21000,111000,51250,111000"
8834pts [
8835"51250,111000"
8836"21000,111000"
8837]
8838)
8839start &36
8840end &83
8841sat 32
8842eat 32
8843stc 0
8844st 0
8845sf 1
8846si 0
8847tg (WTG
8848uid 2413,0
8849ps "ConnStartEndStrategy"
8850stg "STSignalDisplayStrategy"
8851f (Text
8852uid 2414,0
8853va (VaSet
8854isHidden 1
8855)
8856xt "22000,110000,26200,111000"
8857st "RSRLOAD"
8858blo "22000,110800"
8859tm "WireNameMgr"
8860)
8861)
8862on &82
8863)
8864*292 (Wire
8865uid 2423,0
8866shape (OrthoPolyLine
8867uid 2424,0
8868va (VaSet
8869vasetType 3
8870)
8871xt "32000,113000,51250,113000"
8872pts [
8873"51250,113000"
8874"32000,113000"
8875]
8876)
8877start &37
8878end &112
8879sat 32
8880eat 1
8881stc 0
8882st 0
8883sf 1
8884si 0
8885tg (WTG
8886uid 2427,0
8887ps "ConnStartEndStrategy"
8888stg "STSignalDisplayStrategy"
8889f (Text
8890uid 2428,0
8891va (VaSet
8892isHidden 1
8893)
8894xt "66250,109000,69250,110000"
8895st "SRCLK"
8896blo "66250,109800"
8897tm "WireNameMgr"
8898)
8899)
8900on &84
8901)
8902*293 (Wire
8903uid 3009,0
8904shape (OrthoPolyLine
8905uid 3010,0
8906va (VaSet
8907vasetType 3
8908)
8909xt "80750,98000,111000,98000"
8910pts [
8911"80750,98000"
8912"111000,98000"
8913]
8914)
8915start &39
8916end &145
8917sat 32
8918eat 32
8919stc 0
8920st 0
8921sf 1
8922si 0
8923tg (WTG
8924uid 3011,0
8925ps "ConnStartEndStrategy"
8926stg "STSignalDisplayStrategy"
8927f (Text
8928uid 3012,0
8929va (VaSet
8930isHidden 1
8931)
8932xt "82000,97000,84800,98000"
8933st "S_CLK"
8934blo "82000,97800"
8935tm "WireNameMgr"
8936)
8937)
8938on &146
8939)
8940*294 (Wire
8941uid 3015,0
8942shape (OrthoPolyLine
8943uid 3016,0
8944va (VaSet
8945vasetType 3
8946)
8947xt "80750,99000,111000,99000"
8948pts [
8949"80750,99000"
8950"111000,99000"
8951]
8952)
8953start &41
8954end &154
8955sat 32
8956eat 32
8957stc 0
8958st 0
8959sf 1
8960si 0
8961tg (WTG
8962uid 3017,0
8963ps "ConnStartEndStrategy"
8964stg "STSignalDisplayStrategy"
8965f (Text
8966uid 3018,0
8967va (VaSet
8968isHidden 1
8969)
8970xt "82750,98000,85150,99000"
8971st "MISO"
8972blo "82750,98800"
8973tm "WireNameMgr"
8974)
8975)
8976on &157
8977)
8978*295 (Wire
8979uid 3021,0
8980shape (OrthoPolyLine
8981uid 3022,0
8982va (VaSet
8983vasetType 3
8984lineWidth 2
8985)
8986xt "80750,89000,100000,89000"
8987pts [
8988"80750,89000"
8989"100000,89000"
8990]
8991)
8992start &40
8993end &133
8994sat 32
8995eat 1
8996sty 1
8997st 0
8998sf 1
8999si 0
9000tg (WTG
9001uid 3023,0
9002ps "ConnStartEndStrategy"
9003stg "STSignalDisplayStrategy"
9004f (Text
9005uid 3024,0
9006va (VaSet
9007)
9008xt "92000,88000,98500,89000"
9009st "sensor_cs : (3:0)"
9010blo "92000,88800"
9011tm "WireNameMgr"
9012)
9013)
9014on &85
9015)
9016*296 (Wire
9017uid 3027,0
9018shape (OrthoPolyLine
9019uid 3028,0
9020va (VaSet
9021vasetType 3
9022)
9023xt "94000,87000,111000,87000"
9024pts [
9025"94000,87000"
9026"111000,87000"
9027]
9028)
9029start &196
9030end &132
9031ss 0
9032sat 32
9033eat 32
9034stc 0
9035st 0
9036sf 1
9037si 0
9038tg (WTG
9039uid 3031,0
9040ps "ConnStartEndStrategy"
9041stg "STSignalDisplayStrategy"
9042f (Text
9043uid 3032,0
9044va (VaSet
9045isHidden 1
9046)
9047xt "95000,86000,98600,87000"
9048st "DAC_CS"
9049blo "95000,86800"
9050tm "WireNameMgr"
9051)
9052)
9053on &86
9054)
9055*297 (Wire
9056uid 3218,0
9057shape (OrthoPolyLine
9058uid 3219,0
9059va (VaSet
9060vasetType 3
9061)
9062xt "22000,78000,51250,78000"
9063pts [
9064"22000,78000"
9065"51250,78000"
9066]
9067)
9068start &66
9069end &15
9070sat 32
9071eat 32
9072stc 0
9073st 0
9074sf 1
9075si 0
9076tg (WTG
9077uid 3220,0
9078ps "ConnStartEndStrategy"
9079stg "STSignalDisplayStrategy"
9080f (Text
9081uid 3221,0
9082va (VaSet
9083isHidden 1
9084)
9085xt "33000,77000,35100,78000"
9086st "TRG"
9087blo "33000,77800"
9088tm "WireNameMgr"
9089)
9090)
9091on &89
9092)
9093*298 (Wire
9094uid 3260,0
9095shape (OrthoPolyLine
9096uid 3261,0
9097va (VaSet
9098vasetType 3
9099lineWidth 2
9100)
9101xt "21000,70000,24000,70000"
9102pts [
9103"21000,70000"
9104"24000,70000"
9105]
9106)
9107start &87
9108end &90
9109sat 32
9110eat 2
9111sty 1
9112stc 0
9113st 0
9114sf 1
9115si 0
9116tg (WTG
9117uid 3264,0
9118ps "ConnStartEndStrategy"
9119stg "STSignalDisplayStrategy"
9120f (Text
9121uid 3265,0
9122va (VaSet
9123isHidden 1
9124)
9125xt "23000,69000,25800,70000"
9126st "A_CLK"
9127blo "23000,69800"
9128tm "WireNameMgr"
9129)
9130)
9131on &94
9132)
9133*299 (Wire
9134uid 3270,0
9135shape (OrthoPolyLine
9136uid 3271,0
9137va (VaSet
9138vasetType 3
9139)
9140xt "29000,70000,43000,72000"
9141pts [
9142"43000,72000"
9143"43000,70000"
9144"32000,70000"
9145"29000,70000"
9146]
9147)
9148start &209
9149end &90
9150sat 32
9151eat 1
9152st 0
9153sf 1
9154si 0
9155tg (WTG
9156uid 3274,0
9157ps "ConnStartEndStrategy"
9158stg "STSignalDisplayStrategy"
9159f (Text
9160uid 3275,0
9161va (VaSet
9162)
9163xt "35000,69000,39500,70000"
9164st "CLK_25_PS"
9165blo "35000,69800"
9166tm "WireNameMgr"
9167)
9168)
9169on &95
9170)
9171*300 (Wire
9172uid 3318,0
9173shape (OrthoPolyLine
9174uid 3319,0
9175va (VaSet
9176vasetType 3
9177lineWidth 2
9178)
9179xt "21000,95000,24000,95000"
9180pts [
9181"21000,95000"
9182"24000,95000"
9183]
9184)
9185start &104
9186end &100
9187sat 32
9188eat 1
9189sty 1
9190stc 0
9191st 0
9192sf 1
9193si 0
9194tg (WTG
9195uid 3322,0
9196ps "ConnStartEndStrategy"
9197stg "STSignalDisplayStrategy"
9198f (Text
9199uid 3323,0
9200va (VaSet
9201isHidden 1
9202)
9203xt "23000,94000,25300,95000"
9204st "A0_D"
9205blo "23000,94800"
9206tm "WireNameMgr"
9207)
9208)
9209on &108
9210)
9211*301 (Wire
9212uid 3352,0
9213shape (OrthoPolyLine
9214uid 3353,0
9215va (VaSet
9216vasetType 3
9217lineWidth 2
9218)
9219xt "21000,96000,24000,96000"
9220pts [
9221"21000,96000"
9222"24000,96000"
9223]
9224)
9225start &105
9226end &100
9227sat 32
9228eat 1
9229sty 1
9230stc 0
9231st 0
9232sf 1
9233si 0
9234tg (WTG
9235uid 3356,0
9236ps "ConnStartEndStrategy"
9237stg "STSignalDisplayStrategy"
9238f (Text
9239uid 3357,0
9240va (VaSet
9241isHidden 1
9242)
9243xt "23000,95000,25300,96000"
9244st "A1_D"
9245blo "23000,95800"
9246tm "WireNameMgr"
9247)
9248)
9249on &109
9250)
9251*302 (Wire
9252uid 3360,0
9253shape (OrthoPolyLine
9254uid 3361,0
9255va (VaSet
9256vasetType 3
9257lineWidth 2
9258)
9259xt "21000,97000,24000,97000"
9260pts [
9261"21000,97000"
9262"24000,97000"
9263]
9264)
9265start &106
9266end &100
9267sat 32
9268eat 1
9269sty 1
9270stc 0
9271st 0
9272sf 1
9273si 0
9274tg (WTG
9275uid 3364,0
9276ps "ConnStartEndStrategy"
9277stg "STSignalDisplayStrategy"
9278f (Text
9279uid 3365,0
9280va (VaSet
9281isHidden 1
9282)
9283xt "23000,96000,25300,97000"
9284st "A2_D"
9285blo "23000,96800"
9286tm "WireNameMgr"
9287)
9288)
9289on &110
9290)
9291*303 (Wire
9292uid 3368,0
9293shape (OrthoPolyLine
9294uid 3369,0
9295va (VaSet
9296vasetType 3
9297lineWidth 2
9298)
9299xt "21000,98000,24000,98000"
9300pts [
9301"21000,98000"
9302"24000,98000"
9303]
9304)
9305start &107
9306end &100
9307sat 32
9308eat 1
9309sty 1
9310stc 0
9311st 0
9312sf 1
9313si 0
9314tg (WTG
9315uid 3372,0
9316ps "ConnStartEndStrategy"
9317stg "STSignalDisplayStrategy"
9318f (Text
9319uid 3373,0
9320va (VaSet
9321isHidden 1
9322)
9323xt "23000,97000,25300,98000"
9324st "A3_D"
9325blo "23000,97800"
9326tm "WireNameMgr"
9327)
9328)
9329on &111
9330)
9331*304 (Wire
9332uid 3430,0
9333shape (OrthoPolyLine
9334uid 3431,0
9335va (VaSet
9336vasetType 3
9337)
9338xt "21000,113000,24000,113000"
9339pts [
9340"21000,113000"
9341"24000,113000"
9342]
9343)
9344start &176
9345end &112
9346sat 32
9347eat 2
9348stc 0
9349st 0
9350sf 1
9351si 0
9352tg (WTG
9353uid 3434,0
9354ps "ConnStartEndStrategy"
9355stg "STSignalDisplayStrategy"
9356f (Text
9357uid 3435,0
9358va (VaSet
9359isHidden 1
9360)
9361xt "23000,112000,27400,113000"
9362st "D0_SRCLK"
9363blo "23000,112800"
9364tm "WireNameMgr"
9365)
9366)
9367on &116
9368)
9369*305 (Wire
9370uid 3438,0
9371shape (OrthoPolyLine
9372uid 3439,0
9373va (VaSet
9374vasetType 3
9375)
9376xt "21000,114000,24000,114000"
9377pts [
9378"21000,114000"
9379"24000,114000"
9380]
9381)
9382start &177
9383end &112
9384sat 32
9385eat 2
9386stc 0
9387st 0
9388sf 1
9389si 0
9390tg (WTG
9391uid 3442,0
9392ps "ConnStartEndStrategy"
9393stg "STSignalDisplayStrategy"
9394f (Text
9395uid 3443,0
9396va (VaSet
9397isHidden 1
9398)
9399xt "23000,113000,27400,114000"
9400st "D1_SRCLK"
9401blo "23000,113800"
9402tm "WireNameMgr"
9403)
9404)
9405on &117
9406)
9407*306 (Wire
9408uid 3446,0
9409shape (OrthoPolyLine
9410uid 3447,0
9411va (VaSet
9412vasetType 3
9413)
9414xt "21000,115000,24000,115000"
9415pts [
9416"21000,115000"
9417"24000,115000"
9418]
9419)
9420start &178
9421end &112
9422sat 32
9423eat 2
9424stc 0
9425st 0
9426sf 1
9427si 0
9428tg (WTG
9429uid 3450,0
9430ps "ConnStartEndStrategy"
9431stg "STSignalDisplayStrategy"
9432f (Text
9433uid 3451,0
9434va (VaSet
9435isHidden 1
9436)
9437xt "23000,114000,27400,115000"
9438st "D2_SRCLK"
9439blo "23000,114800"
9440tm "WireNameMgr"
9441)
9442)
9443on &118
9444)
9445*307 (Wire
9446uid 3454,0
9447shape (OrthoPolyLine
9448uid 3455,0
9449va (VaSet
9450vasetType 3
9451)
9452xt "21000,116000,24000,116000"
9453pts [
9454"21000,116000"
9455"24000,116000"
9456]
9457)
9458start &179
9459end &112
9460sat 32
9461eat 2
9462stc 0
9463st 0
9464sf 1
9465si 0
9466tg (WTG
9467uid 3458,0
9468ps "ConnStartEndStrategy"
9469stg "STSignalDisplayStrategy"
9470f (Text
9471uid 3459,0
9472va (VaSet
9473isHidden 1
9474)
9475xt "23000,115000,27400,116000"
9476st "D3_SRCLK"
9477blo "23000,115800"
9478tm "WireNameMgr"
9479)
9480)
9481on &119
9482)
9483*308 (Wire
9484uid 3574,0
9485shape (OrthoPolyLine
9486uid 3575,0
9487va (VaSet
9488vasetType 3
9489)
9490xt "108000,89000,111000,89000"
9491pts [
9492"111000,89000"
9493"108000,89000"
9494]
9495)
9496start &137
9497end &133
9498sat 32
9499eat 2
9500stc 0
9501st 0
9502sf 1
9503si 0
9504tg (WTG
9505uid 3578,0
9506ps "ConnStartEndStrategy"
9507stg "STSignalDisplayStrategy"
9508f (Text
9509uid 3579,0
9510va (VaSet
9511isHidden 1
9512)
9513xt "108000,88000,110800,89000"
9514st "T0_CS"
9515blo "108000,88800"
9516tm "WireNameMgr"
9517)
9518)
9519on &141
9520)
9521*309 (Wire
9522uid 3582,0
9523shape (OrthoPolyLine
9524uid 3583,0
9525va (VaSet
9526vasetType 3
9527)
9528xt "108000,90000,111000,90000"
9529pts [
9530"111000,90000"
9531"108000,90000"
9532]
9533)
9534start &138
9535end &133
9536sat 32
9537eat 2
9538stc 0
9539st 0
9540sf 1
9541si 0
9542tg (WTG
9543uid 3586,0
9544ps "ConnStartEndStrategy"
9545stg "STSignalDisplayStrategy"
9546f (Text
9547uid 3587,0
9548va (VaSet
9549isHidden 1
9550)
9551xt "108000,89000,110800,90000"
9552st "T1_CS"
9553blo "108000,89800"
9554tm "WireNameMgr"
9555)
9556)
9557on &142
9558)
9559*310 (Wire
9560uid 3590,0
9561shape (OrthoPolyLine
9562uid 3591,0
9563va (VaSet
9564vasetType 3
9565)
9566xt "108000,91000,111000,91000"
9567pts [
9568"111000,91000"
9569"108000,91000"
9570]
9571)
9572start &139
9573end &133
9574sat 32
9575eat 2
9576stc 0
9577st 0
9578sf 1
9579si 0
9580tg (WTG
9581uid 3594,0
9582ps "ConnStartEndStrategy"
9583stg "STSignalDisplayStrategy"
9584f (Text
9585uid 3595,0
9586va (VaSet
9587isHidden 1
9588)
9589xt "108000,90000,110800,91000"
9590st "T2_CS"
9591blo "108000,90800"
9592tm "WireNameMgr"
9593)
9594)
9595on &143
9596)
9597*311 (Wire
9598uid 3598,0
9599shape (OrthoPolyLine
9600uid 3599,0
9601va (VaSet
9602vasetType 3
9603)
9604xt "108000,92000,111000,92000"
9605pts [
9606"111000,92000"
9607"108000,92000"
9608]
9609)
9610start &140
9611end &133
9612sat 32
9613eat 2
9614stc 0
9615st 0
9616sf 1
9617si 0
9618tg (WTG
9619uid 3602,0
9620ps "ConnStartEndStrategy"
9621stg "STSignalDisplayStrategy"
9622f (Text
9623uid 3603,0
9624va (VaSet
9625isHidden 1
9626)
9627xt "108000,91000,110800,92000"
9628st "T3_CS"
9629blo "108000,91800"
9630tm "WireNameMgr"
9631)
9632)
9633on &144
9634)
9635*312 (Wire
9636uid 3682,0
9637shape (OrthoPolyLine
9638uid 3683,0
9639va (VaSet
9640vasetType 3
9641)
9642xt "80750,100000,111000,100000"
9643pts [
9644"80750,100000"
9645"111000,100000"
9646]
9647)
9648start &42
9649end &156
9650sat 32
9651eat 32
9652stc 0
9653st 0
9654sf 1
9655si 0
9656tg (WTG
9657uid 3686,0
9658ps "ConnStartEndStrategy"
9659stg "STSignalDisplayStrategy"
9660f (Text
9661uid 3687,0
9662va (VaSet
9663isHidden 1
9664)
9665xt "82000,99000,84400,100000"
9666st "MOSI"
9667blo "82000,99800"
9668tm "WireNameMgr"
9669)
9670)
9671on &155
9672)
9673*313 (Wire
9674uid 3778,0
9675shape (OrthoPolyLine
9676uid 3779,0
9677va (VaSet
9678vasetType 3
9679)
9680xt "80750,144000,91000,144000"
9681pts [
9682"91000,144000"
9683"80750,144000"
9684]
9685)
9686start &162
9687end &61
9688es 0
9689sat 32
9690eat 32
9691stc 0
9692st 0
9693sf 1
9694si 0
9695tg (WTG
9696uid 3782,0
9697ps "ConnStartEndStrategy"
9698stg "STSignalDisplayStrategy"
9699f (Text
9700uid 3783,0
9701va (VaSet
9702isHidden 1
9703)
9704xt "81000,143000,84000,144000"
9705st "TRG_V"
9706blo "81000,143800"
9707tm "WireNameMgr"
9708)
9709)
9710on &169
9711)
9712*314 (Wire
9713uid 3786,0
9714shape (OrthoPolyLine
9715uid 3787,0
9716va (VaSet
9717vasetType 3
9718)
9719xt "108000,104000,111000,104000"
9720pts [
9721"111000,104000"
9722"108000,104000"
9723]
9724)
9725start &163
9726end &158
9727sat 32
9728eat 2
9729stc 0
9730st 0
9731sf 1
9732si 0
9733tg (WTG
9734uid 3790,0
9735ps "ConnStartEndStrategy"
9736stg "STSignalDisplayStrategy"
9737f (Text
9738uid 3791,0
9739va (VaSet
9740isHidden 1
9741)
9742xt "108000,103000,113600,104000"
9743st "RS485_C_RE"
9744blo "108000,103800"
9745tm "WireNameMgr"
9746)
9747)
9748on &170
9749)
9750*315 (Wire
9751uid 3794,0
9752shape (OrthoPolyLine
9753uid 3795,0
9754va (VaSet
9755vasetType 3
9756)
9757xt "108000,105000,111000,105000"
9758pts [
9759"111000,105000"
9760"108000,105000"
9761]
9762)
9763start &164
9764end &158
9765sat 32
9766eat 2
9767stc 0
9768st 0
9769sf 1
9770si 0
9771tg (WTG
9772uid 3798,0
9773ps "ConnStartEndStrategy"
9774stg "STSignalDisplayStrategy"
9775f (Text
9776uid 3799,0
9777va (VaSet
9778isHidden 1
9779)
9780xt "108000,104000,113600,105000"
9781st "RS485_C_DE"
9782blo "108000,104800"
9783tm "WireNameMgr"
9784)
9785)
9786on &171
9787)
9788*316 (Wire
9789uid 3802,0
9790shape (OrthoPolyLine
9791uid 3803,0
9792va (VaSet
9793vasetType 3
9794)
9795xt "136000,150000,139000,150000"
9796pts [
9797"139000,150000"
9798"136000,150000"
9799]
9800)
9801start &165
9802sat 32
9803eat 16
9804stc 0
9805st 0
9806sf 1
9807si 0
9808tg (WTG
9809uid 3806,0
9810ps "ConnStartEndStrategy"
9811stg "STSignalDisplayStrategy"
9812f (Text
9813uid 3807,0
9814va (VaSet
9815isHidden 1
9816)
9817xt "136000,149000,141500,150000"
9818st "RS485_E_RE"
9819blo "136000,149800"
9820tm "WireNameMgr"
9821)
9822)
9823on &172
9824)
9825*317 (Wire
9826uid 3810,0
9827shape (OrthoPolyLine
9828uid 3811,0
9829va (VaSet
9830vasetType 3
9831)
9832xt "134000,149000,137000,149000"
9833pts [
9834"137000,149000"
9835"134000,149000"
9836]
9837)
9838start &166
9839sat 32
9840eat 16
9841stc 0
9842st 0
9843sf 1
9844si 0
9845tg (WTG
9846uid 3814,0
9847ps "ConnStartEndStrategy"
9848stg "STSignalDisplayStrategy"
9849f (Text
9850uid 3815,0
9851va (VaSet
9852isHidden 1
9853)
9854xt "134000,148000,139500,149000"
9855st "RS485_E_DE"
9856blo "134000,148800"
9857tm "WireNameMgr"
9858)
9859)
9860on &173
9861)
9862*318 (Wire
9863uid 3834,0
9864shape (OrthoPolyLine
9865uid 3835,0
9866va (VaSet
9867vasetType 3
9868)
9869xt "108000,110000,111000,110000"
9870pts [
9871"111000,110000"
9872"108000,110000"
9873]
9874)
9875start &168
9876end &158
9877sat 32
9878eat 2
9879stc 0
9880st 0
9881sf 1
9882si 0
9883tg (WTG
9884uid 3838,0
9885ps "ConnStartEndStrategy"
9886stg "STSignalDisplayStrategy"
9887f (Text
9888uid 3839,0
9889va (VaSet
9890isHidden 1
9891)
9892xt "108000,109000,110900,110000"
9893st "EE_CS"
9894blo "108000,109800"
9895tm "WireNameMgr"
9896)
9897)
9898on &175
9899)
9900*319 (Wire
9901uid 4942,0
9902shape (OrthoPolyLine
9903uid 4943,0
9904va (VaSet
9905vasetType 3
9906lineWidth 2
9907)
9908xt "70000,154000,72000,154000"
9909pts [
9910"70000,154000"
9911"72000,154000"
9912]
9913)
9914start &267
9915end &180
9916sat 2
9917eat 32
9918sty 1
9919stc 0
9920st 0
9921sf 1
9922si 0
9923tg (WTG
9924uid 4948,0
9925ps "ConnStartEndStrategy"
9926stg "STSignalDisplayStrategy"
9927f (Text
9928uid 4949,0
9929va (VaSet
9930isHidden 1
9931)
9932xt "71750,151000,73650,152000"
9933st "D_T"
9934blo "71750,151800"
9935tm "WireNameMgr"
9936)
9937)
9938on &181
9939)
9940*320 (Wire
9941uid 6431,0
9942shape (OrthoPolyLine
9943uid 6432,0
9944va (VaSet
9945vasetType 3
9946)
9947xt "80750,121000,111000,121000"
9948pts [
9949"80750,121000"
9950"111000,121000"
9951]
9952)
9953start &43
9954end &167
9955sat 32
9956eat 32
9957stc 0
9958st 0
9959sf 1
9960si 0
9961tg (WTG
9962uid 6435,0
9963ps "ConnStartEndStrategy"
9964stg "STSignalDisplayStrategy"
9965f (Text
9966uid 6436,0
9967va (VaSet
9968isHidden 1
9969)
9970xt "92000,120000,96000,121000"
9971st "DENABLE"
9972blo "92000,120800"
9973tm "WireNameMgr"
9974)
9975)
9976on &174
9977)
9978*321 (Wire
9979uid 7144,0
9980shape (OrthoPolyLine
9981uid 7145,0
9982va (VaSet
9983vasetType 3
9984lineWidth 2
9985)
9986xt "126000,139000,135000,139000"
9987pts [
9988"126000,139000"
9989"135000,139000"
9990]
9991)
9992start &230
9993end &190
9994sat 2
9995eat 32
9996sty 1
9997st 0
9998sf 1
9999si 0
10000tg (WTG
10001uid 7148,0
10002ps "ConnStartEndStrategy"
10003stg "STSignalDisplayStrategy"
10004f (Text
10005uid 7149,0
10006va (VaSet
10007isHidden 1
10008)
10009xt "131000,151000,135800,152000"
10010st "A1_T : (7:0)"
10011blo "131000,151800"
10012tm "WireNameMgr"
10013)
10014)
10015on &191
10016)
10017*322 (Wire
10018uid 7477,0
10019shape (OrthoPolyLine
10020uid 7478,0
10021va (VaSet
10022vasetType 3
10023)
10024xt "80750,87000,91000,87000"
10025pts [
10026"80750,87000"
10027"91000,87000"
10028]
10029)
10030start &38
10031end &194
10032es 0
10033sat 32
10034eat 32
10035st 0
10036sf 1
10037si 0
10038tg (WTG
10039uid 7483,0
10040ps "ConnStartEndStrategy"
10041stg "STSignalDisplayStrategy"
10042f (Text
10043uid 7484,0
10044va (VaSet
10045)
10046xt "83000,86000,85700,87000"
10047st "dummy"
10048blo "83000,86800"
10049tm "WireNameMgr"
10050)
10051)
10052on &192
10053)
10054*323 (Wire
10055uid 8853,0
10056shape (OrthoPolyLine
10057uid 8854,0
10058va (VaSet
10059vasetType 3
10060lineWidth 2
10061)
10062xt "18000,109000,51250,124000"
10063pts [
10064"51250,109000"
10065"18000,109000"
10066"18000,124000"
10067"21000,124000"
10068]
10069)
10070start &30
10071end &186
10072sat 32
10073eat 1
10074sty 1
10075st 0
10076sf 1
10077si 0
10078tg (WTG
10079uid 8857,0
10080ps "ConnStartEndStrategy"
10081stg "STSignalDisplayStrategy"
10082f (Text
10083uid 8858,0
10084va (VaSet
10085)
10086xt "42000,108000,50500,109000"
10087st "drs_channel_id : (3:0)"
10088blo "42000,108800"
10089tm "WireNameMgr"
10090)
10091)
10092on &206
10093)
10094*324 (Wire
10095uid 9502,0
10096shape (OrthoPolyLine
10097uid 9503,0
10098va (VaSet
10099vasetType 3
10100)
10101xt "46000,69000,51250,69000"
10102pts [
10103"51250,69000"
10104"46000,69000"
10105]
10106)
10107start &26
10108sat 32
10109eat 16
10110st 0
10111sf 1
10112si 0
10113tg (WTG
10114uid 9506,0
10115ps "ConnStartEndStrategy"
10116stg "STSignalDisplayStrategy"
10117f (Text
10118uid 9507,0
10119va (VaSet
10120)
10121xt "47000,68000,50100,69000"
10122st "CLK_50"
10123blo "47000,68800"
10124tm "WireNameMgr"
10125)
10126)
10127on &207
10128)
10129*325 (Wire
10130uid 10034,0
10131shape (OrthoPolyLine
10132uid 10035,0
10133va (VaSet
10134vasetType 3
10135)
10136xt "49000,70000,51250,71000"
10137pts [
10138"51250,70000"
10139"49000,70000"
10140"49000,71000"
10141]
10142)
10143start &25
10144end &214
10145sat 32
10146eat 32
10147st 0
10148sf 1
10149si 0
10150tg (WTG
10151uid 10036,0
10152ps "ConnStartEndStrategy"
10153stg "STSignalDisplayStrategy"
10154f (Text
10155uid 10037,0
10156va (VaSet
10157isHidden 1
10158)
10159xt "45250,69000,50550,70000"
10160st "CLK_25_PS1"
10161blo "45250,69800"
10162tm "WireNameMgr"
10163)
10164)
10165on &226
10166)
10167*326 (Wire
10168uid 10052,0
10169shape (OrthoPolyLine
10170uid 10053,0
10171va (VaSet
10172vasetType 3
10173)
10174xt "49000,73000,51250,73000"
10175pts [
10176"51250,73000"
10177"49000,73000"
10178]
10179)
10180start &44
10181end &212
10182sat 32
10183eat 32
10184st 0
10185sf 1
10186si 0
10187tg (WTG
10188uid 10054,0
10189ps "ConnStartEndStrategy"
10190stg "STSignalDisplayStrategy"
10191f (Text
10192uid 10055,0
10193va (VaSet
10194isHidden 1
10195)
10196xt "47000,72000,51500,73000"
10197st "adc_clk_en"
10198blo "47000,72800"
10199tm "WireNameMgr"
10200)
10201)
10202on &227
10203)
10204*327 (Wire
10205uid 10302,0
10206shape (OrthoPolyLine
10207uid 10303,0
10208va (VaSet
10209vasetType 3
10210lineWidth 2
10211)
10212xt "126000,148000,131000,148000"
10213pts [
10214"126000,148000"
10215"131000,148000"
10216]
10217)
10218start &230
10219end &228
10220sat 2
10221eat 32
10222sty 1
10223st 0
10224sf 1
10225si 0
10226tg (WTG
10227uid 10306,0
10228ps "ConnStartEndStrategy"
10229stg "STSignalDisplayStrategy"
10230f (Text
10231uid 10307,0
10232va (VaSet
10233isHidden 1
10234)
10235xt "127000,167000,131800,168000"
10236st "A0_T : (7:0)"
10237blo "127000,167800"
10238tm "WireNameMgr"
10239)
10240)
10241on &229
10242)
10243*328 (Wire
10244uid 10498,0
10245shape (OrthoPolyLine
10246uid 10499,0
10247va (VaSet
10248vasetType 3
10249)
10250xt "80750,123000,88000,123000"
10251pts [
10252"80750,123000"
10253"88000,123000"
10254]
10255)
10256start &56
10257sat 32
10258eat 16
10259st 0
10260sf 1
10261si 0
10262tg (WTG
10263uid 10502,0
10264ps "ConnStartEndStrategy"
10265stg "STSignalDisplayStrategy"
10266f (Text
10267uid 10503,0
10268va (VaSet
10269)
10270xt "82000,122000,86800,123000"
10271st "CLK50_OUT"
10272blo "82000,122800"
10273tm "WireNameMgr"
10274)
10275)
10276on &234
10277)
10278*329 (Wire
10279uid 10506,0
10280shape (OrthoPolyLine
10281uid 10507,0
10282va (VaSet
10283vasetType 3
10284)
10285xt "80750,124000,88000,124000"
10286pts [
10287"80750,124000"
10288"88000,124000"
10289]
10290)
10291start &54
10292sat 32
10293eat 16
10294st 0
10295sf 1
10296si 0
10297tg (WTG
10298uid 10510,0
10299ps "ConnStartEndStrategy"
10300stg "STSignalDisplayStrategy"
10301f (Text
10302uid 10511,0
10303va (VaSet
10304)
10305xt "82000,123000,86800,124000"
10306st "CLK25_OUT"
10307blo "82000,123800"
10308tm "WireNameMgr"
10309)
10310)
10311on &235
10312)
10313*330 (Wire
10314uid 10514,0
10315shape (OrthoPolyLine
10316uid 10515,0
10317va (VaSet
10318vasetType 3
10319)
10320xt "80750,125000,89000,125000"
10321pts [
10322"80750,125000"
10323"89000,125000"
10324]
10325)
10326start &55
10327sat 32
10328eat 16
10329st 0
10330sf 1
10331si 0
10332tg (WTG
10333uid 10518,0
10334ps "ConnStartEndStrategy"
10335stg "STSignalDisplayStrategy"
10336f (Text
10337uid 10519,0
10338va (VaSet
10339)
10340xt "82000,124000,88200,125000"
10341st "CLK25_PSOUT"
10342blo "82000,124800"
10343tm "WireNameMgr"
10344)
10345)
10346on &236
10347)
10348*331 (Wire
10349uid 10522,0
10350shape (OrthoPolyLine
10351uid 10523,0
10352va (VaSet
10353vasetType 3
10354)
10355xt "80750,126000,87000,126000"
10356pts [
10357"80750,126000"
10358"87000,126000"
10359]
10360)
10361start &48
10362sat 32
10363eat 16
10364st 0
10365sf 1
10366si 0
10367tg (WTG
10368uid 10526,0
10369ps "ConnStartEndStrategy"
10370stg "STSignalDisplayStrategy"
10371f (Text
10372uid 10527,0
10373va (VaSet
10374)
10375xt "82000,125000,86400,126000"
10376st "PS_DIR_IN"
10377blo "82000,125800"
10378tm "WireNameMgr"
10379)
10380)
10381on &237
10382)
10383*332 (Wire
10384uid 10546,0
10385shape (OrthoPolyLine
10386uid 10547,0
10387va (VaSet
10388vasetType 3
10389)
10390xt "80750,128000,90000,128000"
10391pts [
10392"80750,128000"
10393"90000,128000"
10394]
10395)
10396start &51
10397sat 32
10398eat 16
10399st 0
10400sf 1
10401si 0
10402tg (WTG
10403uid 10550,0
10404ps "ConnStartEndStrategy"
10405stg "STSignalDisplayStrategy"
10406f (Text
10407uid 10551,0
10408va (VaSet
10409)
10410xt "82000,127000,89000,128000"
10411st "PSINCDEC_OUT"
10412blo "82000,127800"
10413tm "WireNameMgr"
10414)
10415)
10416on &238
10417)
10418*333 (Wire
10419uid 10554,0
10420shape (OrthoPolyLine
10421uid 10555,0
10422va (VaSet
10423vasetType 3
10424)
10425xt "80750,130000,88000,130000"
10426pts [
10427"80750,130000"
10428"88000,130000"
10429]
10430)
10431start &45
10432sat 32
10433eat 16
10434st 0
10435sf 1
10436si 0
10437tg (WTG
10438uid 10558,0
10439ps "ConnStartEndStrategy"
10440stg "STSignalDisplayStrategy"
10441f (Text
10442uid 10559,0
10443va (VaSet
10444)
10445xt "82000,129000,87200,130000"
10446st "DCM_locked"
10447blo "82000,129800"
10448tm "WireNameMgr"
10449)
10450)
10451on &239
10452)
10453*334 (Wire
10454uid 10562,0
10455shape (OrthoPolyLine
10456uid 10563,0
10457va (VaSet
10458vasetType 3
10459)
10460xt "80750,132000,85000,132000"
10461pts [
10462"80750,132000"
10463"85000,132000"
10464]
10465)
10466start &52
10467sat 32
10468eat 16
10469st 0
10470sf 1
10471si 0
10472tg (WTG
10473uid 10566,0
10474ps "ConnStartEndStrategy"
10475stg "STSignalDisplayStrategy"
10476f (Text
10477uid 10567,0
10478va (VaSet
10479)
10480xt "82000,131000,84200,132000"
10481st "ready"
10482blo "82000,131800"
10483tm "WireNameMgr"
10484)
10485)
10486on &240
10487)
10488*335 (Wire
10489uid 10570,0
10490shape (OrthoPolyLine
10491uid 10571,0
10492va (VaSet
10493vasetType 3
10494)
10495xt "80750,133000,86000,133000"
10496pts [
10497"80750,133000"
10498"86000,133000"
10499]
10500)
10501start &53
10502sat 32
10503eat 16
10504st 0
10505sf 1
10506si 0
10507tg (WTG
10508uid 10574,0
10509ps "ConnStartEndStrategy"
10510stg "STSignalDisplayStrategy"
10511f (Text
10512uid 10575,0
10513va (VaSet
10514)
10515xt "82000,132000,84900,133000"
10516st "shifting"
10517blo "82000,132800"
10518tm "WireNameMgr"
10519)
10520)
10521on &241
10522)
10523*336 (Wire
10524uid 10578,0
10525shape (OrthoPolyLine
10526uid 10579,0
10527va (VaSet
10528vasetType 3
10529)
10530xt "80750,134000,91000,134000"
10531pts [
10532"80750,134000"
10533"91000,134000"
10534]
10535)
10536start &50
10537sat 32
10538eat 16
10539st 0
10540sf 1
10541si 0
10542tg (WTG
10543uid 10582,0
10544ps "ConnStartEndStrategy"
10545stg "STSignalDisplayStrategy"
10546f (Text
10547uid 10583,0
10548va (VaSet
10549)
10550xt "82000,133000,89800,134000"
10551st "PSDONE_extraOUT"
10552blo "82000,133800"
10553tm "WireNameMgr"
10554)
10555)
10556on &242
10557)
10558*337 (Wire
10559uid 10586,0
10560shape (OrthoPolyLine
10561uid 10587,0
10562va (VaSet
10563vasetType 3
10564)
10565xt "80750,135000,88000,135000"
10566pts [
10567"80750,135000"
10568"88000,135000"
10569]
10570)
10571start &49
10572sat 32
10573eat 16
10574st 0
10575sf 1
10576si 0
10577tg (WTG
10578uid 10590,0
10579ps "ConnStartEndStrategy"
10580stg "STSignalDisplayStrategy"
10581f (Text
10582uid 10591,0
10583va (VaSet
10584)
10585xt "82000,134000,87000,135000"
10586st "PSCLK_OUT"
10587blo "82000,134800"
10588tm "WireNameMgr"
10589)
10590)
10591on &243
10592)
10593*338 (Wire
10594uid 10594,0
10595shape (OrthoPolyLine
10596uid 10595,0
10597va (VaSet
10598vasetType 3
10599)
10600xt "80750,136000,91000,136000"
10601pts [
10602"80750,136000"
10603"91000,136000"
10604]
10605)
10606start &46
10607sat 32
10608eat 16
10609st 0
10610sf 1
10611si 0
10612tg (WTG
10613uid 10598,0
10614ps "ConnStartEndStrategy"
10615stg "STSignalDisplayStrategy"
10616f (Text
10617uid 10599,0
10618va (VaSet
10619)
10620xt "82000,135000,89700,136000"
10621st "LOCKED_extraOUT"
10622blo "82000,135800"
10623tm "WireNameMgr"
10624)
10625)
10626on &244
10627)
10628*339 (Wire
10629uid 11096,0
10630shape (OrthoPolyLine
10631uid 11097,0
10632va (VaSet
10633vasetType 3
10634)
10635xt "96000,103000,100000,103000"
10636pts [
10637"96000,103000"
10638"100000,103000"
10639]
10640)
10641start &245
10642end &158
10643sat 32
10644eat 1
10645st 0
10646sf 1
10647si 0
10648tg (WTG
10649uid 11100,0
10650ps "ConnStartEndStrategy"
10651stg "STSignalDisplayStrategy"
10652f (Text
10653uid 11101,0
10654va (VaSet
10655isHidden 1
10656)
10657xt "126000,96000,131300,97000"
10658st "RS485_C_DI"
10659blo "126000,96800"
10660tm "WireNameMgr"
10661)
10662)
10663on &246
10664)
10665*340 (Wire
10666uid 11110,0
10667shape (OrthoPolyLine
10668uid 11111,0
10669va (VaSet
10670vasetType 3
10671)
10672xt "108000,112000,111000,112000"
10673pts [
10674"108000,112000"
10675"111000,112000"
10676]
10677)
10678start &158
10679end &247
10680sat 2
10681eat 32
10682st 0
10683sf 1
10684si 0
10685tg (WTG
10686uid 11114,0
10687ps "ConnStartEndStrategy"
10688stg "STSignalDisplayStrategy"
10689f (Text
10690uid 11115,0
10691va (VaSet
10692isHidden 1
10693)
10694xt "110000,111000,115700,112000"
10695st "RS485_C_DO"
10696blo "110000,111800"
10697tm "WireNameMgr"
10698)
10699)
10700on &248
10701)
10702*341 (Wire
10703uid 11514,0
10704shape (OrthoPolyLine
10705uid 11515,0
10706va (VaSet
10707vasetType 3
10708)
10709xt "108000,150000,112000,150000"
10710pts [
10711"108000,150000"
10712"112000,150000"
10713]
10714)
10715start &249
10716sat 32
10717eat 16
10718st 0
10719sf 1
10720si 0
10721tg (WTG
10722uid 11518,0
10723ps "ConnStartEndStrategy"
10724stg "STSignalDisplayStrategy"
10725f (Text
10726uid 11519,0
10727va (VaSet
10728isHidden 1
10729)
10730xt "110000,149000,115200,150000"
10731st "RS485_E_DI"
10732blo "110000,149800"
10733tm "WireNameMgr"
10734)
10735)
10736on &250
10737)
10738*342 (Wire
10739uid 11528,0
10740shape (OrthoPolyLine
10741uid 11529,0
10742va (VaSet
10743vasetType 3
10744)
10745xt "87000,158000,91000,158000"
10746pts [
10747"91000,158000"
10748"87000,158000"
10749]
10750)
10751end &252
10752sat 16
10753eat 32
10754st 0
10755sf 1
10756si 0
10757tg (WTG
10758uid 11532,0
10759ps "ConnStartEndStrategy"
10760stg "STSignalDisplayStrategy"
10761f (Text
10762uid 11533,0
10763va (VaSet
10764isHidden 1
10765)
10766xt "93000,157000,98600,158000"
10767st "RS485_E_DO"
10768blo "93000,157800"
10769tm "WireNameMgr"
10770)
10771)
10772on &251
10773)
10774*343 (Wire
10775uid 12320,0
10776shape (OrthoPolyLine
10777uid 12321,0
10778va (VaSet
10779vasetType 3
10780)
10781xt "80750,140000,87000,140000"
10782pts [
10783"80750,140000"
10784"87000,140000"
10785]
10786)
10787start &57
10788end &253
10789sat 32
10790eat 32
10791stc 0
10792st 0
10793sf 1
10794si 0
10795tg (WTG
10796uid 12324,0
10797ps "ConnStartEndStrategy"
10798stg "STSignalDisplayStrategy"
10799f (Text
10800uid 12325,0
10801va (VaSet
10802isHidden 1
10803)
10804xt "82000,139000,84300,140000"
10805st "SRIN"
10806blo "82000,139800"
10807tm "WireNameMgr"
10808)
10809)
10810on &254
10811)
10812*344 (Wire
10813uid 12545,0
10814shape (OrthoPolyLine
10815uid 12546,0
10816va (VaSet
10817vasetType 3
10818)
10819xt "80750,141000,87000,141000"
10820pts [
10821"80750,141000"
10822"87000,141000"
10823]
10824)
10825start &58
10826end &255
10827ss 0
10828sat 32
10829eat 32
10830st 0
10831sf 1
10832si 0
10833tg (WTG
10834uid 12549,0
10835ps "ConnStartEndStrategy"
10836stg "STSignalDisplayStrategy"
10837f (Text
10838uid 12550,0
10839va (VaSet
10840isHidden 1
10841)
10842xt "83000,140000,88100,141000"
10843st "AMBER_LED"
10844blo "83000,140800"
10845tm "WireNameMgr"
10846)
10847)
10848on &258
10849)
10850*345 (Wire
10851uid 12559,0
10852shape (OrthoPolyLine
10853uid 12560,0
10854va (VaSet
10855vasetType 3
10856)
10857xt "80750,142000,87000,143000"
10858pts [
10859"80750,143000"
10860"87000,142000"
10861]
10862)
10863start &60
10864end &256
10865sat 32
10866eat 32
10867st 0
10868sf 1
10869si 0
10870tg (WTG
10871uid 12563,0
10872ps "ConnStartEndStrategy"
10873stg "STSignalDisplayStrategy"
10874f (Text
10875uid 12564,0
10876va (VaSet
10877isHidden 1
10878)
10879xt "83000,142000,88100,143000"
10880st "GREEN_LED"
10881blo "83000,142800"
10882tm "WireNameMgr"
10883)
10884)
10885on &259
10886)
10887*346 (Wire
10888uid 12573,0
10889shape (OrthoPolyLine
10890uid 12574,0
10891va (VaSet
10892vasetType 3
10893)
10894xt "80750,142000,87000,143000"
10895pts [
10896"80750,142000"
10897"87000,143000"
10898]
10899)
10900start &59
10901end &257
10902sat 32
10903eat 32
10904st 0
10905sf 1
10906si 0
10907tg (WTG
10908uid 12577,0
10909ps "ConnStartEndStrategy"
10910stg "STSignalDisplayStrategy"
10911f (Text
10912uid 12578,0
10913va (VaSet
10914isHidden 1
10915)
10916xt "83000,141000,87000,142000"
10917st "RED_LED"
10918blo "83000,141800"
10919tm "WireNameMgr"
10920)
10921)
10922on &260
10923)
10924*347 (Wire
10925uid 13522,0
10926shape (OrthoPolyLine
10927uid 13523,0
10928va (VaSet
10929vasetType 3
10930lineWidth 2
10931)
10932xt "12000,81000,24000,81000"
10933pts [
10934"12000,81000"
10935"24000,81000"
10936]
10937)
10938start &261
10939end &68
10940sat 32
10941eat 1
10942sty 1
10943st 0
10944sf 1
10945si 0
10946tg (WTG
10947uid 13526,0
10948ps "ConnStartEndStrategy"
10949stg "STSignalDisplayStrategy"
10950f (Text
10951uid 13527,0
10952va (VaSet
10953)
10954xt "14000,80000,18700,81000"
10955st "LINE : (5:0)"
10956blo "14000,80800"
10957tm "WireNameMgr"
10958)
10959)
10960on &262
10961)
10962*348 (Wire
10963uid 13538,0
10964shape (OrthoPolyLine
10965uid 13539,0
10966va (VaSet
10967vasetType 3
10968)
10969xt "110000,139000,120000,139000"
10970pts [
10971"110000,139000"
10972"120000,139000"
10973]
10974)
10975end &230
10976sat 16
10977eat 1
10978st 0
10979sf 1
10980si 0
10981tg (WTG
10982uid 13544,0
10983ps "ConnStartEndStrategy"
10984stg "STSignalDisplayStrategy"
10985f (Text
10986uid 13545,0
10987va (VaSet
10988)
10989xt "112000,138000,119700,139000"
10990st "LOCKED_extraOUT"
10991blo "112000,138800"
10992tm "WireNameMgr"
10993)
10994)
10995on &244
10996)
10997*349 (Wire
10998uid 13546,0
10999shape (OrthoPolyLine
11000uid 13547,0
11001va (VaSet
11002vasetType 3
11003)
11004xt "110000,140000,120000,140000"
11005pts [
11006"110000,140000"
11007"120000,140000"
11008]
11009)
11010end &230
11011sat 16
11012eat 1
11013st 0
11014sf 1
11015si 0
11016tg (WTG
11017uid 13552,0
11018ps "ConnStartEndStrategy"
11019stg "STSignalDisplayStrategy"
11020f (Text
11021uid 13553,0
11022va (VaSet
11023)
11024xt "112000,139000,117000,140000"
11025st "PSCLK_OUT"
11026blo "112000,139800"
11027tm "WireNameMgr"
11028)
11029)
11030on &243
11031)
11032*350 (Wire
11033uid 13554,0
11034shape (OrthoPolyLine
11035uid 13555,0
11036va (VaSet
11037vasetType 3
11038)
11039xt "110000,141000,120000,141000"
11040pts [
11041"110000,141000"
11042"120000,141000"
11043]
11044)
11045end &230
11046sat 16
11047eat 1
11048st 0
11049sf 1
11050si 0
11051tg (WTG
11052uid 13560,0
11053ps "ConnStartEndStrategy"
11054stg "STSignalDisplayStrategy"
11055f (Text
11056uid 13561,0
11057va (VaSet
11058)
11059xt "112000,140000,119800,141000"
11060st "PSDONE_extraOUT"
11061blo "112000,140800"
11062tm "WireNameMgr"
11063)
11064)
11065on &242
11066)
11067*351 (Wire
11068uid 13570,0
11069shape (OrthoPolyLine
11070uid 13571,0
11071va (VaSet
11072vasetType 3
11073)
11074xt "110000,143000,120000,143000"
11075pts [
11076"110000,143000"
11077"120000,143000"
11078]
11079)
11080end &230
11081sat 16
11082eat 1
11083st 0
11084sf 1
11085si 0
11086tg (WTG
11087uid 13576,0
11088ps "ConnStartEndStrategy"
11089stg "STSignalDisplayStrategy"
11090f (Text
11091uid 13577,0
11092va (VaSet
11093)
11094xt "112000,142000,114300,143000"
11095st "SRIN"
11096blo "112000,142800"
11097tm "WireNameMgr"
11098)
11099)
11100on &254
11101)
11102*352 (Wire
11103uid 13578,0
11104shape (OrthoPolyLine
11105uid 13579,0
11106va (VaSet
11107vasetType 3
11108lineWidth 2
11109)
11110xt "110000,144000,120000,144000"
11111pts [
11112"110000,144000"
11113"120000,144000"
11114]
11115)
11116end &230
11117sat 16
11118eat 1
11119sty 1
11120st 0
11121sf 1
11122si 0
11123tg (WTG
11124uid 13584,0
11125ps "ConnStartEndStrategy"
11126stg "STSignalDisplayStrategy"
11127f (Text
11128uid 13585,0
11129va (VaSet
11130)
11131xt "112000,143000,120500,144000"
11132st "drs_channel_id : (3:0)"
11133blo "112000,143800"
11134tm "WireNameMgr"
11135)
11136)
11137on &206
11138)
11139*353 (Wire
11140uid 13610,0
11141shape (OrthoPolyLine
11142uid 13611,0
11143va (VaSet
11144vasetType 3
11145)
11146xt "116000,158000,120000,158000"
11147pts [
11148"116000,158000"
11149"120000,158000"
11150]
11151)
11152start &182
11153end &230
11154sat 32
11155eat 1
11156st 0
11157sf 1
11158si 0
11159tg (WTG
11160uid 13616,0
11161ps "ConnStartEndStrategy"
11162stg "STSignalDisplayStrategy"
11163f (Text
11164uid 13617,0
11165va (VaSet
11166isHidden 1
11167)
11168xt "116000,157000,122800,158000"
11169st "D_PLLLCK : (3:0)"
11170blo "116000,157800"
11171tm "WireNameMgr"
11172)
11173)
11174on &183
11175)
11176*354 (Wire
11177uid 13618,0
11178shape (OrthoPolyLine
11179uid 13619,0
11180va (VaSet
11181vasetType 3
11182lineWidth 2
11183)
11184xt "126000,158000,131000,158000"
11185pts [
11186"126000,158000"
11187"131000,158000"
11188]
11189)
11190start &230
11191end &184
11192sat 2
11193eat 32
11194sty 1
11195st 0
11196sf 1
11197si 0
11198tg (WTG
11199uid 13624,0
11200ps "ConnStartEndStrategy"
11201stg "STSignalDisplayStrategy"
11202f (Text
11203uid 13625,0
11204va (VaSet
11205isHidden 1
11206)
11207xt "128000,163000,132900,164000"
11208st "D_T2 : (3:0)"
11209blo "128000,163800"
11210tm "WireNameMgr"
11211)
11212)
11213on &185
11214)
11215*355 (Wire
11216uid 13634,0
11217shape (OrthoPolyLine
11218uid 13635,0
11219va (VaSet
11220vasetType 3
11221)
11222xt "112000,149000,120000,149000"
11223pts [
11224"112000,149000"
11225"120000,149000"
11226]
11227)
11228start &263
11229end &230
11230sat 32
11231eat 1
11232st 0
11233sf 1
11234si 0
11235tg (WTG
11236uid 13638,0
11237ps "ConnStartEndStrategy"
11238stg "STSignalDisplayStrategy"
11239f (Text
11240uid 13639,0
11241va (VaSet
11242isHidden 1
11243)
11244xt "114000,148000,117500,149000"
11245st "REFCLK"
11246blo "114000,148800"
11247tm "WireNameMgr"
11248)
11249)
11250on &264
11251)
11252*356 (Wire
11253uid 13650,0
11254shape (OrthoPolyLine
11255uid 13651,0
11256va (VaSet
11257vasetType 3
11258)
11259xt "112000,150000,120000,150000"
11260pts [
11261"112000,150000"
11262"120000,150000"
11263]
11264)
11265end &230
11266sat 16
11267eat 1
11268st 0
11269sf 1
11270si 0
11271tg (WTG
11272uid 13656,0
11273ps "ConnStartEndStrategy"
11274stg "STSignalDisplayStrategy"
11275f (Text
11276uid 13657,0
11277va (VaSet
11278)
11279xt "114000,149000,119200,150000"
11280st "RS485_E_DI"
11281blo "114000,149800"
11282tm "WireNameMgr"
11283)
11284)
11285on &250
11286)
11287*357 (Wire
11288uid 13658,0
11289shape (OrthoPolyLine
11290uid 13659,0
11291va (VaSet
11292vasetType 3
11293)
11294xt "126000,149000,134000,149000"
11295pts [
11296"126000,149000"
11297"134000,149000"
11298]
11299)
11300start &230
11301sat 2
11302eat 16
11303st 0
11304sf 1
11305si 0
11306tg (WTG
11307uid 13664,0
11308ps "ConnStartEndStrategy"
11309stg "STSignalDisplayStrategy"
11310f (Text
11311uid 13665,0
11312va (VaSet
11313)
11314xt "128000,148000,133500,149000"
11315st "RS485_E_DE"
11316blo "128000,148800"
11317tm "WireNameMgr"
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11319)
11320on &173
11321)
11322*358 (Wire
11323uid 13666,0
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11331"126000,150000"
11332"136000,150000"
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11334)
11335start &230
11336sat 2
11337eat 16
11338st 0
11339sf 1
11340si 0
11341tg (WTG
11342uid 13672,0
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11350st "RS485_E_RE"
11351blo "128000,149800"
11352tm "WireNameMgr"
11353)
11354)
11355on &172
11356)
11357*359 (Wire
11358uid 14328,0
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11364)
11365xt "39000,139000,51250,139000"
11366pts [
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11368"51250,139000"
11369]
11370)
11371start &265
11372end &62
11373sat 32
11374eat 32
11375sty 1
11376st 0
11377sf 1
11378si 0
11379tg (WTG
11380uid 14332,0
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11382stg "STSignalDisplayStrategy"
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11391tm "WireNameMgr"
11392)
11393)
11394on &266
11395)
11396*360 (Wire
11397uid 15175,0
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11399uid 15176,0
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11401vasetType 3
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11403)
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11407"87000,120000"
11408]
11409)
11410start &14
11411sat 32
11412eat 16
11413sty 1
11414st 0
11415sf 1
11416si 0
11417tg (WTG
11418uid 15179,0
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11429)
11430)
11431on &271
11432)
11433]
11434bg "65535,65535,65535"
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11440xySpacing 1000
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11442yShown 1
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11523)
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11558exportStdPackageRefs 1
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11581tm "CommentText"
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11605blo "1000,1800"
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11650)
11651]
11652)
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11717)
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11733)
11734portVis (PortSigDisplay
11735)
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11741visOptions (mwParamsVisibilityOptions
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11784)
11785]
11786)
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11798elements [
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11801viewicon (ZoomableIcon
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11854)
11855]
11856)
11857ga (GenericAssociation
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11870)
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11917)
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11994)
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12040va (VaSet
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12042)
12043xt "-400,-400,400,400"
12044radius 400
12045)
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12077)
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12083)
12084)
12085defaultPortIoOut (PortIoOut
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12120)
12121)
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12205sat 32
12206eat 32
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12212stg "STSignalDisplayStrategy"
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12214va (VaSet
12215)
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12237eat 32
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12258vasetType 3
12259lineColor "32768,0,0"
12260lineWidth 2
12261)
12262pts [
12263"0,0"
12264"0,0"
12265]
12266)
12267ss 0
12268es 0
12269sat 32
12270eat 32
12271textGroup (BiTextGroup
12272ps "ConnStartEndStrategy"
12273stg "VerticalLayoutStrategy"
12274first (Text
12275va (VaSet
12276)
12277xt "0,0,3000,1000"
12278st "bundle0"
12279blo "0,800"
12280tm "BundleNameMgr"
12281)
12282second (MLText
12283va (VaSet
12284)
12285xt "0,1000,1000,2000"
12286st "()"
12287tm "BundleContentsMgr"
12288)
12289)
12290bundleNet &0
12291)
12292defaultPortMapFrame (PortMapFrame
12293ps "PortMapFrameStrategy"
12294shape (RectFrame
12295va (VaSet
12296vasetType 1
12297fg "65535,65535,65535"
12298lineColor "0,0,32768"
12299lineWidth 2
12300)
12301xt "0,0,10000,12000"
12302)
12303portMapText (BiTextGroup
12304ps "BottomRightOffsetStrategy"
12305stg "VerticalLayoutStrategy"
12306first (MLText
12307va (VaSet
12308)
12309)
12310second (MLText
12311va (VaSet
12312)
12313tm "PortMapTextMgr"
12314)
12315)
12316)
12317defaultGenFrame (Frame
12318shape (RectFrame
12319va (VaSet
12320vasetType 1
12321fg "65535,65535,65535"
12322lineColor "26368,26368,26368"
12323lineStyle 2
12324lineWidth 2
12325)
12326xt "0,0,20000,20000"
12327)
12328title (TextAssociate
12329ps "TopLeftStrategy"
12330text (MLText
12331va (VaSet
12332)
12333xt "0,-1100,12600,-100"
12334st "g0: FOR i IN 0 TO n GENERATE"
12335tm "FrameTitleTextMgr"
12336)
12337)
12338seqNum (FrameSequenceNumber
12339ps "TopLeftStrategy"
12340shape (Rectangle
12341va (VaSet
12342vasetType 1
12343fg "65535,65535,65535"
12344)
12345xt "50,50,1250,1450"
12346)
12347num (Text
12348va (VaSet
12349)
12350xt "250,250,1050,1250"
12351st "1"
12352blo "250,1050"
12353tm "FrameSeqNumMgr"
12354)
12355)
12356decls (MlTextGroup
12357ps "BottomRightOffsetStrategy"
12358stg "VerticalLayoutStrategy"
12359textVec [
12360*388 (Text
12361va (VaSet
12362font "Arial,8,1"
12363)
12364xt "14100,20000,22000,21000"
12365st "Frame Declarations"
12366blo "14100,20800"
12367)
12368*389 (MLText
12369va (VaSet
12370)
12371xt "14100,21000,14100,21000"
12372tm "BdFrameDeclTextMgr"
12373)
12374]
12375)
12376)
12377defaultBlockFrame (Frame
12378shape (RectFrame
12379va (VaSet
12380vasetType 1
12381fg "65535,65535,65535"
12382lineColor "26368,26368,26368"
12383lineStyle 1
12384lineWidth 2
12385)
12386xt "0,0,20000,20000"
12387)
12388title (TextAssociate
12389ps "TopLeftStrategy"
12390text (MLText
12391va (VaSet
12392)
12393xt "0,-1100,7400,-100"
12394st "b0: BLOCK (guard)"
12395tm "FrameTitleTextMgr"
12396)
12397)
12398seqNum (FrameSequenceNumber
12399ps "TopLeftStrategy"
12400shape (Rectangle
12401va (VaSet
12402vasetType 1
12403fg "65535,65535,65535"
12404)
12405xt "50,50,1250,1450"
12406)
12407num (Text
12408va (VaSet
12409)
12410xt "250,250,1050,1250"
12411st "1"
12412blo "250,1050"
12413tm "FrameSeqNumMgr"
12414)
12415)
12416decls (MlTextGroup
12417ps "BottomRightOffsetStrategy"
12418stg "VerticalLayoutStrategy"
12419textVec [
12420*390 (Text
12421va (VaSet
12422font "Arial,8,1"
12423)
12424xt "14100,20000,22000,21000"
12425st "Frame Declarations"
12426blo "14100,20800"
12427)
12428*391 (MLText
12429va (VaSet
12430)
12431xt "14100,21000,14100,21000"
12432tm "BdFrameDeclTextMgr"
12433)
12434]
12435)
12436style 3
12437)
12438defaultSaCptPort (CptPort
12439ps "OnEdgeStrategy"
12440shape (Triangle
12441ro 90
12442va (VaSet
12443vasetType 1
12444fg "0,65535,0"
12445)
12446xt "0,0,750,750"
12447)
12448tg (CPTG
12449ps "CptPortTextPlaceStrategy"
12450stg "VerticalLayoutStrategy"
12451f (Text
12452va (VaSet
12453)
12454xt "0,750,1800,1750"
12455st "Port"
12456blo "0,1550"
12457)
12458)
12459thePort (LogicalPort
12460decl (Decl
12461n "Port"
12462t ""
12463o 0
12464)
12465)
12466)
12467defaultSaCptPortBuffer (CptPort
12468ps "OnEdgeStrategy"
12469shape (Diamond
12470va (VaSet
12471vasetType 1
12472fg "65535,65535,65535"
12473)
12474xt "0,0,750,750"
12475)
12476tg (CPTG
12477ps "CptPortTextPlaceStrategy"
12478stg "VerticalLayoutStrategy"
12479f (Text
12480va (VaSet
12481)
12482xt "0,750,1800,1750"
12483st "Port"
12484blo "0,1550"
12485)
12486)
12487thePort (LogicalPort
12488m 3
12489decl (Decl
12490n "Port"
12491t ""
12492o 0
12493)
12494)
12495)
12496defaultDeclText (MLText
12497va (VaSet
12498font "Courier New,8,0"
12499)
12500)
12501archDeclarativeBlock (BdArchDeclBlock
12502uid 1,0
12503stg "BdArchDeclBlockLS"
12504declLabel (Text
12505uid 2,0
12506va (VaSet
12507font "Arial,8,1"
12508)
12509xt "37000,1800,42400,2800"
12510st "Declarations"
12511blo "37000,2600"
12512)
12513portLabel (Text
12514uid 3,0
12515va (VaSet
12516font "Arial,8,1"
12517)
12518xt "37000,2800,39700,3800"
12519st "Ports:"
12520blo "37000,3600"
12521)
12522preUserLabel (Text
12523uid 4,0
12524va (VaSet
12525isHidden 1
12526font "Arial,8,1"
12527)
12528xt "37000,1800,40800,2800"
12529st "Pre User:"
12530blo "37000,2600"
12531)
12532preUserText (MLText
12533uid 5,0
12534va (VaSet
12535isHidden 1
12536font "Courier New,8,0"
12537)
12538xt "37000,1800,37000,1800"
12539tm "BdDeclarativeTextMgr"
12540)
12541diagSignalLabel (Text
12542uid 6,0
12543va (VaSet
12544font "Arial,8,1"
12545)
12546xt "37000,50200,44100,51200"
12547st "Diagram Signals:"
12548blo "37000,51000"
12549)
12550postUserLabel (Text
12551uid 7,0
12552va (VaSet
12553isHidden 1
12554font "Arial,8,1"
12555)
12556xt "37000,1800,41700,2800"
12557st "Post User:"
12558blo "37000,2600"
12559)
12560postUserText (MLText
12561uid 8,0
12562va (VaSet
12563isHidden 1
12564font "Courier New,8,0"
12565)
12566xt "37000,1800,37000,1800"
12567tm "BdDeclarativeTextMgr"
12568)
12569)
12570commonDM (CommonDM
12571ldm (LogicalDM
12572suid 215,0
12573usingSuid 1
12574emptyRow *392 (LEmptyRow
12575)
12576uid 54,0
12577optionalChildren [
12578*393 (RefLabelRowHdr
12579)
12580*394 (TitleRowHdr
12581)
12582*395 (FilterRowHdr
12583)
12584*396 (RefLabelColHdr
12585tm "RefLabelColHdrMgr"
12586)
12587*397 (RowExpandColHdr
12588tm "RowExpandColHdrMgr"
12589)
12590*398 (GroupColHdr
12591tm "GroupColHdrMgr"
12592)
12593*399 (NameColHdr
12594tm "BlockDiagramNameColHdrMgr"
12595)
12596*400 (ModeColHdr
12597tm "BlockDiagramModeColHdrMgr"
12598)
12599*401 (TypeColHdr
12600tm "BlockDiagramTypeColHdrMgr"
12601)
12602*402 (BoundsColHdr
12603tm "BlockDiagramBoundsColHdrMgr"
12604)
12605*403 (InitColHdr
12606tm "BlockDiagramInitColHdrMgr"
12607)
12608*404 (EolColHdr
12609tm "BlockDiagramEolColHdrMgr"
12610)
12611*405 (LeafLogPort
12612port (LogicalPort
12613m 4
12614decl (Decl
12615n "board_id"
12616t "std_logic_vector"
12617b "(3 downto 0)"
12618preAdd 0
12619posAdd 0
12620o 75
12621suid 5,0
12622)
12623)
12624uid 327,0
12625)
12626*406 (LeafLogPort
12627port (LogicalPort
12628m 4
12629decl (Decl
12630n "crate_id"
12631t "std_logic_vector"
12632b "(1 downto 0)"
12633o 76
12634suid 6,0
12635)
12636)
12637uid 329,0
12638)
12639*407 (LeafLogPort
12640port (LogicalPort
12641m 4
12642decl (Decl
12643n "adc_data_array"
12644t "adc_data_array_type"
12645o 74
12646suid 29,0
12647)
12648)
12649uid 1491,0
12650)
12651*408 (LeafLogPort
12652port (LogicalPort
12653m 1
12654decl (Decl
12655n "RSRLOAD"
12656t "std_logic"
12657o 43
12658suid 57,0
12659i "'0'"
12660)
12661)
12662uid 2435,0
12663)
12664*409 (LeafLogPort
12665port (LogicalPort
12666m 4
12667decl (Decl
12668n "SRCLK"
12669t "std_logic"
12670o 72
12671suid 58,0
12672i "'0'"
12673)
12674)
12675uid 2437,0
12676)
12677*410 (LeafLogPort
12678port (LogicalPort
12679m 4
12680decl (Decl
12681n "sensor_cs"
12682t "std_logic_vector"
12683b "(3 DOWNTO 0)"
12684o 80
12685suid 65,0
12686)
12687)
12688uid 3037,0
12689)
12690*411 (LeafLogPort
12691port (LogicalPort
12692m 1
12693decl (Decl
12694n "DAC_CS"
12695t "std_logic"
12696o 27
12697suid 66,0
12698)
12699)
12700uid 3039,0
12701)
12702*412 (LeafLogPort
12703port (LogicalPort
12704decl (Decl
12705n "X_50M"
12706t "STD_LOGIC"
12707preAdd 0
12708posAdd 0
12709o 18
12710suid 67,0
12711)
12712)
12713uid 3276,0
12714)
12715*413 (LeafLogPort
12716port (LogicalPort
12717decl (Decl
12718n "TRG"
12719t "STD_LOGIC"
12720o 16
12721suid 68,0
12722)
12723)
12724uid 3278,0
12725)
12726*414 (LeafLogPort
12727port (LogicalPort
12728m 1
12729decl (Decl
12730n "A_CLK"
12731t "std_logic_vector"
12732b "(3 downto 0)"
12733o 22
12734suid 71,0
12735)
12736)
12737uid 3280,0
12738)
12739*415 (LeafLogPort
12740port (LogicalPort
12741m 4
12742decl (Decl
12743n "CLK_25_PS"
12744t "std_logic"
12745o 61
12746suid 72,0
12747)
12748)
12749uid 3282,0
12750)
12751*416 (LeafLogPort
12752port (LogicalPort
12753m 1
12754decl (Decl
12755n "OE_ADC"
12756t "STD_LOGIC"
12757preAdd 0
12758posAdd 0
12759o 36
12760suid 73,0
12761)
12762)
12763uid 3382,0
12764)
12765*417 (LeafLogPort
12766port (LogicalPort
12767decl (Decl
12768n "A_OTR"
12769t "std_logic_vector"
12770b "(3 DOWNTO 0)"
12771o 5
12772suid 74,0
12773)
12774)
12775uid 3384,0
12776)
12777*418 (LeafLogPort
12778port (LogicalPort
12779decl (Decl
12780n "A0_D"
12781t "std_logic_vector"
12782b "(11 DOWNTO 0)"
12783o 1
12784suid 79,0
12785)
12786)
12787uid 3386,0
12788)
12789*419 (LeafLogPort
12790port (LogicalPort
12791decl (Decl
12792n "A1_D"
12793t "std_logic_vector"
12794b "(11 DOWNTO 0)"
12795o 2
12796suid 80,0
12797)
12798)
12799uid 3388,0
12800)
12801*420 (LeafLogPort
12802port (LogicalPort
12803decl (Decl
12804n "A2_D"
12805t "std_logic_vector"
12806b "(11 DOWNTO 0)"
12807o 3
12808suid 81,0
12809)
12810)
12811uid 3390,0
12812)
12813*421 (LeafLogPort
12814port (LogicalPort
12815decl (Decl
12816n "A3_D"
12817t "std_logic_vector"
12818b "(11 DOWNTO 0)"
12819o 4
12820suid 82,0
12821)
12822)
12823uid 3392,0
12824)
12825*422 (LeafLogPort
12826port (LogicalPort
12827m 1
12828decl (Decl
12829n "D0_SRCLK"
12830t "STD_LOGIC"
12831o 23
12832suid 87,0
12833)
12834)
12835uid 3468,0
12836)
12837*423 (LeafLogPort
12838port (LogicalPort
12839m 1
12840decl (Decl
12841n "D1_SRCLK"
12842t "STD_LOGIC"
12843o 24
12844suid 88,0
12845)
12846)
12847uid 3470,0
12848)
12849*424 (LeafLogPort
12850port (LogicalPort
12851m 1
12852decl (Decl
12853n "D2_SRCLK"
12854t "STD_LOGIC"
12855o 25
12856suid 89,0
12857)
12858)
12859uid 3472,0
12860)
12861*425 (LeafLogPort
12862port (LogicalPort
12863m 1
12864decl (Decl
12865n "D3_SRCLK"
12866t "STD_LOGIC"
12867o 26
12868suid 90,0
12869)
12870)
12871uid 3474,0
12872)
12873*426 (LeafLogPort
12874port (LogicalPort
12875decl (Decl
12876n "D0_SROUT"
12877t "std_logic"
12878o 6
12879suid 91,0
12880)
12881)
12882uid 3524,0
12883)
12884*427 (LeafLogPort
12885port (LogicalPort
12886decl (Decl
12887n "D1_SROUT"
12888t "std_logic"
12889o 7
12890suid 92,0
12891)
12892)
12893uid 3526,0
12894)
12895*428 (LeafLogPort
12896port (LogicalPort
12897decl (Decl
12898n "D2_SROUT"
12899t "std_logic"
12900o 8
12901suid 93,0
12902)
12903)
12904uid 3528,0
12905)
12906*429 (LeafLogPort
12907port (LogicalPort
12908decl (Decl
12909n "D3_SROUT"
12910t "std_logic"
12911o 9
12912suid 94,0
12913)
12914)
12915uid 3530,0
12916)
12917*430 (LeafLogPort
12918port (LogicalPort
12919m 1
12920decl (Decl
12921n "D_A"
12922t "std_logic_vector"
12923b "(3 DOWNTO 0)"
12924o 30
12925suid 95,0
12926i "(others => '0')"
12927)
12928)
12929uid 3532,0
12930)
12931*431 (LeafLogPort
12932port (LogicalPort
12933m 1
12934decl (Decl
12935n "DWRITE"
12936t "std_logic"
12937o 29
12938suid 96,0
12939i "'0'"
12940)
12941)
12942uid 3534,0
12943)
12944*432 (LeafLogPort
12945port (LogicalPort
12946m 1
12947decl (Decl
12948n "T0_CS"
12949t "std_logic"
12950o 46
12951suid 101,0
12952)
12953)
12954uid 3646,0
12955)
12956*433 (LeafLogPort
12957port (LogicalPort
12958m 1
12959decl (Decl
12960n "T1_CS"
12961t "std_logic"
12962o 47
12963suid 102,0
12964)
12965)
12966uid 3648,0
12967)
12968*434 (LeafLogPort
12969port (LogicalPort
12970m 1
12971decl (Decl
12972n "T2_CS"
12973t "std_logic"
12974o 48
12975suid 103,0
12976)
12977)
12978uid 3650,0
12979)
12980*435 (LeafLogPort
12981port (LogicalPort
12982m 1
12983decl (Decl
12984n "T3_CS"
12985t "std_logic"
12986o 49
12987suid 104,0
12988)
12989)
12990uid 3652,0
12991)
12992*436 (LeafLogPort
12993port (LogicalPort
12994m 1
12995decl (Decl
12996n "S_CLK"
12997t "std_logic"
12998o 45
12999suid 105,0
13000)
13001)
13002uid 3654,0
13003)
13004*437 (LeafLogPort
13005port (LogicalPort
13006m 1
13007decl (Decl
13008n "W_A"
13009t "std_logic_vector"
13010b "(9 DOWNTO 0)"
13011o 51
13012suid 106,0
13013)
13014)
13015uid 3656,0
13016)
13017*438 (LeafLogPort
13018port (LogicalPort
13019m 2
13020decl (Decl
13021n "W_D"
13022t "std_logic_vector"
13023b "(15 DOWNTO 0)"
13024o 57
13025suid 107,0
13026)
13027)
13028uid 3658,0
13029)
13030*439 (LeafLogPort
13031port (LogicalPort
13032m 1
13033decl (Decl
13034n "W_RES"
13035t "std_logic"
13036o 54
13037suid 108,0
13038i "'1'"
13039)
13040)
13041uid 3660,0
13042)
13043*440 (LeafLogPort
13044port (LogicalPort
13045m 1
13046decl (Decl
13047n "W_RD"
13048t "std_logic"
13049o 53
13050suid 109,0
13051i "'1'"
13052)
13053)
13054uid 3662,0
13055)
13056*441 (LeafLogPort
13057port (LogicalPort
13058m 1
13059decl (Decl
13060n "W_WR"
13061t "std_logic"
13062o 55
13063suid 110,0
13064i "'1'"
13065)
13066)
13067uid 3664,0
13068)
13069*442 (LeafLogPort
13070port (LogicalPort
13071decl (Decl
13072n "W_INT"
13073t "std_logic"
13074o 17
13075suid 111,0
13076)
13077)
13078uid 3666,0
13079)
13080*443 (LeafLogPort
13081port (LogicalPort
13082m 1
13083decl (Decl
13084n "W_CS"
13085t "std_logic"
13086o 52
13087suid 112,0
13088i "'1'"
13089)
13090)
13091uid 3668,0
13092)
13093*444 (LeafLogPort
13094port (LogicalPort
13095m 1
13096decl (Decl
13097n "MOSI"
13098t "std_logic"
13099o 35
13100suid 113,0
13101i "'0'"
13102)
13103)
13104uid 3696,0
13105)
13106*445 (LeafLogPort
13107port (LogicalPort
13108m 2
13109decl (Decl
13110n "MISO"
13111t "std_logic"
13112preAdd 0
13113posAdd 0
13114o 56
13115suid 114,0
13116)
13117)
13118uid 3698,0
13119)
13120*446 (LeafLogPort
13121port (LogicalPort
13122m 1
13123decl (Decl
13124n "TRG_V"
13125t "std_logic"
13126o 50
13127suid 126,0
13128)
13129)
13130uid 3886,0
13131)
13132*447 (LeafLogPort
13133port (LogicalPort
13134m 1
13135decl (Decl
13136n "RS485_C_RE"
13137t "std_logic"
13138o 40
13139suid 127,0
13140)
13141)
13142uid 3888,0
13143)
13144*448 (LeafLogPort
13145port (LogicalPort
13146m 1
13147decl (Decl
13148n "RS485_C_DE"
13149t "std_logic"
13150o 38
13151suid 128,0
13152)
13153)
13154uid 3890,0
13155)
13156*449 (LeafLogPort
13157port (LogicalPort
13158m 1
13159decl (Decl
13160n "RS485_E_RE"
13161t "std_logic"
13162o 42
13163suid 129,0
13164)
13165)
13166uid 3892,0
13167)
13168*450 (LeafLogPort
13169port (LogicalPort
13170m 1
13171decl (Decl
13172n "RS485_E_DE"
13173t "std_logic"
13174o 41
13175suid 130,0
13176)
13177)
13178uid 3894,0
13179)
13180*451 (LeafLogPort
13181port (LogicalPort
13182m 1
13183decl (Decl
13184n "DENABLE"
13185t "std_logic"
13186o 28
13187suid 131,0
13188i "'0'"
13189)
13190)
13191uid 3896,0
13192)
13193*452 (LeafLogPort
13194port (LogicalPort
13195m 1
13196decl (Decl
13197n "EE_CS"
13198t "std_logic"
13199o 33
13200suid 133,0
13201)
13202)
13203uid 3900,0
13204)
13205*453 (LeafLogPort
13206port (LogicalPort
13207m 1
13208decl (Decl
13209n "D_T"
13210t "std_logic_vector"
13211b "(5 DOWNTO 0)"
13212o 31
13213suid 141,0
13214i "(OTHERS => '0')"
13215)
13216)
13217uid 5322,0
13218)
13219*454 (LeafLogPort
13220port (LogicalPort
13221decl (Decl
13222n "D_PLLLCK"
13223t "std_logic_vector"
13224b "(3 DOWNTO 0)"
13225o 10
13226suid 152,0
13227)
13228)
13229uid 6777,0
13230scheme 0
13231)
13232*455 (LeafLogPort
13233port (LogicalPort
13234m 1
13235decl (Decl
13236n "D_T2"
13237t "std_logic_vector"
13238b "(3 DOWNTO 0)"
13239o 32
13240suid 154,0
13241i "(others => '0')"
13242)
13243)
13244uid 6872,0
13245scheme 0
13246)
13247*456 (LeafLogPort
13248port (LogicalPort
13249m 1
13250decl (Decl
13251n "A1_T"
13252t "std_logic_vector"
13253b "(7 DOWNTO 0)"
13254o 20
13255suid 155,0
13256i "(OTHERS => '0')"
13257)
13258)
13259uid 7134,0
13260scheme 0
13261)
13262*457 (LeafLogPort
13263port (LogicalPort
13264m 4
13265decl (Decl
13266n "dummy"
13267t "std_logic"
13268o 78
13269suid 157,0
13270)
13271)
13272uid 7473,0
13273scheme 0
13274)
13275*458 (LeafLogPort
13276port (LogicalPort
13277m 4
13278decl (Decl
13279n "drs_channel_id"
13280t "std_logic_vector"
13281b "(3 downto 0)"
13282o 77
13283suid 159,0
13284i "(others => '0')"
13285)
13286)
13287uid 8875,0
13288)
13289*459 (LeafLogPort
13290port (LogicalPort
13291m 4
13292decl (Decl
13293n "CLK_50"
13294t "std_logic"
13295o 63
13296suid 163,0
13297)
13298)
13299uid 9516,0
13300)
13301*460 (LeafLogPort
13302port (LogicalPort
13303m 4
13304decl (Decl
13305n "CLK_25_PS1"
13306t "std_logic"
13307o 62
13308suid 164,0
13309)
13310)
13311uid 10056,0
13312)
13313*461 (LeafLogPort
13314port (LogicalPort
13315m 4
13316decl (Decl
13317n "adc_clk_en"
13318t "std_logic"
13319o 73
13320suid 165,0
13321i "'0'"
13322)
13323)
13324uid 10058,0
13325)
13326*462 (LeafLogPort
13327port (LogicalPort
13328m 1
13329decl (Decl
13330n "A0_T"
13331t "std_logic_vector"
13332b "(7 DOWNTO 0)"
13333o 19
13334suid 166,0
13335i "(others => '0')"
13336)
13337)
13338uid 10294,0
13339scheme 0
13340)
13341*463 (LeafLogPort
13342port (LogicalPort
13343m 4
13344decl (Decl
13345n "CLK50_OUT"
13346t "std_logic"
13347o 60
13348suid 184,0
13349)
13350)
13351uid 10704,0
13352)
13353*464 (LeafLogPort
13354port (LogicalPort
13355m 4
13356decl (Decl
13357n "CLK25_OUT"
13358t "std_logic"
13359o 58
13360suid 185,0
13361)
13362)
13363uid 10706,0
13364)
13365*465 (LeafLogPort
13366port (LogicalPort
13367m 4
13368decl (Decl
13369n "CLK25_PSOUT"
13370t "std_logic"
13371o 59
13372suid 186,0
13373)
13374)
13375uid 10708,0
13376)
13377*466 (LeafLogPort
13378port (LogicalPort
13379m 4
13380decl (Decl
13381n "PS_DIR_IN"
13382t "std_logic"
13383o 70
13384suid 187,0
13385)
13386)
13387uid 10710,0
13388)
13389*467 (LeafLogPort
13390port (LogicalPort
13391m 4
13392decl (Decl
13393n "PSINCDEC_OUT"
13394t "std_logic"
13395o 69
13396suid 190,0
13397)
13398)
13399uid 10716,0
13400)
13401*468 (LeafLogPort
13402port (LogicalPort
13403m 4
13404decl (Decl
13405n "DCM_locked"
13406t "std_logic"
13407preAdd 0
13408posAdd 0
13409o 64
13410suid 191,0
13411)
13412)
13413uid 10718,0
13414)
13415*469 (LeafLogPort
13416port (LogicalPort
13417m 4
13418decl (Decl
13419n "ready"
13420t "std_logic"
13421preAdd 0
13422posAdd 0
13423o 79
13424suid 192,0
13425i "'0'"
13426)
13427)
13428uid 10720,0
13429)
13430*470 (LeafLogPort
13431port (LogicalPort
13432m 4
13433decl (Decl
13434n "shifting"
13435t "std_logic"
13436prec "-- status:"
13437preAdd 0
13438posAdd 0
13439o 81
13440suid 193,0
13441i "'0'"
13442)
13443)
13444uid 10722,0
13445)
13446*471 (LeafLogPort
13447port (LogicalPort
13448m 4
13449decl (Decl
13450n "PSDONE_extraOUT"
13451t "std_logic"
13452o 67
13453suid 194,0
13454)
13455)
13456uid 10724,0
13457)
13458*472 (LeafLogPort
13459port (LogicalPort
13460m 4
13461decl (Decl
13462n "PSCLK_OUT"
13463t "std_logic"
13464o 66
13465suid 195,0
13466)
13467)
13468uid 10726,0
13469)
13470*473 (LeafLogPort
13471port (LogicalPort
13472m 4
13473decl (Decl
13474n "LOCKED_extraOUT"
13475t "std_logic"
13476o 65
13477suid 196,0
13478)
13479)
13480uid 10728,0
13481)
13482*474 (LeafLogPort
13483port (LogicalPort
13484decl (Decl
13485n "RS485_C_DI"
13486t "std_logic"
13487o 13
13488suid 197,0
13489)
13490)
13491uid 11084,0
13492scheme 0
13493)
13494*475 (LeafLogPort
13495port (LogicalPort
13496m 1
13497decl (Decl
13498n "RS485_C_DO"
13499t "std_logic"
13500o 39
13501suid 198,0