source: firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd @ 10566

Last change on this file since 10566 was 10566, checked in by neise, 9 years ago
File size: 142.5 KB
Line 
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1008xt "93000,68500,95400,69500"
1009st "W_D"
1010blo "93000,69300"
1011tm "WireNameMgr"
1012)
1013)
1014)
1015*24 (PortIoIn
1016uid 496,0
1017shape (CompositeShape
1018uid 497,0
1019va (VaSet
1020vasetType 1
1021fg "0,0,32768"
1022)
1023optionalChildren [
1024(Pentagon
1025uid 498,0
1026sl 0
1027ro 90
1028xt "90500,73625,92000,74375"
1029)
1030(Line
1031uid 499,0
1032sl 0
1033ro 90
1034xt "90000,74000,90500,74000"
1035pts [
1036"90500,74000"
1037"90000,74000"
1038]
1039)
1040]
1041)
1042stc 0
1043sf 1
1044tg (WTG
1045uid 500,0
1046ps "PortIoTextPlaceStrategy"
1047stg "STSignalDisplayStrategy"
1048f (Text
1049uid 501,0
1050va (VaSet
1051)
1052xt "93000,73500,96300,74500"
1053st "W_INT"
1054blo "93000,74300"
1055tm "WireNameMgr"
1056)
1057)
1058)
1059*25 (PortIoOut
1060uid 502,0
1061shape (CompositeShape
1062uid 503,0
1063va (VaSet
1064vasetType 1
1065fg "0,0,32768"
1066)
1067optionalChildren [
1068(Pentagon
1069uid 504,0
1070sl 0
1071ro 270
1072xt "90500,71625,92000,72375"
1073)
1074(Line
1075uid 505,0
1076sl 0
1077ro 270
1078xt "90000,72000,90500,72000"
1079pts [
1080"90000,72000"
1081"90500,72000"
1082]
1083)
1084]
1085)
1086stc 0
1087sf 1
1088tg (WTG
1089uid 506,0
1090ps "PortIoTextPlaceStrategy"
1091stg "STSignalDisplayStrategy"
1092f (Text
1093uid 507,0
1094va (VaSet
1095)
1096xt "93000,71500,95900,72500"
1097st "W_RD"
1098blo "93000,72300"
1099tm "WireNameMgr"
1100)
1101)
1102)
1103*26 (PortIoOut
1104uid 508,0
1105shape (CompositeShape
1106uid 509,0
1107va (VaSet
1108vasetType 1
1109fg "0,0,32768"
1110)
1111optionalChildren [
1112(Pentagon
1113uid 510,0
1114sl 0
1115ro 270
1116xt "90500,72625,92000,73375"
1117)
1118(Line
1119uid 511,0
1120sl 0
1121ro 270
1122xt "90000,73000,90500,73000"
1123pts [
1124"90000,73000"
1125"90500,73000"
1126]
1127)
1128]
1129)
1130stc 0
1131sf 1
1132tg (WTG
1133uid 512,0
1134ps "PortIoTextPlaceStrategy"
1135stg "STSignalDisplayStrategy"
1136f (Text
1137uid 513,0
1138va (VaSet
1139)
1140xt "93000,72500,96200,73500"
1141st "W_WR"
1142blo "93000,73300"
1143tm "WireNameMgr"
1144)
1145)
1146)
1147*27 (Net
1148uid 1465,0
1149decl (Decl
1150n "adc_data_array"
1151t "adc_data_array_type"
1152o 72
1153suid 29,0
1154)
1155declText (MLText
1156uid 1466,0
1157va (VaSet
1158font "Courier New,8,0"
1159)
1160xt "39000,48800,66000,49600"
1161st "SIGNAL adc_data_array        : adc_data_array_type
1162"
1163)
1164)
1165*28 (Net
1166uid 2407,0
1167decl (Decl
1168n "RSRLOAD"
1169t "std_logic"
1170o 43
1171suid 57,0
1172i "'0'"
1173)
1174declText (MLText
1175uid 2408,0
1176va (VaSet
1177font "Courier New,8,0"
1178)
1179xt "39000,35800,71000,36600"
1180st "RSRLOAD               : std_logic                     := '0'
1181"
1182)
1183)
1184*29 (PortIoOut
1185uid 2415,0
1186shape (CompositeShape
1187uid 2416,0
1188va (VaSet
1189vasetType 1
1190fg "0,0,32768"
1191)
1192optionalChildren [
1193(Pentagon
1194uid 2417,0
1195sl 0
1196ro 90
1197xt "19000,110625,20500,111375"
1198)
1199(Line
1200uid 2418,0
1201sl 0
1202ro 90
1203xt "20500,111000,21000,111000"
1204pts [
1205"21000,111000"
1206"20500,111000"
1207]
1208)
1209]
1210)
1211stc 0
1212sf 1
1213tg (WTG
1214uid 2419,0
1215ps "PortIoTextPlaceStrategy"
1216stg "STSignalDisplayStrategy"
1217f (Text
1218uid 2420,0
1219va (VaSet
1220)
1221xt "13800,110500,18000,111500"
1222st "RSRLOAD"
1223ju 2
1224blo "18000,111300"
1225tm "WireNameMgr"
1226)
1227)
1228)
1229*30 (Net
1230uid 3025,0
1231decl (Decl
1232n "DAC_CS"
1233t "std_logic"
1234o 26
1235suid 66,0
1236)
1237declText (MLText
1238uid 3026,0
1239va (VaSet
1240font "Courier New,8,0"
1241)
1242xt "39000,21400,57000,22200"
1243st "DAC_CS                : std_logic
1244"
1245)
1246)
1247*31 (PortIoOut
1248uid 3153,0
1249shape (CompositeShape
1250uid 3154,0
1251va (VaSet
1252vasetType 1
1253fg "0,0,32768"
1254)
1255optionalChildren [
1256(Pentagon
1257uid 3155,0
1258sl 0
1259ro 90
1260xt "-3000,70625,-1500,71375"
1261)
1262(Line
1263uid 3156,0
1264sl 0
1265ro 90
1266xt "-1500,71000,-1000,71000"
1267pts [
1268"-1000,71000"
1269"-1500,71000"
1270]
1271)
1272]
1273)
1274stc 0
1275sf 1
1276tg (WTG
1277uid 3157,0
1278ps "PortIoTextPlaceStrategy"
1279stg "STSignalDisplayStrategy"
1280f (Text
1281uid 3158,0
1282va (VaSet
1283)
1284xt "-6900,70500,-4000,71500"
1285st "A_CLK"
1286ju 2
1287blo "-4000,71300"
1288tm "WireNameMgr"
1289)
1290)
1291)
1292*32 (Net
1293uid 3216,0
1294decl (Decl
1295n "X_50M"
1296t "STD_LOGIC"
1297preAdd 0
1298posAdd 0
1299o 17
1300suid 67,0
1301)
1302declText (MLText
1303uid 3217,0
1304va (VaSet
1305font "Courier New,8,0"
1306)
1307xt "39000,17400,57000,18200"
1308st "X_50M                 : STD_LOGIC
1309"
1310)
1311)
1312*33 (Net
1313uid 3226,0
1314decl (Decl
1315n "TRG"
1316t "STD_LOGIC"
1317o 15
1318suid 68,0
1319)
1320declText (MLText
1321uid 3227,0
1322va (VaSet
1323font "Courier New,8,0"
1324)
1325xt "39000,15800,57000,16600"
1326st "TRG                   : STD_LOGIC
1327"
1328)
1329)
1330*34 (HdlText
1331uid 3248,0
1332optionalChildren [
1333*35 (EmbeddedText
1334uid 3254,0
1335commentText (CommentText
1336uid 3255,0
1337ps "CenterOffsetStrategy"
1338shape (Rectangle
1339uid 3256,0
1340va (VaSet
1341vasetType 1
1342fg "65535,65535,65535"
1343lineColor "0,0,32768"
1344lineWidth 2
1345)
1346xt "-14000,63000,12000,69000"
1347)
1348oxt "0,0,18000,5000"
1349text (MLText
1350uid 3257,0
1351va (VaSet
1352)
1353xt "-13800,63200,-9000,69200"
1354st "
1355A_CLK <= (
1356ADC_CLK,
1357ADC_CLK,
1358ADC_CLK,
1359ADC_CLK
1360);
1361
1362"
1363tm "HdlTextMgr"
1364wrapOption 3
1365visibleHeight 6000
1366visibleWidth 26000
1367)
1368)
1369)
1370]
1371shape (Rectangle
1372uid 3249,0
1373va (VaSet
1374vasetType 1
1375fg "65535,65535,37120"
1376lineColor "0,0,32768"
1377lineWidth 2
1378)
1379xt "5000,70000,13000,73000"
1380)
1381oxt "0,0,8000,10000"
1382ttg (MlTextGroup
1383uid 3250,0
1384ps "CenterOffsetStrategy"
1385stg "VerticalLayoutStrategy"
1386textVec [
1387*36 (Text
1388uid 3251,0
1389va (VaSet
1390font "Arial,8,1"
1391)
1392xt "6150,70000,10350,71000"
1393st "ADC_CLK"
1394blo "6150,70800"
1395tm "HdlTextNameMgr"
1396)
1397*37 (Text
1398uid 3252,0
1399va (VaSet
1400font "Arial,8,1"
1401)
1402xt "6150,71000,6950,72000"
1403st "2"
1404blo "6150,71800"
1405tm "HdlTextNumberMgr"
1406)
1407]
1408)
1409viewicon (ZoomableIcon
1410uid 3253,0
1411sl 0
1412va (VaSet
1413vasetType 1
1414fg "49152,49152,49152"
1415)
1416xt "5250,71250,6750,72750"
1417iconName "TextFile.png"
1418iconMaskName "TextFile.msk"
1419ftype 21
1420)
1421viewiconposition 0
1422)
1423*38 (Net
1424uid 3266,0
1425decl (Decl
1426n "A_CLK"
1427t "std_logic_vector"
1428b "(3 downto 0)"
1429o 21
1430suid 71,0
1431)
1432declText (MLText
1433uid 3267,0
1434va (VaSet
1435font "Courier New,8,0"
1436)
1437xt "39000,20600,67000,21400"
1438st "A_CLK                 : std_logic_vector(3 downto 0)
1439"
1440)
1441)
1442*39 (PortIoOut
1443uid 3284,0
1444shape (CompositeShape
1445uid 3285,0
1446va (VaSet
1447vasetType 1
1448fg "0,0,32768"
1449)
1450optionalChildren [
1451(Pentagon
1452uid 3286,0
1453sl 0
1454ro 90
1455xt "19000,89625,20500,90375"
1456)
1457(Line
1458uid 3287,0
1459sl 0
1460ro 90
1461xt "20500,90000,21000,90000"
1462pts [
1463"21000,90000"
1464"20500,90000"
1465]
1466)
1467]
1468)
1469stc 0
1470sf 1
1471tg (WTG
1472uid 3288,0
1473ps "PortIoTextPlaceStrategy"
1474stg "STSignalDisplayStrategy"
1475f (Text
1476uid 3289,0
1477va (VaSet
1478)
1479xt "14300,89500,18000,90500"
1480st "OE_ADC"
1481ju 2
1482blo "18000,90300"
1483tm "WireNameMgr"
1484)
1485)
1486)
1487*40 (Net
1488uid 3290,0
1489decl (Decl
1490n "OE_ADC"
1491t "STD_LOGIC"
1492preAdd 0
1493posAdd 0
1494o 35
1495suid 73,0
1496)
1497declText (MLText
1498uid 3291,0
1499va (VaSet
1500font "Courier New,8,0"
1501)
1502xt "39000,29400,57000,30200"
1503st "OE_ADC                : STD_LOGIC
1504"
1505)
1506)
1507*41 (PortIoIn
1508uid 3292,0
1509shape (CompositeShape
1510uid 3293,0
1511va (VaSet
1512vasetType 1
1513fg "0,0,32768"
1514)
1515optionalChildren [
1516(Pentagon
1517uid 3294,0
1518sl 0
1519ro 270
1520xt "19000,88625,20500,89375"
1521)
1522(Line
1523uid 3295,0
1524sl 0
1525ro 270
1526xt "20500,89000,21000,89000"
1527pts [
1528"20500,89000"
1529"21000,89000"
1530]
1531)
1532]
1533)
1534stc 0
1535sf 1
1536tg (WTG
1537uid 3296,0
1538ps "PortIoTextPlaceStrategy"
1539stg "STSignalDisplayStrategy"
1540f (Text
1541uid 3297,0
1542va (VaSet
1543)
1544xt "14900,88500,18000,89500"
1545st "A_OTR"
1546ju 2
1547blo "18000,89300"
1548tm "WireNameMgr"
1549)
1550)
1551)
1552*42 (Net
1553uid 3298,0
1554decl (Decl
1555n "A_OTR"
1556t "std_logic_vector"
1557b "(3 DOWNTO 0)"
1558o 5
1559suid 74,0
1560)
1561declText (MLText
1562uid 3299,0
1563va (VaSet
1564font "Courier New,8,0"
1565)
1566xt "39000,7000,67000,7800"
1567st "A_OTR                 : std_logic_vector(3 DOWNTO 0)
1568"
1569)
1570)
1571*43 (HdlText
1572uid 3300,0
1573optionalChildren [
1574*44 (EmbeddedText
1575uid 3306,0
1576commentText (CommentText
1577uid 3307,0
1578ps "CenterOffsetStrategy"
1579shape (Rectangle
1580uid 3308,0
1581va (VaSet
1582vasetType 1
1583fg "65535,65535,65535"
1584lineColor "0,0,32768"
1585lineWidth 2
1586)
1587xt "19000,99000,38000,101000"
1588)
1589oxt "0,0,18000,5000"
1590text (MLText
1591uid 3309,0
1592va (VaSet
1593)
1594xt "19200,99200,35900,101200"
1595st "
1596adc_data_array <= ( A0_D, A1_D, A2_D, A3_D );
1597
1598"
1599tm "HdlTextMgr"
1600wrapOption 3
1601visibleHeight 2000
1602visibleWidth 19000
1603)
1604)
1605)
1606]
1607shape (Rectangle
1608uid 3301,0
1609va (VaSet
1610vasetType 1
1611fg "65535,65535,37120"
1612lineColor "0,0,32768"
1613lineWidth 2
1614)
1615xt "24000,94000,30000,99000"
1616)
1617oxt "0,0,8000,10000"
1618ttg (MlTextGroup
1619uid 3302,0
1620ps "CenterOffsetStrategy"
1621stg "VerticalLayoutStrategy"
1622textVec [
1623*45 (Text
1624uid 3303,0
1625va (VaSet
1626font "Arial,8,1"
1627)
1628xt "27150,95000,31750,96000"
1629st "ADC_DATA"
1630blo "27150,95800"
1631tm "HdlTextNameMgr"
1632)
1633*46 (Text
1634uid 3304,0
1635va (VaSet
1636font "Arial,8,1"
1637)
1638xt "27150,96000,27950,97000"
1639st "3"
1640blo "27150,96800"
1641tm "HdlTextNumberMgr"
1642)
1643]
1644)
1645viewicon (ZoomableIcon
1646uid 3305,0
1647sl 0
1648va (VaSet
1649vasetType 1
1650fg "49152,49152,49152"
1651)
1652xt "24250,97250,25750,98750"
1653iconName "TextFile.png"
1654iconMaskName "TextFile.msk"
1655ftype 21
1656)
1657viewiconposition 0
1658)
1659*47 (PortIoIn
1660uid 3310,0
1661shape (CompositeShape
1662uid 3311,0
1663va (VaSet
1664vasetType 1
1665fg "0,0,32768"
1666)
1667optionalChildren [
1668(Pentagon
1669uid 3312,0
1670sl 0
1671ro 270
1672xt "19000,94625,20500,95375"
1673)
1674(Line
1675uid 3313,0
1676sl 0
1677ro 270
1678xt "20500,95000,21000,95000"
1679pts [
1680"20500,95000"
1681"21000,95000"
1682]
1683)
1684]
1685)
1686stc 0
1687sf 1
1688tg (WTG
1689uid 3314,0
1690ps "PortIoTextPlaceStrategy"
1691stg "STSignalDisplayStrategy"
1692f (Text
1693uid 3315,0
1694va (VaSet
1695)
1696xt "15400,94500,18000,95500"
1697st "A0_D"
1698ju 2
1699blo "18000,95300"
1700tm "WireNameMgr"
1701)
1702)
1703)
1704*48 (PortIoIn
1705uid 3332,0
1706shape (CompositeShape
1707uid 3333,0
1708va (VaSet
1709vasetType 1
1710fg "0,0,32768"
1711)
1712optionalChildren [
1713(Pentagon
1714uid 3334,0
1715sl 0
1716ro 270
1717xt "19000,95625,20500,96375"
1718)
1719(Line
1720uid 3335,0
1721sl 0
1722ro 270
1723xt "20500,96000,21000,96000"
1724pts [
1725"20500,96000"
1726"21000,96000"
1727]
1728)
1729]
1730)
1731stc 0
1732sf 1
1733tg (WTG
1734uid 3336,0
1735ps "PortIoTextPlaceStrategy"
1736stg "STSignalDisplayStrategy"
1737f (Text
1738uid 3337,0
1739va (VaSet
1740)
1741xt "15500,95500,18000,96500"
1742st "A1_D"
1743ju 2
1744blo "18000,96300"
1745tm "WireNameMgr"
1746)
1747)
1748)
1749*49 (PortIoIn
1750uid 3338,0
1751shape (CompositeShape
1752uid 3339,0
1753va (VaSet
1754vasetType 1
1755fg "0,0,32768"
1756)
1757optionalChildren [
1758(Pentagon
1759uid 3340,0
1760sl 0
1761ro 270
1762xt "19000,96625,20500,97375"
1763)
1764(Line
1765uid 3341,0
1766sl 0
1767ro 270
1768xt "20500,97000,21000,97000"
1769pts [
1770"20500,97000"
1771"21000,97000"
1772]
1773)
1774]
1775)
1776stc 0
1777sf 1
1778tg (WTG
1779uid 3342,0
1780ps "PortIoTextPlaceStrategy"
1781stg "STSignalDisplayStrategy"
1782f (Text
1783uid 3343,0
1784va (VaSet
1785)
1786xt "15400,96500,18000,97500"
1787st "A2_D"
1788ju 2
1789blo "18000,97300"
1790tm "WireNameMgr"
1791)
1792)
1793)
1794*50 (PortIoIn
1795uid 3344,0
1796shape (CompositeShape
1797uid 3345,0
1798va (VaSet
1799vasetType 1
1800fg "0,0,32768"
1801)
1802optionalChildren [
1803(Pentagon
1804uid 3346,0
1805sl 0
1806ro 270
1807xt "19000,97625,20500,98375"
1808)
1809(Line
1810uid 3347,0
1811sl 0
1812ro 270
1813xt "20500,98000,21000,98000"
1814pts [
1815"20500,98000"
1816"21000,98000"
1817]
1818)
1819]
1820)
1821stc 0
1822sf 1
1823tg (WTG
1824uid 3348,0
1825ps "PortIoTextPlaceStrategy"
1826stg "STSignalDisplayStrategy"
1827f (Text
1828uid 3349,0
1829va (VaSet
1830)
1831xt "15400,97500,18000,98500"
1832st "A3_D"
1833ju 2
1834blo "18000,98300"
1835tm "WireNameMgr"
1836)
1837)
1838)
1839*51 (Net
1840uid 3374,0
1841decl (Decl
1842n "A0_D"
1843t "std_logic_vector"
1844b "(11 DOWNTO 0)"
1845o 1
1846suid 79,0
1847)
1848declText (MLText
1849uid 3375,0
1850va (VaSet
1851font "Courier New,8,0"
1852)
1853xt "39000,3800,67500,4600"
1854st "A0_D                  : std_logic_vector(11 DOWNTO 0)
1855"
1856)
1857)
1858*52 (Net
1859uid 3376,0
1860decl (Decl
1861n "A1_D"
1862t "std_logic_vector"
1863b "(11 DOWNTO 0)"
1864o 2
1865suid 80,0
1866)
1867declText (MLText
1868uid 3377,0
1869va (VaSet
1870font "Courier New,8,0"
1871)
1872xt "39000,4600,67500,5400"
1873st "A1_D                  : std_logic_vector(11 DOWNTO 0)
1874"
1875)
1876)
1877*53 (Net
1878uid 3378,0
1879decl (Decl
1880n "A2_D"
1881t "std_logic_vector"
1882b "(11 DOWNTO 0)"
1883o 3
1884suid 81,0
1885)
1886declText (MLText
1887uid 3379,0
1888va (VaSet
1889font "Courier New,8,0"
1890)
1891xt "39000,5400,67500,6200"
1892st "A2_D                  : std_logic_vector(11 DOWNTO 0)
1893"
1894)
1895)
1896*54 (Net
1897uid 3380,0
1898decl (Decl
1899n "A3_D"
1900t "std_logic_vector"
1901b "(11 DOWNTO 0)"
1902o 4
1903suid 82,0
1904)
1905declText (MLText
1906uid 3381,0
1907va (VaSet
1908font "Courier New,8,0"
1909)
1910xt "39000,6200,67500,7000"
1911st "A3_D                  : std_logic_vector(11 DOWNTO 0)
1912"
1913)
1914)
1915*55 (PortIoIn
1916uid 3476,0
1917shape (CompositeShape
1918uid 3477,0
1919va (VaSet
1920vasetType 1
1921fg "0,0,32768"
1922)
1923optionalChildren [
1924(Pentagon
1925uid 3478,0
1926sl 0
1927ro 270
1928xt "19000,104625,20500,105375"
1929)
1930(Line
1931uid 3479,0
1932sl 0
1933ro 270
1934xt "20500,105000,21000,105000"
1935pts [
1936"20500,105000"
1937"21000,105000"
1938]
1939)
1940]
1941)
1942stc 0
1943sf 1
1944tg (WTG
1945uid 3480,0
1946ps "PortIoTextPlaceStrategy"
1947stg "STSignalDisplayStrategy"
1948f (Text
1949uid 3481,0
1950va (VaSet
1951)
1952xt "13200,104500,18000,105500"
1953st "D0_SROUT"
1954ju 2
1955blo "18000,105300"
1956tm "WireNameMgr"
1957)
1958)
1959)
1960*56 (PortIoIn
1961uid 3482,0
1962shape (CompositeShape
1963uid 3483,0
1964va (VaSet
1965vasetType 1
1966fg "0,0,32768"
1967)
1968optionalChildren [
1969(Pentagon
1970uid 3484,0
1971sl 0
1972ro 270
1973xt "19000,105625,20500,106375"
1974)
1975(Line
1976uid 3485,0
1977sl 0
1978ro 270
1979xt "20500,106000,21000,106000"
1980pts [
1981"20500,106000"
1982"21000,106000"
1983]
1984)
1985]
1986)
1987stc 0
1988sf 1
1989tg (WTG
1990uid 3486,0
1991ps "PortIoTextPlaceStrategy"
1992stg "STSignalDisplayStrategy"
1993f (Text
1994uid 3487,0
1995va (VaSet
1996)
1997xt "13300,105500,18000,106500"
1998st "D1_SROUT"
1999ju 2
2000blo "18000,106300"
2001tm "WireNameMgr"
2002)
2003)
2004)
2005*57 (PortIoIn
2006uid 3488,0
2007shape (CompositeShape
2008uid 3489,0
2009va (VaSet
2010vasetType 1
2011fg "0,0,32768"
2012)
2013optionalChildren [
2014(Pentagon
2015uid 3490,0
2016sl 0
2017ro 270
2018xt "19000,106625,20500,107375"
2019)
2020(Line
2021uid 3491,0
2022sl 0
2023ro 270
2024xt "20500,107000,21000,107000"
2025pts [
2026"20500,107000"
2027"21000,107000"
2028]
2029)
2030]
2031)
2032stc 0
2033sf 1
2034tg (WTG
2035uid 3492,0
2036ps "PortIoTextPlaceStrategy"
2037stg "STSignalDisplayStrategy"
2038f (Text
2039uid 3493,0
2040va (VaSet
2041)
2042xt "13200,106500,18000,107500"
2043st "D2_SROUT"
2044ju 2
2045blo "18000,107300"
2046tm "WireNameMgr"
2047)
2048)
2049)
2050*58 (PortIoIn
2051uid 3494,0
2052shape (CompositeShape
2053uid 3495,0
2054va (VaSet
2055vasetType 1
2056fg "0,0,32768"
2057)
2058optionalChildren [
2059(Pentagon
2060uid 3496,0
2061sl 0
2062ro 270
2063xt "19000,107625,20500,108375"
2064)
2065(Line
2066uid 3497,0
2067sl 0
2068ro 270
2069xt "20500,108000,21000,108000"
2070pts [
2071"20500,108000"
2072"21000,108000"
2073]
2074)
2075]
2076)
2077stc 0
2078sf 1
2079tg (WTG
2080uid 3498,0
2081ps "PortIoTextPlaceStrategy"
2082stg "STSignalDisplayStrategy"
2083f (Text
2084uid 3499,0
2085va (VaSet
2086)
2087xt "13200,107500,18000,108500"
2088st "D3_SROUT"
2089ju 2
2090blo "18000,108300"
2091tm "WireNameMgr"
2092)
2093)
2094)
2095*59 (Net
2096uid 3500,0
2097decl (Decl
2098n "D0_SROUT"
2099t "std_logic"
2100o 6
2101suid 91,0
2102)
2103declText (MLText
2104uid 3501,0
2105va (VaSet
2106font "Courier New,8,0"
2107)
2108xt "39000,7800,57000,8600"
2109st "D0_SROUT              : std_logic
2110"
2111)
2112)
2113*60 (Net
2114uid 3502,0
2115decl (Decl
2116n "D1_SROUT"
2117t "std_logic"
2118o 7
2119suid 92,0
2120)
2121declText (MLText
2122uid 3503,0
2123va (VaSet
2124font "Courier New,8,0"
2125)
2126xt "39000,8600,57000,9400"
2127st "D1_SROUT              : std_logic
2128"
2129)
2130)
2131*61 (Net
2132uid 3504,0
2133decl (Decl
2134n "D2_SROUT"
2135t "std_logic"
2136o 8
2137suid 93,0
2138)
2139declText (MLText
2140uid 3505,0
2141va (VaSet
2142font "Courier New,8,0"
2143)
2144xt "39000,9400,57000,10200"
2145st "D2_SROUT              : std_logic
2146"
2147)
2148)
2149*62 (Net
2150uid 3506,0
2151decl (Decl
2152n "D3_SROUT"
2153t "std_logic"
2154o 9
2155suid 94,0
2156)
2157declText (MLText
2158uid 3507,0
2159va (VaSet
2160font "Courier New,8,0"
2161)
2162xt "39000,10200,57000,11000"
2163st "D3_SROUT              : std_logic
2164"
2165)
2166)
2167*63 (PortIoOut
2168uid 3508,0
2169shape (CompositeShape
2170uid 3509,0
2171va (VaSet
2172vasetType 1
2173fg "0,0,32768"
2174)
2175optionalChildren [
2176(Pentagon
2177uid 3510,0
2178sl 0
2179ro 90
2180xt "19000,108625,20500,109375"
2181)
2182(Line
2183uid 3511,0
2184sl 0
2185ro 90
2186xt "20500,109000,21000,109000"
2187pts [
2188"21000,109000"
2189"20500,109000"
2190]
2191)
2192]
2193)
2194stc 0
2195sf 1
2196tg (WTG
2197uid 3512,0
2198ps "PortIoTextPlaceStrategy"
2199stg "STSignalDisplayStrategy"
2200f (Text
2201uid 3513,0
2202va (VaSet
2203)
2204xt "15900,108500,18000,109500"
2205st "D_A"
2206ju 2
2207blo "18000,109300"
2208tm "WireNameMgr"
2209)
2210)
2211)
2212*64 (Net
2213uid 3514,0
2214decl (Decl
2215n "D_A"
2216t "std_logic_vector"
2217b "(3 DOWNTO 0)"
2218o 29
2219suid 95,0
2220i "(others => '0')"
2221)
2222declText (MLText
2223uid 3515,0
2224va (VaSet
2225font "Courier New,8,0"
2226)
2227xt "39000,24600,77000,25400"
2228st "D_A                   : std_logic_vector(3 DOWNTO 0)  := (others => '0')
2229"
2230)
2231)
2232*65 (PortIoOut
2233uid 3516,0
2234shape (CompositeShape
2235uid 3517,0
2236va (VaSet
2237vasetType 1
2238fg "0,0,32768"
2239)
2240optionalChildren [
2241(Pentagon
2242uid 3518,0
2243sl 0
2244ro 90
2245xt "19000,109625,20500,110375"
2246)
2247(Line
2248uid 3519,0
2249sl 0
2250ro 90
2251xt "20500,110000,21000,110000"
2252pts [
2253"21000,110000"
2254"20500,110000"
2255]
2256)
2257]
2258)
2259stc 0
2260sf 1
2261tg (WTG
2262uid 3520,0
2263ps "PortIoTextPlaceStrategy"
2264stg "STSignalDisplayStrategy"
2265f (Text
2266uid 3521,0
2267va (VaSet
2268)
2269xt "14200,109500,18000,110500"
2270st "DWRITE"
2271ju 2
2272blo "18000,110300"
2273tm "WireNameMgr"
2274)
2275)
2276)
2277*66 (Net
2278uid 3522,0
2279decl (Decl
2280n "DWRITE"
2281t "std_logic"
2282o 28
2283suid 96,0
2284i "'0'"
2285)
2286declText (MLText
2287uid 3523,0
2288va (VaSet
2289font "Courier New,8,0"
2290)
2291xt "39000,23800,71000,24600"
2292st "DWRITE                : std_logic                     := '0'
2293"
2294)
2295)
2296*67 (PortIoOut
2297uid 3536,0
2298shape (CompositeShape
2299uid 3537,0
2300va (VaSet
2301vasetType 1
2302fg "0,0,32768"
2303)
2304optionalChildren [
2305(Pentagon
2306uid 3538,0
2307sl 0
2308ro 270
2309xt "90500,86625,92000,87375"
2310)
2311(Line
2312uid 3539,0
2313sl 0
2314ro 270
2315xt "90000,87000,90500,87000"
2316pts [
2317"90000,87000"
2318"90500,87000"
2319]
2320)
2321]
2322)
2323stc 0
2324sf 1
2325tg (WTG
2326uid 3540,0
2327ps "PortIoTextPlaceStrategy"
2328stg "STSignalDisplayStrategy"
2329f (Text
2330uid 3541,0
2331va (VaSet
2332)
2333xt "93000,86500,96700,87500"
2334st "DAC_CS"
2335blo "93000,87300"
2336tm "WireNameMgr"
2337)
2338)
2339)
2340*68 (PortIoOut
2341uid 3624,0
2342shape (CompositeShape
2343uid 3625,0
2344va (VaSet
2345vasetType 1
2346fg "0,0,32768"
2347)
2348optionalChildren [
2349(Pentagon
2350uid 3626,0
2351sl 0
2352ro 270
2353xt "90500,97625,92000,98375"
2354)
2355(Line
2356uid 3627,0
2357sl 0
2358ro 270
2359xt "90000,98000,90500,98000"
2360pts [
2361"90000,98000"
2362"90500,98000"
2363]
2364)
2365]
2366)
2367stc 0
2368sf 1
2369tg (WTG
2370uid 3628,0
2371ps "PortIoTextPlaceStrategy"
2372stg "STSignalDisplayStrategy"
2373f (Text
2374uid 3629,0
2375va (VaSet
2376)
2377xt "92750,97500,95650,98500"
2378st "S_CLK"
2379blo "92750,98300"
2380tm "WireNameMgr"
2381)
2382)
2383)
2384*69 (Net
2385uid 3630,0
2386decl (Decl
2387n "S_CLK"
2388t "std_logic"
2389o 45
2390suid 105,0
2391)
2392declText (MLText
2393uid 3631,0
2394va (VaSet
2395font "Courier New,8,0"
2396)
2397xt "39000,37400,57000,38200"
2398st "S_CLK                 : std_logic
2399"
2400)
2401)
2402*70 (Net
2403uid 3632,0
2404decl (Decl
2405n "W_A"
2406t "std_logic_vector"
2407b "(9 DOWNTO 0)"
2408o 51
2409suid 106,0
2410)
2411declText (MLText
2412uid 3633,0
2413va (VaSet
2414font "Courier New,8,0"
2415)
2416xt "39000,39800,67000,40600"
2417st "W_A                   : std_logic_vector(9 DOWNTO 0)
2418"
2419)
2420)
2421*71 (Net
2422uid 3634,0
2423decl (Decl
2424n "W_D"
2425t "std_logic_vector"
2426b "(15 DOWNTO 0)"
2427o 57
2428suid 107,0
2429)
2430declText (MLText
2431uid 3635,0
2432va (VaSet
2433font "Courier New,8,0"
2434)
2435xt "39000,44600,67500,45400"
2436st "W_D                   : std_logic_vector(15 DOWNTO 0)
2437"
2438)
2439)
2440*72 (Net
2441uid 3636,0
2442decl (Decl
2443n "W_RES"
2444t "std_logic"
2445o 54
2446suid 108,0
2447i "'1'"
2448)
2449declText (MLText
2450uid 3637,0
2451va (VaSet
2452font "Courier New,8,0"
2453)
2454xt "39000,42200,71000,43000"
2455st "W_RES                 : std_logic                     := '1'
2456"
2457)
2458)
2459*73 (Net
2460uid 3638,0
2461decl (Decl
2462n "W_RD"
2463t "std_logic"
2464o 53
2465suid 109,0
2466i "'1'"
2467)
2468declText (MLText
2469uid 3639,0
2470va (VaSet
2471font "Courier New,8,0"
2472)
2473xt "39000,41400,71000,42200"
2474st "W_RD                  : std_logic                     := '1'
2475"
2476)
2477)
2478*74 (Net
2479uid 3640,0
2480decl (Decl
2481n "W_WR"
2482t "std_logic"
2483o 55
2484suid 110,0
2485i "'1'"
2486)
2487declText (MLText
2488uid 3641,0
2489va (VaSet
2490font "Courier New,8,0"
2491)
2492xt "39000,43000,71000,43800"
2493st "W_WR                  : std_logic                     := '1'
2494"
2495)
2496)
2497*75 (Net
2498uid 3642,0
2499decl (Decl
2500n "W_INT"
2501t "std_logic"
2502o 16
2503suid 111,0
2504)
2505declText (MLText
2506uid 3643,0
2507va (VaSet
2508font "Courier New,8,0"
2509)
2510xt "39000,16600,57000,17400"
2511st "W_INT                 : std_logic
2512"
2513)
2514)
2515*76 (Net
2516uid 3644,0
2517decl (Decl
2518n "W_CS"
2519t "std_logic"
2520o 52
2521suid 112,0
2522i "'1'"
2523)
2524declText (MLText
2525uid 3645,0
2526va (VaSet
2527font "Courier New,8,0"
2528)
2529xt "39000,40600,71000,41400"
2530st "W_CS                  : std_logic                     := '1'
2531"
2532)
2533)
2534*77 (PortIoInOut
2535uid 3674,0
2536shape (CompositeShape
2537uid 3675,0
2538va (VaSet
2539vasetType 1
2540fg "0,0,32768"
2541)
2542optionalChildren [
2543(Hexagon
2544uid 3676,0
2545sl 0
2546xt "90500,98625,92000,99375"
2547)
2548(Line
2549uid 3677,0
2550sl 0
2551xt "90000,99000,90500,99000"
2552pts [
2553"90000,99000"
2554"90500,99000"
2555]
2556)
2557]
2558)
2559stc 0
2560sf 1
2561tg (WTG
2562uid 3678,0
2563ps "PortIoTextPlaceStrategy"
2564stg "STSignalDisplayStrategy"
2565f (Text
2566uid 3679,0
2567va (VaSet
2568)
2569xt "93000,98500,95700,99500"
2570st "MISO"
2571blo "93000,99300"
2572tm "WireNameMgr"
2573)
2574)
2575)
2576*78 (Net
2577uid 3680,0
2578decl (Decl
2579n "MOSI"
2580t "std_logic"
2581o 34
2582suid 113,0
2583i "'0'"
2584)
2585declText (MLText
2586uid 3681,0
2587va (VaSet
2588font "Courier New,8,0"
2589)
2590xt "39000,28600,71000,29400"
2591st "MOSI                  : std_logic                     := '0'
2592"
2593)
2594)
2595*79 (PortIoOut
2596uid 3688,0
2597shape (CompositeShape
2598uid 3689,0
2599va (VaSet
2600vasetType 1
2601fg "0,0,32768"
2602)
2603optionalChildren [
2604(Pentagon
2605uid 3690,0
2606sl 0
2607ro 270
2608xt "90500,99625,92000,100375"
2609)
2610(Line
2611uid 3691,0
2612sl 0
2613ro 270
2614xt "90000,100000,90500,100000"
2615pts [
2616"90000,100000"
2617"90500,100000"
2618]
2619)
2620]
2621)
2622stc 0
2623sf 1
2624tg (WTG
2625uid 3692,0
2626ps "PortIoTextPlaceStrategy"
2627stg "STSignalDisplayStrategy"
2628f (Text
2629uid 3693,0
2630va (VaSet
2631)
2632xt "93000,99500,95700,100500"
2633st "MOSI"
2634blo "93000,100300"
2635tm "WireNameMgr"
2636)
2637)
2638)
2639*80 (Net
2640uid 3694,0
2641decl (Decl
2642n "MISO"
2643t "std_logic"
2644preAdd 0
2645posAdd 0
2646o 56
2647suid 114,0
2648)
2649declText (MLText
2650uid 3695,0
2651va (VaSet
2652font "Courier New,8,0"
2653)
2654xt "39000,43800,57000,44600"
2655st "MISO                  : std_logic
2656"
2657)
2658)
2659*81 (PortIoOut
2660uid 3716,0
2661shape (CompositeShape
2662uid 3717,0
2663va (VaSet
2664vasetType 1
2665fg "0,0,32768"
2666)
2667optionalChildren [
2668(Pentagon
2669uid 3718,0
2670sl 0
2671ro 270
2672xt "176500,127625,178000,128375"
2673)
2674(Line
2675uid 3719,0
2676sl 0
2677ro 270
2678xt "176000,128000,176500,128000"
2679pts [
2680"176000,128000"
2681"176500,128000"
2682]
2683)
2684]
2685)
2686stc 0
2687sf 1
2688tg (WTG
2689uid 3720,0
2690ps "PortIoTextPlaceStrategy"
2691stg "STSignalDisplayStrategy"
2692f (Text
2693uid 3721,0
2694va (VaSet
2695)
2696xt "179000,127500,185100,128500"
2697st "RS485_C_DE"
2698blo "179000,128300"
2699tm "WireNameMgr"
2700)
2701)
2702)
2703*82 (PortIoOut
2704uid 3722,0
2705shape (CompositeShape
2706uid 3723,0
2707va (VaSet
2708vasetType 1
2709fg "0,0,32768"
2710)
2711optionalChildren [
2712(Pentagon
2713uid 3724,0
2714sl 0
2715ro 270
2716xt "176500,128625,178000,129375"
2717)
2718(Line
2719uid 3725,0
2720sl 0
2721ro 270
2722xt "176000,129000,176500,129000"
2723pts [
2724"176000,129000"
2725"176500,129000"
2726]
2727)
2728]
2729)
2730stc 0
2731sf 1
2732tg (WTG
2733uid 3726,0
2734ps "PortIoTextPlaceStrategy"
2735stg "STSignalDisplayStrategy"
2736f (Text
2737uid 3727,0
2738va (VaSet
2739)
2740xt "179000,128500,185200,129500"
2741st "RS485_C_DO"
2742blo "179000,129300"
2743tm "WireNameMgr"
2744)
2745)
2746)
2747*83 (PortIoOut
2748uid 3728,0
2749shape (CompositeShape
2750uid 3729,0
2751va (VaSet
2752vasetType 1
2753fg "0,0,32768"
2754)
2755optionalChildren [
2756(Pentagon
2757uid 3730,0
2758sl 0
2759ro 270
2760xt "85500,147625,87000,148375"
2761)
2762(Line
2763uid 3731,0
2764sl 0
2765ro 270
2766xt "85000,148000,85500,148000"
2767pts [
2768"85000,148000"
2769"85500,148000"
2770]
2771)
2772]
2773)
2774stc 0
2775sf 1
2776tg (WTG
2777uid 3732,0
2778ps "PortIoTextPlaceStrategy"
2779stg "STSignalDisplayStrategy"
2780f (Text
2781uid 3733,0
2782va (VaSet
2783)
2784xt "88000,147500,94000,148500"
2785st "RS485_E_RE"
2786blo "88000,148300"
2787tm "WireNameMgr"
2788)
2789)
2790)
2791*84 (PortIoOut
2792uid 3734,0
2793shape (CompositeShape
2794uid 3735,0
2795va (VaSet
2796vasetType 1
2797fg "0,0,32768"
2798)
2799optionalChildren [
2800(Pentagon
2801uid 3736,0
2802sl 0
2803ro 270
2804xt "85500,146625,87000,147375"
2805)
2806(Line
2807uid 3737,0
2808sl 0
2809ro 270
2810xt "85000,147000,85500,147000"
2811pts [
2812"85000,147000"
2813"85500,147000"
2814]
2815)
2816]
2817)
2818stc 0
2819sf 1
2820tg (WTG
2821uid 3738,0
2822ps "PortIoTextPlaceStrategy"
2823stg "STSignalDisplayStrategy"
2824f (Text
2825uid 3739,0
2826va (VaSet
2827)
2828xt "88000,146500,94100,147500"
2829st "RS485_E_DE"
2830blo "88000,147300"
2831tm "WireNameMgr"
2832)
2833)
2834)
2835*85 (PortIoOut
2836uid 3740,0
2837shape (CompositeShape
2838uid 3741,0
2839va (VaSet
2840vasetType 1
2841fg "0,0,32768"
2842)
2843optionalChildren [
2844(Pentagon
2845uid 3742,0
2846sl 0
2847ro 270
2848xt "82500,120625,84000,121375"
2849)
2850(Line
2851uid 3743,0
2852sl 0
2853ro 270
2854xt "82000,121000,82500,121000"
2855pts [
2856"82000,121000"
2857"82500,121000"
2858]
2859)
2860]
2861)
2862stc 0
2863sf 1
2864tg (WTG
2865uid 3744,0
2866ps "PortIoTextPlaceStrategy"
2867stg "STSignalDisplayStrategy"
2868f (Text
2869uid 3745,0
2870va (VaSet
2871)
2872xt "85000,120500,89100,121500"
2873st "DENABLE"
2874blo "85000,121300"
2875tm "WireNameMgr"
2876)
2877)
2878)
2879*86 (PortIoOut
2880uid 3752,0
2881shape (CompositeShape
2882uid 3753,0
2883va (VaSet
2884vasetType 1
2885fg "0,0,32768"
2886)
2887optionalChildren [
2888(Pentagon
2889uid 3754,0
2890sl 0
2891ro 270
2892xt "176500,135625,178000,136375"
2893)
2894(Line
2895uid 3755,0
2896sl 0
2897ro 270
2898xt "176000,136000,176500,136000"
2899pts [
2900"176000,136000"
2901"176500,136000"
2902]
2903)
2904]
2905)
2906stc 0
2907sf 1
2908tg (WTG
2909uid 3756,0
2910ps "PortIoTextPlaceStrategy"
2911stg "STSignalDisplayStrategy"
2912f (Text
2913uid 3757,0
2914va (VaSet
2915)
2916xt "179000,135500,182000,136500"
2917st "EE_CS"
2918blo "179000,136300"
2919tm "WireNameMgr"
2920)
2921)
2922)
2923*87 (Net
2924uid 3866,0
2925decl (Decl
2926n "RS485_C_RE"
2927t "std_logic"
2928o 39
2929suid 127,0
2930)
2931declText (MLText
2932uid 3867,0
2933va (VaSet
2934font "Courier New,8,0"
2935)
2936xt "39000,32600,57000,33400"
2937st "RS485_C_RE            : std_logic
2938"
2939)
2940)
2941*88 (Net
2942uid 3868,0
2943decl (Decl
2944n "RS485_C_DE"
2945t "std_logic"
2946o 37
2947suid 128,0
2948)
2949declText (MLText
2950uid 3869,0
2951va (VaSet
2952font "Courier New,8,0"
2953)
2954xt "39000,31000,57000,31800"
2955st "RS485_C_DE            : std_logic
2956"
2957)
2958)
2959*89 (Net
2960uid 3870,0
2961decl (Decl
2962n "RS485_E_RE"
2963t "std_logic"
2964o 42
2965suid 129,0
2966)
2967declText (MLText
2968uid 3871,0
2969va (VaSet
2970font "Courier New,8,0"
2971)
2972xt "39000,35000,57000,35800"
2973st "RS485_E_RE            : std_logic
2974"
2975)
2976)
2977*90 (Net
2978uid 3872,0
2979decl (Decl
2980n "RS485_E_DE"
2981t "std_logic"
2982o 40
2983suid 130,0
2984)
2985declText (MLText
2986uid 3873,0
2987va (VaSet
2988font "Courier New,8,0"
2989)
2990xt "39000,33400,57000,34200"
2991st "RS485_E_DE            : std_logic
2992"
2993)
2994)
2995*91 (Net
2996uid 3874,0
2997decl (Decl
2998n "DENABLE"
2999t "std_logic"
3000o 27
3001suid 131,0
3002i "'0'"
3003)
3004declText (MLText
3005uid 3875,0
3006va (VaSet
3007font "Courier New,8,0"
3008)
3009xt "39000,22200,71000,23000"
3010st "DENABLE               : std_logic                     := '0'
3011"
3012)
3013)
3014*92 (Net
3015uid 3878,0
3016decl (Decl
3017n "EE_CS"
3018t "std_logic"
3019o 32
3020suid 133,0
3021)
3022declText (MLText
3023uid 3879,0
3024va (VaSet
3025font "Courier New,8,0"
3026)
3027xt "39000,27000,57000,27800"
3028st "EE_CS                 : std_logic
3029"
3030)
3031)
3032*93 (PortIoOut
3033uid 4916,0
3034shape (CompositeShape
3035uid 4917,0
3036va (VaSet
3037vasetType 1
3038fg "0,0,32768"
3039)
3040optionalChildren [
3041(Pentagon
3042uid 4918,0
3043sl 0
3044ro 270
3045xt "176500,103625,178000,104375"
3046)
3047(Line
3048uid 4919,0
3049sl 0
3050ro 270
3051xt "176000,104000,176500,104000"
3052pts [
3053"176000,104000"
3054"176500,104000"
3055]
3056)
3057]
3058)
3059stc 0
3060sf 1
3061tg (WTG
3062uid 4920,0
3063ps "PortIoTextPlaceStrategy"
3064stg "STSignalDisplayStrategy"
3065f (Text
3066uid 4921,0
3067va (VaSet
3068)
3069xt "179000,103500,181000,104500"
3070st "D_T"
3071blo "179000,104300"
3072tm "WireNameMgr"
3073)
3074)
3075)
3076*94 (Net
3077uid 5320,0
3078decl (Decl
3079n "D_T"
3080t "std_logic_vector"
3081b "(7 DOWNTO 0)"
3082o 30
3083suid 141,0
3084i "(OTHERS => '0')"
3085)
3086declText (MLText
3087uid 5321,0
3088va (VaSet
3089font "Courier New,8,0"
3090)
3091xt "39000,25400,77000,26200"
3092st "D_T                   : std_logic_vector(7 DOWNTO 0)  := (OTHERS => '0')
3093"
3094)
3095)
3096*95 (PortIoOut
3097uid 6874,0
3098shape (CompositeShape
3099uid 6875,0
3100va (VaSet
3101vasetType 1
3102fg "0,0,32768"
3103)
3104optionalChildren [
3105(Pentagon
3106uid 6876,0
3107sl 0
3108ro 270
3109xt "176500,124625,178000,125375"
3110)
3111(Line
3112uid 6877,0
3113sl 0
3114ro 270
3115xt "176000,125000,176500,125000"
3116pts [
3117"176000,125000"
3118"176500,125000"
3119]
3120)
3121]
3122)
3123stc 0
3124sf 1
3125tg (WTG
3126uid 6878,0
3127ps "PortIoTextPlaceStrategy"
3128stg "STSignalDisplayStrategy"
3129f (Text
3130uid 6879,0
3131va (VaSet
3132)
3133xt "179000,124500,181500,125500"
3134st "D_T2"
3135blo "179000,125300"
3136tm "WireNameMgr"
3137)
3138)
3139)
3140*96 (Net
3141uid 6886,0
3142decl (Decl
3143n "D_T2"
3144t "std_logic_vector"
3145b "(1 DOWNTO 0)"
3146o 31
3147suid 154,0
3148i "(others => '0')"
3149)
3150declText (MLText
3151uid 6887,0
3152va (VaSet
3153font "Courier New,8,0"
3154)
3155xt "39000,26200,77000,27000"
3156st "D_T2                  : std_logic_vector(1 DOWNTO 0)  := (others => '0')
3157"
3158)
3159)
3160*97 (PortIoOut
3161uid 7138,0
3162shape (CompositeShape
3163uid 7139,0
3164va (VaSet
3165vasetType 1
3166fg "0,0,32768"
3167)
3168optionalChildren [
3169(Pentagon
3170uid 7140,0
3171sl 0
3172ro 270
3173xt "176500,105625,178000,106375"
3174)
3175(Line
3176uid 7141,0
3177sl 0
3178ro 270
3179xt "176000,106000,176500,106000"
3180pts [
3181"176000,106000"
3182"176500,106000"
3183]
3184)
3185]
3186)
3187stc 0
3188sf 1
3189tg (WTG
3190uid 7142,0
3191ps "PortIoTextPlaceStrategy"
3192stg "STSignalDisplayStrategy"
3193f (Text
3194uid 7143,0
3195va (VaSet
3196)
3197xt "179000,105500,181400,106500"
3198st "A1_T"
3199blo "179000,106300"
3200tm "WireNameMgr"
3201)
3202)
3203)
3204*98 (Net
3205uid 7150,0
3206decl (Decl
3207n "A1_T"
3208t "std_logic_vector"
3209b "(7 DOWNTO 0)"
3210o 19
3211suid 155,0
3212i "(OTHERS => '0')"
3213)
3214declText (MLText
3215uid 7151,0
3216va (VaSet
3217font "Courier New,8,0"
3218)
3219xt "39000,19000,77000,19800"
3220st "A1_T                  : std_logic_vector(7 DOWNTO 0)  := (OTHERS => '0')
3221"
3222)
3223)
3224*99 (Net
3225uid 9500,0
3226decl (Decl
3227n "CLK_50"
3228t "std_logic"
3229o 63
3230suid 163,0
3231)
3232declText (MLText
3233uid 9501,0
3234va (VaSet
3235font "Courier New,8,0"
3236)
3237xt "39000,47200,61000,48000"
3238st "SIGNAL CLK_50                : std_logic
3239"
3240)
3241)
3242*100 (PortIoOut
3243uid 10296,0
3244shape (CompositeShape
3245uid 10297,0
3246va (VaSet
3247vasetType 1
3248fg "0,0,32768"
3249)
3250optionalChildren [
3251(Pentagon
3252uid 10298,0
3253sl 0
3254ro 270
3255xt "176500,110625,178000,111375"
3256)
3257(Line
3258uid 10299,0
3259sl 0
3260ro 270
3261xt "176000,111000,176500,111000"
3262pts [
3263"176000,111000"
3264"176500,111000"
3265]
3266)
3267]
3268)
3269stc 0
3270sf 1
3271tg (WTG
3272uid 10300,0
3273ps "PortIoTextPlaceStrategy"
3274stg "STSignalDisplayStrategy"
3275f (Text
3276uid 10301,0
3277va (VaSet
3278)
3279xt "179000,110500,181500,111500"
3280st "A0_T"
3281blo "179000,111300"
3282tm "WireNameMgr"
3283)
3284)
3285)
3286*101 (Net
3287uid 10308,0
3288decl (Decl
3289n "A0_T"
3290t "std_logic_vector"
3291b "(7 DOWNTO 0)"
3292o 18
3293suid 166,0
3294i "(others => '0')"
3295)
3296declText (MLText
3297uid 10309,0
3298va (VaSet
3299font "Courier New,8,0"
3300)
3301xt "39000,18200,77000,19000"
3302st "A0_T                  : std_logic_vector(7 DOWNTO 0)  := (others => '0')
3303"
3304)
3305)
3306*102 (HdlText
3307uid 10310,0
3308optionalChildren [
3309*103 (EmbeddedText
3310uid 10316,0
3311commentText (CommentText
3312uid 10317,0
3313ps "CenterOffsetStrategy"
3314shape (Rectangle
3315uid 10318,0
3316va (VaSet
3317vasetType 1
3318fg "65535,65535,65535"
3319lineColor "0,0,32768"
3320lineWidth 2
3321)
3322xt "154000,66000,186000,102000"
3323)
3324oxt "0,0,18000,5000"
3325text (MLText
3326uid 10319,0
3327va (VaSet
3328)
3329xt "154200,66200,178100,94200"
3330st "
3331-- testpins D_T2 are used as MAX3485 outputs.
3332
3333--D_T <= (others => '0');
3334--D_T2 <= ( others => '0' );
3335D_T2(1) <= '0';
3336-- A0_T(7 downto 0) <= (others => '0');
3337--A1_T(7 downto 0) <= (others => '0');
3338
3339A1_T <= counter_result ( 7 downto 0);
3340D_T(3 downto 0) <=  counter_result ( 11 downto 8);
3341D_T(4) <= alarm_refclk_too_low;
3342D_T(5) <= alarm_refclk_too_high;
3343D_T(6) <= '0';
3344D_T(7) <= '0';
3345
3346-- led output is driven by w5300 modul
3347-- for debugging only.
3348A0_T <= led;
3349
3350-- additional MAX3485 is switched to shutdown mode
3351RS485_C_RE <= '1';  --inverted logic
3352RS485_C_DE <= '0';   
3353RS485_C_DO <= '0';
3354-- MAX3485 receiver out pit is fed out... should be HIGH-Z
3355D_T2(0) <= RS485_C_DI;
3356
3357-- EEPROM is not used on FAD. CS is always high.
3358EE_CS <= '1';
3359"
3360tm "HdlTextMgr"
3361wrapOption 3
3362visibleHeight 36000
3363visibleWidth 32000
3364)
3365)
3366)
3367]
3368shape (Rectangle
3369uid 10311,0
3370va (VaSet
3371vasetType 1
3372fg "65535,65535,37120"
3373lineColor "0,0,32768"
3374lineWidth 2
3375)
3376xt "165000,104000,171000,138000"
3377)
3378oxt "0,0,8000,10000"
3379ttg (MlTextGroup
3380uid 10312,0
3381ps "CenterOffsetStrategy"
3382stg "VerticalLayoutStrategy"
3383textVec [
3384*104 (Text
3385uid 10313,0
3386va (VaSet
3387font "Arial,8,1"
3388)
3389xt "168150,107000,169850,108000"
3390st "eb3"
3391blo "168150,107800"
3392tm "HdlTextNameMgr"
3393)
3394*105 (Text
3395uid 10314,0
3396va (VaSet
3397font "Arial,8,1"
3398)
3399xt "168150,108000,168950,109000"
3400st "9"
3401blo "168150,108800"
3402tm "HdlTextNumberMgr"
3403)
3404]
3405)
3406viewicon (ZoomableIcon
3407uid 10315,0
3408sl 0
3409va (VaSet
3410vasetType 1
3411fg "49152,49152,49152"
3412)
3413xt "165250,136250,166750,137750"
3414iconName "TextFile.png"
3415iconMaskName "TextFile.msk"
3416ftype 21
3417)
3418viewiconposition 0
3419)
3420*106 (PortIoIn
3421uid 11090,0
3422shape (CompositeShape
3423uid 11091,0
3424va (VaSet
3425vasetType 1
3426fg "0,0,32768"
3427)
3428optionalChildren [
3429(Pentagon
3430uid 11092,0
3431sl 0
3432ro 270
3433xt "161000,128625,162500,129375"
3434)
3435(Line
3436uid 11093,0
3437sl 0
3438ro 270
3439xt "162500,129000,163000,129000"
3440pts [
3441"162500,129000"
3442"163000,129000"
3443]
3444)
3445]
3446)
3447stc 0
3448sf 1
3449tg (WTG
3450uid 11094,0
3451ps "PortIoTextPlaceStrategy"
3452stg "STSignalDisplayStrategy"
3453f (Text
3454uid 11095,0
3455va (VaSet
3456)
3457xt "154000,128500,160000,129500"
3458st "RS485_C_DI"
3459ju 2
3460blo "160000,129300"
3461tm "WireNameMgr"
3462)
3463)
3464)
3465*107 (Net
3466uid 11102,0
3467decl (Decl
3468n "RS485_C_DI"
3469t "std_logic"
3470o 13
3471suid 197,0
3472)
3473declText (MLText
3474uid 11103,0
3475va (VaSet
3476font "Courier New,8,0"
3477)
3478xt "39000,14200,57000,15000"
3479st "RS485_C_DI            : std_logic
3480"
3481)
3482)
3483*108 (PortIoOut
3484uid 11104,0
3485shape (CompositeShape
3486uid 11105,0
3487va (VaSet
3488vasetType 1
3489fg "0,0,32768"
3490)
3491optionalChildren [
3492(Pentagon
3493uid 11106,0
3494sl 0
3495ro 270
3496xt "176500,129625,178000,130375"
3497)
3498(Line
3499uid 11107,0
3500sl 0
3501ro 270
3502xt "176000,130000,176500,130000"
3503pts [
3504"176000,130000"
3505"176500,130000"
3506]
3507)
3508]
3509)
3510stc 0
3511sf 1
3512tg (WTG
3513uid 11108,0
3514ps "PortIoTextPlaceStrategy"
3515stg "STSignalDisplayStrategy"
3516f (Text
3517uid 11109,0
3518va (VaSet
3519)
3520xt "179000,129500,185000,130500"
3521st "RS485_C_RE"
3522blo "179000,130300"
3523tm "WireNameMgr"
3524)
3525)
3526)
3527*109 (Net
3528uid 11116,0
3529decl (Decl
3530n "RS485_C_DO"
3531t "std_logic"
3532o 38
3533suid 198,0
3534)
3535declText (MLText
3536uid 11117,0
3537va (VaSet
3538font "Courier New,8,0"
3539)
3540xt "39000,31800,57000,32600"
3541st "RS485_C_DO            : std_logic
3542"
3543)
3544)
3545*110 (PortIoIn
3546uid 11508,0
3547shape (CompositeShape
3548uid 11509,0
3549va (VaSet
3550vasetType 1
3551fg "0,0,32768"
3552)
3553optionalChildren [
3554(Pentagon
3555uid 11510,0
3556sl 0
3557ro 90
3558xt "85500,149625,87000,150375"
3559)
3560(Line
3561uid 11511,0
3562sl 0
3563ro 90
3564xt "85000,150000,85500,150000"
3565pts [
3566"85500,150000"
3567"85000,150000"
3568]
3569)
3570]
3571)
3572stc 0
3573sf 1
3574tg (WTG
3575uid 11512,0
3576ps "PortIoTextPlaceStrategy"
3577stg "STSignalDisplayStrategy"
3578f (Text
3579uid 11513,0
3580va (VaSet
3581)
3582xt "88000,149500,94000,150500"
3583st "RS485_E_DI"
3584blo "88000,150300"
3585tm "WireNameMgr"
3586)
3587)
3588)
3589*111 (Net
3590uid 11520,0
3591decl (Decl
3592n "RS485_E_DI"
3593t "std_logic"
3594o 14
3595suid 200,0
3596)
3597declText (MLText
3598uid 11521,0
3599va (VaSet
3600font "Courier New,8,0"
3601)
3602xt "39000,15000,57000,15800"
3603st "RS485_E_DI            : std_logic
3604"
3605)
3606)
3607*112 (Net
3608uid 11534,0
3609decl (Decl
3610n "RS485_E_DO"
3611t "std_logic"
3612o 41
3613suid 201,0
3614)
3615declText (MLText
3616uid 11535,0
3617va (VaSet
3618font "Courier New,8,0"
3619)
3620xt "39000,34200,57000,35000"
3621st "RS485_E_DO            : std_logic
3622"
3623)
3624)
3625*113 (PortIoOut
3626uid 12326,0
3627shape (CompositeShape
3628uid 12327,0
3629va (VaSet
3630vasetType 1
3631fg "0,0,32768"
3632)
3633optionalChildren [
3634(Pentagon
3635uid 12328,0
3636sl 0
3637ro 270
3638xt "87500,139625,89000,140375"
3639)
3640(Line
3641uid 12329,0
3642sl 0
3643ro 270
3644xt "87000,140000,87500,140000"
3645pts [
3646"87000,140000"
3647"87500,140000"
3648]
3649)
3650]
3651)
3652stc 0
3653sf 1
3654tg (WTG
3655uid 12330,0
3656ps "PortIoTextPlaceStrategy"
3657stg "STSignalDisplayStrategy"
3658f (Text
3659uid 12331,0
3660va (VaSet
3661)
3662xt "89000,139500,91500,140500"
3663st "SRIN"
3664blo "89000,140300"
3665tm "WireNameMgr"
3666)
3667)
3668)
3669*114 (Net
3670uid 12334,0
3671decl (Decl
3672n "SRIN"
3673t "std_logic"
3674o 44
3675suid 203,0
3676i "'0'"
3677)
3678declText (MLText
3679uid 12335,0
3680va (VaSet
3681font "Courier New,8,0"
3682)
3683xt "39000,36600,71000,37400"
3684st "SRIN                  : std_logic                     := '0'
3685"
3686)
3687)
3688*115 (PortIoOut
3689uid 12539,0
3690shape (CompositeShape
3691uid 12540,0
3692va (VaSet
3693vasetType 1
3694fg "0,0,32768"
3695)
3696optionalChildren [
3697(Pentagon
3698uid 12541,0
3699sl 0
3700ro 270
3701xt "87500,140625,89000,141375"
3702)
3703(Line
3704uid 12542,0
3705sl 0
3706ro 270
3707xt "87000,141000,87500,141000"
3708pts [
3709"87000,141000"
3710"87500,141000"
3711]
3712)
3713]
3714)
3715stc 0
3716sf 1
3717tg (WTG
3718uid 12543,0
3719ps "PortIoTextPlaceStrategy"
3720stg "STSignalDisplayStrategy"
3721f (Text
3722uid 12544,0
3723va (VaSet
3724)
3725xt "90000,140500,95200,141500"
3726st "AMBER_LED"
3727blo "90000,141300"
3728tm "WireNameMgr"
3729)
3730)
3731)
3732*116 (PortIoOut
3733uid 12553,0
3734shape (CompositeShape
3735uid 12554,0
3736va (VaSet
3737vasetType 1
3738fg "0,0,32768"
3739)
3740optionalChildren [
3741(Pentagon
3742uid 12555,0
3743sl 0
3744ro 270
3745xt "87500,141625,89000,142375"
3746)
3747(Line
3748uid 12556,0
3749sl 0
3750ro 270
3751xt "87000,142000,87500,142000"
3752pts [
3753"87000,142000"
3754"87500,142000"
3755]
3756)
3757]
3758)
3759stc 0
3760sf 1
3761tg (WTG
3762uid 12557,0
3763ps "PortIoTextPlaceStrategy"
3764stg "STSignalDisplayStrategy"
3765f (Text
3766uid 12558,0
3767va (VaSet
3768)
3769xt "90000,141500,95000,142500"
3770st "GREEN_LED"
3771blo "90000,142300"
3772tm "WireNameMgr"
3773)
3774)
3775)
3776*117 (PortIoOut
3777uid 12567,0
3778shape (CompositeShape
3779uid 12568,0
3780va (VaSet
3781vasetType 1
3782fg "0,0,32768"
3783)
3784optionalChildren [
3785(Pentagon
3786uid 12569,0
3787sl 0
3788ro 270
3789xt "87500,142625,89000,143375"
3790)
3791(Line
3792uid 12570,0
3793sl 0
3794ro 270
3795xt "87000,143000,87500,143000"
3796pts [
3797"87000,143000"
3798"87500,143000"
3799]
3800)
3801]
3802)
3803stc 0
3804sf 1
3805tg (WTG
3806uid 12571,0
3807ps "PortIoTextPlaceStrategy"
3808stg "STSignalDisplayStrategy"
3809f (Text
3810uid 12572,0
3811va (VaSet
3812)
3813xt "90000,142500,94000,143500"
3814st "RED_LED"
3815blo "90000,143300"
3816tm "WireNameMgr"
3817)
3818)
3819)
3820*118 (Net
3821uid 12762,0
3822decl (Decl
3823n "AMBER_LED"
3824t "std_logic"
3825o 20
3826suid 207,0
3827)
3828declText (MLText
3829uid 12763,0
3830va (VaSet
3831font "Courier New,8,0"
3832)
3833xt "39000,19800,57000,20600"
3834st "AMBER_LED             : std_logic
3835"
3836)
3837)
3838*119 (Net
3839uid 12764,0
3840decl (Decl
3841n "GREEN_LED"
3842t "std_logic"
3843o 33
3844suid 208,0
3845)
3846declText (MLText
3847uid 12765,0
3848va (VaSet
3849font "Courier New,8,0"
3850)
3851xt "39000,27800,57000,28600"
3852st "GREEN_LED             : std_logic
3853"
3854)
3855)
3856*120 (Net
3857uid 12766,0
3858decl (Decl
3859n "RED_LED"
3860t "std_logic"
3861o 36
3862suid 209,0
3863)
3864declText (MLText
3865uid 12767,0
3866va (VaSet
3867font "Courier New,8,0"
3868)
3869xt "39000,30200,57000,31000"
3870st "RED_LED               : std_logic
3871"
3872)
3873)
3874*121 (PortIoIn
3875uid 13516,0
3876shape (CompositeShape
3877uid 13517,0
3878va (VaSet
3879vasetType 1
3880fg "0,0,32768"
3881)
3882optionalChildren [
3883(Pentagon
3884uid 13518,0
3885sl 0
3886ro 270
3887xt "20000,80625,21500,81375"
3888)
3889(Line
3890uid 13519,0
3891sl 0
3892ro 270
3893xt "21500,81000,22000,81000"
3894pts [
3895"21500,81000"
3896"22000,81000"
3897]
3898)
3899]
3900)
3901stc 0
3902sf 1
3903tg (WTG
3904uid 13520,0
3905ps "PortIoTextPlaceStrategy"
3906stg "STSignalDisplayStrategy"
3907f (Text
3908uid 13521,0
3909va (VaSet
3910)
3911xt "16700,80500,19000,81500"
3912st "LINE"
3913ju 2
3914blo "19000,81300"
3915tm "WireNameMgr"
3916)
3917)
3918)
3919*122 (Net
3920uid 13528,0
3921decl (Decl
3922n "LINE"
3923t "std_logic_vector"
3924b "( 5 DOWNTO 0 )"
3925o 11
3926suid 210,0
3927)
3928declText (MLText
3929uid 13529,0
3930va (VaSet
3931font "Courier New,8,0"
3932)
3933xt "39000,12600,68000,13400"
3934st "LINE                  : std_logic_vector( 5 DOWNTO 0 )
3935"
3936)
3937)
3938*123 (PortIoIn
3939uid 13628,0
3940shape (CompositeShape
3941uid 13629,0
3942va (VaSet
3943vasetType 1
3944fg "0,0,32768"
3945)
3946optionalChildren [
3947(Pentagon
3948uid 13630,0
3949sl 0
3950ro 270
3951xt "47000,132625,48500,133375"
3952)
3953(Line
3954uid 13631,0
3955sl 0
3956ro 270
3957xt "48500,133000,49000,133000"
3958pts [
3959"48500,133000"
3960"49000,133000"
3961]
3962)
3963]
3964)
3965stc 0
3966sf 1
3967tg (WTG
3968uid 13632,0
3969ps "PortIoTextPlaceStrategy"
3970stg "STSignalDisplayStrategy"
3971f (Text
3972uid 13633,0
3973va (VaSet
3974)
3975xt "42700,132500,46000,133500"
3976st "REFCLK"
3977ju 2
3978blo "46000,133300"
3979tm "WireNameMgr"
3980)
3981)
3982)
3983*124 (Net
3984uid 13640,0
3985decl (Decl
3986n "REFCLK"
3987t "std_logic"
3988o 12
3989suid 211,0
3990)
3991declText (MLText
3992uid 13641,0
3993va (VaSet
3994font "Courier New,8,0"
3995)
3996xt "39000,13400,57000,14200"
3997st "REFCLK                : std_logic
3998"
3999)
4000)
4001*125 (PortIoIn
4002uid 14322,0
4003shape (CompositeShape
4004uid 14323,0
4005va (VaSet
4006vasetType 1
4007fg "0,0,32768"
4008)
4009optionalChildren [
4010(Pentagon
4011uid 14324,0
4012sl 0
4013ro 270
4014xt "47000,131625,48500,132375"
4015)
4016(Line
4017uid 14325,0
4018sl 0
4019ro 270
4020xt "48500,132000,49000,132000"
4021pts [
4022"48500,132000"
4023"49000,132000"
4024]
4025)
4026]
4027)
4028stc 0
4029sf 1
4030tg (WTG
4031uid 14326,0
4032ps "PortIoTextPlaceStrategy"
4033stg "STSignalDisplayStrategy"
4034f (Text
4035uid 14327,0
4036va (VaSet
4037)
4038xt "42900,131500,46000,132500"
4039st "D_T_in"
4040ju 2
4041blo "46000,132300"
4042tm "WireNameMgr"
4043)
4044)
4045)
4046*126 (Net
4047uid 14334,0
4048decl (Decl
4049n "D_T_in"
4050t "std_logic_vector"
4051b "(1 DOWNTO 0)"
4052o 10
4053suid 213,0
4054)
4055declText (MLText
4056uid 14335,0
4057va (VaSet
4058font "Courier New,8,0"
4059)
4060xt "39000,11800,67000,12600"
4061st "D_T_in                : std_logic_vector(1 DOWNTO 0)
4062"
4063)
4064)
4065*127 (Net
4066uid 15173,0
4067decl (Decl
4068n "led"
4069t "std_logic_vector"
4070b "(7 DOWNTO 0)"
4071posAdd 0
4072o 77
4073suid 215,0
4074i "(OTHERS => '0')"
4075)
4076declText (MLText
4077uid 15174,0
4078va (VaSet
4079font "Courier New,8,0"
4080)
4081xt "39000,53600,80500,54400"
4082st "SIGNAL led                   : std_logic_vector(7 DOWNTO 0)  := (OTHERS => '0')
4083"
4084)
4085)
4086*128 (PortIoOut
4087uid 15557,0
4088shape (CompositeShape
4089uid 15558,0
4090va (VaSet
4091vasetType 1
4092fg "0,0,32768"
4093)
4094optionalChildren [
4095(Pentagon
4096uid 15559,0
4097sl 0
4098ro 270
4099xt "85500,148625,87000,149375"
4100)
4101(Line
4102uid 15560,0
4103sl 0
4104ro 270
4105xt "85000,149000,85500,149000"
4106pts [
4107"85000,149000"
4108"85500,149000"
4109]
4110)
4111]
4112)
4113stc 0
4114sf 1
4115tg (WTG
4116uid 15561,0
4117ps "PortIoTextPlaceStrategy"
4118stg "STSignalDisplayStrategy"
4119f (Text
4120uid 15562,0
4121va (VaSet
4122)
4123xt "88000,148500,94200,149500"
4124st "RS485_E_DO"
4125blo "88000,149300"
4126tm "WireNameMgr"
4127)
4128)
4129)
4130*129 (PortIoIn
4131uid 15706,0
4132shape (CompositeShape
4133uid 15707,0
4134va (VaSet
4135vasetType 1
4136fg "0,0,32768"
4137)
4138optionalChildren [
4139(Pentagon
4140uid 15708,0
4141sl 0
4142ro 270
4143xt "47000,136625,48500,137375"
4144)
4145(Line
4146uid 15709,0
4147sl 0
4148ro 270
4149xt "48500,137000,49000,137000"
4150pts [
4151"48500,137000"
4152"49000,137000"
4153]
4154)
4155]
4156)
4157stc 0
4158sf 1
4159tg (WTG
4160uid 15710,0
4161ps "PortIoTextPlaceStrategy"
4162stg "STSignalDisplayStrategy"
4163f (Text
4164uid 15711,0
4165va (VaSet
4166)
4167xt "41900,136500,46000,137500"
4168st "D_PLLLCK"
4169ju 2
4170blo "46000,137300"
4171tm "WireNameMgr"
4172)
4173)
4174)
4175*130 (Net
4176uid 15718,0
4177decl (Decl
4178n "D_PLLLCK"
4179t "std_logic_vector"
4180b "(3 DOWNTO 0)"
4181o 81
4182suid 216,0
4183)
4184declText (MLText
4185uid 15719,0
4186va (VaSet
4187font "Courier New,8,0"
4188)
4189xt "39000,11000,67000,11800"
4190st "D_PLLLCK              : std_logic_vector(3 DOWNTO 0)
4191"
4192)
4193)
4194*131 (PortIoOut
4195uid 15845,0
4196shape (CompositeShape
4197uid 15846,0
4198va (VaSet
4199vasetType 1
4200fg "0,0,32768"
4201)
4202optionalChildren [
4203(Pentagon
4204uid 15847,0
4205sl 0
4206ro 270
4207xt "90500,88625,92000,89375"
4208)
4209(Line
4210uid 15848,0
4211sl 0
4212ro 270
4213xt "90000,89000,90500,89000"
4214pts [
4215"90000,89000"
4216"90500,89000"
4217]
4218)
4219]
4220)
4221stc 0
4222sf 1
4223tg (WTG
4224uid 15849,0
4225ps "PortIoTextPlaceStrategy"
4226stg "STSignalDisplayStrategy"
4227f (Text
4228uid 15850,0
4229va (VaSet
4230)
4231xt "93000,88500,95000,89500"
4232st "TCS"
4233blo "93000,89300"
4234tm "WireNameMgr"
4235)
4236)
4237)
4238*132 (Net
4239uid 15857,0
4240decl (Decl
4241n "TCS"
4242t "std_logic_vector"
4243b "(3 DOWNTO 0)"
4244o 70
4245suid 217,0
4246)
4247declText (MLText
4248uid 15858,0
4249va (VaSet
4250font "Courier New,8,0"
4251)
4252xt "39000,38200,67000,39000"
4253st "TCS                   : std_logic_vector(3 DOWNTO 0)
4254"
4255)
4256)
4257*133 (PortIoOut
4258uid 16057,0
4259shape (CompositeShape
4260uid 16058,0
4261va (VaSet
4262vasetType 1
4263fg "0,0,32768"
4264)
4265optionalChildren [
4266(Pentagon
4267uid 16059,0
4268sl 0
4269ro 90
4270xt "19000,112625,20500,113375"
4271)
4272(Line
4273uid 16060,0
4274sl 0
4275ro 90
4276xt "20500,113000,21000,113000"
4277pts [
4278"21000,113000"
4279"20500,113000"
4280]
4281)
4282]
4283)
4284stc 0
4285sf 1
4286tg (WTG
4287uid 16061,0
4288ps "PortIoTextPlaceStrategy"
4289stg "STSignalDisplayStrategy"
4290f (Text
4291uid 16062,0
4292va (VaSet
4293)
4294xt "14500,112500,18000,113500"
4295st "DSRCLK"
4296ju 2
4297blo "18000,113300"
4298tm "WireNameMgr"
4299)
4300)
4301)
4302*134 (Net
4303uid 16069,0
4304decl (Decl
4305n "DSRCLK"
4306t "std_logic_vector"
4307b "(3 DOWNTO 0)"
4308o 60
4309suid 222,0
4310i "(others => '0')"
4311)
4312declText (MLText
4313uid 16070,0
4314va (VaSet
4315font "Courier New,8,0"
4316)
4317xt "39000,23000,77000,23800"
4318st "DSRCLK                : std_logic_vector(3 DOWNTO 0)  := (others => '0')
4319"
4320)
4321)
4322*135 (Net
4323uid 16245,0
4324decl (Decl
4325n "SRCLK"
4326t "std_logic"
4327o 61
4328suid 225,0
4329i "'0'"
4330)
4331declText (MLText
4332uid 16246,0
4333va (VaSet
4334font "Courier New,8,0"
4335)
4336xt "39000,48000,74500,48800"
4337st "SIGNAL SRCLK                 : std_logic                     := '0'
4338"
4339)
4340)
4341*136 (HdlText
4342uid 16336,0
4343optionalChildren [
4344*137 (EmbeddedText
4345uid 16342,0
4346commentText (CommentText
4347uid 16343,0
4348ps "CenterOffsetStrategy"
4349shape (Rectangle
4350uid 16344,0
4351va (VaSet
4352vasetType 1
4353fg "65535,65535,65535"
4354lineColor "0,0,32768"
4355lineWidth 2
4356)
4357xt "23000,116000,42000,118000"
4358)
4359oxt "0,0,18000,5000"
4360text (MLText
4361uid 16345,0
4362va (VaSet
4363)
4364xt "23200,116200,40600,117200"
4365st "
4366DSRCLK <= ( SRCLK, SRCLK,SRCLK,SRCLK);
4367"
4368tm "HdlTextMgr"
4369wrapOption 3
4370visibleHeight 2000
4371visibleWidth 19000
4372)
4373)
4374)
4375]
4376shape (Rectangle
4377uid 16337,0
4378va (VaSet
4379vasetType 1
4380fg "65535,65535,37120"
4381lineColor "0,0,32768"
4382lineWidth 2
4383)
4384xt "30000,112000,34000,116000"
4385)
4386oxt "0,0,8000,10000"
4387ttg (MlTextGroup
4388uid 16338,0
4389ps "CenterOffsetStrategy"
4390stg "VerticalLayoutStrategy"
4391textVec [
4392*138 (Text
4393uid 16339,0
4394va (VaSet
4395font "Arial,8,1"
4396)
4397xt "30150,112000,33350,113000"
4398st "SRCLK"
4399blo "30150,112800"
4400tm "HdlTextNameMgr"
4401)
4402*139 (Text
4403uid 16340,0
4404va (VaSet
4405font "Arial,8,1"
4406)
4407xt "30150,113000,30950,114000"
4408st "1"
4409blo "30150,113800"
4410tm "HdlTextNumberMgr"
4411)
4412]
4413)
4414viewicon (ZoomableIcon
4415uid 16341,0
4416sl 0
4417va (VaSet
4418vasetType 1
4419fg "49152,49152,49152"
4420)
4421xt "30250,114250,31750,115750"
4422iconName "TextFile.png"
4423iconMaskName "TextFile.msk"
4424ftype 21
4425)
4426viewiconposition 0
4427)
4428*140 (Net
4429uid 16536,0
4430decl (Decl
4431n "alarm_refclk_too_high"
4432t "std_logic"
4433o 62
4434suid 226,0
4435i "'0'"
4436)
4437declText (MLText
4438uid 16537,0
4439va (VaSet
4440font "Courier New,8,0"
4441)
4442xt "39000,49600,74500,50400"
4443st "SIGNAL alarm_refclk_too_high : std_logic                     := '0'
4444"
4445)
4446)
4447*141 (Net
4448uid 16544,0
4449decl (Decl
4450n "alarm_refclk_too_low"
4451t "std_logic"
4452o 63
4453suid 227,0
4454i "'0'"
4455)
4456declText (MLText
4457uid 16545,0
4458va (VaSet
4459font "Courier New,8,0"
4460)
4461xt "39000,50400,74500,51200"
4462st "SIGNAL alarm_refclk_too_low  : std_logic                     := '0'
4463"
4464)
4465)
4466*142 (Net
4467uid 16574,0
4468decl (Decl
4469n "counter_result"
4470t "std_logic_vector"
4471b "(11 downto 0)"
4472o 64
4473suid 230,0
4474i "(others => '0')"
4475)
4476declText (MLText
4477uid 16575,0
4478va (VaSet
4479font "Courier New,8,0"
4480)
4481xt "39000,52000,80500,52800"
4482st "SIGNAL counter_result        : std_logic_vector(11 downto 0) := (others => '0')
4483"
4484)
4485)
4486*143 (SaComponent
4487uid 17195,0
4488optionalChildren [
4489*144 (CptPort
4490uid 17027,0
4491ps "OnEdgeStrategy"
4492shape (Triangle
4493uid 17028,0
4494ro 90
4495va (VaSet
4496vasetType 1
4497fg "0,65535,0"
4498)
4499xt "80000,70625,80750,71375"
4500)
4501tg (CPTG
4502uid 17029,0
4503ps "CptPortTextPlaceStrategy"
4504stg "RightVerticalLayoutStrategy"
4505f (Text
4506uid 17030,0
4507va (VaSet
4508)
4509xt "74800,70500,79000,71500"
4510st "wiz_reset"
4511ju 2
4512blo "79000,71300"
4513)
4514)
4515thePort (LogicalPort
4516m 1
4517decl (Decl
4518n "wiz_reset"
4519t "std_logic"
4520o 44
4521suid 2,0
4522i "'1'"
4523)
4524)
4525)
4526*145 (CptPort
4527uid 17031,0
4528ps "OnEdgeStrategy"
4529shape (Triangle
4530uid 17032,0
4531ro 90
4532va (VaSet
4533vasetType 1
4534fg "0,65535,0"
4535)
4536xt "80000,119625,80750,120375"
4537)
4538tg (CPTG
4539uid 17033,0
4540ps "CptPortTextPlaceStrategy"
4541stg "RightVerticalLayoutStrategy"
4542f (Text
4543uid 17034,0
4544va (VaSet
4545)
4546xt "74600,119500,79000,120500"
4547st "led : (7:0)"
4548ju 2
4549blo "79000,120300"
4550)
4551)
4552thePort (LogicalPort
4553m 1
4554decl (Decl
4555n "led"
4556t "std_logic_vector"
4557b "(7 DOWNTO 0)"
4558posAdd 0
4559o 35
4560suid 7,0
4561i "(OTHERS => '0')"
4562)
4563)
4564)
4565*146 (CptPort
4566uid 17035,0
4567ps "OnEdgeStrategy"
4568shape (Triangle
4569uid 17036,0
4570ro 90
4571va (VaSet
4572vasetType 1
4573fg "0,65535,0"
4574)
4575xt "51250,77625,52000,78375"
4576)
4577tg (CPTG
4578uid 17037,0
4579ps "CptPortTextPlaceStrategy"
4580stg "VerticalLayoutStrategy"
4581f (Text
4582uid 17038,0
4583va (VaSet
4584)
4585xt "53000,77500,56000,78500"
4586st "trigger"
4587blo "53000,78300"
4588)
4589)
4590thePort (LogicalPort
4591decl (Decl
4592n "trigger"
4593t "std_logic"
4594preAdd 0
4595posAdd 0
4596o 14
4597suid 18,0
4598)
4599)
4600)
4601*147 (CptPort
4602uid 17039,0
4603ps "OnEdgeStrategy"
4604shape (Triangle
4605uid 17040,0
4606ro 270
4607va (VaSet
4608vasetType 1
4609fg "0,65535,0"
4610)
4611xt "51250,89625,52000,90375"
4612)
4613tg (CPTG
4614uid 17041,0
4615ps "CptPortTextPlaceStrategy"
4616stg "VerticalLayoutStrategy"
4617f (Text
4618uid 17042,0
4619va (VaSet
4620)
4621xt "53000,89500,56500,90500"
4622st "adc_oeb"
4623blo "53000,90300"
4624)
4625)
4626thePort (LogicalPort
4627m 1
4628decl (Decl
4629n "adc_oeb"
4630t "std_logic"
4631o 25
4632suid 21,0
4633i "'1'"
4634)
4635)
4636)
4637*148 (CptPort
4638uid 17043,0
4639ps "OnEdgeStrategy"
4640shape (Triangle
4641uid 17044,0
4642ro 90
4643va (VaSet
4644vasetType 1
4645fg "0,65535,0"
4646)
4647xt "51250,80625,52000,81375"
4648)
4649tg (CPTG
4650uid 17045,0
4651ps "CptPortTextPlaceStrategy"
4652stg "VerticalLayoutStrategy"
4653f (Text
4654uid 17046,0
4655va (VaSet
4656)
4657xt "53000,80500,59700,81500"
4658st "board_id : (3:0)"
4659blo "53000,81300"
4660)
4661)
4662thePort (LogicalPort
4663decl (Decl
4664n "board_id"
4665t "std_logic_vector"
4666b "(3 DOWNTO 0)"
4667o 10
4668suid 24,0
4669)
4670)
4671)
4672*149 (CptPort
4673uid 17047,0
4674ps "OnEdgeStrategy"
4675shape (Triangle
4676uid 17048,0
4677ro 90
4678va (VaSet
4679vasetType 1
4680fg "0,65535,0"
4681)
4682xt "51250,81625,52000,82375"
4683)
4684tg (CPTG
4685uid 17049,0
4686ps "CptPortTextPlaceStrategy"
4687stg "VerticalLayoutStrategy"
4688f (Text
4689uid 17050,0
4690va (VaSet
4691)
4692xt "53000,81500,59400,82500"
4693st "crate_id : (1:0)"
4694blo "53000,82300"
4695)
4696)
4697thePort (LogicalPort
4698decl (Decl
4699n "crate_id"
4700t "std_logic_vector"
4701b "(1 DOWNTO 0)"
4702o 11
4703suid 25,0
4704)
4705)
4706)
4707*150 (CptPort
4708uid 17051,0
4709ps "OnEdgeStrategy"
4710shape (Triangle
4711uid 17052,0
4712ro 90
4713va (VaSet
4714vasetType 1
4715fg "0,65535,0"
4716)
4717xt "80000,67625,80750,68375"
4718)
4719tg (CPTG
4720uid 17053,0
4721ps "CptPortTextPlaceStrategy"
4722stg "RightVerticalLayoutStrategy"
4723f (Text
4724uid 17054,0
4725va (VaSet
4726)
4727xt "72100,67500,79000,68500"
4728st "wiz_addr : (9:0)"
4729ju 2
4730blo "79000,68300"
4731)
4732)
4733thePort (LogicalPort
4734m 1
4735decl (Decl
4736n "wiz_addr"
4737t "std_logic_vector"
4738b "(9 DOWNTO 0)"
4739o 41
4740suid 26,0
4741)
4742)
4743)
4744*151 (CptPort
4745uid 17055,0
4746ps "OnEdgeStrategy"
4747shape (Diamond
4748uid 17056,0
4749ro 90
4750va (VaSet
4751vasetType 1
4752fg "0,65535,0"
4753)
4754xt "80000,68625,80750,69375"
4755)
4756tg (CPTG
4757uid 17057,0
4758ps "CptPortTextPlaceStrategy"
4759stg "RightVerticalLayoutStrategy"
4760f (Text
4761uid 17058,0
4762va (VaSet
4763)
4764xt "71800,68500,79000,69500"
4765st "wiz_data : (15:0)"
4766ju 2
4767blo "79000,69300"
4768)
4769)
4770thePort (LogicalPort
4771m 2
4772decl (Decl
4773n "wiz_data"
4774t "std_logic_vector"
4775b "(15 DOWNTO 0)"
4776o 47
4777suid 27,0
4778)
4779)
4780)
4781*152 (CptPort
4782uid 17059,0
4783ps "OnEdgeStrategy"
4784shape (Triangle
4785uid 17060,0
4786ro 90
4787va (VaSet
4788vasetType 1
4789fg "0,65535,0"
4790)
4791xt "80000,74625,80750,75375"
4792)
4793tg (CPTG
4794uid 17061,0
4795ps "CptPortTextPlaceStrategy"
4796stg "RightVerticalLayoutStrategy"
4797f (Text
4798uid 17062,0
4799va (VaSet
4800)
4801xt "76000,74500,79000,75500"
4802st "wiz_cs"
4803ju 2
4804blo "79000,75300"
4805)
4806)
4807thePort (LogicalPort
4808m 1
4809decl (Decl
4810n "wiz_cs"
4811t "std_logic"
4812o 42
4813suid 28,0
4814i "'1'"
4815)
4816)
4817)
4818*153 (CptPort
4819uid 17063,0
4820ps "OnEdgeStrategy"
4821shape (Triangle
4822uid 17064,0
4823ro 90
4824va (VaSet
4825vasetType 1
4826fg "0,65535,0"
4827)
4828xt "80000,72625,80750,73375"
4829)
4830tg (CPTG
4831uid 17065,0
4832ps "CptPortTextPlaceStrategy"
4833stg "RightVerticalLayoutStrategy"
4834f (Text
4835uid 17066,0
4836va (VaSet
4837)
4838xt "75800,72500,79000,73500"
4839st "wiz_wr"
4840ju 2
4841blo "79000,73300"
4842)
4843)
4844thePort (LogicalPort
4845m 1
4846decl (Decl
4847n "wiz_wr"
4848t "std_logic"
4849o 45
4850suid 29,0
4851i "'1'"
4852)
4853)
4854)
4855*154 (CptPort
4856uid 17067,0
4857ps "OnEdgeStrategy"
4858shape (Triangle
4859uid 17068,0
4860ro 90
4861va (VaSet
4862vasetType 1
4863fg "0,65535,0"
4864)
4865xt "80000,71625,80750,72375"
4866)
4867tg (CPTG
4868uid 17069,0
4869ps "CptPortTextPlaceStrategy"
4870stg "RightVerticalLayoutStrategy"
4871f (Text
4872uid 17070,0
4873va (VaSet
4874)
4875xt "75900,71500,79000,72500"
4876st "wiz_rd"
4877ju 2
4878blo "79000,72300"
4879)
4880)
4881thePort (LogicalPort
4882m 1
4883decl (Decl
4884n "wiz_rd"
4885t "std_logic"
4886o 43
4887suid 30,0
4888i "'1'"
4889)
4890)
4891)
4892*155 (CptPort
4893uid 17071,0
4894ps "OnEdgeStrategy"
4895shape (Triangle
4896uid 17072,0
4897ro 270
4898va (VaSet
4899vasetType 1
4900fg "0,65535,0"
4901)
4902xt "80000,73625,80750,74375"
4903)
4904tg (CPTG
4905uid 17073,0
4906ps "CptPortTextPlaceStrategy"
4907stg "RightVerticalLayoutStrategy"
4908f (Text
4909uid 17074,0
4910va (VaSet
4911)
4912xt "75800,73500,79000,74500"
4913st "wiz_int"
4914ju 2
4915blo "79000,74300"
4916)
4917)
4918thePort (LogicalPort
4919decl (Decl
4920n "wiz_int"
4921t "std_logic"
4922o 15
4923suid 31,0
4924)
4925)
4926)
4927*156 (CptPort
4928uid 17075,0
4929ps "OnEdgeStrategy"
4930shape (Triangle
4931uid 17076,0
4932ro 270
4933va (VaSet
4934vasetType 1
4935fg "0,65535,0"
4936)
4937xt "51250,73625,52000,74375"
4938)
4939tg (CPTG
4940uid 17077,0
4941ps "CptPortTextPlaceStrategy"
4942stg "VerticalLayoutStrategy"
4943f (Text
4944uid 17078,0
4945va (VaSet
4946)
4947xt "53000,73500,57800,74500"
4948st "CLK_25_PS"
4949blo "53000,74300"
4950)
4951)
4952thePort (LogicalPort
4953m 1
4954decl (Decl
4955n "CLK_25_PS"
4956t "std_logic"
4957o 17
4958suid 35,0
4959)
4960)
4961)
4962*157 (CptPort
4963uid 17079,0
4964ps "OnEdgeStrategy"
4965shape (Triangle
4966uid 17080,0
4967ro 90
4968va (VaSet
4969vasetType 1
4970fg "0,65535,0"
4971)
4972xt "80000,115625,80750,116375"
4973)
4974tg (CPTG
4975uid 17081,0
4976ps "CptPortTextPlaceStrategy"
4977stg "RightVerticalLayoutStrategy"
4978f (Text
4979uid 17082,0
4980va (VaSet
4981)
4982xt "75700,115500,79000,116500"
4983st "CLK_50"
4984ju 2
4985blo "79000,116300"
4986)
4987)
4988thePort (LogicalPort
4989m 1
4990decl (Decl
4991n "CLK_50"
4992t "std_logic"
4993preAdd 0
4994posAdd 0
4995o 18
4996suid 37,0
4997)
4998)
4999)
5000*158 (CptPort
5001uid 17083,0
5002ps "OnEdgeStrategy"
5003shape (Triangle
5004uid 17084,0
5005ro 90
5006va (VaSet
5007vasetType 1
5008fg "0,65535,0"
5009)
5010xt "51250,67625,52000,68375"
5011)
5012tg (CPTG
5013uid 17085,0
5014ps "CptPortTextPlaceStrategy"
5015stg "VerticalLayoutStrategy"
5016f (Text
5017uid 17086,0
5018va (VaSet
5019)
5020xt "53000,67500,54900,68500"
5021st "CLK"
5022blo "53000,68300"
5023)
5024)
5025thePort (LogicalPort
5026decl (Decl
5027n "CLK"
5028t "std_logic"
5029o 1
5030suid 38,0
5031)
5032)
5033)
5034*159 (CptPort
5035uid 17087,0
5036ps "OnEdgeStrategy"
5037shape (Triangle
5038uid 17088,0
5039ro 90
5040va (VaSet
5041vasetType 1
5042fg "0,65535,0"
5043)
5044xt "51250,88625,52000,89375"
5045)
5046tg (CPTG
5047uid 17089,0
5048ps "CptPortTextPlaceStrategy"
5049stg "VerticalLayoutStrategy"
5050f (Text
5051uid 17090,0
5052va (VaSet
5053)
5054xt "53000,88500,62300,89500"
5055st "adc_otr_array : (3:0)"
5056blo "53000,89300"
5057)
5058)
5059thePort (LogicalPort
5060decl (Decl
5061n "adc_otr_array"
5062t "std_logic_vector"
5063b "(3 DOWNTO 0)"
5064o 9
5065suid 40,0
5066)
5067)
5068)
5069*160 (CptPort
5070uid 17091,0
5071ps "OnEdgeStrategy"
5072shape (Triangle
5073uid 17092,0
5074ro 90
5075va (VaSet
5076vasetType 1
5077fg "0,65535,0"
5078)
5079xt "51250,94625,52000,95375"
5080)
5081tg (CPTG
5082uid 17093,0
5083ps "CptPortTextPlaceStrategy"
5084stg "VerticalLayoutStrategy"
5085f (Text
5086uid 17094,0
5087va (VaSet
5088)
5089xt "53000,94500,59900,95500"
5090st "adc_data_array"
5091blo "53000,95300"
5092)
5093)
5094thePort (LogicalPort
5095decl (Decl
5096n "adc_data_array"
5097t "adc_data_array_type"
5098o 8
5099suid 41,0
5100)
5101)
5102)
5103*161 (CptPort
5104uid 17095,0
5105ps "OnEdgeStrategy"
5106shape (Triangle
5107uid 17096,0
5108ro 270
5109va (VaSet
5110vasetType 1
5111fg "0,65535,0"
5112)
5113xt "51250,108625,52000,109375"
5114)
5115tg (CPTG
5116uid 17097,0
5117ps "CptPortTextPlaceStrategy"
5118stg "VerticalLayoutStrategy"
5119f (Text
5120uid 17098,0
5121va (VaSet
5122)
5123xt "53000,108500,62500,109500"
5124st "drs_channel_id : (3:0)"
5125blo "53000,109300"
5126)
5127)
5128thePort (LogicalPort
5129m 1
5130decl (Decl
5131n "drs_channel_id"
5132t "std_logic_vector"
5133b "(3 downto 0)"
5134o 32
5135suid 48,0
5136i "(others => '0')"
5137)
5138)
5139)
5140*162 (CptPort
5141uid 17099,0
5142ps "OnEdgeStrategy"
5143shape (Triangle
5144uid 17100,0
5145ro 270
5146va (VaSet
5147vasetType 1
5148fg "0,65535,0"
5149)
5150xt "51250,109625,52000,110375"
5151)
5152tg (CPTG
5153uid 17101,0
5154ps "CptPortTextPlaceStrategy"
5155stg "VerticalLayoutStrategy"
5156f (Text
5157uid 17102,0
5158va (VaSet
5159)
5160xt "53000,109500,58200,110500"
5161st "drs_dwrite"
5162blo "53000,110300"
5163)
5164)
5165thePort (LogicalPort
5166m 1
5167decl (Decl
5168n "drs_dwrite"
5169t "std_logic"
5170o 33
5171suid 49,0
5172i "'1'"
5173)
5174)
5175)
5176*163 (CptPort
5177uid 17103,0
5178ps "OnEdgeStrategy"
5179shape (Triangle
5180uid 17104,0
5181ro 90
5182va (VaSet
5183vasetType 1
5184fg "0,65535,0"
5185)
5186xt "51250,104625,52000,105375"
5187)
5188tg (CPTG
5189uid 17105,0
5190ps "CptPortTextPlaceStrategy"
5191stg "VerticalLayoutStrategy"
5192f (Text
5193uid 17106,0
5194va (VaSet
5195)
5196xt "53000,104500,58800,105500"
5197st "SROUT_in_0"
5198blo "53000,105300"
5199)
5200)
5201thePort (LogicalPort
5202decl (Decl
5203n "SROUT_in_0"
5204t "std_logic"
5205o 4
5206suid 52,0
5207)
5208)
5209)
5210*164 (CptPort
5211uid 17107,0
5212ps "OnEdgeStrategy"
5213shape (Triangle
5214uid 17108,0
5215ro 90
5216va (VaSet
5217vasetType 1
5218fg "0,65535,0"
5219)
5220xt "51250,105625,52000,106375"
5221)
5222tg (CPTG
5223uid 17109,0
5224ps "CptPortTextPlaceStrategy"
5225stg "VerticalLayoutStrategy"
5226f (Text
5227uid 17110,0
5228va (VaSet
5229)
5230xt "53000,105500,58700,106500"
5231st "SROUT_in_1"
5232blo "53000,106300"
5233)
5234)
5235thePort (LogicalPort
5236decl (Decl
5237n "SROUT_in_1"
5238t "std_logic"
5239o 5
5240suid 53,0
5241)
5242)
5243)
5244*165 (CptPort
5245uid 17111,0
5246ps "OnEdgeStrategy"
5247shape (Triangle
5248uid 17112,0
5249ro 90
5250va (VaSet
5251vasetType 1
5252fg "0,65535,0"
5253)
5254xt "51250,106625,52000,107375"
5255)
5256tg (CPTG
5257uid 17113,0
5258ps "CptPortTextPlaceStrategy"
5259stg "VerticalLayoutStrategy"
5260f (Text
5261uid 17114,0
5262va (VaSet
5263)
5264xt "53000,106500,58800,107500"
5265st "SROUT_in_2"
5266blo "53000,107300"
5267)
5268)
5269thePort (LogicalPort
5270decl (Decl
5271n "SROUT_in_2"
5272t "std_logic"
5273o 6
5274suid 54,0
5275)
5276)
5277)
5278*166 (CptPort
5279uid 17115,0
5280ps "OnEdgeStrategy"
5281shape (Triangle
5282uid 17116,0
5283ro 90
5284va (VaSet
5285vasetType 1
5286fg "0,65535,0"
5287)
5288xt "51250,107625,52000,108375"
5289)
5290tg (CPTG
5291uid 17117,0
5292ps "CptPortTextPlaceStrategy"
5293stg "VerticalLayoutStrategy"
5294f (Text
5295uid 17118,0
5296va (VaSet
5297)
5298xt "53000,107500,58800,108500"
5299st "SROUT_in_3"
5300blo "53000,108300"
5301)
5302)
5303thePort (LogicalPort
5304decl (Decl
5305n "SROUT_in_3"
5306t "std_logic"
5307o 7
5308suid 55,0
5309)
5310)
5311)
5312*167 (CptPort
5313uid 17119,0
5314ps "OnEdgeStrategy"
5315shape (Triangle
5316uid 17120,0
5317ro 270
5318va (VaSet
5319vasetType 1
5320fg "0,65535,0"
5321)
5322xt "51250,110625,52000,111375"
5323)
5324tg (CPTG
5325uid 17121,0
5326ps "CptPortTextPlaceStrategy"
5327stg "VerticalLayoutStrategy"
5328f (Text
5329uid 17122,0
5330va (VaSet
5331)
5332xt "53000,110500,57200,111500"
5333st "RSRLOAD"
5334blo "53000,111300"
5335)
5336)
5337thePort (LogicalPort
5338m 1
5339decl (Decl
5340n "RSRLOAD"
5341t "std_logic"
5342o 22
5343suid 56,0
5344i "'0'"
5345)
5346)
5347)
5348*168 (CptPort
5349uid 17123,0
5350ps "OnEdgeStrategy"
5351shape (Triangle
5352uid 17124,0
5353ro 270
5354va (VaSet
5355vasetType 1
5356fg "0,65535,0"
5357)
5358xt "51250,112625,52000,113375"
5359)
5360tg (CPTG
5361uid 17125,0
5362ps "CptPortTextPlaceStrategy"
5363stg "VerticalLayoutStrategy"
5364f (Text
5365uid 17126,0
5366va (VaSet
5367)
5368xt "53000,112500,55900,113500"
5369st "SRCLK"
5370blo "53000,113300"
5371)
5372)
5373thePort (LogicalPort
5374m 1
5375decl (Decl
5376n "SRCLK"
5377t "std_logic"
5378o 23
5379suid 57,0
5380i "'0'"
5381)
5382)
5383)
5384*169 (CptPort
5385uid 17127,0
5386ps "OnEdgeStrategy"
5387shape (Triangle
5388uid 17128,0
5389ro 90
5390va (VaSet
5391vasetType 1
5392fg "0,65535,0"
5393)
5394xt "80000,97625,80750,98375"
5395)
5396tg (CPTG
5397uid 17129,0
5398ps "CptPortTextPlaceStrategy"
5399stg "RightVerticalLayoutStrategy"
5400f (Text
5401uid 17130,0
5402va (VaSet
5403)
5404xt "77100,97500,79000,98500"
5405st "sclk"
5406ju 2
5407blo "79000,98300"
5408)
5409)
5410thePort (LogicalPort
5411m 1
5412decl (Decl
5413n "sclk"
5414t "std_logic"
5415o 38
5416suid 62,0
5417)
5418)
5419)
5420*170 (CptPort
5421uid 17131,0
5422ps "OnEdgeStrategy"
5423shape (Diamond
5424uid 17132,0
5425ro 90
5426va (VaSet
5427vasetType 1
5428fg "0,65535,0"
5429)
5430xt "80000,98625,80750,99375"
5431)
5432tg (CPTG
5433uid 17133,0
5434ps "CptPortTextPlaceStrategy"
5435stg "RightVerticalLayoutStrategy"
5436f (Text
5437uid 17134,0
5438va (VaSet
5439)
5440xt "77600,98500,79000,99500"
5441st "sio"
5442ju 2
5443blo "79000,99300"
5444)
5445)
5446thePort (LogicalPort
5447m 2
5448decl (Decl
5449n "sio"
5450t "std_logic"
5451preAdd 0
5452posAdd 0
5453o 46
5454suid 63,0
5455)
5456)
5457)
5458*171 (CptPort
5459uid 17135,0
5460ps "OnEdgeStrategy"
5461shape (Triangle
5462uid 17136,0
5463ro 90
5464va (VaSet
5465vasetType 1
5466fg "0,65535,0"
5467)
5468xt "80000,86625,80750,87375"
5469)
5470tg (CPTG
5471uid 17137,0
5472ps "CptPortTextPlaceStrategy"
5473stg "RightVerticalLayoutStrategy"
5474f (Text
5475uid 17138,0
5476va (VaSet
5477)
5478xt "76000,86500,79000,87500"
5479st "dac_cs"
5480ju 2
5481blo "79000,87300"
5482)
5483)
5484thePort (LogicalPort
5485m 1
5486decl (Decl
5487n "dac_cs"
5488t "std_logic"
5489o 30
5490suid 64,0
5491)
5492)
5493)
5494*172 (CptPort
5495uid 17139,0
5496ps "OnEdgeStrategy"
5497shape (Triangle
5498uid 17140,0
5499ro 90
5500va (VaSet
5501vasetType 1
5502fg "0,65535,0"
5503)
5504xt "80000,88625,80750,89375"
5505)
5506tg (CPTG
5507uid 17141,0
5508ps "CptPortTextPlaceStrategy"
5509stg "RightVerticalLayoutStrategy"
5510f (Text
5511uid 17142,0
5512va (VaSet
5513)
5514xt "72000,88500,79000,89500"
5515st "sensor_cs : (3:0)"
5516ju 2
5517blo "79000,89300"
5518)
5519)
5520thePort (LogicalPort
5521m 1
5522decl (Decl
5523n "sensor_cs"
5524t "std_logic_vector"
5525b "(3 DOWNTO 0)"
5526o 39
5527suid 65,0
5528)
5529)
5530)
5531*173 (CptPort
5532uid 17143,0
5533ps "OnEdgeStrategy"
5534shape (Triangle
5535uid 17144,0
5536ro 90
5537va (VaSet
5538vasetType 1
5539fg "0,65535,0"
5540)
5541xt "80000,99625,80750,100375"
5542)
5543tg (CPTG
5544uid 17145,0
5545ps "CptPortTextPlaceStrategy"
5546stg "RightVerticalLayoutStrategy"
5547f (Text
5548uid 17146,0
5549va (VaSet
5550)
5551xt "77000,99500,79000,100500"
5552st "mosi"
5553ju 2
5554blo "79000,100300"
5555)
5556)
5557thePort (LogicalPort
5558m 1
5559decl (Decl
5560n "mosi"
5561t "std_logic"
5562o 36
5563suid 66,0
5564i "'0'"
5565)
5566)
5567)
5568*174 (CptPort
5569uid 17147,0
5570ps "OnEdgeStrategy"
5571shape (Triangle
5572uid 17148,0
5573ro 90
5574va (VaSet
5575vasetType 1
5576fg "0,65535,0"
5577)
5578xt "80000,120625,80750,121375"
5579)
5580tg (CPTG
5581uid 17149,0
5582ps "CptPortTextPlaceStrategy"
5583stg "RightVerticalLayoutStrategy"
5584f (Text
5585uid 17150,0
5586va (VaSet
5587)
5588xt "75800,120500,79000,121500"
5589st "denable"
5590ju 2
5591blo "79000,121300"
5592)
5593)
5594thePort (LogicalPort
5595m 1
5596decl (Decl
5597n "denable"
5598t "std_logic"
5599eolc "-- default domino wave off"
5600posAdd 0
5601o 31
5602suid 67,0
5603i "'0'"
5604)
5605)
5606)
5607*175 (CptPort
5608uid 17151,0
5609ps "OnEdgeStrategy"
5610shape (Triangle
5611uid 17152,0
5612ro 90
5613va (VaSet
5614vasetType 1
5615fg "0,65535,0"
5616)
5617xt "80000,139625,80750,140375"
5618)
5619tg (CPTG
5620uid 17153,0
5621ps "CptPortTextPlaceStrategy"
5622stg "RightVerticalLayoutStrategy"
5623f (Text
5624uid 17154,0
5625va (VaSet
5626)
5627xt "74800,139500,79000,140500"
5628st "SRIN_out"
5629ju 2
5630blo "79000,140300"
5631)
5632)
5633thePort (LogicalPort
5634m 1
5635decl (Decl
5636n "SRIN_out"
5637t "std_logic"
5638o 24
5639suid 85,0
5640i "'0'"
5641)
5642)
5643)
5644*176 (CptPort
5645uid 17155,0
5646ps "OnEdgeStrategy"
5647shape (Triangle
5648uid 17156,0
5649ro 90
5650va (VaSet
5651vasetType 1
5652fg "0,65535,0"
5653)
5654xt "80000,141625,80750,142375"
5655)
5656tg (CPTG
5657uid 17157,0
5658ps "CptPortTextPlaceStrategy"
5659stg "RightVerticalLayoutStrategy"
5660f (Text
5661uid 17158,0
5662va (VaSet
5663)
5664xt "76600,141500,79000,142500"
5665st "green"
5666ju 2
5667blo "79000,142300"
5668)
5669)
5670thePort (LogicalPort
5671m 1
5672decl (Decl
5673n "green"
5674t "std_logic"
5675o 34
5676suid 86,0
5677)
5678)
5679)
5680*177 (CptPort
5681uid 17159,0
5682ps "OnEdgeStrategy"
5683shape (Triangle
5684uid 17160,0
5685ro 90
5686va (VaSet
5687vasetType 1
5688fg "0,65535,0"
5689)
5690xt "80000,140625,80750,141375"
5691)
5692tg (CPTG
5693uid 17161,0
5694ps "CptPortTextPlaceStrategy"
5695stg "RightVerticalLayoutStrategy"
5696f (Text
5697uid 17162,0
5698va (VaSet
5699)
5700xt "76300,140500,79000,141500"
5701st "amber"
5702ju 2
5703blo "79000,141300"
5704)
5705)
5706thePort (LogicalPort
5707m 1
5708decl (Decl
5709n "amber"
5710t "std_logic"
5711o 28
5712suid 87,0
5713)
5714)
5715)
5716*178 (CptPort
5717uid 17163,0
5718ps "OnEdgeStrategy"
5719shape (Triangle
5720uid 17164,0
5721ro 90
5722va (VaSet
5723vasetType 1
5724fg "0,65535,0"
5725)
5726xt "80000,142625,80750,143375"
5727)
5728tg (CPTG
5729uid 17165,0
5730ps "CptPortTextPlaceStrategy"
5731stg "RightVerticalLayoutStrategy"
5732f (Text
5733uid 17166,0
5734va (VaSet
5735)
5736xt "77300,142500,79000,143500"
5737st "red"
5738ju 2
5739blo "79000,143300"
5740)
5741)
5742thePort (LogicalPort
5743m 1
5744decl (Decl
5745n "red"
5746t "std_logic"
5747o 37
5748suid 88,0
5749)
5750)
5751)
5752*179 (CptPort
5753uid 17167,0
5754ps "OnEdgeStrategy"
5755shape (Triangle
5756uid 17168,0
5757ro 90
5758va (VaSet
5759vasetType 1
5760fg "0,65535,0"
5761)
5762xt "51250,131625,52000,132375"
5763)
5764tg (CPTG
5765uid 17169,0
5766ps "CptPortTextPlaceStrategy"
5767stg "VerticalLayoutStrategy"
5768f (Text
5769uid 17170,0
5770va (VaSet
5771)
5772xt "53000,131500,58500,132500"
5773st "D_T_in : (1:0)"
5774blo "53000,132300"
5775)
5776)
5777thePort (LogicalPort
5778decl (Decl
5779n "D_T_in"
5780t "std_logic_vector"
5781b "(1 DOWNTO 0)"
5782o 2
5783suid 91,0
5784)
5785)
5786)
5787*180 (CptPort
5788uid 17171,0
5789ps "OnEdgeStrategy"
5790shape (Triangle
5791uid 17172,0
5792ro 90
5793va (VaSet
5794vasetType 1
5795fg "0,65535,0"
5796)
5797xt "51250,132625,52000,133375"
5798)
5799tg (CPTG
5800uid 17173,0
5801ps "CptPortTextPlaceStrategy"
5802stg "VerticalLayoutStrategy"
5803f (Text
5804uid 17174,0
5805va (VaSet
5806)
5807xt "53000,132500,59100,133500"
5808st "drs_refclk_in"
5809blo "53000,133300"
5810)
5811)
5812thePort (LogicalPort
5813decl (Decl
5814n "drs_refclk_in"
5815t "std_logic"
5816eolc "-- used to check if DRS REFCLK exsists, if not DENABLE inhibit"
5817o 12
5818suid 92,0
5819)
5820)
5821)
5822*181 (CptPort
5823uid 17175,0
5824ps "OnEdgeStrategy"
5825shape (Triangle
5826uid 17176,0
5827ro 90
5828va (VaSet
5829vasetType 1
5830fg "0,65535,0"
5831)
5832xt "51250,136625,52000,137375"
5833)
5834tg (CPTG
5835uid 17177,0
5836ps "CptPortTextPlaceStrategy"
5837stg "VerticalLayoutStrategy"
5838f (Text
5839uid 17178,0
5840va (VaSet
5841)
5842xt "53000,136500,59700,137500"
5843st "plllock_in : (3:0)"
5844blo "53000,137300"
5845)
5846)
5847thePort (LogicalPort
5848decl (Decl
5849n "plllock_in"
5850t "std_logic_vector"
5851b "(3 DOWNTO 0)"
5852eolc "-- high level, if dominowave is running and DRS PLL locked"
5853o 13
5854suid 93,0
5855)
5856)
5857)
5858*182 (CptPort
5859uid 17179,0
5860ps "OnEdgeStrategy"
5861shape (Triangle
5862uid 17180,0
5863ro 90
5864va (VaSet
5865vasetType 1
5866fg "0,65535,0"
5867)
5868xt "80000,131625,80750,132375"
5869)
5870tg (CPTG
5871uid 17181,0
5872ps "CptPortTextPlaceStrategy"
5873stg "RightVerticalLayoutStrategy"
5874f (Text
5875uid 17182,0
5876va (VaSet
5877)
5878xt "69400,131500,79000,132500"
5879st "counter_result : (11:0)"
5880ju 2
5881blo "79000,132300"
5882)
5883)
5884thePort (LogicalPort
5885m 1
5886decl (Decl
5887n "counter_result"
5888t "std_logic_vector"
5889b "(11 DOWNTO 0)"
5890o 29
5891suid 94,0
5892)
5893)
5894)
5895*183 (CptPort
5896uid 17183,0
5897ps "OnEdgeStrategy"
5898shape (Triangle
5899uid 17184,0
5900ro 90
5901va (VaSet
5902vasetType 1
5903fg "0,65535,0"
5904)
5905xt "80000,129625,80750,130375"
5906)
5907tg (CPTG
5908uid 17185,0
5909ps "CptPortTextPlaceStrategy"
5910stg "RightVerticalLayoutStrategy"
5911f (Text
5912uid 17186,0
5913va (VaSet
5914)
5915xt "69000,129500,79000,130500"
5916st "alarm_refclk_too_high"
5917ju 2
5918blo "79000,130300"
5919)
5920)
5921thePort (LogicalPort
5922m 1
5923decl (Decl
5924n "alarm_refclk_too_high"
5925t "std_logic"
5926o 26
5927suid 95,0
5928)
5929)
5930)
5931*184 (CptPort
5932uid 17187,0
5933ps "OnEdgeStrategy"
5934shape (Triangle
5935uid 17188,0
5936ro 90
5937va (VaSet
5938vasetType 1
5939fg "0,65535,0"
5940)
5941xt "80000,130625,80750,131375"
5942)
5943tg (CPTG
5944uid 17189,0
5945ps "CptPortTextPlaceStrategy"
5946stg "RightVerticalLayoutStrategy"
5947f (Text
5948uid 17190,0
5949va (VaSet
5950)
5951xt "69400,130500,79000,131500"
5952st "alarm_refclk_too_low"
5953ju 2
5954blo "79000,131300"
5955)
5956)
5957thePort (LogicalPort
5958m 1
5959decl (Decl
5960n "alarm_refclk_too_low"
5961t "std_logic"
5962posAdd 0
5963o 27
5964suid 96,0
5965)
5966)
5967)
5968*185 (CptPort
5969uid 17191,0
5970ps "OnEdgeStrategy"
5971shape (Triangle
5972uid 17192,0
5973ro 270
5974va (VaSet
5975vasetType 1
5976fg "0,65535,0"
5977)
5978xt "51250,70625,52000,71375"
5979)
5980tg (CPTG
5981uid 17193,0
5982ps "CptPortTextPlaceStrategy"
5983stg "VerticalLayoutStrategy"
5984f (Text
5985uid 17194,0
5986va (VaSet
5987)
5988xt "53000,70500,57000,71500"
5989st "ADC_CLK"
5990blo "53000,71300"
5991)
5992)
5993thePort (LogicalPort
5994lang 2
5995m 1
5996decl (Decl
5997n "ADC_CLK"
5998t "std_logic"
5999o 16
6000suid 97,0
6001)
6002)
6003)
6004*186 (CptPort
6005uid 17620,0
6006ps "OnEdgeStrategy"
6007shape (Triangle
6008uid 17621,0
6009ro 90
6010va (VaSet
6011vasetType 1
6012fg "0,65535,0"
6013)
6014xt "80000,143625,80750,144375"
6015)
6016tg (CPTG
6017uid 17622,0
6018ps "CptPortTextPlaceStrategy"
6019stg "RightVerticalLayoutStrategy"
6020f (Text
6021uid 17623,0
6022va (VaSet
6023)
6024xt "73400,143500,79000,144500"
6025st "trigger_veto"
6026ju 2
6027blo "79000,144300"
6028)
6029)
6030thePort (LogicalPort
6031m 1
6032decl (Decl
6033n "trigger_veto"
6034t "std_logic"
6035o 40
6036suid 98,0
6037i "'1'"
6038)
6039)
6040)
6041*187 (CptPort
6042uid 17711,0
6043ps "OnEdgeStrategy"
6044shape (Triangle
6045uid 17712,0
6046ro 270
6047va (VaSet
6048vasetType 1
6049fg "0,65535,0"
6050)
6051xt "80000,149625,80750,150375"
6052)
6053tg (CPTG
6054uid 17713,0
6055ps "CptPortTextPlaceStrategy"
6056stg "RightVerticalLayoutStrategy"
6057f (Text
6058uid 17714,0
6059va (VaSet
6060)
6061xt "70900,149500,79000,150500"
6062st "FTM_RS485_rx_d"
6063ju 2
6064blo "79000,150300"
6065)
6066)
6067thePort (LogicalPort
6068decl (Decl
6069n "FTM_RS485_rx_d"
6070t "std_logic"
6071o 3
6072suid 99,0
6073)
6074)
6075)
6076*188 (CptPort
6077uid 17715,0
6078ps "OnEdgeStrategy"
6079shape (Triangle
6080uid 17716,0
6081ro 90
6082va (VaSet
6083vasetType 1
6084fg "0,65535,0"
6085)
6086xt "80000,147625,80750,148375"
6087)
6088tg (CPTG
6089uid 17717,0
6090ps "CptPortTextPlaceStrategy"
6091stg "RightVerticalLayoutStrategy"
6092f (Text
6093uid 17718,0
6094va (VaSet
6095)
6096xt "70600,147500,79000,148500"
6097st "FTM_RS485_rx_en"
6098ju 2
6099blo "79000,148300"
6100)
6101)
6102thePort (LogicalPort
6103m 1
6104decl (Decl
6105n "FTM_RS485_rx_en"
6106t "std_logic"
6107o 19
6108suid 101,0
6109)
6110)
6111)
6112*189 (CptPort
6113uid 17719,0
6114ps "OnEdgeStrategy"
6115shape (Triangle
6116uid 17720,0
6117ro 90
6118va (VaSet
6119vasetType 1
6120fg "0,65535,0"
6121)
6122xt "80000,148625,80750,149375"
6123)
6124tg (CPTG
6125uid 17721,0
6126ps "CptPortTextPlaceStrategy"
6127stg "RightVerticalLayoutStrategy"
6128f (Text
6129uid 17722,0
6130va (VaSet
6131)
6132xt "70900,148500,79000,149500"
6133st "FTM_RS485_tx_d"
6134ju 2
6135blo "79000,149300"
6136)
6137)
6138thePort (LogicalPort
6139m 1
6140decl (Decl
6141n "FTM_RS485_tx_d"
6142t "std_logic"
6143o 20
6144suid 100,0
6145)
6146)
6147)
6148*190 (CptPort
6149uid 17723,0
6150ps "OnEdgeStrategy"
6151shape (Triangle
6152uid 17724,0
6153ro 90
6154va (VaSet
6155vasetType 1
6156fg "0,65535,0"
6157)
6158xt "80000,146625,80750,147375"
6159)
6160tg (CPTG
6161uid 17725,0
6162ps "CptPortTextPlaceStrategy"
6163stg "RightVerticalLayoutStrategy"
6164f (Text
6165uid 17726,0
6166va (VaSet
6167)
6168xt "70600,146500,79000,147500"
6169st "FTM_RS485_tx_en"
6170ju 2
6171blo "79000,147300"
6172)
6173)
6174thePort (LogicalPort
6175m 1
6176decl (Decl
6177n "FTM_RS485_tx_en"
6178t "std_logic"
6179o 21
6180suid 102,0
6181)
6182)
6183)
6184]
6185shape (Rectangle
6186uid 17196,0
6187va (VaSet
6188vasetType 1
6189fg "0,65535,0"
6190lineColor "0,32896,0"
6191lineWidth 2
6192)
6193xt "52000,66000,80000,151000"
6194)
6195oxt "15000,-8000,43000,70000"
6196ttg (MlTextGroup
6197uid 17197,0
6198ps "CenterOffsetStrategy"
6199stg "VerticalLayoutStrategy"
6200textVec [
6201*191 (Text
6202uid 17198,0
6203va (VaSet
6204font "Arial,8,1"
6205)
6206xt "55200,141000,61400,142000"
6207st "FACT_FAD_lib"
6208blo "55200,141800"
6209tm "BdLibraryNameMgr"
6210)
6211*192 (Text
6212uid 17199,0
6213va (VaSet
6214font "Arial,8,1"
6215)
6216xt "55200,142000,59400,143000"
6217st "FAD_main"
6218blo "55200,142800"
6219tm "CptNameMgr"
6220)
6221*193 (Text
6222uid 17200,0
6223va (VaSet
6224font "Arial,8,1"
6225)
6226xt "55200,143000,61000,144000"
6227st "I_board_main"
6228blo "55200,143800"
6229tm "InstanceNameMgr"
6230)
6231]
6232)
6233ga (GenericAssociation
6234uid 17201,0
6235ps "EdgeToEdgeStrategy"
6236matrix (Matrix
6237uid 17202,0
6238text (MLText
6239uid 17203,0
6240va (VaSet
6241font "Courier New,8,0"
6242)
6243xt "52000,65200,81500,66000"
6244st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B    ( integer )  "
6245)
6246header ""
6247)
6248elements [
6249(GiElement
6250name "RAMADDRWIDTH64b"
6251type "integer"
6252value "LOG2_OF_RAM_SIZE_64B"
6253)
6254]
6255)
6256viewicon (ZoomableIcon
6257uid 17204,0
6258sl 0
6259va (VaSet
6260vasetType 1
6261fg "49152,49152,49152"
6262)
6263xt "52250,149250,53750,150750"
6264iconName "BlockDiagram.png"
6265iconMaskName "BlockDiagram.msk"
6266ftype 1
6267)
6268viewiconposition 0
6269portVis (PortSigDisplay
6270)
6271archFileType "UNKNOWN"
6272)
6273*194 (Net
6274uid 17294,0
6275lang 2
6276decl (Decl
6277n "ADC_CLK"
6278t "std_logic"
6279o 61
6280suid 231,0
6281)
6282declText (MLText
6283uid 17295,0
6284va (VaSet
6285font "Courier New,8,0"
6286)
6287xt "39000,46400,61000,47200"
6288st "SIGNAL ADC_CLK               : std_logic
6289"
6290)
6291)
6292*195 (PortIoOut
6293uid 17401,0
6294shape (CompositeShape
6295uid 17402,0
6296va (VaSet
6297vasetType 1
6298fg "0,0,32768"
6299)
6300optionalChildren [
6301(Pentagon
6302uid 17403,0
6303sl 0
6304ro 270
6305xt "87500,143625,89000,144375"
6306)
6307(Line
6308uid 17404,0
6309sl 0
6310ro 270
6311xt "87000,144000,87500,144000"
6312pts [
6313"87000,144000"
6314"87500,144000"
6315]
6316)
6317]
6318)
6319stc 0
6320sf 1
6321tg (WTG
6322uid 17405,0
6323ps "PortIoTextPlaceStrategy"
6324stg "STSignalDisplayStrategy"
6325f (Text
6326uid 17406,0
6327va (VaSet
6328)
6329xt "90000,143500,92900,144500"
6330st "TRG_V"
6331blo "90000,144300"
6332tm "WireNameMgr"
6333)
6334)
6335)
6336*196 (Net
6337uid 17413,0
6338lang 2
6339decl (Decl
6340n "TRG_V"
6341t "std_logic"
6342o 62
6343suid 232,0
6344i "'0'"
6345)
6346declText (MLText
6347uid 17414,0
6348va (VaSet
6349font "Courier New,8,0"
6350)
6351xt "39000,39000,71000,39800"
6352st "TRG_V                 : std_logic                     := '0'
6353"
6354)
6355)
6356*197 (Wire
6357uid 245,0
6358shape (OrthoPolyLine
6359uid 246,0
6360va (VaSet
6361vasetType 3
6362)
6363xt "21000,68000,51250,68000"
6364pts [
6365"51250,68000"
6366"21000,68000"
6367]
6368)
6369start &158
6370end &13
6371sat 32
6372eat 32
6373stc 0
6374st 0
6375sf 1
6376si 0
6377tg (WTG
6378uid 249,0
6379ps "ConnStartEndStrategy"
6380stg "STSignalDisplayStrategy"
6381f (Text
6382uid 250,0
6383va (VaSet
6384isHidden 1
6385)
6386xt "53250,67000,56050,68000"
6387st "X_50M"
6388blo "53250,67800"
6389tm "WireNameMgr"
6390)
6391)
6392on &32
6393)
6394*198 (Wire
6395uid 277,0
6396shape (OrthoPolyLine
6397uid 278,0
6398va (VaSet
6399vasetType 3
6400lineWidth 2
6401)
6402xt "32000,81000,51250,81000"
6403pts [
6404"51250,81000"
6405"32000,81000"
6406]
6407)
6408start &148
6409end &14
6410sat 32
6411eat 2
6412sty 1
6413st 0
6414sf 1
6415si 0
6416tg (WTG
6417uid 281,0
6418ps "ConnStartEndStrategy"
6419stg "STSignalDisplayStrategy"
6420f (Text
6421uid 282,0
6422va (VaSet
6423)
6424xt "44000,80000,49900,81000"
6425st "board_id : (3:0)"
6426blo "44000,80800"
6427tm "WireNameMgr"
6428)
6429)
6430on &18
6431)
6432*199 (Wire
6433uid 285,0
6434shape (OrthoPolyLine
6435uid 286,0
6436va (VaSet
6437vasetType 3
6438lineWidth 2
6439)
6440xt "32000,82000,51250,82000"
6441pts [
6442"51250,82000"
6443"32000,82000"
6444]
6445)
6446start &149
6447end &14
6448sat 32
6449eat 2
6450sty 1
6451st 0
6452sf 1
6453si 0
6454tg (WTG
6455uid 289,0
6456ps "ConnStartEndStrategy"
6457stg "STSignalDisplayStrategy"
6458f (Text
6459uid 290,0
6460va (VaSet
6461)
6462xt "44000,81000,49700,82000"
6463st "crate_id : (1:0)"
6464blo "44000,81800"
6465tm "WireNameMgr"
6466)
6467)
6468on &19
6469)
6470*200 (Wire
6471uid 362,0
6472shape (OrthoPolyLine
6473uid 363,0
6474va (VaSet
6475vasetType 3
6476)
6477xt "21000,90000,51250,90000"
6478pts [
6479"21000,90000"
6480"51250,90000"
6481]
6482)
6483start &39
6484end &147
6485sat 32
6486eat 32
6487stc 0
6488st 0
6489sf 1
6490si 0
6491tg (WTG
6492uid 364,0
6493ps "ConnStartEndStrategy"
6494stg "STSignalDisplayStrategy"
6495f (Text
6496uid 365,0
6497va (VaSet
6498isHidden 1
6499)
6500xt "22000,89000,25600,90000"
6501st "OE_ADC"
6502blo "22000,89800"
6503tm "WireNameMgr"
6504)
6505)
6506on &40
6507)
6508*201 (Wire
6509uid 418,0
6510shape (OrthoPolyLine
6511uid 419,0
6512va (VaSet
6513vasetType 3
6514)
6515xt "80750,71000,90000,71000"
6516pts [
6517"80750,71000"
6518"90000,71000"
6519]
6520)
6521start &144
6522end &20
6523sat 32
6524eat 32
6525stc 0
6526st 0
6527sf 1
6528si 0
6529tg (WTG
6530uid 422,0
6531ps "ConnStartEndStrategy"
6532stg "STSignalDisplayStrategy"
6533f (Text
6534uid 423,0
6535va (VaSet
6536isHidden 1
6537)
6538xt "82000,70000,85100,71000"
6539st "W_RES"
6540blo "82000,70800"
6541tm "WireNameMgr"
6542)
6543)
6544on &72
6545)
6546*202 (Wire
6547uid 426,0
6548shape (OrthoPolyLine
6549uid 427,0
6550va (VaSet
6551vasetType 3
6552lineWidth 2
6553)
6554xt "80750,68000,90000,68000"
6555pts [
6556"80750,68000"
6557"90000,68000"
6558]
6559)
6560start &150
6561end &21
6562sat 32
6563eat 32
6564sty 1
6565stc 0
6566st 0
6567sf 1
6568si 0
6569tg (WTG
6570uid 430,0
6571ps "ConnStartEndStrategy"
6572stg "STSignalDisplayStrategy"
6573f (Text
6574uid 431,0
6575va (VaSet
6576isHidden 1
6577)
6578xt "82000,67000,84000,68000"
6579st "W_A"
6580blo "82000,67800"
6581tm "WireNameMgr"
6582)
6583)
6584on &70
6585)
6586*203 (Wire
6587uid 434,0
6588shape (OrthoPolyLine
6589uid 435,0
6590va (VaSet
6591vasetType 3
6592)
6593xt "80750,75000,90000,75000"
6594pts [
6595"80750,75000"
6596"90000,75000"
6597]
6598)
6599start &152
6600end &22
6601sat 32
6602eat 32
6603stc 0
6604st 0
6605sf 1
6606si 0
6607tg (WTG
6608uid 438,0
6609ps "ConnStartEndStrategy"
6610stg "STSignalDisplayStrategy"
6611f (Text
6612uid 439,0
6613va (VaSet
6614isHidden 1
6615)
6616xt "82000,74000,84600,75000"
6617st "W_CS"
6618blo "82000,74800"
6619tm "WireNameMgr"
6620)
6621)
6622on &76
6623)
6624*204 (Wire
6625uid 442,0
6626shape (OrthoPolyLine
6627uid 443,0
6628va (VaSet
6629vasetType 3
6630lineWidth 2
6631)
6632xt "80750,69000,90000,69000"
6633pts [
6634"80750,69000"
6635"90000,69000"
6636]
6637)
6638start &151
6639end &23
6640sat 32
6641eat 32
6642sty 1
6643stc 0
6644st 0
6645sf 1
6646si 0
6647tg (WTG
6648uid 446,0
6649ps "ConnStartEndStrategy"
6650stg "STSignalDisplayStrategy"
6651f (Text
6652uid 447,0
6653va (VaSet
6654isHidden 1
6655)
6656xt "82000,68000,84100,69000"
6657st "W_D"
6658blo "82000,68800"
6659tm "WireNameMgr"
6660)
6661)
6662on &71
6663)
6664*205 (Wire
6665uid 450,0
6666shape (OrthoPolyLine
6667uid 451,0
6668va (VaSet
6669vasetType 3
6670)
6671xt "80750,74000,90000,74000"
6672pts [
6673"90000,74000"
6674"80750,74000"
6675]
6676)
6677start &24
6678end &155
6679sat 32
6680eat 32
6681stc 0
6682st 0
6683sf 1
6684si 0
6685tg (WTG
6686uid 454,0
6687ps "ConnStartEndStrategy"
6688stg "STSignalDisplayStrategy"
6689f (Text
6690uid 455,0
6691va (VaSet
6692isHidden 1
6693)
6694xt "82000,73000,84800,74000"
6695st "W_INT"
6696blo "82000,73800"
6697tm "WireNameMgr"
6698)
6699)
6700on &75
6701)
6702*206 (Wire
6703uid 458,0
6704shape (OrthoPolyLine
6705uid 459,0
6706va (VaSet
6707vasetType 3
6708)
6709xt "80750,72000,90000,72000"
6710pts [
6711"80750,72000"
6712"90000,72000"
6713]
6714)
6715start &154
6716end &25
6717sat 32
6718eat 32
6719stc 0
6720st 0
6721sf 1
6722si 0
6723tg (WTG
6724uid 462,0
6725ps "ConnStartEndStrategy"
6726stg "STSignalDisplayStrategy"
6727f (Text
6728uid 463,0
6729va (VaSet
6730isHidden 1
6731)
6732xt "82000,71000,84700,72000"
6733st "W_RD"
6734blo "82000,71800"
6735tm "WireNameMgr"
6736)
6737)
6738on &73
6739)
6740*207 (Wire
6741uid 466,0
6742shape (OrthoPolyLine
6743uid 467,0
6744va (VaSet
6745vasetType 3
6746)
6747xt "80750,73000,90000,73000"
6748pts [
6749"80750,73000"
6750"90000,73000"
6751]
6752)
6753start &153
6754end &26
6755sat 32
6756eat 32
6757stc 0
6758st 0
6759sf 1
6760si 0
6761tg (WTG
6762uid 470,0
6763ps "ConnStartEndStrategy"
6764stg "STSignalDisplayStrategy"
6765f (Text
6766uid 471,0
6767va (VaSet
6768isHidden 1
6769)
6770xt "82000,72000,84800,73000"
6771st "W_WR"
6772blo "82000,72800"
6773tm "WireNameMgr"
6774)
6775)
6776on &74
6777)
6778*208 (Wire
6779uid 1467,0
6780shape (OrthoPolyLine
6781uid 1468,0
6782va (VaSet
6783vasetType 3
6784)
6785xt "30000,95000,51250,95000"
6786pts [
6787"30000,95000"
6788"41000,95000"
6789"51250,95000"
6790]
6791)
6792start &43
6793end &160
6794sat 2
6795eat 32
6796st 0
6797sf 1
6798si 0
6799tg (WTG
6800uid 1471,0
6801ps "ConnStartEndStrategy"
6802stg "STSignalDisplayStrategy"
6803f (Text
6804uid 1472,0
6805va (VaSet
6806)
6807xt "32000,94000,37900,95000"
6808st "adc_data_array"
6809blo "32000,94800"
6810tm "WireNameMgr"
6811)
6812)
6813on &27
6814)
6815*209 (Wire
6816uid 1730,0
6817shape (OrthoPolyLine
6818uid 1731,0
6819va (VaSet
6820vasetType 3
6821lineWidth 2
6822)
6823xt "21000,89000,51250,89000"
6824pts [
6825"21000,89000"
6826"51250,89000"
6827]
6828)
6829start &41
6830end &159
6831sat 32
6832eat 32
6833sty 1
6834stc 0
6835st 0
6836sf 1
6837si 0
6838tg (WTG
6839uid 1734,0
6840ps "ConnStartEndStrategy"
6841stg "STSignalDisplayStrategy"
6842f (Text
6843uid 1735,0
6844va (VaSet
6845isHidden 1
6846)
6847xt "22000,88000,25000,89000"
6848st "A_OTR"
6849blo "22000,88800"
6850tm "WireNameMgr"
6851)
6852)
6853on &42
6854)
6855*210 (Wire
6856uid 1833,0
6857shape (OrthoPolyLine
6858uid 1834,0
6859va (VaSet
6860vasetType 3
6861lineWidth 2
6862)
6863xt "21000,109000,51250,109000"
6864pts [
6865"51250,109000"
6866"21000,109000"
6867]
6868)
6869start &161
6870end &63
6871sat 32
6872eat 32
6873sty 1
6874stc 0
6875st 0
6876sf 1
6877si 0
6878tg (WTG
6879uid 1837,0
6880ps "ConnStartEndStrategy"
6881stg "STSignalDisplayStrategy"
6882f (Text
6883uid 1838,0
6884va (VaSet
6885isHidden 1
6886)
6887xt "22000,108000,23900,109000"
6888st "D_A"
6889blo "22000,108800"
6890tm "WireNameMgr"
6891)
6892)
6893on &64
6894)
6895*211 (Wire
6896uid 1841,0
6897shape (OrthoPolyLine
6898uid 1842,0
6899va (VaSet
6900vasetType 3
6901)
6902xt "21000,110000,51250,110000"
6903pts [
6904"51250,110000"
6905"21000,110000"
6906]
6907)
6908start &162
6909end &65
6910sat 32
6911eat 32
6912stc 0
6913st 0
6914sf 1
6915si 0
6916tg (WTG
6917uid 1845,0
6918ps "ConnStartEndStrategy"
6919stg "STSignalDisplayStrategy"
6920f (Text
6921uid 1846,0
6922va (VaSet
6923isHidden 1
6924)
6925xt "22000,109000,25500,110000"
6926st "DWRITE"
6927blo "22000,109800"
6928tm "WireNameMgr"
6929)
6930)
6931on &66
6932)
6933*212 (Wire
6934uid 1865,0
6935shape (OrthoPolyLine
6936uid 1866,0
6937va (VaSet
6938vasetType 3
6939)
6940xt "21000,105000,51250,105000"
6941pts [
6942"21000,105000"
6943"51250,105000"
6944]
6945)
6946start &55
6947end &163
6948sat 32
6949eat 32
6950stc 0
6951st 0
6952sf 1
6953si 0
6954tg (WTG
6955uid 1869,0
6956ps "ConnStartEndStrategy"
6957stg "STSignalDisplayStrategy"
6958f (Text
6959uid 1870,0
6960va (VaSet
6961isHidden 1
6962)
6963xt "22000,104000,26600,105000"
6964st "D0_SROUT"
6965blo "22000,104800"
6966tm "WireNameMgr"
6967)
6968)
6969on &59
6970)
6971*213 (Wire
6972uid 1873,0
6973shape (OrthoPolyLine
6974uid 1874,0
6975va (VaSet
6976vasetType 3
6977)
6978xt "21000,106000,51250,106000"
6979pts [
6980"21000,106000"
6981"51250,106000"
6982]
6983)
6984start &56
6985end &164
6986sat 32
6987eat 32
6988stc 0
6989st 0
6990sf 1
6991si 0
6992tg (WTG
6993uid 1877,0
6994ps "ConnStartEndStrategy"
6995stg "STSignalDisplayStrategy"
6996f (Text
6997uid 1878,0
6998va (VaSet
6999isHidden 1
7000)
7001xt "22000,105000,26600,106000"
7002st "D1_SROUT"
7003blo "22000,105800"
7004tm "WireNameMgr"
7005)
7006)
7007on &60
7008)
7009*214 (Wire
7010uid 1881,0
7011shape (OrthoPolyLine
7012uid 1882,0
7013va (VaSet
7014vasetType 3
7015)
7016xt "21000,107000,51250,107000"
7017pts [
7018"21000,107000"
7019"51250,107000"
7020]
7021)
7022start &57
7023end &165
7024sat 32
7025eat 32
7026stc 0
7027st 0
7028sf 1
7029si 0
7030tg (WTG
7031uid 1885,0
7032ps "ConnStartEndStrategy"
7033stg "STSignalDisplayStrategy"
7034f (Text
7035uid 1886,0
7036va (VaSet
7037isHidden 1
7038)
7039xt "22000,106000,26600,107000"
7040st "D2_SROUT"
7041blo "22000,106800"
7042tm "WireNameMgr"
7043)
7044)
7045on &61
7046)
7047*215 (Wire
7048uid 1889,0
7049shape (OrthoPolyLine
7050uid 1890,0
7051va (VaSet
7052vasetType 3
7053)
7054xt "21000,108000,51250,108000"
7055pts [
7056"21000,108000"
7057"51250,108000"
7058]
7059)
7060start &58
7061end &166
7062sat 32
7063eat 32
7064stc 0
7065st 0
7066sf 1
7067si 0
7068tg (WTG
7069uid 1893,0
7070ps "ConnStartEndStrategy"
7071stg "STSignalDisplayStrategy"
7072f (Text
7073uid 1894,0
7074va (VaSet
7075isHidden 1
7076)
7077xt "22000,107000,26600,108000"
7078st "D3_SROUT"
7079blo "22000,107800"
7080tm "WireNameMgr"
7081)
7082)
7083on &62
7084)
7085*216 (Wire
7086uid 2409,0
7087shape (OrthoPolyLine
7088uid 2410,0
7089va (VaSet
7090vasetType 3
7091)
7092xt "21000,111000,51250,111000"
7093pts [
7094"51250,111000"
7095"21000,111000"
7096]
7097)
7098start &167
7099end &29
7100sat 32
7101eat 32
7102stc 0
7103st 0
7104sf 1
7105si 0
7106tg (WTG
7107uid 2413,0
7108ps "ConnStartEndStrategy"
7109stg "STSignalDisplayStrategy"
7110f (Text
7111uid 2414,0
7112va (VaSet
7113isHidden 1
7114)
7115xt "22000,110000,26200,111000"
7116st "RSRLOAD"
7117blo "22000,110800"
7118tm "WireNameMgr"
7119)
7120)
7121on &28
7122)
7123*217 (Wire
7124uid 3009,0
7125shape (OrthoPolyLine
7126uid 3010,0
7127va (VaSet
7128vasetType 3
7129)
7130xt "80750,98000,90000,98000"
7131pts [
7132"80750,98000"
7133"90000,98000"
7134]
7135)
7136start &169
7137end &68
7138sat 32
7139eat 32
7140stc 0
7141st 0
7142sf 1
7143si 0
7144tg (WTG
7145uid 3011,0
7146ps "ConnStartEndStrategy"
7147stg "STSignalDisplayStrategy"
7148f (Text
7149uid 3012,0
7150va (VaSet
7151isHidden 1
7152)
7153xt "82000,97000,84800,98000"
7154st "S_CLK"
7155blo "82000,97800"
7156tm "WireNameMgr"
7157)
7158)
7159on &69
7160)
7161*218 (Wire
7162uid 3015,0
7163shape (OrthoPolyLine
7164uid 3016,0
7165va (VaSet
7166vasetType 3
7167)
7168xt "80750,99000,90000,99000"
7169pts [
7170"80750,99000"
7171"90000,99000"
7172]
7173)
7174start &170
7175end &77
7176sat 32
7177eat 32
7178stc 0
7179st 0
7180sf 1
7181si 0
7182tg (WTG
7183uid 3017,0
7184ps "ConnStartEndStrategy"
7185stg "STSignalDisplayStrategy"
7186f (Text
7187uid 3018,0
7188va (VaSet
7189isHidden 1
7190)
7191xt "82750,98000,85150,99000"
7192st "MISO"
7193blo "82750,98800"
7194tm "WireNameMgr"
7195)
7196)
7197on &80
7198)
7199*219 (Wire
7200uid 3027,0
7201shape (OrthoPolyLine
7202uid 3028,0
7203va (VaSet
7204vasetType 3
7205)
7206xt "80750,87000,90000,87000"
7207pts [
7208"80750,87000"
7209"90000,87000"
7210]
7211)
7212start &171
7213end &67
7214sat 32
7215eat 32
7216stc 0
7217st 0
7218sf 1
7219si 0
7220tg (WTG
7221uid 3031,0
7222ps "ConnStartEndStrategy"
7223stg "STSignalDisplayStrategy"
7224f (Text
7225uid 3032,0
7226va (VaSet
7227isHidden 1
7228)
7229xt "82000,86000,85600,87000"
7230st "DAC_CS"
7231blo "82000,86800"
7232tm "WireNameMgr"
7233)
7234)
7235on &30
7236)
7237*220 (Wire
7238uid 3218,0
7239shape (OrthoPolyLine
7240uid 3219,0
7241va (VaSet
7242vasetType 3
7243)
7244xt "22000,78000,51250,78000"
7245pts [
7246"22000,78000"
7247"51250,78000"
7248]
7249)
7250start &12
7251end &146
7252sat 32
7253eat 32
7254stc 0
7255st 0
7256sf 1
7257si 0
7258tg (WTG
7259uid 3220,0
7260ps "ConnStartEndStrategy"
7261stg "STSignalDisplayStrategy"
7262f (Text
7263uid 3221,0
7264va (VaSet
7265isHidden 1
7266)
7267xt "33000,77000,35100,78000"
7268st "TRG"
7269blo "33000,77800"
7270tm "WireNameMgr"
7271)
7272)
7273on &33
7274)
7275*221 (Wire
7276uid 3260,0
7277shape (OrthoPolyLine
7278uid 3261,0
7279va (VaSet
7280vasetType 3
7281lineWidth 2
7282)
7283xt "-1000,71000,5000,71000"
7284pts [
7285"-1000,71000"
7286"5000,71000"
7287]
7288)
7289start &31
7290end &34
7291sat 32
7292eat 2
7293sty 1
7294stc 0
7295st 0
7296sf 1
7297si 0
7298tg (WTG
7299uid 3264,0
7300ps "ConnStartEndStrategy"
7301stg "STSignalDisplayStrategy"
7302f (Text
7303uid 3265,0
7304va (VaSet
7305isHidden 1
7306)
7307xt "-23000,70000,-20200,71000"
7308st "A_CLK"
7309blo "-23000,70800"
7310tm "WireNameMgr"
7311)
7312)
7313on &38
7314)
7315*222 (Wire
7316uid 3318,0
7317shape (OrthoPolyLine
7318uid 3319,0
7319va (VaSet
7320vasetType 3
7321lineWidth 2
7322)
7323xt "21000,95000,24000,95000"
7324pts [
7325"21000,95000"
7326"24000,95000"
7327]
7328)
7329start &47
7330end &43
7331sat 32
7332eat 1
7333sty 1
7334stc 0
7335st 0
7336sf 1
7337si 0
7338tg (WTG
7339uid 3322,0
7340ps "ConnStartEndStrategy"
7341stg "STSignalDisplayStrategy"
7342f (Text
7343uid 3323,0
7344va (VaSet
7345isHidden 1
7346)
7347xt "23000,94000,25300,95000"
7348st "A0_D"
7349blo "23000,94800"
7350tm "WireNameMgr"
7351)
7352)
7353on &51
7354)
7355*223 (Wire
7356uid 3352,0
7357shape (OrthoPolyLine
7358uid 3353,0
7359va (VaSet
7360vasetType 3
7361lineWidth 2
7362)
7363xt "21000,96000,24000,96000"
7364pts [
7365"21000,96000"
7366"24000,96000"
7367]
7368)
7369start &48
7370end &43
7371sat 32
7372eat 1
7373sty 1
7374stc 0
7375st 0
7376sf 1
7377si 0
7378tg (WTG
7379uid 3356,0
7380ps "ConnStartEndStrategy"
7381stg "STSignalDisplayStrategy"
7382f (Text
7383uid 3357,0
7384va (VaSet
7385isHidden 1
7386)
7387xt "23000,95000,25300,96000"
7388st "A1_D"
7389blo "23000,95800"
7390tm "WireNameMgr"
7391)
7392)
7393on &52
7394)
7395*224 (Wire
7396uid 3360,0
7397shape (OrthoPolyLine
7398uid 3361,0
7399va (VaSet
7400vasetType 3
7401lineWidth 2
7402)
7403xt "21000,97000,24000,97000"
7404pts [
7405"21000,97000"
7406"24000,97000"
7407]
7408)
7409start &49
7410end &43
7411sat 32
7412eat 1
7413sty 1
7414stc 0
7415st 0
7416sf 1
7417si 0
7418tg (WTG
7419uid 3364,0
7420ps "ConnStartEndStrategy"
7421stg "STSignalDisplayStrategy"
7422f (Text
7423uid 3365,0
7424va (VaSet
7425isHidden 1
7426)
7427xt "23000,96000,25300,97000"
7428st "A2_D"
7429blo "23000,96800"
7430tm "WireNameMgr"
7431)
7432)
7433on &53
7434)
7435*225 (Wire
7436uid 3368,0
7437shape (OrthoPolyLine
7438uid 3369,0
7439va (VaSet
7440vasetType 3
7441lineWidth 2
7442)
7443xt "21000,98000,24000,98000"
7444pts [
7445"21000,98000"
7446"24000,98000"
7447]
7448)
7449start &50
7450end &43
7451sat 32
7452eat 1
7453sty 1
7454stc 0
7455st 0
7456sf 1
7457si 0
7458tg (WTG
7459uid 3372,0
7460ps "ConnStartEndStrategy"
7461stg "STSignalDisplayStrategy"
7462f (Text
7463uid 3373,0
7464va (VaSet
7465isHidden 1
7466)
7467xt "23000,97000,25300,98000"
7468st "A3_D"
7469blo "23000,97800"
7470tm "WireNameMgr"
7471)
7472)
7473on &54
7474)
7475*226 (Wire
7476uid 3682,0
7477shape (OrthoPolyLine
7478uid 3683,0
7479va (VaSet
7480vasetType 3
7481)
7482xt "80750,100000,90000,100000"
7483pts [
7484"80750,100000"
7485"90000,100000"
7486]
7487)
7488start &173
7489end &79
7490sat 32
7491eat 32
7492stc 0
7493st 0
7494sf 1
7495si 0
7496tg (WTG
7497uid 3686,0
7498ps "ConnStartEndStrategy"
7499stg "STSignalDisplayStrategy"
7500f (Text
7501uid 3687,0
7502va (VaSet
7503isHidden 1
7504)
7505xt "82000,99000,84400,100000"
7506st "MOSI"
7507blo "82000,99800"
7508tm "WireNameMgr"
7509)
7510)
7511on &78
7512)
7513*227 (Wire
7514uid 3834,0
7515shape (OrthoPolyLine
7516uid 3835,0
7517va (VaSet
7518vasetType 3
7519)
7520xt "171000,136000,176000,136000"
7521pts [
7522"176000,136000"
7523"171000,136000"
7524]
7525)
7526start &86
7527end &102
7528sat 32
7529eat 2
7530stc 0
7531st 0
7532sf 1
7533si 0
7534tg (WTG
7535uid 3838,0
7536ps "ConnStartEndStrategy"
7537stg "STSignalDisplayStrategy"
7538f (Text
7539uid 3839,0
7540va (VaSet
7541isHidden 1
7542)
7543xt "171000,135000,173900,136000"
7544st "EE_CS"
7545blo "171000,135800"
7546tm "WireNameMgr"
7547)
7548)
7549on &92
7550)
7551*228 (Wire
7552uid 4942,0
7553shape (OrthoPolyLine
7554uid 4943,0
7555va (VaSet
7556vasetType 3
7557lineWidth 2
7558)
7559xt "171000,104000,176000,104000"
7560pts [
7561"171000,104000"
7562"176000,104000"
7563]
7564)
7565start &102
7566end &93
7567sat 2
7568eat 32
7569sty 1
7570stc 0
7571st 0
7572sf 1
7573si 0
7574tg (WTG
7575uid 4948,0
7576ps "ConnStartEndStrategy"
7577stg "STSignalDisplayStrategy"
7578f (Text
7579uid 4949,0
7580va (VaSet
7581isHidden 1
7582)
7583xt "172750,101000,174650,102000"
7584st "D_T"
7585blo "172750,101800"
7586tm "WireNameMgr"
7587)
7588)
7589on &94
7590)
7591*229 (Wire
7592uid 6431,0
7593shape (OrthoPolyLine
7594uid 6432,0
7595va (VaSet
7596vasetType 3
7597)
7598xt "80750,121000,82000,121000"
7599pts [
7600"80750,121000"
7601"82000,121000"
7602]
7603)
7604start &174
7605end &85
7606sat 32
7607eat 32
7608stc 0
7609st 0
7610sf 1
7611si 0
7612tg (WTG
7613uid 6435,0
7614ps "ConnStartEndStrategy"
7615stg "STSignalDisplayStrategy"
7616f (Text
7617uid 6436,0
7618va (VaSet
7619isHidden 1
7620)
7621xt "92000,120000,96000,121000"
7622st "DENABLE"
7623blo "92000,120800"
7624tm "WireNameMgr"
7625)
7626)
7627on &91
7628)
7629*230 (Wire
7630uid 7144,0
7631shape (OrthoPolyLine
7632uid 7145,0
7633va (VaSet
7634vasetType 3
7635lineWidth 2
7636)
7637xt "171000,106000,176000,106000"
7638pts [
7639"171000,106000"
7640"176000,106000"
7641]
7642)
7643start &102
7644end &97
7645sat 2
7646eat 32
7647sty 1
7648st 0
7649sf 1
7650si 0
7651tg (WTG
7652uid 7148,0
7653ps "ConnStartEndStrategy"
7654stg "STSignalDisplayStrategy"
7655f (Text
7656uid 7149,0
7657va (VaSet
7658isHidden 1
7659)
7660xt "176000,118000,180800,119000"
7661st "A1_T : (7:0)"
7662blo "176000,118800"
7663tm "WireNameMgr"
7664)
7665)
7666on &98
7667)
7668*231 (Wire
7669uid 9502,0
7670shape (OrthoPolyLine
7671uid 9503,0
7672va (VaSet
7673vasetType 3
7674)
7675xt "80750,116000,85000,116000"
7676pts [
7677"80750,116000"
7678"85000,116000"
7679]
7680)
7681start &157
7682sat 32
7683eat 16
7684st 0
7685sf 1
7686si 0
7687tg (WTG
7688uid 9506,0
7689ps "ConnStartEndStrategy"
7690stg "STSignalDisplayStrategy"
7691f (Text
7692uid 9507,0
7693va (VaSet
7694)
7695xt "86000,115000,89100,116000"
7696st "CLK_50"
7697blo "86000,115800"
7698tm "WireNameMgr"
7699)
7700)
7701on &99
7702)
7703*232 (Wire
7704uid 10302,0
7705shape (OrthoPolyLine
7706uid 10303,0
7707va (VaSet
7708vasetType 3
7709lineWidth 2
7710)
7711xt "171000,111000,176000,111000"
7712pts [
7713"171000,111000"
7714"176000,111000"
7715]
7716)
7717start &102
7718end &100
7719sat 2
7720eat 32
7721sty 1
7722st 0
7723sf 1
7724si 0
7725tg (WTG
7726uid 10306,0
7727ps "ConnStartEndStrategy"
7728stg "STSignalDisplayStrategy"
7729f (Text
7730uid 10307,0
7731va (VaSet
7732isHidden 1
7733)
7734xt "172000,130000,176800,131000"
7735st "A0_T : (7:0)"
7736blo "172000,130800"
7737tm "WireNameMgr"
7738)
7739)
7740on &101
7741)
7742*233 (Wire
7743uid 11096,0
7744shape (OrthoPolyLine
7745uid 11097,0
7746va (VaSet
7747vasetType 3
7748)
7749xt "163000,129000,165000,129000"
7750pts [
7751"163000,129000"
7752"165000,129000"
7753]
7754)
7755start &106
7756end &102
7757sat 32
7758eat 1
7759st 0
7760sf 1
7761si 0
7762tg (WTG
7763uid 11100,0
7764ps "ConnStartEndStrategy"
7765stg "STSignalDisplayStrategy"
7766f (Text
7767uid 11101,0
7768va (VaSet
7769isHidden 1
7770)
7771xt "193000,122000,198300,123000"
7772st "RS485_C_DI"
7773blo "193000,122800"
7774tm "WireNameMgr"
7775)
7776)
7777on &107
7778)
7779*234 (Wire
7780uid 11514,0
7781shape (OrthoPolyLine
7782uid 11515,0
7783va (VaSet
7784vasetType 3
7785)
7786xt "80750,150000,85000,150000"
7787pts [
7788"85000,150000"
7789"80750,150000"
7790]
7791)
7792start &110
7793end &187
7794es 0
7795sat 32
7796eat 32
7797st 0
7798sf 1
7799si 0
7800tg (WTG
7801uid 11518,0
7802ps "ConnStartEndStrategy"
7803stg "STSignalDisplayStrategy"
7804f (Text
7805uid 11519,0
7806va (VaSet
7807isHidden 1
7808)
7809xt "86000,149000,91200,150000"
7810st "RS485_E_DI"
7811blo "86000,149800"
7812tm "WireNameMgr"
7813)
7814)
7815on &111
7816)
7817*235 (Wire
7818uid 11528,0
7819shape (OrthoPolyLine
7820uid 11529,0
7821va (VaSet
7822vasetType 3
7823)
7824xt "80750,149000,85000,149000"
7825pts [
7826"80750,149000"
7827"85000,149000"
7828]
7829)
7830start &189
7831end &128
7832ss 0
7833sat 32
7834eat 32
7835st 0
7836sf 1
7837si 0
7838tg (WTG
7839uid 11532,0
7840ps "ConnStartEndStrategy"
7841stg "STSignalDisplayStrategy"
7842f (Text
7843uid 11533,0
7844va (VaSet
7845isHidden 1
7846)
7847xt "107000,148000,112600,149000"
7848st "RS485_E_DO"
7849blo "107000,148800"
7850tm "WireNameMgr"
7851)
7852)
7853on &112
7854)
7855*236 (Wire
7856uid 12320,0
7857shape (OrthoPolyLine
7858uid 12321,0
7859va (VaSet
7860vasetType 3
7861)
7862xt "80750,140000,87000,140000"
7863pts [
7864"80750,140000"
7865"87000,140000"
7866]
7867)
7868start &175
7869end &113
7870sat 32
7871eat 32
7872stc 0
7873st 0
7874sf 1
7875si 0
7876tg (WTG
7877uid 12324,0
7878ps "ConnStartEndStrategy"
7879stg "STSignalDisplayStrategy"
7880f (Text
7881uid 12325,0
7882va (VaSet
7883isHidden 1
7884)
7885xt "82000,139000,84300,140000"
7886st "SRIN"
7887blo "82000,139800"
7888tm "WireNameMgr"
7889)
7890)
7891on &114
7892)
7893*237 (Wire
7894uid 12545,0
7895shape (OrthoPolyLine
7896uid 12546,0
7897va (VaSet
7898vasetType 3
7899)
7900xt "80750,141000,87000,141000"
7901pts [
7902"80750,141000"
7903"87000,141000"
7904]
7905)
7906start &177
7907end &115
7908sat 32
7909eat 32
7910st 0
7911sf 1
7912si 0
7913tg (WTG
7914uid 12549,0
7915ps "ConnStartEndStrategy"
7916stg "STSignalDisplayStrategy"
7917f (Text
7918uid 12550,0
7919va (VaSet
7920isHidden 1
7921)
7922xt "83000,140000,88100,141000"
7923st "AMBER_LED"
7924blo "83000,140800"
7925tm "WireNameMgr"
7926)
7927)
7928on &118
7929)
7930*238 (Wire
7931uid 12559,0
7932shape (OrthoPolyLine
7933uid 12560,0
7934va (VaSet
7935vasetType 3
7936)
7937xt "80750,142000,87000,143000"
7938pts [
7939"80750,143000"
7940"87000,142000"
7941]
7942)
7943start &178
7944end &116
7945sat 32
7946eat 32
7947st 0
7948sf 1
7949si 0
7950tg (WTG
7951uid 12563,0
7952ps "ConnStartEndStrategy"
7953stg "STSignalDisplayStrategy"
7954f (Text
7955uid 12564,0
7956va (VaSet
7957isHidden 1
7958)
7959xt "83000,142000,88100,143000"
7960st "GREEN_LED"
7961blo "83000,142800"
7962tm "WireNameMgr"
7963)
7964)
7965on &119
7966)
7967*239 (Wire
7968uid 12573,0
7969shape (OrthoPolyLine
7970uid 12574,0
7971va (VaSet
7972vasetType 3
7973)
7974xt "80750,142000,87000,143000"
7975pts [
7976"80750,142000"
7977"87000,143000"
7978]
7979)
7980start &176
7981end &117
7982sat 32
7983eat 32
7984st 0
7985sf 1
7986si 0
7987tg (WTG
7988uid 12577,0
7989ps "ConnStartEndStrategy"
7990stg "STSignalDisplayStrategy"
7991f (Text
7992uid 12578,0
7993va (VaSet
7994isHidden 1
7995)
7996xt "83000,141000,87000,142000"
7997st "RED_LED"
7998blo "83000,141800"
7999tm "WireNameMgr"
8000)
8001)
8002on &120
8003)
8004*240 (Wire
8005uid 13522,0
8006shape (OrthoPolyLine
8007uid 13523,0
8008va (VaSet
8009vasetType 3
8010lineWidth 2
8011)
8012xt "22000,81000,28000,81000"
8013pts [
8014"22000,81000"
8015"28000,81000"
8016]
8017)
8018start &121
8019end &14
8020sat 32
8021eat 1
8022sty 1
8023st 0
8024sf 1
8025si 0
8026tg (WTG
8027uid 13526,0
8028ps "ConnStartEndStrategy"
8029stg "STSignalDisplayStrategy"
8030f (Text
8031uid 13527,0
8032va (VaSet
8033)
8034xt "22000,80000,26700,81000"
8035st "LINE : (5:0)"
8036blo "22000,80800"
8037tm "WireNameMgr"
8038)
8039)
8040on &122
8041)
8042*241 (Wire
8043uid 13618,0
8044shape (OrthoPolyLine
8045uid 13619,0
8046va (VaSet
8047vasetType 3
8048lineWidth 2
8049)
8050xt "171000,125000,176000,125000"
8051pts [
8052"171000,125000"
8053"176000,125000"
8054]
8055)
8056start &102
8057end &95
8058sat 2
8059eat 32
8060sty 1
8061st 0
8062sf 1
8063si 0
8064tg (WTG
8065uid 13624,0
8066ps "ConnStartEndStrategy"
8067stg "STSignalDisplayStrategy"
8068f (Text
8069uid 13625,0
8070va (VaSet
8071isHidden 1
8072)
8073xt "173000,130000,177900,131000"
8074st "D_T2 : (1:0)"
8075blo "173000,130800"
8076tm "WireNameMgr"
8077)
8078)
8079on &96
8080)
8081*242 (Wire
8082uid 13634,0
8083shape (OrthoPolyLine
8084uid 13635,0
8085va (VaSet
8086vasetType 3
8087)
8088xt "49000,133000,51250,133000"
8089pts [
8090"49000,133000"
8091"51250,133000"
8092]
8093)
8094start &123
8095end &180
8096sat 32
8097eat 32
8098st 0
8099sf 1
8100si 0
8101tg (WTG
8102uid 13638,0
8103ps "ConnStartEndStrategy"
8104stg "STSignalDisplayStrategy"
8105f (Text
8106uid 13639,0
8107va (VaSet
8108isHidden 1
8109)
8110xt "51000,141000,54500,142000"
8111st "REFCLK"
8112blo "51000,141800"
8113tm "WireNameMgr"
8114)
8115)
8116on &124
8117)
8118*243 (Wire
8119uid 13658,0
8120shape (OrthoPolyLine
8121uid 13659,0
8122va (VaSet
8123vasetType 3
8124)
8125xt "80750,147000,85000,147000"
8126pts [
8127"80750,147000"
8128"85000,147000"
8129]
8130)
8131start &190
8132end &84
8133ss 0
8134sat 32
8135eat 32
8136st 0
8137sf 1
8138si 0
8139tg (WTG
8140uid 13664,0
8141ps "ConnStartEndStrategy"
8142stg "STSignalDisplayStrategy"
8143f (Text
8144uid 13665,0
8145va (VaSet
8146isHidden 1
8147)
8148xt "84000,145000,89500,146000"
8149st "RS485_E_DE"
8150blo "84000,145800"
8151tm "WireNameMgr"
8152)
8153)
8154on &90
8155)
8156*244 (Wire
8157uid 14328,0
8158shape (OrthoPolyLine
8159uid 14329,0
8160va (VaSet
8161vasetType 3
8162lineWidth 2
8163)
8164xt "49000,132000,51250,132000"
8165pts [
8166"49000,132000"
8167"51250,132000"
8168]
8169)
8170start &125
8171end &179
8172sat 32
8173eat 32
8174sty 1
8175st 0
8176sf 1
8177si 0
8178tg (WTG
8179uid 14332,0
8180ps "ConnStartEndStrategy"
8181stg "STSignalDisplayStrategy"
8182f (Text
8183uid 14333,0
8184va (VaSet
8185isHidden 1
8186)
8187xt "52000,138000,57500,139000"
8188st "D_T_in : (1:0)"
8189blo "52000,138800"
8190tm "WireNameMgr"
8191)
8192)
8193on &126
8194)
8195*245 (Wire
8196uid 15175,0
8197shape (OrthoPolyLine
8198uid 15176,0
8199va (VaSet
8200vasetType 3
8201lineWidth 2
8202)
8203xt "80750,120000,87000,120000"
8204pts [
8205"80750,120000"
8206"87000,120000"
8207]
8208)
8209start &145
8210sat 32
8211eat 16
8212sty 1
8213st 0
8214sf 1
8215si 0
8216tg (WTG
8217uid 15179,0
8218ps "ConnStartEndStrategy"
8219stg "STSignalDisplayStrategy"
8220f (Text
8221uid 15180,0
8222va (VaSet
8223)
8224xt "82000,119000,86000,120000"
8225st "led : (7:0)"
8226blo "82000,119800"
8227tm "WireNameMgr"
8228)
8229)
8230on &127
8231)
8232*246 (Wire
8233uid 15517,0
8234shape (OrthoPolyLine
8235uid 15518,0
8236va (VaSet
8237vasetType 3
8238)
8239xt "171000,128000,176000,128000"
8240pts [
8241"171000,128000"
8242"176000,128000"
8243]
8244)
8245start &102
8246end &81
8247sat 2
8248eat 32
8249st 0
8250sf 1
8251si 0
8252tg (WTG
8253uid 15523,0
8254ps "ConnStartEndStrategy"
8255stg "STSignalDisplayStrategy"
8256f (Text
8257uid 15524,0
8258va (VaSet
8259isHidden 1
8260)
8261xt "173000,127000,178600,128000"
8262st "RS485_C_DE"
8263blo "173000,127800"
8264tm "WireNameMgr"
8265)
8266)
8267on &88
8268)
8269*247 (Wire
8270uid 15525,0
8271shape (OrthoPolyLine
8272uid 15526,0
8273va (VaSet
8274vasetType 3
8275)
8276xt "171000,129000,176000,129000"
8277pts [
8278"171000,129000"
8279"176000,129000"
8280]
8281)
8282start &102
8283end &82
8284sat 2
8285eat 32
8286st 0
8287sf 1
8288si 0
8289tg (WTG
8290uid 15531,0
8291ps "ConnStartEndStrategy"
8292stg "STSignalDisplayStrategy"
8293f (Text
8294uid 15532,0
8295va (VaSet
8296isHidden 1
8297)
8298xt "173000,128000,178700,129000"
8299st "RS485_C_DO"
8300blo "173000,128800"
8301tm "WireNameMgr"
8302)
8303)
8304on &109
8305)
8306*248 (Wire
8307uid 15533,0
8308shape (OrthoPolyLine
8309uid 15534,0
8310va (VaSet
8311vasetType 3
8312)
8313xt "171000,130000,176000,130000"
8314pts [
8315"171000,130000"
8316"176000,130000"
8317]
8318)
8319start &102
8320end &108
8321sat 2
8322eat 32
8323st 0
8324sf 1
8325si 0
8326tg (WTG
8327uid 15539,0
8328ps "ConnStartEndStrategy"
8329stg "STSignalDisplayStrategy"
8330f (Text
8331uid 15540,0
8332va (VaSet
8333isHidden 1
8334)
8335xt "173000,129000,178600,130000"
8336st "RS485_C_RE"
8337blo "173000,129800"
8338tm "WireNameMgr"
8339)
8340)
8341on &87
8342)
8343*249 (Wire
8344uid 15541,0
8345shape (OrthoPolyLine
8346uid 15542,0
8347va (VaSet
8348vasetType 3
8349lineWidth 2
8350)
8351xt "157000,111000,165000,111000"
8352pts [
8353"157000,111000"
8354"165000,111000"
8355]
8356)
8357end &102
8358sat 16
8359eat 1
8360sty 1
8361st 0
8362sf 1
8363si 0
8364tg (WTG
8365uid 15547,0
8366ps "ConnStartEndStrategy"
8367stg "STSignalDisplayStrategy"
8368f (Text
8369uid 15548,0
8370va (VaSet
8371)
8372xt "159000,110000,163000,111000"
8373st "led : (7:0)"
8374blo "159000,110800"
8375tm "WireNameMgr"
8376)
8377)
8378on &127
8379)
8380*250 (Wire
8381uid 15563,0
8382shape (OrthoPolyLine
8383uid 15564,0
8384va (VaSet
8385vasetType 3
8386)
8387xt "80750,148000,85000,148000"
8388pts [
8389"80750,148000"
8390"85000,148000"
8391]
8392)
8393start &188
8394end &83
8395ss 0
8396sat 32
8397eat 32
8398st 0
8399sf 1
8400si 0
8401tg (WTG
8402uid 15569,0
8403ps "ConnStartEndStrategy"
8404stg "STSignalDisplayStrategy"
8405f (Text
8406uid 15570,0
8407va (VaSet
8408isHidden 1
8409)
8410xt "83000,147000,88500,148000"
8411st "RS485_E_RE"
8412blo "83000,147800"
8413tm "WireNameMgr"
8414)
8415)
8416on &89
8417)
8418*251 (Wire
8419uid 15712,0
8420shape (OrthoPolyLine
8421uid 15713,0
8422va (VaSet
8423vasetType 3
8424lineWidth 2
8425)
8426xt "49000,137000,51250,137000"
8427pts [
8428"49000,137000"
8429"51250,137000"
8430]
8431)
8432start &129
8433end &181
8434sat 32
8435eat 32
8436sty 1
8437st 0
8438sf 1
8439si 0
8440tg (WTG
8441uid 15716,0
8442ps "ConnStartEndStrategy"
8443stg "STSignalDisplayStrategy"
8444f (Text
8445uid 15717,0
8446va (VaSet
8447isHidden 1
8448)
8449xt "51000,136000,57800,137000"
8450st "D_PLLLCK : (3:0)"
8451blo "51000,136800"
8452tm "WireNameMgr"
8453)
8454)
8455on &130
8456)
8457*252 (Wire
8458uid 15851,0
8459shape (OrthoPolyLine
8460uid 15852,0
8461va (VaSet
8462vasetType 3
8463lineWidth 2
8464)
8465xt "80750,89000,90000,89000"
8466pts [
8467"80750,89000"
8468"90000,89000"
8469]
8470)
8471start &172
8472end &131
8473sat 32
8474eat 32
8475sty 1
8476st 0
8477sf 1
8478si 0
8479tg (WTG
8480uid 15855,0
8481ps "ConnStartEndStrategy"
8482stg "STSignalDisplayStrategy"
8483f (Text
8484uid 15856,0
8485va (VaSet
8486isHidden 1
8487)
8488xt "83000,88000,87600,89000"
8489st "TCS : (3:0)"
8490blo "83000,88800"
8491tm "WireNameMgr"
8492)
8493)
8494on &132
8495)
8496*253 (Wire
8497uid 16063,0
8498shape (OrthoPolyLine
8499uid 16064,0
8500va (VaSet
8501vasetType 3
8502lineWidth 2
8503)
8504xt "21000,113000,30000,113000"
8505pts [
8506"30000,113000"
8507"21000,113000"
8508]
8509)
8510start &136
8511end &133
8512sat 2
8513eat 32
8514sty 1
8515st 0
8516sf 1
8517si 0
8518tg (WTG
8519uid 16067,0
8520ps "ConnStartEndStrategy"
8521stg "STSignalDisplayStrategy"
8522f (Text
8523uid 16068,0
8524va (VaSet
8525isHidden 1
8526)
8527xt "24000,112000,30200,113000"
8528st "DSRCLK : (3:0)"
8529blo "24000,112800"
8530tm "WireNameMgr"
8531)
8532)
8533on &134
8534)
8535*254 (Wire
8536uid 16247,0
8537shape (OrthoPolyLine
8538uid 16248,0
8539va (VaSet
8540vasetType 3
8541)
8542xt "34000,113000,51250,113000"
8543pts [
8544"51250,113000"
8545"34000,113000"
8546]
8547)
8548start &168
8549end &136
8550sat 32
8551eat 1
8552st 0
8553sf 1
8554si 0
8555tg (WTG
8556uid 16251,0
8557ps "ConnStartEndStrategy"
8558stg "STSignalDisplayStrategy"
8559f (Text
8560uid 16252,0
8561va (VaSet
8562)
8563xt "35000,112000,38000,113000"
8564st "SRCLK"
8565blo "35000,112800"
8566tm "WireNameMgr"
8567)
8568)
8569on &135
8570)
8571*255 (Wire
8572uid 16538,0
8573shape (OrthoPolyLine
8574uid 16539,0
8575va (VaSet
8576vasetType 3
8577)
8578xt "80750,130000,92000,130000"
8579pts [
8580"80750,130000"
8581"92000,130000"
8582]
8583)
8584start &183
8585sat 32
8586eat 16
8587st 0
8588sf 1
8589si 0
8590tg (WTG
8591uid 16542,0
8592ps "ConnStartEndStrategy"
8593stg "STSignalDisplayStrategy"
8594f (Text
8595uid 16543,0
8596va (VaSet
8597)
8598xt "82000,129000,90600,130000"
8599st "alarm_refclk_too_high"
8600blo "82000,129800"
8601tm "WireNameMgr"
8602)
8603)
8604on &140
8605)
8606*256 (Wire
8607uid 16546,0
8608shape (OrthoPolyLine
8609uid 16547,0
8610va (VaSet
8611vasetType 3
8612)
8613xt "80750,131000,91000,131000"
8614pts [
8615"80750,131000"
8616"91000,131000"
8617]
8618)
8619start &184
8620sat 32
8621eat 16
8622st 0
8623sf 1
8624si 0
8625tg (WTG
8626uid 16550,0
8627ps "ConnStartEndStrategy"
8628stg "STSignalDisplayStrategy"
8629f (Text
8630uid 16551,0
8631va (VaSet
8632)
8633xt "82000,130000,90200,131000"
8634st "alarm_refclk_too_low"
8635blo "82000,130800"
8636tm "WireNameMgr"
8637)
8638)
8639on &141
8640)
8641*257 (Wire
8642uid 16576,0
8643shape (OrthoPolyLine
8644uid 16577,0
8645va (VaSet
8646vasetType 3
8647lineWidth 2
8648)
8649xt "80750,132000,92000,132000"
8650pts [
8651"80750,132000"
8652"92000,132000"
8653]
8654)
8655start &182
8656sat 32
8657eat 16
8658sty 1
8659st 0
8660sf 1
8661si 0
8662tg (WTG
8663uid 16580,0
8664ps "ConnStartEndStrategy"
8665stg "STSignalDisplayStrategy"
8666f (Text
8667uid 16581,0
8668va (VaSet
8669)
8670xt "82000,131000,90600,132000"
8671st "counter_result : (11:0)"
8672blo "82000,131800"
8673tm "WireNameMgr"
8674)
8675)
8676on &142
8677)
8678*258 (Wire
8679uid 17296,0
8680shape (OrthoPolyLine
8681uid 17297,0
8682va (VaSet
8683vasetType 3
8684)
8685xt "13000,71000,51250,71000"
8686pts [
8687"51250,71000"
8688"13000,71000"
8689]
8690)
8691start &185
8692end &34
8693sat 32
8694eat 1
8695st 0
8696sf 1
8697si 0
8698tg (WTG
8699uid 17300,0
8700ps "ConnStartEndStrategy"
8701stg "STSignalDisplayStrategy"
8702f (Text
8703uid 17301,0
8704va (VaSet
8705)
8706xt "14000,70000,18000,71000"
8707st "ADC_CLK"
8708blo "14000,70800"
8709tm "WireNameMgr"
8710)
8711)
8712on &194
8713)
8714*259 (Wire
8715uid 17407,0
8716shape (OrthoPolyLine
8717uid 17408,0
8718va (VaSet
8719vasetType 3
8720)
8721xt "80750,144000,87000,144000"
8722pts [
8723"80750,144000"
8724"87000,144000"
8725]
8726)
8727start &186
8728end &195
8729sat 32
8730eat 32
8731st 0
8732sf 1
8733si 0
8734tg (WTG
8735uid 17411,0
8736ps "ConnStartEndStrategy"
8737stg "STSignalDisplayStrategy"
8738f (Text
8739uid 17412,0
8740va (VaSet
8741isHidden 1
8742)
8743xt "83000,143000,86000,144000"
8744st "TRG_V"
8745blo "83000,143800"
8746tm "WireNameMgr"
8747)
8748)
8749on &196
8750)
8751*260 (Wire
8752uid 17727,0
8753shape (OrthoPolyLine
8754uid 17728,0
8755va (VaSet
8756vasetType 3
8757)
8758xt "155000,130000,165000,130000"
8759pts [
8760"155000,130000"
8761"165000,130000"
8762]
8763)
8764end &102
8765sat 16
8766eat 1
8767st 0
8768sf 1
8769si 0
8770tg (WTG
8771uid 17733,0
8772ps "ConnStartEndStrategy"
8773stg "STSignalDisplayStrategy"
8774f (Text
8775uid 17734,0
8776va (VaSet
8777)
8778xt "157000,129000,167000,130000"
8779st "alarm_refclk_too_high"
8780blo "157000,129800"
8781tm "WireNameMgr"
8782)
8783)
8784on &140
8785)
8786*261 (Wire
8787uid 17735,0
8788shape (OrthoPolyLine
8789uid 17736,0
8790va (VaSet
8791vasetType 3
8792)
8793xt "155000,131000,165000,131000"
8794pts [
8795"155000,131000"
8796"165000,131000"
8797]
8798)
8799end &102
8800sat 16
8801eat 1
8802st 0
8803sf 1
8804si 0
8805tg (WTG
8806uid 17741,0
8807ps "ConnStartEndStrategy"
8808stg "STSignalDisplayStrategy"
8809f (Text
8810uid 17742,0
8811va (VaSet
8812)
8813xt "157000,130000,166600,131000"
8814st "alarm_refclk_too_low"
8815blo "157000,130800"
8816tm "WireNameMgr"
8817)
8818)
8819on &141
8820)
8821*262 (Wire
8822uid 17743,0
8823shape (OrthoPolyLine
8824uid 17744,0
8825va (VaSet
8826vasetType 3
8827)
8828xt "155000,132000,165000,132000"
8829pts [
8830"155000,132000"
8831"165000,132000"
8832]
8833)
8834end &102
8835sat 16
8836eat 1
8837st 0
8838sf 1
8839si 0
8840tg (WTG
8841uid 17749,0
8842ps "ConnStartEndStrategy"
8843stg "STSignalDisplayStrategy"
8844f (Text
8845uid 17750,0
8846va (VaSet
8847)
8848xt "157000,131000,166600,132000"
8849st "counter_result : (11:0)"
8850blo "157000,131800"
8851tm "WireNameMgr"
8852)
8853)
8854on &142
8855)
8856]
8857bg "65535,65535,65535"
8858grid (Grid
8859origin "0,0"
8860isVisible 1
8861isActive 1
8862xSpacing 1000
8863xySpacing 1000
8864xShown 1
8865yShown 1
8866color "26368,26368,26368"
8867)
8868packageList *263 (PackageList
8869uid 41,0
8870stg "VerticalLayoutStrategy"
8871textVec [
8872*264 (Text
8873uid 42,0
8874va (VaSet
8875font "arial,8,1"
8876)
8877xt "0,0,5400,1000"
8878st "Package List"
8879blo "0,800"
8880)
8881*265 (MLText
8882uid 43,0
8883va (VaSet
8884)
8885xt "0,1000,16100,9000"
8886st "LIBRARY ieee;
8887USE ieee.std_logic_1164.all;
8888USE ieee.std_logic_arith.all;
8889USE IEEE.NUMERIC_STD.all;
8890USE ieee.std_logic_unsigned.all;
8891
8892LIBRARY FACT_FAD_lib;
8893USE FACT_FAD_lib.fad_definitions.all;"
8894tm "PackageList"
8895)
8896]
8897)
8898compDirBlock (MlTextGroup
8899uid 44,0
8900stg "VerticalLayoutStrategy"
8901textVec [
8902*266 (Text
8903uid 45,0
8904va (VaSet
8905isHidden 1
8906font "Arial,8,1"
8907)
8908xt "20000,0,28100,1000"
8909st "Compiler Directives"
8910blo "20000,800"
8911)
8912*267 (Text
8913uid 46,0
8914va (VaSet
8915isHidden 1
8916font "Arial,8,1"
8917)
8918xt "20000,1000,29600,2000"
8919st "Pre-module directives:"
8920blo "20000,1800"
8921)
8922*268 (MLText
8923uid 47,0
8924va (VaSet
8925isHidden 1
8926)
8927xt "20000,2000,28200,4000"
8928st "`resetall
8929`timescale 1ns/10ps"
8930tm "BdCompilerDirectivesTextMgr"
8931)
8932*269 (Text
8933uid 48,0
8934va (VaSet
8935isHidden 1
8936font "Arial,8,1"
8937)
8938xt "20000,4000,30100,5000"
8939st "Post-module directives:"
8940blo "20000,4800"
8941)
8942*270 (MLText
8943uid 49,0
8944va (VaSet
8945isHidden 1
8946)
8947xt "20000,0,20000,0"
8948tm "BdCompilerDirectivesTextMgr"
8949)
8950*271 (Text
8951uid 50,0
8952va (VaSet
8953isHidden 1
8954font "Arial,8,1"
8955)
8956xt "20000,5000,29900,6000"
8957st "End-module directives:"
8958blo "20000,5800"
8959)
8960*272 (MLText
8961uid 51,0
8962va (VaSet
8963isHidden 1
8964)
8965xt "20000,6000,20000,6000"
8966tm "BdCompilerDirectivesTextMgr"
8967)
8968]
8969associable 1
8970)
8971windowSize "-4,-4,1684,1024"
8972viewArea "69146,106764,161281,164090"
8973cachedDiagramExtent "-23000,0,198300,151000"
8974pageSetupInfo (PageSetupInfo
8975ptrCmd ""
8976toPrinter 1
8977exportedDirectories [
8978"$HDS_PROJECT_DIR/HTMLExport"
8979]
8980exportStdIncludeRefs 1
8981exportStdPackageRefs 1
8982)
8983hasePageBreakOrigin 1
8984pageBreakOrigin "-73000,0"
8985lastUid 17750,0
8986defaultCommentText (CommentText
8987shape (Rectangle
8988layer 0
8989va (VaSet
8990vasetType 1
8991fg "65280,65280,46080"
8992lineColor "0,0,32768"
8993)
8994xt "0,0,15000,5000"
8995)
8996text (MLText
8997va (VaSet
8998fg "0,0,32768"
8999)
9000xt "200,200,2400,1200"
9001st "
9002Text
9003"
9004tm "CommentText"
9005wrapOption 3
9006visibleHeight 4600
9007visibleWidth 14600
9008)
9009)
9010defaultPanel (Panel
9011shape (RectFrame
9012va (VaSet
9013vasetType 1
9014fg "65535,65535,65535"
9015lineColor "32768,0,0"
9016lineWidth 2
9017)
9018xt "0,0,20000,20000"
9019)
9020title (TextAssociate
9021ps "TopLeftStrategy"
9022text (Text
9023va (VaSet
9024font "Arial,8,1"
9025)
9026xt "1000,1000,3800,2000"
9027st "Panel0"
9028blo "1000,1800"
9029tm "PanelText"
9030)
9031)
9032)
9033defaultBlk (Blk
9034shape (Rectangle
9035va (VaSet
9036vasetType 1
9037fg "39936,56832,65280"
9038lineColor "0,0,32768"
9039lineWidth 2
9040)
9041xt "0,0,8000,10000"
9042)
9043ttg (MlTextGroup
9044ps "CenterOffsetStrategy"
9045stg "VerticalLayoutStrategy"
9046textVec [
9047*273 (Text
9048va (VaSet
9049font "Arial,8,1"
9050)
9051xt "2200,3500,5800,4500"
9052st "<library>"
9053blo "2200,4300"
9054tm "BdLibraryNameMgr"
9055)
9056*274 (Text
9057va (VaSet
9058font "Arial,8,1"
9059)
9060xt "2200,4500,5600,5500"
9061st "<block>"
9062blo "2200,5300"
9063tm "BlkNameMgr"
9064)
9065*275 (Text
9066va (VaSet
9067font "Arial,8,1"
9068)
9069xt "2200,5500,3200,6500"
9070st "I0"
9071blo "2200,6300"
9072tm "InstanceNameMgr"
9073)
9074]
9075)
9076ga (GenericAssociation
9077ps "EdgeToEdgeStrategy"
9078matrix (Matrix
9079text (MLText
9080va (VaSet
9081font "Courier New,8,0"
9082)
9083xt "2200,13500,2200,13500"
9084)
9085header ""
9086)
9087elements [
9088]
9089)
9090viewicon (ZoomableIcon
9091sl 0
9092va (VaSet
9093vasetType 1
9094fg "49152,49152,49152"
9095)
9096xt "0,0,1500,1500"
9097iconName "UnknownFile.png"
9098iconMaskName "UnknownFile.msk"
9099)
9100viewiconposition 0
9101)
9102defaultMWComponent (MWC
9103shape (Rectangle
9104va (VaSet
9105vasetType 1
9106fg "0,65535,0"
9107lineColor "0,32896,0"
9108lineWidth 2
9109)
9110xt "0,0,8000,10000"
9111)
9112ttg (MlTextGroup
9113ps "CenterOffsetStrategy"
9114stg "VerticalLayoutStrategy"
9115textVec [
9116*276 (Text
9117va (VaSet
9118font "Arial,8,1"
9119)
9120xt "550,3500,3450,4500"
9121st "Library"
9122blo "550,4300"
9123)
9124*277 (Text
9125va (VaSet
9126font "Arial,8,1"
9127)
9128xt "550,4500,7450,5500"
9129st "MWComponent"
9130blo "550,5300"
9131)
9132*278 (Text
9133va (VaSet
9134font "Arial,8,1"
9135)
9136xt "550,5500,1550,6500"
9137st "I0"
9138blo "550,6300"
9139tm "InstanceNameMgr"
9140)
9141]
9142)
9143ga (GenericAssociation
9144ps "EdgeToEdgeStrategy"
9145matrix (Matrix
9146text (MLText
9147va (VaSet
9148font "Courier New,8,0"
9149)
9150xt "-6450,1500,-6450,1500"
9151)
9152header ""
9153)
9154elements [
9155]
9156)
9157portVis (PortSigDisplay
9158)
9159prms (Property
9160pclass "params"
9161pname "params"
9162ptn "String"
9163)
9164visOptions (mwParamsVisibilityOptions
9165)
9166)
9167defaultSaComponent (SaComponent
9168shape (Rectangle
9169va (VaSet
9170vasetType 1
9171fg "0,65535,0"
9172lineColor "0,32896,0"
9173lineWidth 2
9174)
9175xt "0,0,8000,10000"
9176)
9177ttg (MlTextGroup
9178ps "CenterOffsetStrategy"
9179stg "VerticalLayoutStrategy"
9180textVec [
9181*279 (Text
9182va (VaSet
9183font "Arial,8,1"
9184)
9185xt "900,3500,3800,4500"
9186st "Library"
9187blo "900,4300"
9188tm "BdLibraryNameMgr"
9189)
9190*280 (Text
9191va (VaSet
9192font "Arial,8,1"
9193)
9194xt "900,4500,7100,5500"
9195st "SaComponent"
9196blo "900,5300"
9197tm "CptNameMgr"
9198)
9199*281 (Text
9200va (VaSet
9201font "Arial,8,1"
9202)
9203xt "900,5500,1900,6500"
9204st "I0"
9205blo "900,6300"
9206tm "InstanceNameMgr"
9207)
9208]
9209)
9210ga (GenericAssociation
9211ps "EdgeToEdgeStrategy"
9212matrix (Matrix
9213text (MLText
9214va (VaSet
9215font "Courier New,8,0"
9216)
9217xt "-6100,1500,-6100,1500"
9218)
9219header ""
9220)
9221elements [
9222]
9223)
9224viewicon (ZoomableIcon
9225sl 0
9226va (VaSet
9227vasetType 1
9228fg "49152,49152,49152"
9229)
9230xt "0,0,1500,1500"
9231iconName "UnknownFile.png"
9232iconMaskName "UnknownFile.msk"
9233)
9234viewiconposition 0
9235portVis (PortSigDisplay
9236)
9237archFileType "UNKNOWN"
9238)
9239defaultVhdlComponent (VhdlComponent
9240shape (Rectangle
9241va (VaSet
9242vasetType 1
9243fg "0,65535,0"
9244lineColor "0,32896,0"
9245lineWidth 2
9246)
9247xt "0,0,8000,10000"
9248)
9249ttg (MlTextGroup
9250ps "CenterOffsetStrategy"
9251stg "VerticalLayoutStrategy"
9252textVec [
9253*282 (Text
9254va (VaSet
9255font "Arial,8,1"
9256)
9257xt "500,3500,3400,4500"
9258st "Library"
9259blo "500,4300"
9260)
9261*283 (Text
9262va (VaSet
9263font "Arial,8,1"
9264)
9265xt "500,4500,7500,5500"
9266st "VhdlComponent"
9267blo "500,5300"
9268)
9269*284 (Text
9270va (VaSet
9271font "Arial,8,1"
9272)
9273xt "500,5500,1500,6500"
9274st "I0"
9275blo "500,6300"
9276tm "InstanceNameMgr"
9277)
9278]
9279)
9280ga (GenericAssociation
9281ps "EdgeToEdgeStrategy"
9282matrix (Matrix
9283text (MLText
9284va (VaSet
9285font "Courier New,8,0"
9286)
9287xt "-6500,1500,-6500,1500"
9288)
9289header ""
9290)
9291elements [
9292]
9293)
9294portVis (PortSigDisplay
9295)
9296entityPath ""
9297archName ""
9298archPath ""
9299)
9300defaultVerilogComponent (VerilogComponent
9301shape (Rectangle
9302va (VaSet
9303vasetType 1
9304fg "0,65535,0"
9305lineColor "0,32896,0"
9306lineWidth 2
9307)
9308xt "-450,0,8450,10000"
9309)
9310ttg (MlTextGroup
9311ps "CenterOffsetStrategy"
9312stg "VerticalLayoutStrategy"
9313textVec [
9314*285 (Text
9315va (VaSet
9316font "Arial,8,1"
9317)
9318xt "50,3500,2950,4500"
9319st "Library"
9320blo "50,4300"
9321)
9322*286 (Text
9323va (VaSet
9324font "Arial,8,1"
9325)
9326xt "50,4500,7950,5500"
9327st "VerilogComponent"
9328blo "50,5300"
9329)
9330*287 (Text
9331va (VaSet
9332font "Arial,8,1"
9333)
9334xt "50,5500,1050,6500"
9335st "I0"
9336blo "50,6300"
9337tm "InstanceNameMgr"
9338)
9339]
9340)
9341ga (GenericAssociation
9342ps "EdgeToEdgeStrategy"
9343matrix (Matrix
9344text (MLText
9345va (VaSet
9346font "Courier New,8,0"
9347)
9348xt "-6950,1500,-6950,1500"
9349)
9350header ""
9351)
9352elements [
9353]
9354)
9355entityPath ""
9356)
9357defaultHdlText (HdlText
9358shape (Rectangle
9359va (VaSet
9360vasetType 1
9361fg "65535,65535,37120"
9362lineColor "0,0,32768"
9363lineWidth 2
9364)
9365xt "0,0,8000,10000"
9366)
9367ttg (MlTextGroup
9368ps "CenterOffsetStrategy"
9369stg "VerticalLayoutStrategy"
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9372va (VaSet
9373font "Arial,8,1"
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9375xt "3150,4000,4850,5000"
9376st "eb1"
9377blo "3150,4800"
9378tm "HdlTextNameMgr"
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9380*289 (Text
9381va (VaSet
9382font "Arial,8,1"
9383)
9384xt "3150,5000,3950,6000"
9385st "1"
9386blo "3150,5800"
9387tm "HdlTextNumberMgr"
9388)
9389]
9390)
9391viewicon (ZoomableIcon
9392sl 0
9393va (VaSet
9394vasetType 1
9395fg "49152,49152,49152"
9396)
9397xt "0,0,1500,1500"
9398iconName "UnknownFile.png"
9399iconMaskName "UnknownFile.msk"
9400)
9401viewiconposition 0
9402)
9403defaultEmbeddedText (EmbeddedText
9404commentText (CommentText
9405ps "CenterOffsetStrategy"
9406shape (Rectangle
9407va (VaSet
9408vasetType 1
9409fg "65535,65535,65535"
9410lineColor "0,0,32768"
9411lineWidth 2
9412)
9413xt "0,0,18000,5000"
9414)
9415text (MLText
9416va (VaSet
9417)
9418xt "200,200,2400,1200"
9419st "
9420Text
9421"
9422tm "HdlTextMgr"
9423wrapOption 3
9424visibleHeight 4600
9425visibleWidth 17600
9426)
9427)
9428)
9429defaultGlobalConnector (GlobalConnector
9430shape (Circle
9431va (VaSet
9432vasetType 1
9433fg "65535,65535,0"
9434)
9435xt "-1000,-1000,1000,1000"
9436radius 1000
9437)
9438name (Text
9439va (VaSet
9440font "Arial,8,1"
9441)
9442xt "-500,-500,500,500"
9443st "G"
9444blo "-500,300"
9445)
9446)
9447defaultRipper (Ripper
9448ps "OnConnectorStrategy"
9449shape (Line2D
9450pts [
9451"0,0"
9452"1000,1000"
9453]
9454va (VaSet
9455vasetType 1
9456)
9457xt "0,0,1000,1000"
9458)
9459)
9460defaultBdJunction (BdJunction
9461ps "OnConnectorStrategy"
9462shape (Circle
9463va (VaSet
9464vasetType 1
9465)
9466xt "-400,-400,400,400"
9467radius 400
9468)
9469)
9470defaultPortIoIn (PortIoIn
9471shape (CompositeShape
9472va (VaSet
9473vasetType 1
9474fg "0,0,32768"
9475)
9476optionalChildren [
9477(Pentagon
9478sl 0
9479ro 270
9480xt "-2000,-375,-500,375"
9481)
9482(Line
9483sl 0
9484ro 270
9485xt "-500,0,0,0"
9486pts [
9487"-500,0"
9488"0,0"
9489]
9490)
9491]
9492)
9493stc 0
9494sf 1
9495tg (WTG
9496ps "PortIoTextPlaceStrategy"
9497stg "STSignalDisplayStrategy"
9498f (Text
9499va (VaSet
9500)
9501xt "-1375,-1000,-1375,-1000"
9502ju 2
9503blo "-1375,-1000"
9504tm "WireNameMgr"
9505)
9506)
9507)
9508defaultPortIoOut (PortIoOut
9509shape (CompositeShape
9510va (VaSet
9511vasetType 1
9512fg "0,0,32768"
9513)
9514optionalChildren [
9515(Pentagon
9516sl 0
9517ro 270
9518xt "500,-375,2000,375"
9519)
9520(Line
9521sl 0
9522ro 270
9523xt "0,0,500,0"
9524pts [
9525"0,0"
9526"500,0"
9527]
9528)
9529]
9530)
9531stc 0
9532sf 1
9533tg (WTG
9534ps "PortIoTextPlaceStrategy"
9535stg "STSignalDisplayStrategy"
9536f (Text
9537va (VaSet
9538)
9539xt "625,-1000,625,-1000"
9540blo "625,-1000"
9541tm "WireNameMgr"
9542)
9543)
9544)
9545defaultPortIoInOut (PortIoInOut
9546shape (CompositeShape
9547va (VaSet
9548vasetType 1
9549fg "0,0,32768"
9550)
9551optionalChildren [
9552(Hexagon
9553sl 0
9554xt "500,-375,2000,375"
9555)
9556(Line
9557sl 0
9558xt "0,0,500,0"
9559pts [
9560"0,0"
9561"500,0"
9562]
9563)
9564]
9565)
9566stc 0
9567sf 1
9568tg (WTG
9569ps "PortIoTextPlaceStrategy"
9570stg "STSignalDisplayStrategy"
9571f (Text
9572va (VaSet
9573)
9574xt "0,-375,0,-375"
9575blo "0,-375"
9576tm "WireNameMgr"
9577)
9578)
9579)
9580defaultPortIoBuffer (PortIoBuffer
9581shape (CompositeShape
9582va (VaSet
9583vasetType 1
9584fg "65535,65535,65535"
9585lineColor "0,0,32768"
9586)
9587optionalChildren [
9588(Hexagon
9589sl 0
9590xt "500,-375,2000,375"
9591)
9592(Line
9593sl 0
9594xt "0,0,500,0"
9595pts [
9596"0,0"
9597"500,0"
9598]
9599)
9600]
9601)
9602stc 0
9603sf 1
9604tg (WTG
9605ps "PortIoTextPlaceStrategy"
9606stg "STSignalDisplayStrategy"
9607f (Text
9608va (VaSet
9609)
9610xt "0,-375,0,-375"
9611blo "0,-375"
9612tm "WireNameMgr"
9613)
9614)
9615)
9616defaultSignal (Wire
9617shape (OrthoPolyLine
9618va (VaSet
9619vasetType 3
9620)
9621pts [
9622"0,0"
9623"0,0"
9624]
9625)
9626ss 0
9627es 0
9628sat 32
9629eat 32
9630st 0
9631sf 1
9632si 0
9633tg (WTG
9634ps "ConnStartEndStrategy"
9635stg "STSignalDisplayStrategy"
9636f (Text
9637va (VaSet
9638)
9639xt "0,0,1900,1000"
9640st "sig0"
9641blo "0,800"
9642tm "WireNameMgr"
9643)
9644)
9645)
9646defaultBus (Wire
9647shape (OrthoPolyLine
9648va (VaSet
9649vasetType 3
9650lineWidth 2
9651)
9652pts [
9653"0,0"
9654"0,0"
9655]
9656)
9657ss 0
9658es 0
9659sat 32
9660eat 32
9661sty 1
9662st 0
9663sf 1
9664si 0
9665tg (WTG
9666ps "ConnStartEndStrategy"
9667stg "STSignalDisplayStrategy"
9668f (Text
9669va (VaSet
9670)
9671xt "0,0,2400,1000"
9672st "dbus0"
9673blo "0,800"
9674tm "WireNameMgr"
9675)
9676)
9677)
9678defaultBundle (Bundle
9679shape (OrthoPolyLine
9680va (VaSet
9681vasetType 3
9682lineColor "32768,0,0"
9683lineWidth 2
9684)
9685pts [
9686"0,0"
9687"0,0"
9688]
9689)
9690ss 0
9691es 0
9692sat 32
9693eat 32
9694textGroup (BiTextGroup
9695ps "ConnStartEndStrategy"
9696stg "VerticalLayoutStrategy"
9697first (Text
9698va (VaSet
9699)
9700xt "0,0,3000,1000"
9701st "bundle0"
9702blo "0,800"
9703tm "BundleNameMgr"
9704)
9705second (MLText
9706va (VaSet
9707)
9708xt "0,1000,1000,2000"
9709st "()"
9710tm "BundleContentsMgr"
9711)
9712)
9713bundleNet &0
9714)
9715defaultPortMapFrame (PortMapFrame
9716ps "PortMapFrameStrategy"
9717shape (RectFrame
9718va (VaSet
9719vasetType 1
9720fg "65535,65535,65535"
9721lineColor "0,0,32768"
9722lineWidth 2
9723)
9724xt "0,0,10000,12000"
9725)
9726portMapText (BiTextGroup
9727ps "BottomRightOffsetStrategy"
9728stg "VerticalLayoutStrategy"
9729first (MLText
9730va (VaSet
9731)
9732)
9733second (MLText
9734va (VaSet
9735)
9736tm "PortMapTextMgr"
9737)
9738)
9739)
9740defaultGenFrame (Frame
9741shape (RectFrame
9742va (VaSet
9743vasetType 1
9744fg "65535,65535,65535"
9745lineColor "26368,26368,26368"
9746lineStyle 2
9747lineWidth 2
9748)
9749xt "0,0,20000,20000"
9750)
9751title (TextAssociate
9752ps "TopLeftStrategy"
9753text (MLText
9754va (VaSet
9755)
9756xt "0,-1100,12900,-100"
9757st "g0: FOR i IN 0 TO n GENERATE"
9758tm "FrameTitleTextMgr"
9759)
9760)
9761seqNum (FrameSequenceNumber
9762ps "TopLeftStrategy"
9763shape (Rectangle
9764va (VaSet
9765vasetType 1
9766fg "65535,65535,65535"
9767)
9768xt "50,50,1250,1450"
9769)
9770num (Text
9771va (VaSet
9772)
9773xt "250,250,1050,1250"
9774st "1"
9775blo "250,1050"
9776tm "FrameSeqNumMgr"
9777)
9778)
9779decls (MlTextGroup
9780ps "BottomRightOffsetStrategy"
9781stg "VerticalLayoutStrategy"
9782textVec [
9783*290 (Text
9784va (VaSet
9785font "Arial,8,1"
9786)
9787xt "14100,20000,22000,21000"
9788st "Frame Declarations"
9789blo "14100,20800"
9790)
9791*291 (MLText
9792va (VaSet
9793)
9794xt "14100,21000,14100,21000"
9795tm "BdFrameDeclTextMgr"
9796)
9797]
9798)
9799)
9800defaultBlockFrame (Frame
9801shape (RectFrame
9802va (VaSet
9803vasetType 1
9804fg "65535,65535,65535"
9805lineColor "26368,26368,26368"
9806lineStyle 1
9807lineWidth 2
9808)
9809xt "0,0,20000,20000"
9810)
9811title (TextAssociate
9812ps "TopLeftStrategy"
9813text (MLText
9814va (VaSet
9815)
9816xt "0,-1100,7700,-100"
9817st "b0: BLOCK (guard)"
9818tm "FrameTitleTextMgr"
9819)
9820)
9821seqNum (FrameSequenceNumber
9822ps "TopLeftStrategy"
9823shape (Rectangle
9824va (VaSet
9825vasetType 1
9826fg "65535,65535,65535"
9827)
9828xt "50,50,1250,1450"
9829)
9830num (Text
9831va (VaSet
9832)
9833xt "250,250,1050,1250"
9834st "1"
9835blo "250,1050"
9836tm "FrameSeqNumMgr"
9837)
9838)
9839decls (MlTextGroup
9840ps "BottomRightOffsetStrategy"
9841stg "VerticalLayoutStrategy"
9842textVec [
9843*292 (Text
9844va (VaSet
9845font "Arial,8,1"
9846)
9847xt "14100,20000,22000,21000"
9848st "Frame Declarations"
9849blo "14100,20800"
9850)
9851*293 (MLText
9852va (VaSet
9853)
9854xt "14100,21000,14100,21000"
9855tm "BdFrameDeclTextMgr"
9856)
9857]
9858)
9859style 3
9860)
9861defaultSaCptPort (CptPort
9862ps "OnEdgeStrategy"
9863shape (Triangle
9864ro 90
9865va (VaSet
9866vasetType 1
9867fg "0,65535,0"
9868)
9869xt "0,0,750,750"
9870)
9871tg (CPTG
9872ps "CptPortTextPlaceStrategy"
9873stg "VerticalLayoutStrategy"
9874f (Text
9875va (VaSet
9876)
9877xt "0,750,1800,1750"
9878st "Port"
9879blo "0,1550"
9880)
9881)
9882thePort (LogicalPort
9883decl (Decl
9884n "Port"
9885t ""
9886o 0
9887)
9888)
9889)
9890defaultSaCptPortBuffer (CptPort
9891ps "OnEdgeStrategy"
9892shape (Diamond
9893va (VaSet
9894vasetType 1
9895fg "65535,65535,65535"
9896)
9897xt "0,0,750,750"
9898)
9899tg (CPTG
9900ps "CptPortTextPlaceStrategy"
9901stg "VerticalLayoutStrategy"
9902f (Text
9903va (VaSet
9904)
9905xt "0,750,1800,1750"
9906st "Port"
9907blo "0,1550"
9908)
9909)
9910thePort (LogicalPort
9911m 3
9912decl (Decl
9913n "Port"
9914t ""
9915o 0
9916)
9917)
9918)
9919defaultDeclText (MLText
9920va (VaSet
9921font "Courier New,8,0"
9922)
9923)
9924archDeclarativeBlock (BdArchDeclBlock
9925uid 1,0
9926stg "BdArchDeclBlockLS"
9927declLabel (Text
9928uid 2,0
9929va (VaSet
9930font "Arial,8,1"
9931)
9932xt "37000,1800,42400,2800"
9933st "Declarations"
9934blo "37000,2600"
9935)
9936portLabel (Text
9937uid 3,0
9938va (VaSet
9939font "Arial,8,1"
9940)
9941xt "37000,2800,39700,3800"
9942st "Ports:"
9943blo "37000,3600"
9944)
9945preUserLabel (Text
9946uid 4,0
9947va (VaSet
9948isHidden 1
9949font "Arial,8,1"
9950)
9951xt "37000,1800,40800,2800"
9952st "Pre User:"
9953blo "37000,2600"
9954)
9955preUserText (MLText
9956uid 5,0
9957va (VaSet
9958isHidden 1
9959font "Courier New,8,0"
9960)
9961xt "37000,1800,37000,1800"
9962tm "BdDeclarativeTextMgr"
9963)
9964diagSignalLabel (Text
9965uid 6,0
9966va (VaSet
9967font "Arial,8,1"
9968)
9969xt "37000,45400,44100,46400"
9970st "Diagram Signals:"
9971blo "37000,46200"
9972)
9973postUserLabel (Text
9974uid 7,0
9975va (VaSet
9976isHidden 1
9977font "Arial,8,1"
9978)
9979xt "37000,1800,41700,2800"
9980st "Post User:"
9981blo "37000,2600"
9982)
9983postUserText (MLText
9984uid 8,0
9985va (VaSet
9986isHidden 1
9987font "Courier New,8,0"
9988)
9989xt "37000,1800,37000,1800"
9990tm "BdDeclarativeTextMgr"
9991)
9992)
9993commonDM (CommonDM
9994ldm (LogicalDM
9995suid 232,0
9996usingSuid 1
9997emptyRow *294 (LEmptyRow
9998)
9999uid 54,0
10000optionalChildren [
10001*295 (RefLabelRowHdr
10002)
10003*296 (TitleRowHdr
10004)
10005*297 (FilterRowHdr
10006)
10007*298 (RefLabelColHdr
10008tm "RefLabelColHdrMgr"
10009)
10010*299 (RowExpandColHdr
10011tm "RowExpandColHdrMgr"
10012)
10013*300 (GroupColHdr
10014tm "GroupColHdrMgr"
10015)
10016*301 (NameColHdr
10017tm "BlockDiagramNameColHdrMgr"
10018)
10019*302 (ModeColHdr
10020tm "BlockDiagramModeColHdrMgr"
10021)
10022*303 (TypeColHdr
10023tm "BlockDiagramTypeColHdrMgr"
10024)
10025*304 (BoundsColHdr
10026tm "BlockDiagramBoundsColHdrMgr"
10027)
10028*305 (InitColHdr
10029tm "BlockDiagramInitColHdrMgr"
10030)
10031*306 (EolColHdr
10032tm "BlockDiagramEolColHdrMgr"
10033)
10034*307 (LeafLogPort
10035port (LogicalPort
10036m 4
10037decl (Decl
10038n "board_id"
10039t "std_logic_vector"
10040b "(3 downto 0)"
10041preAdd 0
10042posAdd 0
10043o 73
10044suid 5,0
10045)
10046)
10047uid 327,0
10048)
10049*308 (LeafLogPort
10050port (LogicalPort
10051m 4
10052decl (Decl
10053n "crate_id"
10054t "std_logic_vector"
10055b "(1 downto 0)"
10056o 74
10057suid 6,0
10058)
10059)
10060uid 329,0
10061)
10062*309 (LeafLogPort
10063port (LogicalPort
10064m 4
10065decl (Decl
10066n "adc_data_array"
10067t "adc_data_array_type"
10068o 72
10069suid 29,0
10070)
10071)
10072uid 1491,0
10073)
10074*310 (LeafLogPort
10075port (LogicalPort
10076m 1
10077decl (Decl
10078n "RSRLOAD"
10079t "std_logic"
10080o 43
10081suid 57,0
10082i "'0'"
10083)
10084)
10085uid 2435,0
10086)
10087*311 (LeafLogPort
10088port (LogicalPort
10089m 1
10090decl (Decl
10091n "DAC_CS"
10092t "std_logic"
10093o 26
10094suid 66,0
10095)
10096)
10097uid 3039,0
10098)
10099*312 (LeafLogPort
10100port (LogicalPort
10101decl (Decl
10102n "X_50M"
10103t "STD_LOGIC"
10104preAdd 0
10105posAdd 0
10106o 17
10107suid 67,0
10108)
10109)
10110uid 3276,0
10111)
10112*313 (LeafLogPort
10113port (LogicalPort
10114decl (Decl
10115n "TRG"
10116t "STD_LOGIC"
10117o 15
10118suid 68,0
10119)
10120)
10121uid 3278,0
10122)
10123*314 (LeafLogPort
10124port (LogicalPort
10125m 1
10126decl (Decl
10127n "A_CLK"
10128t "std_logic_vector"
10129b "(3 downto 0)"
10130o 21
10131suid 71,0
10132)
10133)
10134uid 3280,0
10135)
10136*315 (LeafLogPort
10137port (LogicalPort
10138m 1
10139decl (Decl
10140n "OE_ADC"
10141t "STD_LOGIC"
10142preAdd 0
10143posAdd 0
10144o 35
10145suid 73,0
10146)
10147)
10148uid 3382,0
10149)
10150*316 (LeafLogPort
10151port (LogicalPort
10152decl (Decl
10153n "A_OTR"
10154t "std_logic_vector"
10155b "(3 DOWNTO 0)"
10156o 5
10157suid 74,0
10158)
10159)
10160uid 3384,0
10161)
10162*317 (LeafLogPort
10163port (LogicalPort
10164decl (Decl
10165n "A0_D"
10166t "std_logic_vector"
10167b "(11 DOWNTO 0)"
10168o 1
10169suid 79,0
10170)
10171)
10172uid 3386,0
10173)
10174*318 (LeafLogPort
10175port (LogicalPort
10176decl (Decl
10177n "A1_D"
10178t "std_logic_vector"
10179b "(11 DOWNTO 0)"
10180o 2
10181suid 80,0
10182)
10183)
10184uid 3388,0
10185)
10186*319 (LeafLogPort
10187port (LogicalPort
10188decl (Decl
10189n "A2_D"
10190t "std_logic_vector"
10191b "(11 DOWNTO 0)"
10192o 3
10193suid 81,0
10194)
10195)
10196uid 3390,0
10197)
10198*320 (LeafLogPort
10199port (LogicalPort
10200decl (Decl
10201n "A3_D"
10202t "std_logic_vector"
10203b "(11 DOWNTO 0)"
10204o 4
10205suid 82,0
10206)
10207)
10208uid 3392,0
10209)
10210*321 (LeafLogPort
10211port (LogicalPort
10212decl (Decl
10213n "D0_SROUT"
10214t "std_logic"
10215o 6
10216suid 91,0
10217)
10218)
10219uid 3524,0
10220)
10221*322 (LeafLogPort
10222port (LogicalPort
10223decl (Decl
10224n "D1_SROUT"
10225t "std_logic"
10226o 7
10227suid 92,0
10228)
10229)
10230uid 3526,0
10231)
10232*323 (LeafLogPort
10233port (LogicalPort
10234decl (Decl
10235n "D2_SROUT"
10236t "std_logic"
10237o 8
10238suid 93,0
10239)
10240)
10241uid 3528,0
10242)
10243*324 (LeafLogPort
10244port (LogicalPort
10245decl (Decl
10246n "D3_SROUT"
10247t "std_logic"
10248o 9
10249suid 94,0
10250)
10251)
10252uid 3530,0
10253)
10254*325 (LeafLogPort
10255port (LogicalPort
10256m 1
10257decl (Decl
10258n "D_A"
10259t "std_logic_vector"
10260b "(3 DOWNTO 0)"
10261o 29
10262suid 95,0
10263i "(others => '0')"
10264)
10265)
10266uid 3532,0
10267)
10268*326 (LeafLogPort
10269port (LogicalPort
10270m 1
10271decl (Decl
10272n "DWRITE"
10273t "std_logic"
10274o 28
10275suid 96,0
10276i "'0'"
10277)
10278)
10279uid 3534,0
10280)
10281*327 (LeafLogPort
10282port (LogicalPort
10283m 1
10284decl (Decl
10285n "S_CLK"
10286t "std_logic"
10287o 45
10288suid 105,0
10289)
10290)
10291uid 3654,0
10292)
10293*328 (LeafLogPort
10294port (LogicalPort
10295m 1
10296decl (Decl
10297n "W_A"
10298t "std_logic_vector"
10299b "(9 DOWNTO 0)"
10300o 51
10301suid 106,0
10302)
10303)
10304uid 3656,0
10305)
10306*329 (LeafLogPort
10307port (LogicalPort
10308m 2
10309decl (Decl
10310n "W_D"
10311t "std_logic_vector"
10312b "(15 DOWNTO 0)"
10313o 57
10314suid 107,0
10315)
10316)
10317uid 3658,0
10318)
10319*330 (LeafLogPort
10320port (LogicalPort
10321m 1
10322decl (Decl
10323n "W_RES"
10324t "std_logic"
10325o 54
10326suid 108,0
10327i "'1'"
10328)
10329)
10330uid 3660,0
10331)
10332*331 (LeafLogPort
10333port (LogicalPort
10334m 1
10335decl (Decl
10336n "W_RD"
10337t "std_logic"
10338o 53
10339suid 109,0
10340i "'1'"
10341)
10342)
10343uid 3662,0
10344)
10345*332 (LeafLogPort
10346port (LogicalPort
10347m 1
10348decl (Decl
10349n "W_WR"
10350t "std_logic"
10351o 55
10352suid 110,0
10353i "'1'"
10354)
10355)
10356uid 3664,0
10357)
10358*333 (LeafLogPort
10359port (LogicalPort
10360decl (Decl
10361n "W_INT"
10362t "std_logic"
10363o 16
10364suid 111,0
10365)
10366)
10367uid 3666,0
10368)
10369*334 (LeafLogPort
10370port (LogicalPort
10371m 1
10372decl (Decl
10373n "W_CS"
10374t "std_logic"
10375o 52
10376suid 112,0
10377i "'1'"
10378)
10379)
10380uid 3668,0
10381)
10382*335 (LeafLogPort
10383port (LogicalPort
10384m 1
10385decl (Decl
10386n "MOSI"
10387t "std_logic"
10388o 34
10389suid 113,0
10390i "'0'"
10391)
10392)
10393uid 3696,0
10394)
10395*336 (LeafLogPort
10396port (LogicalPort
10397m 2
10398decl (Decl
10399n "MISO"
10400t "std_logic"
10401preAdd 0
10402posAdd 0
10403o 56
10404suid 114,0
10405)
10406)
10407uid 3698,0
10408)
10409*337 (LeafLogPort
10410port (LogicalPort
10411m 1
10412decl (Decl
10413n "RS485_C_RE"
10414t "std_logic"
10415o 39
10416suid 127,0
10417)
10418)
10419uid 3888,0
10420)
10421*338 (LeafLogPort
10422port (LogicalPort
10423m 1
10424decl (Decl
10425n "RS485_C_DE"
10426t "std_logic"
10427o 37
10428suid 128,0
10429)
10430)
10431uid 3890,0
10432)
10433*339 (LeafLogPort
10434port (LogicalPort
10435m 1
10436decl (Decl
10437n "RS485_E_RE"
10438t "std_logic"
10439o 42
10440suid 129,0
10441)
10442)
10443uid 3892,0
10444)
10445*340 (LeafLogPort
10446port (LogicalPort
10447m 1
10448decl (Decl
10449n "RS485_E_DE"
10450t "std_logic"
10451o 40
10452suid 130,0
10453)
10454)
10455uid 3894,0
10456)
10457*341 (LeafLogPort
10458port (LogicalPort
10459m 1
10460decl (Decl
10461n "DENABLE"
10462t "std_logic"
10463o 27
10464suid 131,0
10465i "'0'"
10466)
10467)
10468uid 3896,0
10469)
10470*342 (LeafLogPort
10471port (LogicalPort
10472m 1
10473decl (Decl
10474n "EE_CS"
10475t "std_logic"
10476o 32
10477suid 133,0
10478)
10479)
10480uid 3900,0
10481)
10482*343 (LeafLogPort
10483port (LogicalPort
10484m 1
10485decl (Decl
10486n "D_T"
10487t "std_logic_vector"
10488b "(7 DOWNTO 0)"
10489o 30
10490suid 141,0
10491i "(OTHERS => '0')"
10492)
10493)
10494uid 5322,0
10495)
10496*344 (LeafLogPort
10497port (LogicalPort
10498m 1
10499decl (Decl
10500n "D_T2"
10501t "std_logic_vector"
10502b "(1 DOWNTO 0)"
10503o 31
10504suid 154,0
10505i "(others => '0')"
10506)
10507)
10508uid 6872,0
10509scheme 0
10510)
10511*345 (LeafLogPort
10512port (LogicalPort
10513m 1
10514decl (Decl
10515n "A1_T"
10516t "std_logic_vector"
10517b "(7 DOWNTO 0)"
10518o 19
10519suid 155,0
10520i "(OTHERS => '0')"
10521)
10522)
10523uid 7134,0
10524scheme 0
10525)
10526*346 (LeafLogPort
10527port (LogicalPort
10528m 4
10529decl (Decl
10530n "CLK_50"
10531t "std_logic"
10532o 63
10533suid 163,0
10534)
10535)
10536uid 9516,0
10537)
10538*347 (LeafLogPort
10539port (LogicalPort
10540m 1
10541decl (Decl
10542n "A0_T"
10543t "std_logic_vector"
10544b "(7 DOWNTO 0)"
10545o 18
10546suid 166,0
10547i "(others => '0')"
10548)
10549)
10550uid 10294,0
10551scheme 0
10552)
10553*348 (LeafLogPort
10554port (LogicalPort
10555decl (Decl
10556n "RS485_C_DI"
10557t "std_logic"
10558o 13
10559suid 197,0
10560)
10561)
10562uid 11084,0
10563scheme 0
10564)
10565*349 (LeafLogPort
10566port (LogicalPort
10567m 1
10568decl (Decl
10569n "RS485_C_DO"
10570t "std_logic"
10571o 38
10572suid 198,0
10573)
10574)
10575uid 11086,0
10576scheme 0
10577)
10578*350 (LeafLogPort
10579port (LogicalPort
10580decl (Decl
10581n "RS485_E_DI"
10582t "std_logic"
10583o 14
10584suid 200,0
10585)
10586)
10587uid 11504,0
10588scheme 0
10589)
10590*351 (LeafLogPort
10591port (LogicalPort
10592m 1
10593decl (Decl
10594n "RS485_E_DO"
10595t "std_logic"
10596o 41
10597suid 201,0
10598)
10599)
10600uid 11506,0
10601scheme 0
10602)
10603*352 (LeafLogPort
10604port (LogicalPort
10605m 1
10606decl (Decl
10607n "SRIN"
10608t "std_logic"
10609o 44
10610suid 203,0
10611i "'0'"
10612)
10613)
10614uid 12336,0
10615)
10616*353 (LeafLogPort
10617port (LogicalPort
10618m 1
10619decl (Decl
10620n "AMBER_LED"
10621t "std_logic"
10622o 20
10623suid 207,0
10624)
10625)
10626uid 12768,0
10627)
10628*354 (LeafLogPort
10629port (LogicalPort
10630m 1
10631decl (Decl
10632n "GREEN_LED"
10633t "std_logic"
10634o 33
10635suid 208,0
10636)
10637)
10638uid 12770,0
10639)
10640*355 (LeafLogPort
10641port (LogicalPort
10642m 1
10643decl (Decl
10644n "RED_LED"
10645t "std_logic"
10646o 36
10647suid 209,0
10648)
10649)
10650uid 12772,0
10651)
10652*356 (LeafLogPort
10653port (LogicalPort
10654decl (Decl
10655n "LINE"
10656t "std_logic_vector"
10657b "( 5 DOWNTO 0 )"
10658o 11
10659suid 210,0
10660)
10661)
10662uid 13514,0
10663scheme 0
10664)
10665*357 (LeafLogPort
10666port (LogicalPort
10667decl (Decl
10668n "REFCLK"
10669t "std_logic"
10670o 12
10671suid 211,0
10672)
10673)
10674uid 13626,0
10675scheme 0
10676)
10677*358 (LeafLogPort
10678port (LogicalPort
10679decl (Decl
10680n "D_T_in"
10681t "std_logic_vector"
10682b "(1 DOWNTO 0)"
10683o 10
10684suid 213,0
10685)
10686)
10687uid 14320,0
10688scheme 0
10689)
10690*359 (LeafLogPort
10691port (LogicalPort
10692m 4
10693decl (Decl
10694n "led"
10695t "std_logic_vector"
10696b "(7 DOWNTO 0)"
10697posAdd 0
10698o 77
10699suid 215,0
10700i "(OTHERS => '0')"
10701)
10702)
10703uid 15181,0
10704)
10705*360 (LeafLogPort
10706port (LogicalPort
10707decl (Decl
10708n "D_PLLLCK"
10709t "std_logic_vector"
10710b "(3 DOWNTO 0)"
10711o 81
10712suid 216,0
10713)
10714)
10715uid 15704,0
10716scheme 0
10717)
10718*361 (LeafLogPort
10719port (LogicalPort
10720m 1
10721decl (Decl
10722n "TCS"
10723t "std_logic_vector"
10724b "(3 DOWNTO 0)"
10725o 70
10726suid 217,0
10727)
10728)
10729uid 15843,0
10730scheme 0
10731)
10732*362 (LeafLogPort
10733port (LogicalPort
10734m 1
10735decl (Decl
10736n "DSRCLK"
10737t "std_logic_vector"
10738b "(3 DOWNTO 0)"
10739o 60
10740suid 222,0
10741i "(others => '0')"
10742)
10743)
10744uid 16055,0
10745scheme 0
10746)
10747*363 (LeafLogPort
10748port (LogicalPort
10749m 4
10750decl (Decl
10751n "SRCLK"
10752t "std_logic"
10753o 61
10754suid 225,0
10755i "'0'"
10756)
10757)
10758uid 16253,0
10759)
10760*364 (LeafLogPort
10761port (LogicalPort
10762m 4
10763decl (Decl
10764n "alarm_refclk_too_high"
10765t "std_logic"
10766o 62
10767suid 226,0
10768i "'0'"
10769)
10770)
10771uid 16582,0
10772)
10773*365 (LeafLogPort
10774port (LogicalPort
10775m 4
10776decl (Decl
10777n "alarm_refclk_too_low"
10778t "std_logic"
10779o 63
10780suid 227,0
10781i "'0'"
10782)
10783)
10784uid 16584,0
10785)
10786*366 (LeafLogPort
10787port (LogicalPort
10788m 4
10789decl (Decl
10790n "counter_result"
10791t "std_logic_vector"
10792b "(11 downto 0)"
10793o 64
10794suid 230,0
10795i "(others => '0')"
10796)
10797)
10798uid 16586,0
10799)
10800*367 (LeafLogPort
10801port (LogicalPort
10802lang 2
10803m 4
10804decl (Decl
10805n "ADC_CLK"
10806t "std_logic"
10807o 61
10808suid 231,0
10809)
10810)
10811uid 17310,0
10812)
10813*368 (LeafLogPort
10814port (LogicalPort
10815lang 2
10816m 1
10817decl (Decl
10818n "TRG_V"
10819t "std_logic"
10820o 62
10821suid 232,0
10822i "'0'"
10823)
10824)
10825uid 17399,0
10826scheme 0
10827)
10828]
10829)
10830pdm (PhysicalDM
10831displayShortBounds 1
10832editShortBounds 1
10833uid 67,0
10834optionalChildren [
10835*369 (Sheet
10836sheetRow (SheetRow
10837headerVa (MVa
10838cellColor "49152,49152,49152"
10839fontColor "0,0,0"
10840font "Tahoma,10,0"
10841)
10842cellVa (MVa
10843cellColor "65535,65535,65535"
10844fontColor "0,0,0"
10845font "Tahoma,10,0"
10846)
10847groupVa (MVa
10848cellColor "39936,56832,65280"
10849fontColor "0,0,0"
10850font "Tahoma,10,0"
10851)
10852emptyMRCItem *370 (MRCItem
10853litem &294
10854pos 62
10855dimension 20
10856)
10857uid 69,0
10858optionalChildren [
10859*371 (MRCItem
10860litem &295
10861pos 0
10862dimension 20
10863uid 70,0
10864)
10865*372 (MRCItem
10866litem &296
10867pos 1
10868dimension 23
10869uid 71,0
10870)
10871*373 (MRCItem
10872litem &297
10873pos 2
10874hidden 1
10875dimension 20
10876uid 72,0
10877)
10878*374 (MRCItem
10879litem &307
10880pos 42
10881dimension 20
10882uid 328,0
10883)
10884*375 (MRCItem
10885litem &308
10886pos 43
10887dimension 20
10888uid 330,0
10889)
10890*376 (MRCItem
10891litem &309
10892pos 44
10893dimension 20
10894uid 1492,0
10895)
10896*377 (MRCItem
10897litem &310
10898pos 0
10899dimension 20
10900uid 2436,0
10901)
10902*378 (MRCItem
10903litem &311
10904pos 1
10905dimension 20
10906uid 3040,0
10907)
10908*379 (MRCItem
10909litem &312
10910pos 2
10911dimension 20
10912uid 3277,0
10913)
10914*380 (MRCItem
10915litem &313
10916pos 3
10917dimension 20
10918uid 3279,0
10919)
10920*381 (MRCItem
10921litem &314
10922pos 4
10923dimension 20
10924uid 3281,0
10925)
10926*382 (MRCItem
10927litem &315
10928pos 5
10929dimension 20
10930uid 3383,0
10931)
10932*383 (MRCItem
10933litem &316
10934pos 6
10935dimension 20
10936uid 3385,0
10937)
10938*384 (MRCItem
10939litem &317
10940pos 7
10941dimension 20
10942uid 3387,0
10943)
10944*385 (MRCItem
10945litem &318
10946pos 8
10947dimension 20
10948uid 3389,0
10949)
10950*386 (MRCItem
10951litem &319
10952pos 9
10953dimension 20
10954uid 3391,0
10955)
10956*387 (MRCItem
10957litem &320
10958pos 10
10959dimension 20
10960uid 3393,0
10961)
10962*388 (MRCItem
10963litem &321
10964pos 11
10965dimension 20
10966uid 3525,0
10967)
10968*389 (MRCItem
10969litem &322
10970pos 12
10971dimension 20
10972uid 3527,0
10973)
10974*390 (MRCItem
10975litem &323
10976pos 13
10977dimension 20
10978uid 3529,0
10979)
10980*391 (MRCItem
10981litem &324
10982pos 14
10983dimension 20
10984uid 3531,0
10985)
10986*392 (MRCItem
10987litem &325
10988pos 15
10989dimension 20
10990uid 3533,0
10991)
10992*393 (MRCItem
10993litem &326
10994pos 16
10995dimension 20
10996uid 3535,0
10997)
10998*394 (MRCItem
10999litem &327
11000pos 17
11001dimension 20
11002uid 3655,0
11003)
11004*395 (MRCItem
11005litem &328
11006pos 18
11007dimension 20
11008uid 3657,0
11009)
11010*396 (MRCItem
11011litem &329
11012pos 19
11013dimension 20
11014uid 3659,0
11015)
11016*397 (MRCItem
11017litem &330
11018pos 20
11019dimension 20
11020uid 3661,0
11021)
11022*398 (MRCItem
11023litem &331
11024pos 21
11025dimension 20
11026uid 3663,0
11027)
11028*399 (MRCItem
11029litem &332
11030pos 22
11031dimension 20
11032uid 3665,0
11033)
11034*400 (MRCItem
11035litem &333
11036pos 23
11037dimension 20
11038uid 3667,0
11039)
11040*401 (MRCItem
11041litem &334
11042pos 24
11043dimension 20
11044uid 3669,0
11045)
11046*402 (MRCItem
11047litem &335
11048pos 25
11049dimension 20
11050uid 3697,0
11051)
11052*403 (MRCItem
11053litem &336
11054pos 26
11055dimension 20
11056uid 3699,0
11057)
11058*404 (MRCItem
11059litem &337
11060pos 27
11061dimension 20
11062uid 3889,0
11063)
11064*405 (MRCItem
11065litem &338
11066pos 28
11067dimension 20
11068uid 3891,0
11069)
11070*406 (MRCItem
11071litem &339
11072pos 29
11073dimension 20
11074uid 3893,0
11075)
11076*407 (MRCItem
11077litem &340
11078pos 30
11079dimension 20
11080uid 3895,0
11081)
11082*408 (MRCItem
11083litem &341
11084pos 31
11085dimension 20
11086uid 3897,0
11087)
11088*409 (MRCItem
11089litem &342
11090pos 32
11091dimension 20
11092uid 3901,0
11093)
11094*410 (MRCItem
11095litem &343
11096pos 33
11097dimension 20
11098uid 5323,0
11099)
11100*411 (MRCItem
11101litem &344
11102pos 34
11103dimension 20
11104uid 6873,0
11105)
11106*412 (MRCItem
11107litem &345
11108pos 35
11109dimension 20
11110uid 7135,0
11111)
11112*413 (MRCItem
11113litem &346
11114pos 45
11115dimension 20
11116uid 9517,0
11117)
11118*414 (MRCItem
11119litem &347
11120pos 36
11121dimension 20
11122uid 10295,0
11123)
11124*415 (MRCItem
11125litem &348
11126pos 37
11127dimension 20
11128uid 11085,0
11129)
11130*416 (MRCItem
11131litem &349
11132pos 38
11133dimension 20
11134uid 11087,0
11135)
11136*417 (MRCItem
11137litem &350
11138pos 39
11139dimension 20
11140uid 11505,0
11141)
11142*418 (MRCItem
11143litem &351
11144pos 40
11145dimension 20
11146uid 11507,0
11147)
11148*419 (MRCItem
11149litem &352
11150pos 41
11151dimension 20
11152uid 12337,0
11153)
11154*420 (MRCItem
11155litem &353
11156pos 46
11157dimension 20
11158uid 12769,0
11159)
11160*421 (MRCItem
11161litem &354
11162pos 47
11163dimension 20
11164uid 12771,0
11165)
11166*422 (MRCItem
11167litem &355
11168pos 48
11169dimension 20
11170uid 12773,0
11171)
11172*423 (MRCItem
11173litem &356
11174pos 49
11175dimension 20
11176uid 13515,0
11177)
11178*424 (MRCItem
11179litem &357
11180pos 50
11181dimension 20
11182uid 13627,0
11183)
11184*425 (MRCItem
11185litem &358
11186pos 51
11187dimension 20
11188uid 14321,0
11189)
11190*426 (MRCItem
11191litem &359
11192pos 52
11193dimension 20
11194uid 15182,0
11195)
11196*427 (MRCItem
11197litem &360
11198pos 53
11199dimension 20
11200uid 15705,0
11201)
11202*428 (MRCItem
11203litem &361
11204pos 54
11205dimension 20
11206uid 15844,0
11207)
11208*429 (MRCItem
11209litem &362
11210pos 55
11211dimension 20
11212uid 16056,0
11213)
11214*430 (MRCItem
11215litem &363
11216pos 56
11217dimension 20
11218uid 16254,0
11219)
11220*431 (MRCItem
11221litem &364
11222pos 57
11223dimension 20
11224uid 16583,0
11225)
11226*432 (MRCItem
11227litem &365
11228pos 58
11229dimension 20
11230uid 16585,0
11231)
11232*433 (MRCItem
11233litem &366
11234pos 59
11235dimension 20
11236uid 16587,0
11237)
11238*434 (MRCItem
11239litem &367
11240pos 60
11241dimension 20
11242uid 17311,0
11243)
11244*435 (MRCItem
11245litem &368
11246pos 61
11247dimension 20
11248uid 17400,0
11249)
11250]
11251)
11252sheetCol (SheetCol
11253propVa (MVa
11254cellColor "0,49152,49152"
11255fontColor "0,0,0"
11256font "Tahoma,10,0"
11257textAngle 90
11258)
11259uid 73,0
11260optionalChildren [
11261*436 (MRCItem
11262litem &298
11263pos 0
11264dimension 20
11265uid 74,0
11266)
11267*437 (MRCItem
11268litem &300
11269pos 1
11270dimension 50
11271uid 75,0
11272)
11273*438 (MRCItem
11274litem &301
11275pos 2
11276dimension 100
11277uid 76,0
11278)
11279*439 (MRCItem
11280litem &302
11281pos 3
11282dimension 50
11283uid 77,0
11284)
11285*440 (MRCItem
11286litem &303
11287pos 4
11288dimension 100
11289uid 78,0
11290)
11291*441 (MRCItem
11292litem &304
11293pos 5
11294dimension 100
11295uid 79,0
11296)
11297*442 (MRCItem
11298litem &305
11299pos 6
11300dimension 182
11301uid 80,0
11302)
11303*443 (MRCItem
11304litem &306
11305pos 7
11306dimension 80
11307uid 81,0
11308)
11309]
11310)
11311fixedCol 4
11312fixedRow 2
11313name "Ports"
11314uid 68,0
11315vaOverrides [
11316]
11317)
11318]
11319)
11320uid 53,0
11321)
11322genericsCommonDM (CommonDM
11323ldm (LogicalDM
11324emptyRow *444 (LEmptyRow
11325)
11326uid 83,0
11327optionalChildren [
11328*445 (RefLabelRowHdr
11329)
11330*446 (TitleRowHdr
11331)
11332*447 (FilterRowHdr
11333)
11334*448 (RefLabelColHdr
11335tm "RefLabelColHdrMgr"
11336)
11337*449 (RowExpandColHdr
11338tm "RowExpandColHdrMgr"
11339)
11340*450 (GroupColHdr
11341tm "GroupColHdrMgr"
11342)
11343*451 (NameColHdr
11344tm "GenericNameColHdrMgr"
11345)
11346*452 (TypeColHdr
11347tm "GenericTypeColHdrMgr"
11348)
11349*453 (InitColHdr
11350tm "GenericValueColHdrMgr"
11351)
11352*454 (PragmaColHdr
11353tm "GenericPragmaColHdrMgr"
11354)
11355*455 (EolColHdr
11356tm "GenericEolColHdrMgr"
11357)
11358]
11359)
11360pdm (PhysicalDM
11361displayShortBounds 1
11362editShortBounds 1
11363uid 95,0
11364optionalChildren [
11365*456 (Sheet
11366sheetRow (SheetRow
11367headerVa (MVa
11368cellColor "49152,49152,49152"
11369fontColor "0,0,0"
11370font "Tahoma,10,0"
11371)
11372cellVa (MVa
11373cellColor "65535,65535,65535"
11374fontColor "0,0,0"
11375font "Tahoma,10,0"
11376)
11377groupVa (MVa
11378cellColor "39936,56832,65280"
11379fontColor "0,0,0"
11380font "Tahoma,10,0"
11381)
11382emptyMRCItem *457 (MRCItem
11383litem &444
11384pos 0
11385dimension 20
11386)
11387uid 97,0
11388optionalChildren [
11389*458 (MRCItem
11390litem &445
11391pos 0
11392dimension 20
11393uid 98,0
11394)
11395*459 (MRCItem
11396litem &446
11397pos 1
11398dimension 23
11399uid 99,0
11400)
11401*460 (MRCItem
11402litem &447
11403pos 2
11404hidden 1
11405dimension 20
11406uid 100,0
11407)
11408]
11409)
11410sheetCol (SheetCol
11411propVa (MVa
11412cellColor "0,49152,49152"
11413fontColor "0,0,0"
11414font "Tahoma,10,0"
11415textAngle 90
11416)
11417uid 101,0
11418optionalChildren [
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11420litem &448
11421pos 0
11422dimension 20
11423uid 102,0
11424)
11425*462 (MRCItem
11426litem &450
11427pos 1
11428dimension 50
11429uid 103,0
11430)
11431*463 (MRCItem
11432litem &451
11433pos 2
11434dimension 100
11435uid 104,0
11436)
11437*464 (MRCItem
11438litem &452
11439pos 3
11440dimension 100
11441uid 105,0
11442)
11443*465 (MRCItem
11444litem &453
11445pos 4
11446dimension 50
11447uid 106,0
11448)
11449*466 (MRCItem
11450litem &454
11451pos 5
11452dimension 50
11453uid 107,0
11454)
11455*467 (MRCItem
11456litem &455
11457pos 6
11458dimension 80
11459uid 108,0
11460)
11461]
11462)
11463fixedCol 3
11464fixedRow 2
11465name "Ports"
11466uid 96,0
11467vaOverrides [
11468]
11469)
11470]
11471)
11472uid 82,0
11473type 1
11474)
11475activeModelName "BlockDiag"
11476)
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