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Last change
on this file since 10121 was 10121, checked in by neise, 14 years ago |
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synchronous trigger handling added
continous soft trigger generation.
---> control frequency via 'send 0x21??'
each step increases trigger delay by 12.5ms
0x2100 = 40Hz
0x21FF = 0.3Hz
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File size:
472 bytes
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| Line | |
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| 1 | ARCHITECTURES list {
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| 2 | {dataram_64b_16b_width15 dataram_64b_16b_width15_a} list {
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| 3 | COREGEN_INFO list {
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| 4 | COREGEN_VIEW atom 1
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| 5 | PATH atom .hdlsidedata/dataRAM_64b_16b_width15_dataRAM_64b_16b_width15_a.vhd.info/Coregen/dataRAM_64b_16b_width15.xco
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| 6 | }
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| 7 | SYNTHESIS_FILE list {
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| 8 | TECH_INFO atom {dataRAM_64b_16b_width15.ngc:Xilinx spartan3adsp}
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| 9 | IS_ACTIVE atom 1
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| 10 | PATH atom Synthesis/dataRAM_64b_16b_width15.ngc
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| 11 | }
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| 12 | }
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| 13 | }
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| 14 | INCLUDE list {
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| 15 | DEFAULT atom 1
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| 16 | }
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