1 | -- VHDL Entity FACT_FAD_TB_lib.REFCLK_counter_tb.symbol
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2 | --
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3 | -- Created:
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4 | -- by - daqct3.UNKNOWN (IHP110)
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5 | -- at - 18:11:15 03.03.2011
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6 | --
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7 | -- Generated by Mentor Graphics' HDL Designer(TM) 2009.1 (Build 12)
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8 | --
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9 |
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10 |
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11 | ENTITY REFCLK_counter_tb IS
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12 | GENERIC(
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13 | FREQ_UPPER_LIMIT : integer := 3000;
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14 | FREQ_LOWER_LIMIT : integer := 300
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15 | );
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16 | -- Declarations
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17 |
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18 | END REFCLK_counter_tb ;
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19 |
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20 | --
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21 | -- VHDL Architecture FACT_FAD_TB_lib.REFCLK_counter_tb.struct
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22 | --
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23 | -- Created:
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24 | -- by - daqct3.UNKNOWN (IHP110)
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25 | -- at - 18:11:15 03.03.2011
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26 | --
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27 | -- Generated by Mentor Graphics' HDL Designer(TM) 2009.1 (Build 12)
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28 | --
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29 | LIBRARY ieee;
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30 | USE ieee.std_logic_1164.ALL;
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31 | USE IEEE.NUMERIC_STD.ALL;
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32 | LIBRARY FACT_FAD_lib;
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33 | USE FACT_FAD_lib.fad_definitions.ALL;
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34 | USE ieee.std_logic_unsigned.all;
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35 |
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36 | LIBRARY FACT_FAD_lib;
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37 | LIBRARY FACT_FAD_TB_lib;
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38 |
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39 | ARCHITECTURE struct OF REFCLK_counter_tb IS
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40 |
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41 | -- Architecture declarations
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42 |
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43 | -- Internal signal declarations
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44 | SIGNAL alarm_refclk_too_high : std_logic;
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45 | SIGNAL alarm_refclk_too_low : std_logic;
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46 | SIGNAL clk : std_logic := '0';
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47 | SIGNAL counter_result : std_logic_vector(11 DOWNTO 0);
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48 | SIGNAL refclk_in : std_logic;
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49 |
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50 |
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51 | -- Component Declarations
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52 | COMPONENT REFCLK_counter
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53 | PORT (
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54 | clk : IN std_logic;
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55 | refclk_in : IN std_logic;
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56 | alarm_refclk_too_high : OUT std_logic := '0';
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57 | alarm_refclk_too_low : OUT std_logic := '0';
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58 | counter_result : OUT std_logic_vector (11 DOWNTO 0) := (others => '0')
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59 | );
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60 | END COMPONENT;
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61 | COMPONENT REFCLK_counter_tester
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62 | PORT (
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63 | alarm_refclk_too_high : IN std_logic ;
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64 | alarm_refclk_too_low : IN std_logic ;
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65 | counter_result : IN std_logic_vector (11 DOWNTO 0);
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66 | clk : OUT std_logic ;
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67 | refclk_in : OUT std_logic
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68 | );
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69 | END COMPONENT;
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70 |
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71 | -- Optional embedded configurations
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72 | -- pragma synthesis_off
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73 | FOR ALL : REFCLK_counter USE ENTITY FACT_FAD_lib.REFCLK_counter;
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74 | FOR ALL : REFCLK_counter_tester USE ENTITY FACT_FAD_TB_lib.REFCLK_counter_tester;
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75 | -- pragma synthesis_on
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76 |
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77 |
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78 | BEGIN
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79 |
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80 | -- Instance port mappings.
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81 | U_0 : REFCLK_counter
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82 | PORT MAP (
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83 | clk => clk,
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84 | refclk_in => refclk_in,
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85 | counter_result => counter_result,
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86 | alarm_refclk_too_high => alarm_refclk_too_high,
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87 | alarm_refclk_too_low => alarm_refclk_too_low
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88 | );
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89 | U_1 : REFCLK_counter_tester
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90 | PORT MAP (
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91 | alarm_refclk_too_high => alarm_refclk_too_high,
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92 | alarm_refclk_too_low => alarm_refclk_too_low,
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93 | counter_result => counter_result,
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94 | clk => clk,
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95 | refclk_in => refclk_in
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96 | );
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97 |
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98 | END struct;
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