source: firmware/FAD/FACT_FAD_TB_lib/hdl/w5300_emulator_beha.vhd@ 17635

Last change on this file since 17635 was 11755, checked in by neise, 13 years ago
reinit of this svn repos .... it was all too messy deleted the old folders and restarted with FACT_FAD_lib only. (well and the testbenches)
File size: 2.7 KB
Line 
1--
2-- VHDL Architecture FACT_FAD_TB_lib.w5300_emulator.beha
3--
4-- Created:
5-- by - FPGA_Developer.UNKNOWN (EEPC8)
6-- at - 07:51:36 04.02.2010
7--
8-- using Mentor Graphics HDL Designer(TM) 2008.1 (Build 17)
9--
10LIBRARY ieee;
11USE ieee.std_logic_1164.all;
12USE ieee.std_logic_arith.all;
13USE ieee.std_logic_unsigned.all;
14LIBRARY FACT_FAD_lib;
15USE FACT_FAD_lib.fad_definitions.all;
16
17ENTITY w5300_emulator IS
18 PORT(
19 int : out std_logic := '1';
20 addr : in std_logic_vector (9 DOWNTO 0);
21 data : inout std_logic_vector (15 DOWNTO 0);
22 rd : in std_logic;
23 cs : in std_logic;
24 wr : in std_logic
25 );
26
27-- Declarations
28
29END w5300_emulator ;
30
31architecture beha of w5300_emulator is
32
33 signal open_done : std_logic_vector(7 downto 0) := (others => '0');
34 signal data_temp : std_logic_vector(15 downto 0);
35
36 signal RSR_0, RSR_1 : std_logic_vector (15 downto 0);
37 signal FIFOR_CNT : integer := 0;
38
39begin
40
41 data <= data_temp when (rd = '0') else (others => 'Z');
42 data_temp <= data when (wr = '0') else (others => 'Z');
43
44 set_proc : process
45 begin
46 FIFOR_CNT <= 0;
47 RSR_0 <= X"0000";
48 RSR_1 <= X"0000";
49 wait for 150 us;
50 RSR_1 <= X"0001";
51 wait for 500 us;
52 RSR_1 <= X"0002";
53 wait for 1000 us;
54 FIFOR_CNT <= 1;
55 wait for 1000 us;
56 RSR_1 <= X"0004";
57
58 FIFOR_CNT <= 2;
59 wait for 40 us;
60 FIFOR_CNT <= 3;
61
62 wait for 200000 us;
63 RSR_1 <= X"0000";
64-- wait for 1 ms;
65-- RSR_1 <= X"0002";
66-- FIFOR_CNT <= 2;
67
68-- wait for 6 ms;
69-- int <= '0';
70
71-- wait for 1 ms;
72-- RSR_1 <= X"0000";
73-- FIFOR_CNT <= 3;
74 wait;
75 end process set_proc;
76
77 w5300_proc : process (addr)
78 begin
79 for i in 0 to 7 loop
80 if (addr = conv_integer(W5300_S0_SSR) + i * 64) then
81 if (open_done(i) = '0') then
82 data_temp <= X"0013";
83 open_done(i) <= '1';
84 else
85 data_temp <= X"0017";
86 end if;
87 elsif (addr = conv_integer(W5300_S0_TX_FSR) + i * conv_integer(W5300_S_INC)) then
88 data_temp <= X"0000";
89 elsif (addr = conv_integer(W5300_S0_TX_FSR + 2) + i * conv_integer(W5300_S_INC)) then
90 data_temp <= X"3C00";
91 elsif (addr = conv_integer(W5300_S0_RX_RSR)) then
92 data_temp <= RSR_0;
93 elsif (addr = conv_integer(W5300_S0_RX_RSR) + 2) then
94 data_temp <= RSR_1;
95 elsif (addr = conv_integer(W5300_S0_RX_FIFOR)) then
96 if (FIFOR_CNT = 0) then
97 data_temp <= X"1800";
98
99 elsif (FIFOR_CNT = 1) then
100 data_temp <= X"A000";
101
102 elsif (FIFOR_CNT = 2) then
103 data_temp <= X"A000";
104
105
106 elsif (FIFOR_CNT = 3) then
107 data_temp <= X"A000";
108 end if;
109 else
110 null;
111 end if;
112 end loop;
113 end process w5300_proc;
114
115
116end architecture beha;
117
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