source: firmware/FAD/FACT_FAD_lib/hdl/fad_board.ucf@ 20115

Last change on this file since 20115 was 11755, checked in by neise, 13 years ago
reinit of this svn repos .... it was all too messy deleted the old folders and restarted with FACT_FAD_lib only. (well and the testbenches)
File size: 10.6 KB
Line 
1###########################################################
2# Pin location constraints
3###########################################################
4
5#CLOCK
6NET X_50M LOC = AF13 | IOSTANDARD=LVCMOS33; #ok
7
8## single ended trigger input
9NET TRG LOC = AC8 | IOSTANDARD=LVCMOS33; #ok
10
11#Test Trigger input on 'Testpoint near W5300'
12#NET _TW<3> LOC = R19 | IOSTANDARD=LVCMOS33; #ok
13#NET TEST_TRG LOC = R19 | IOSTANDARD=LVCMOS33 ;
14
15
16
17## trigger veto: xilinx output
18NET TRG_V LOC = AC9 | IOSTANDARD=LVCMOS33; #ok
19## NET INIT_B LOC = AA15 | IOSTANDARD=LVCMOS33; #ok
20
21
22
23# RS485 Driver
24
25NET RS485_C_DE LOC = C5 | IOSTANDARD=LVCMOS33; #ok
26NET RS485_C_RE LOC = C6 | IOSTANDARD=LVCMOS33; #ok
27NET RS485_C_DO LOC = C7 | IOSTANDARD=LVCMOS33; #ok
28#NET RS485_C_DI LOC = C8 | IOSTANDARD=LVCMOS33; #ok
29
30NET RS485_E_DE LOC = D20 | IOSTANDARD=LVCMOS33; #ok
31NET RS485_E_RE LOC = D21 | IOSTANDARD=LVCMOS33; #ok
32NET RS485_E_DO LOC = D22 | IOSTANDARD=LVCMOS33; #ok
33NET RS485_E_DI LOC = D23 | IOSTANDARD=LVCMOS33; #ok
34
35
36# BOARD ID - inputs
37NET LINE<0> LOC = Y1 | IOSTANDARD=LVCMOS33; #ok
38NET LINE<1> LOC = Y2 | IOSTANDARD=LVCMOS33; #ok
39NET LINE<2> LOC = AB1 | IOSTANDARD=LVCMOS33; #ok
40NET LINE<3> LOC = AC1 | IOSTANDARD=LVCMOS33; #ok
41NET LINE<4> LOC = AD1 | IOSTANDARD=LVCMOS33; #ok
42NET LINE<5> LOC = AD2 | IOSTANDARD=LVCMOS33; #ok
43
44# W5300
45#######################################################
46NET W_D<15> LOC = D24 | IOSTANDARD=LVCMOS33; #ok
47NET W_D<14> LOC = D25 | IOSTANDARD=LVCMOS33; #ok
48NET W_D<13> LOC = D26 | IOSTANDARD=LVCMOS33; #ok
49NET W_D<12> LOC = E24 | IOSTANDARD=LVCMOS33; #ok
50NET W_D<11> LOC = E26 | IOSTANDARD=LVCMOS33; #ok
51NET W_D<10> LOC = F25 | IOSTANDARD=LVCMOS33; #ok
52NET W_D<9> LOC = F24 | IOSTANDARD=LVCMOS33; #ok
53NET W_D<8> LOC = G23 | IOSTANDARD=LVCMOS33; #ok
54NET W_D<7> LOC = G24 | IOSTANDARD=LVCMOS33; #ok
55NET W_D<6> LOC = J23 | IOSTANDARD=LVCMOS33; #ok
56NET W_D<5> LOC = K25 | IOSTANDARD=LVCMOS33; #ok
57NET W_D<4> LOC = K26 | IOSTANDARD=LVCMOS33; #ok
58NET W_D<3> LOC = J22 | IOSTANDARD=LVCMOS33; #ok
59NET W_D<2> LOC = K23 | IOSTANDARD=LVCMOS33; #ok
60NET W_D<1> LOC = L22 | IOSTANDARD=LVCMOS33; #ok
61NET W_D<0> LOC = M22 | IOSTANDARD=LVCMOS33; #ok
62
63NET W_A<9> LOC = V24 | IOSTANDARD=LVCMOS33; #ok
64NET W_A<8> LOC = V25 | IOSTANDARD=LVCMOS33; #ok
65NET W_A<7> LOC = W23 | IOSTANDARD=LVCMOS33; #ok
66NET W_A<6> LOC = Y23 | IOSTANDARD=LVCMOS33; #ok
67NET W_A<5> LOC = Y24 | IOSTANDARD=LVCMOS33; #ok
68NET W_A<4> LOC = Y25 | IOSTANDARD=LVCMOS33; #ok
69NET W_A<3> LOC = AA23 | IOSTANDARD=LVCMOS33; #ok
70NET W_A<2> LOC = AA24 | IOSTANDARD=LVCMOS33; #ok
71NET W_A<1> LOC = AA25 | IOSTANDARD=LVCMOS33; #ok
72NET W_A<0> LOC = Y22 | IOSTANDARD=LVCMOS33; #ok DUMMY
73
74NET W_WR LOC = P22 | IOSTANDARD=LVCMOS33; #ok
75NET W_RD LOC = R20 | IOSTANDARD=LVCMOS33; #ok
76NET W_CS LOC = T20 | IOSTANDARD=LVCMOS33; #ok
77NET W_INT LOC = U22 | IOSTANDARD=LVCMOS33; #ok
78NET W_RES LOC = U23 | IOSTANDARD=LVCMOS33; #ok
79
80#NET W_BRDY<3> LOC = AD26 | IOSTANDARD=LVCMOS33; #ok
81#NET W_BRDY<2> LOC = AC26 | IOSTANDARD=LVCMOS33; #ok
82#NET W_BRDY<1> LOC = AC25 | IOSTANDARD=LVCMOS33; #ok
83#NET W_BRDY<0> LOC = AB26 | IOSTANDARD=LVCMOS33; #ok
84# Testpoint near W5300
85NET W_T<3> LOC = R19 | IOSTANDARD=LVCMOS33; #ok
86NET W_T<2> LOC = N21 | IOSTANDARD=LVCMOS33; #ok
87NET W_T<1> LOC = M21 | IOSTANDARD=LVCMOS33; #ok
88NET W_T<0> LOC = K21 | IOSTANDARD=LVCMOS33; #ok
89
90# Platform Flash - serial connection
91#######################################################
92##NET FL_CLK LOC = AE24 | IOSTANDARD=LVCMOS33; #ok
93##NET FL_D0 LOC = AF24 | IOSTANDARD=LVCMOS33; #ok
94
95# DRS Signals
96#######################################################
97NET DENABLE LOC = B1 | IOSTANDARD=LVCMOS25; #ok
98NET DWRITE LOC = R2 | IOSTANDARD=LVCMOS25; #ok
99
100NET SRIN LOC = E1 | IOSTANDARD=LVCMOS25; #ok -- nur fuer vollauslese noetig; auf Z legen.
101NET REFCLK LOC = AC11 | IOSTANDARD=LVCMOS25; #ok -- listen to REFCLK possible
102
103
104NET D_A<3> LOC = N1 | IOSTANDARD=LVCMOS25; #ok
105NET D_A<2> LOC = M2 | IOSTANDARD=LVCMOS25; #ok
106NET D_A<1> LOC = K2 | IOSTANDARD=LVCMOS25; #ok
107NET D_A<0> LOC = H2 | IOSTANDARD=LVCMOS25; #ok
108
109
110# PLL-Lock input: high active
111NET D_PLLLCK<0> LOC = L3 | IOSTANDARD=LVCMOS25 | PULLDOWN ; #ok
112NET D_PLLLCK<1> LOC = N2 | IOSTANDARD=LVCMOS25 | PULLDOWN ; #ok
113NET D_PLLLCK<2> LOC = AA2 | IOSTANDARD=LVCMOS25 | PULLDOWN ; #ok
114NET D_PLLLCK<3> LOC = AC2 | IOSTANDARD=LVCMOS25 | PULLDOWN ; #ok
115
116# SROUT input: read stop position here
117# bus??
118NET D0_SROUT LOC = B2 | IOSTANDARD=LVCMOS25; #ok
119NET D1_SROUT LOC = E3 | IOSTANDARD=LVCMOS25; #ok
120NET D2_SROUT LOC = N4 | IOSTANDARD=LVCMOS25; #ok
121NET D3_SROUT LOC = U1 | IOSTANDARD=LVCMOS25; #ok
122
123# RSRLOAD & SRCLK output: clock out analog samples here
124# SRCLK bus??
125NET RSRLOAD LOC = H1 | IOSTANDARD=LVCMOS25; #ok
126#
127NET DSRCLK<0> LOC = F2 | IOSTANDARD=LVCMOS25; #ok
128NET DSRCLK<1> LOC = F3 | IOSTANDARD=LVCMOS25; #ok
129NET DSRCLK<2> LOC = R3 | IOSTANDARD=LVCMOS25; #ok
130NET DSRCLK<3> LOC = V1 | IOSTANDARD=LVCMOS25; #ok
131
132# Testpoints near DRS Chips
133# oganized in 3 times 4x2 pins
134NET D_T<0> LOC = D3 | IOSTANDARD=LVCMOS25; #ok
135NET D_T<1> LOC = G3 | IOSTANDARD=LVCMOS25; #ok
136NET D_T<2> LOC = G4 | IOSTANDARD=LVCMOS25; #ok
137NET D_T<3> LOC = J4 | IOSTANDARD=LVCMOS25; #ok
138NET D_T<4> LOC = K5 | IOSTANDARD=LVCMOS25; #ok
139NET D_T<5> LOC = L4 | IOSTANDARD=LVCMOS25; #ok
140#NET D_T_in<0> LOC = M3 | IOSTANDARD=LVCMOS25 | pullup; #ok was: NET D_T<6> LOC = M3
141#NET D_T_in<1> LOC = T3 | IOSTANDARD=LVCMOS25 | pullup; #ok was: NET D_T<7> LOC = T3
142NET D_T<6> LOC = M3 | IOSTANDARD=LVCMOS25; #ok
143NET D_T<7> LOC = T3 | IOSTANDARD=LVCMOS25; #ok
144NET D_T2<0> LOC = U2 | IOSTANDARD=LVCMOS25; #ok was D_T<8>
145NET D_T2<1> LOC = V2 | IOSTANDARD=LVCMOS25; #ok was D_T<9>
146#NET D_T2<2> LOC = W3 | IOSTANDARD=LVCMOS25; #ok aka D_TA was D_T<10>
147#NET D_T2<3> LOC = AA3 | IOSTANDARD=LVCMOS25; #ok aka D_TB was D_T<11>
148NET D_T_in<0> LOC = W3 | IOSTANDARD=LVCMOS25 | pullup; #ok aka D_TA was D_T<10>
149NET D_T_in<1> LOC = AA3 | IOSTANDARD=LVCMOS25 | pullup; #ok aka D_TB was D_T<11>
150
151# ADC Signals
152#######################################################
153NET OE_ADC LOC = D6 | IOSTANDARD=LVCMOS33; #ok FIXME was A-OEB
154
155NET A_CLK<0> LOC = B23 | IOSTANDARD=LVCMOS33; #ok aka A0_CLK
156NET A_CLK<1> LOC = A3 | IOSTANDARD=LVCMOS33; #ok aka A1_CLK
157NET A_CLK<2> LOC = AE3 | IOSTANDARD=LVCMOS33; #ok aka A2_CLK
158NET A_CLK<3> LOC = AE25 | IOSTANDARD=LVCMOS33; #ok aka A3_CLK
159
160NET A_OTR<0> LOC = A22 | IOSTANDARD=LVCMOS33; #ok aka A0_OTR
161NET A_OTR<1> LOC = B12 | IOSTANDARD=LVCMOS33; #ok aka A1_OTR
162NET A_OTR<2> LOC = AF3 | IOSTANDARD=LVCMOS33; #ok aka A2_OTR
163NET A_OTR<3> LOC = AE17 | IOSTANDARD=LVCMOS33; #ok aka A3_OTR
164
165# ADC data
166NET A0_D<0> LOC = D13 | IOSTANDARD=LVCMOS33; #ok
167NET A0_D<1> LOC = A15 | IOSTANDARD=LVCMOS33; #ok
168NET A0_D<2> LOC = B15 | IOSTANDARD=LVCMOS33; #ok
169NET A0_D<3> LOC = B17 | IOSTANDARD=LVCMOS33; #ok
170NET A0_D<4> LOC = D16 | IOSTANDARD=LVCMOS33; #ok
171NET A0_D<5> LOC = A18 | IOSTANDARD=LVCMOS33; #ok
172NET A0_D<6> LOC = B18 | IOSTANDARD=LVCMOS33; #ok
173NET A0_D<7> LOC = A19 | IOSTANDARD=LVCMOS33; #ok
174NET A0_D<8> LOC = B19 | IOSTANDARD=LVCMOS33; #ok
175NET A0_D<9> LOC = A20 | IOSTANDARD=LVCMOS33; #ok
176NET A0_D<10> LOC = B21 | IOSTANDARD=LVCMOS33; #ok
177NET A0_D<11> LOC = C22 | IOSTANDARD=LVCMOS33; #ok
178
179NET A1_D<0> LOC = B3 | IOSTANDARD=LVCMOS33; #ok
180NET A1_D<1> LOC = A4 | IOSTANDARD=LVCMOS33; #ok
181NET A1_D<2> LOC = B4 | IOSTANDARD=LVCMOS33; #ok
182NET A1_D<3> LOC = B6 | IOSTANDARD=LVCMOS33; #ok
183NET A1_D<4> LOC = B7 | IOSTANDARD=LVCMOS33; #ok
184NET A1_D<5> LOC = A8 | IOSTANDARD=LVCMOS33; #ok
185NET A1_D<6> LOC = B8 | IOSTANDARD=LVCMOS33; #ok
186NET A1_D<7> LOC = A9 | IOSTANDARD=LVCMOS33; #ok
187NET A1_D<8> LOC = B9 | IOSTANDARD=LVCMOS33; #ok
188NET A1_D<9> LOC = A10 | IOSTANDARD=LVCMOS33; #ok
189NET A1_D<10> LOC = B10 | IOSTANDARD=LVCMOS33; #ok
190NET A1_D<11> LOC = A12 | IOSTANDARD=LVCMOS33; #ok
191
192NET A2_D<0> LOC = AD14 | IOSTANDARD=LVCMOS33; #ok
193NET A2_D<1> LOC = AD11 | IOSTANDARD=LVCMOS33; #ok
194NET A2_D<2> LOC = AD7 | IOSTANDARD=LVCMOS33; #ok
195NET A2_D<3> LOC = AE8 | IOSTANDARD=LVCMOS33; #ok
196NET A2_D<4> LOC = AF8 | IOSTANDARD=LVCMOS33; #ok
197NET A2_D<5> LOC = AE7 | IOSTANDARD=LVCMOS33; #ok
198NET A2_D<6> LOC = AC6 | IOSTANDARD=LVCMOS33; #ok
199NET A2_D<7> LOC = AE6 | IOSTANDARD=LVCMOS33; #ok
200NET A2_D<8> LOC = AF5 | IOSTANDARD=LVCMOS33; #ok
201NET A2_D<9> LOC = AD6 | IOSTANDARD=LVCMOS33; #ok
202NET A2_D<10> LOC = AF4 | IOSTANDARD=LVCMOS33; #ok
203NET A2_D<11> LOC = AE4 | IOSTANDARD=LVCMOS33; #ok
204
205NET A3_D<0> LOC = AF25 | IOSTANDARD=LVCMOS33; #ok
206NET A3_D<1> LOC = AE23 | IOSTANDARD=LVCMOS33; #ok
207NET A3_D<2> LOC = AF23 | IOSTANDARD=LVCMOS33; #ok
208NET A3_D<3> LOC = AD22 | IOSTANDARD=LVCMOS33; #ok
209NET A3_D<4> LOC = AE21 | IOSTANDARD=LVCMOS33; #ok
210NET A3_D<5> LOC = AD21 | IOSTANDARD=LVCMOS33; #ok
211NET A3_D<6> LOC = AF20 | IOSTANDARD=LVCMOS33; #ok
212NET A3_D<7> LOC = AE20 | IOSTANDARD=LVCMOS33; #ok
213NET A3_D<8> LOC = AF19 | IOSTANDARD=LVCMOS33; #ok
214NET A3_D<9> LOC = AC22 | IOSTANDARD=LVCMOS33; #ok
215NET A3_D<10> LOC = AE19 | IOSTANDARD=LVCMOS33; #ok
216NET A3_D<11> LOC = AD19 | IOSTANDARD=LVCMOS33; #ok
217
218# testpoints near ADC
219
220NET A0_T<0> LOC = D8 | IOSTANDARD=LVCMOS33; #ok
221NET A0_T<1> LOC = D9 | IOSTANDARD=LVCMOS33; #ok
222NET A0_T<2> LOC = D10 | IOSTANDARD=LVCMOS33; #ok
223NET A0_T<3> LOC = E10 | IOSTANDARD=LVCMOS33; #ok
224NET A0_T<4> LOC = E12 | IOSTANDARD=LVCMOS33; #ok
225NET A0_T<5> LOC = E14 | IOSTANDARD=LVCMOS33; #ok
226NET A0_T<6> LOC = D17 | IOSTANDARD=LVCMOS33; #ok
227NET A0_T<7> LOC = D18 | IOSTANDARD=LVCMOS33; #ok
228
229NET A1_T<0> LOC = AB9 | IOSTANDARD=LVCMOS33; #ok
230NET A1_T<1> LOC = AB12 | IOSTANDARD=LVCMOS33; #ok
231NET A1_T<2> LOC = AC12 | IOSTANDARD=LVCMOS33; #ok
232NET A1_T<3> LOC = AC14 | IOSTANDARD=LVCMOS33; #ok
233NET A1_T<4> LOC = AC15 | IOSTANDARD=LVCMOS33; #ok
234NET A1_T<5> LOC = AB16 | IOSTANDARD=LVCMOS33; #ok
235NET A1_T<6> LOC = AC16 | IOSTANDARD=LVCMOS33; #ok
236NET A1_T<7> LOC = AB18 | IOSTANDARD=LVCMOS33; #ok
237
238
239
240# SPI bus
241#######################################################
242NET S_CLK LOC = C10 | IOSTANDARD=LVCMOS33; #ok
243NET MOSI LOC = C11 | IOSTANDARD=LVCMOS33; #ok
244NET MISO LOC = C12 | IOSTANDARD=LVCMOS33; #ok
245
246NET TCS<0> LOC = C15 | IOSTANDARD=LVCMOS33; #ok
247NET TCS<1> LOC = C16 | IOSTANDARD=LVCMOS33; #ok
248NET TCS<2> LOC = C17 | IOSTANDARD=LVCMOS33; #ok
249NET TCS<3> LOC = C18 | IOSTANDARD=LVCMOS33; #ok
250NET DAC_CS LOC = C20 | IOSTANDARD=LVCMOS33; #ok
251NET EE_CS LOC = C21 | IOSTANDARD=LVCMOS33; #ok
252
253
254
255# LEDs
256#######################################################
257NET AMBER_LED LOC = C23 | IOSTANDARD=LVCMOS33 | DRIVE = 2;
258NET GREEN_LED LOC = T4 | IOSTANDARD=LVCMOS25 | DRIVE = 2;
259NET RED_LED LOC = AD20 | IOSTANDARD=LVCMOS33 | DRIVE = 2;#schematic: LED_2 D2 RED
260
261
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