source: firmware/FAD/FACT_FAD_lib/hdl/fad_definitions.vhd@ 17713

Last change on this file since 17713 was 11801, checked in by neise, 14 years ago
hex: v214; dec: v220. FAD operates with socket 0 and 1 only. (TX MEM 60kb)
File size: 10.7 KB
Line 
1-- Package File Template
2--
3-- Purpose: This package defines supplemental types, subtypes,
4-- constants, and functions
5library IEEE;
6use IEEE.STD_LOGIC_1164.all;
7use IEEE.STD_LOGIC_ARITH.ALL;
8use IEEE.STD_LOGIC_UNSIGNED.ALL;
9--use std.textio.all;
10--use work.txt_util.all;
11-- use IEEE.NUMERIC_STD.ALL;
12
13package fad_definitions is
14
15
16-- Declare constants
17
18 type mac_type is array (0 to 2) of std_logic_vector (15 downto 0);
19 type ip_type is array (0 to 3) of integer;
20
21 type mac_list_type is array (0 to 2) of mac_type;
22 type ip_list_type is array (0 to 2) of ip_type;
23-- Network Settings
24
25 constant ETHZ_GATEWAY : ip_type := (192, 33, 96, 1);
26 constant CAM_GATEWAY : ip_type := (192, 33, 96, 1); --???????????????
27 constant TUDO_GATEWAY : ip_type := (129, 217, 160, 1);
28
29 constant ETHZ_NETMASK : ip_type := (255, 255, 248, 0);
30 constant CAM_NETMASK : ip_type := (255, 255, 248, 0); --???????????????
31 constant TUDO_NETMASK : ip_type := (255, 255, 255, 0);
32
33 --constant MAC_ZERO : mac_type := (X"0000", X"0000", X"0000");
34 constant MAC_FAD0 : mac_type := (X"0011", X"9561", X"97B4");
35 constant MAC_FAD1 : mac_type := (X"FAC7", X"0FAD", X"0001");
36 constant MAC_FAD2 : mac_type := (X"FAC7", X"0FAD", X"0002");
37
38 --constant IP_ZERO : ip_type := (0,0,0,0);
39 constant IP_TUDO : ip_type := (129, 217, 160, 119);
40 constant IP_ETHZ_FAD0 : ip_type := (192, 33, 99, 225);
41 constant IP_ETHZ_FAD1 : ip_type := (192, 33, 99, 226);
42 constant IP_ETHZ_FAD2 : ip_type := (192, 33, 99, 237);
43
44 -- IP lookup table used to convert CID,BID into IP, if not in camera.
45 constant IP_LIST : ip_list_type := (IP_ETHZ_FAD0, IP_ETHZ_FAD1, IP_ETHZ_FAD2);
46 constant MAC_LIST : mac_list_type := (MAC_FAD0,MAC_FAD1,MAC_FAD2);
47
48 constant FIRST_PORT : integer := 31919;
49 constant CAM_IP_PREFIX : ip_type := (10, 0, 0, 0);
50 constant IP_offset : integer := 128;
51 constant CAM_MAC_prefix : mac_type := (X"FAC7", X"0FAD", X"0000");
52-- Network Settings End
53 --constant SUBVERSION_LONGSTRING : string := "$Rev: 11173 $:: $";
54 --constant SUBVERSION_STRING : string := SUBVERSION_LONGSTRING(7 to 25); -- cut off starting "$Rev: 11173 $:: " and trailing "$"
55 --constant SUBVERSION_NUMBER : std_logic_vector (15 downto 0) := conv_std_logic_vector(str_to_int(SUBVERSION_STRING),16);
56 constant PACKAGE_VERSION : std_logic_vector(7 downto 0) := X"02";
57 constant PACKAGE_SUB_VERSION : std_logic_vector(7 downto 0) := X"14";
58 constant PACKAGE_HEADER_LENGTH : integer := 36;
59 constant PACKAGE_HEADER_ZEROS : integer := 0;
60 constant PACKAGE_END_LENGTH : integer := 2; -- CRC and END-Flag
61 constant PACKAGE_END_ZEROS : integer := 2;
62 constant CHANNEL_HEADER_SIZE : integer := 4;
63 constant NUMBER_OF_DRS : integer := 4;
64 constant POSITION_OF_ROI_IN_CHANNEL_HEADER : integer := 3;
65
66 constant W5300_S_INC : std_logic_vector(6 downto 0) := "1000000"; -- socket address offset
67
68-- W5300 Registers
69 constant W5300_BASE_ADR : std_logic_vector (9 downto 0) := (others => '0');
70 constant W5300_MR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"0";
71 constant W5300_IR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2";
72 constant W5300_IMR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"4";
73 constant W5300_SHAR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"8";
74 constant W5300_GAR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"10";
75 constant W5300_SUBR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"14";
76 constant W5300_SIPR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"18";
77 constant W5300_RTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"1C";
78 constant W5300_RCR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"1E";
79 constant W5300_TMS01R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"20";
80 constant W5300_TMS23R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"22";
81 constant W5300_TMS45R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"24";
82 constant W5300_TMS67R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"26";
83 constant W5300_RMS01R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"28";
84 constant W5300_RMS23R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2A";
85 constant W5300_RMS45R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2C";
86 constant W5300_RMS67R : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"2E";
87 constant W5300_MTYPER : std_logic_vector (9 downto 0) := W5300_BASE_ADR + X"30";
88
89 constant W5300_S0_MR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"0";
90 constant W5300_S0_CR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"2";
91 constant W5300_S0_IMR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"4";
92 constant W5300_S0_IR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"6";
93 constant W5300_S0_SSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"8";
94 constant W5300_S0_PORTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"A";
95 constant W5300_S0_DPORTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"12";
96 constant W5300_S0_DIPR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"14";
97 constant W5300_S0_KPALVTR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"1A"; -- HIGH byte is S0_KPALVTR register
98 constant W5300_S0_TX_WRSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"20";
99 constant W5300_S0_TX_FSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"24";
100 constant W5300_S0_RX_RSR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"28";
101 constant W5300_S0_TX_FIFOR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"2E";
102 constant W5300_S0_RX_FIFOR : std_logic_vector (9 downto 0) := W5300_BASE_ADR + "1000000000" + X"30";
103-- End W5300 registers
104
105-- START W5300 Socket State Codes
106 constant SOCKET_CLOSED : std_logic_vector (7 downto 0) := X"00";
107
108--
109 --constant W5300_TX_FIFO_SIZE_8B : integer := 15360; -- Socket TX FIFO-Size in Bytes
110 constant W5300_TX_FIFO_SIZE_8B : integer := 61440; -- Socket TX FIFO-Size in Bytes
111 constant W5300_TX_FIFO_SIZE : integer := (W5300_TX_FIFO_SIZE_8B / 2); -- Socket TX FIFO-Size in 16 Bit Words
112
113 constant LOG2_OF_RAM_SIZE_64B : integer := 15;
114 --constant RAM_SIZE_64B : integer := 2**LOG2_OF_RAM_SIZE_64B;
115 constant RAM_SIZE_64B : integer := 24576;
116 constant RAM_SIZE_16B : integer := RAM_SIZE_64B * 4;
117
118-- TYPE definitions
119 type roi_max_type is array (0 to 8) of std_logic_vector (10 downto 0);
120 type roi_array_type is array (0 to 35) of integer range 0 to 1024;
121
122 type drs_s_cell_array_type is array (0 to 3) of std_logic_vector (9 downto 0);
123 type adc_data_array_type is array (0 to 3) of std_logic_vector (11 downto 0);
124
125 type dac_array_type is array (0 to 7) of integer range 0 to 2**16 - 1;
126 type sensor_array_type is array (0 to 3) of integer range 0 to 2**16 - 1;
127
128-- constant DEFAULT_ROI : roi_array_type := (115, 125, 100, 102, 155, 101, 0, 101, 106,
129-- 181, 121, 189, 101, 101, 187, 56, 187, 101,
130-- 2, 141, 101, 100, 10, 100, 178, 101, 174,
131-- 12, 181, 100, 102, 101, 102, 0, 101, 108);
132-- constant DEFAULT_ROI : roi_array_type := (others => 100);
133 constant DEFAULT_ROI : roi_array_type := (others => 1024);
134
135 constant DEFAULT_DAC : dac_array_type := (20972, 34079, 20526, 0, 28836, 28836, 28836, 28836);
136 --constant DEFAULT_DAC : dac_array_type := (others => 0);
137
138 constant DEFAULT_DRSADDR : std_logic_vector (3 downto 0):= "0000";
139 constant DEFAULT_DRSADDR_MODE : std_logic := '0';
140
141-- config RAM addresses
142constant BADDR_ROI : std_logic_vector := X"00"; -- Baseaddress ROI-Values
143constant BADDR_DAC : std_logic_vector := X"24"; -- Baseaddress DAC-Values
144
145
146
147-- Commands
148constant CMD_EXECUTE : std_logic_vector := X"04"; --new
149constant CMD_WRITE : std_logic_vector := X"05";
150constant CMD_DENABLE : std_logic_vector := X"06";
151constant CMD_DDISABLE : std_logic_vector := X"07";
152constant CMD_DWRITE_RUN : std_logic_vector := X"08";
153constant CMD_DWRITE_STOP : std_logic_vector := X"09";
154constant CMD_READ : std_logic_vector := X"0A";
155constant CMD_SCLK_ON : std_logic_vector := X"10";
156constant CMD_SCLK_OFF : std_logic_vector := X"11";
157constant CMD_PS_DIRINC : std_logic_vector := X"12";
158constant CMD_PS_DIRDEC : std_logic_vector := X"13";
159constant CMD_PS_DO : std_logic_vector := X"14";
160constant CMD_SRCLK_ON : std_logic_vector := X"15";
161constant CMD_SRCLK_OFF : std_logic_vector := X"16";
162constant CMD_PS_RESET : std_logic_vector := X"17";
163constant CMD_TRIGGERS_ON : std_logic_vector := X"18";
164constant CMD_TRIGGERS_OFF : std_logic_vector := X"19";
165
166constant CMD_RESET_TRIGGER_ID : std_logic_vector := X"2A";
167
168constant CMD_START : std_logic_vector := X"22"; -- set data generator in RUN-mnode
169constant CMD_STOP : std_logic_vector := X"23"; -- set data generator in STOP-mode
170constant CMD_MODE_COMMAND : std_logic_vector := X"30";
171constant CMD_MODE_ALL_SOCKETS : std_logic_vector := X"31";
172
173constant CMD_MANUAL_BUSY_ON : std_logic_vector := X"32";
174constant CMD_MANUAL_BUSY_OFF : std_logic_vector := X"33";
175
176constant CMD_TRIGGER : std_logic_vector := X"A0";
177constant CMD_TRIGGER_C : std_logic_vector := X"1F"; -- should be 1F in next revision .. T.B. wants it.
178constant CMD_TRIGGER_S : std_logic_vector := X"20";
179
180constant CMD_BUSY_FIX_OFF_TRUE : std_logic_vector := X"24";
181constant CMD_BUSY_FIX_OFF_FALSE : std_logic_vector := X"25";
182
183constant CMD_STATUS : std_logic_vector := X"FF";
184
185
186
187-- DRS Registers
188 constant DRS_ADDR_IDLE : std_logic_vector := "1001";
189 constant DRS_CONFIG_REG : std_logic_vector := "1100";
190 constant DRS_WRITE_SHIFT_REG : std_logic_vector := "1101";
191 constant DRS_WRITE_CONFIG_REG : std_logic_vector := "1110";
192 constant DRS_DISABLE_ALL_OUTS : std_logic_vector := "1111";
193
194-- Declare functions and procedure
195
196
197constant TIME_UNTIL_READ_READY : integer := 4;
198constant TIME_UNTIL_WRITE_READY : integer := 4;
199
200
201-- FUNCTION wait_if_started (
202-- signal sr : std_logic_vector(2 downto 0)
203-- ) RETURN std_logic;
204--
205
206
207-- for W5300 modul2
208constant W5300_RAM_ADDR_WIDTH : integer := 17;
209constant TX_FIFO_MAX_FREE : std_logic_vector(16 downto 0) := conv_std_logic_vector(15360 ,17);
210
211-- not needed
212--constant ADC_DATA_OFFSET_ADDR : std_logic_vector (W5300_RAM_ADDR_WIDTH-1 downto 0) := conv_std_logic_vector ( 36 , W5300_RAM_ADDR_WIDTH);
213
214
215end fad_definitions;
216
217--PACKAGE BODY fad_definitions is
218--
219-- FUNCTION wait_if_started (
220-- signal sr : std_logic_vector(2 downto 0)
221-- ) RETURN std_logic IS
222--
223-- BEGIN
224--
225--
226--
227-- END FUNCTION wait_if_started;
228--
229--
230--END fad_definitions;
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