DocumentHdrVersion "1.1" Header (DocumentHdr version 2 dmPackageRefs [ (DmPackageRef library "ieee" unitName "std_logic_1164" ) (DmPackageRef library "ieee" unitName "std_logic_arith" ) ] libraryRefs [ "ieee" ] ) version "24.1" appVersion "2009.1 (Build 12)" model (Symbol commonDM (CommonDM ldm (LogicalDM suid 41,0 usingSuid 1 emptyRow *1 (LEmptyRow ) uid 53,0 optionalChildren [ *2 (RefLabelRowHdr ) *3 (TitleRowHdr ) *4 (FilterRowHdr ) *5 (RefLabelColHdr tm "RefLabelColHdrMgr" ) *6 (RowExpandColHdr tm "RowExpandColHdrMgr" ) *7 (GroupColHdr tm "GroupColHdrMgr" ) *8 (NameColHdr tm "NameColHdrMgr" ) *9 (ModeColHdr tm "ModeColHdrMgr" ) *10 (TypeColHdr tm "TypeColHdrMgr" ) *11 (BoundsColHdr tm "BoundsColHdrMgr" ) *12 (InitColHdr tm "InitColHdrMgr" ) *13 (EolColHdr tm "EolColHdrMgr" ) *14 (LogPort port (LogicalPort m 1 decl (Decl n "wiz_reset" t "std_logic" o 15 suid 2,0 i "'1'" ) ) uid 111,0 ) *15 (LogPort port (LogicalPort m 1 decl (Decl n "led" t "std_logic_vector" b "(7 downto 0)" o 11 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1033,0 ) *47 (MRCItem litem &25 pos 7 dimension 20 uid 1035,0 ) *48 (MRCItem litem &26 pos 12 dimension 20 uid 1387,0 ) *49 (MRCItem litem &27 pos 13 dimension 20 uid 1723,0 ) *50 (MRCItem litem &28 pos 14 dimension 20 uid 1753,0 ) *51 (MRCItem litem &29 pos 15 dimension 20 uid 1974,0 ) *52 (MRCItem litem &30 pos 16 dimension 20 uid 2280,0 ) ] ) sheetCol (SheetCol propVa (MVa cellColor "0,49152,49152" fontColor "0,0,0" font "Tahoma,10,0" textAngle 90 ) uid 72,0 optionalChildren [ *53 (MRCItem litem &5 pos 0 dimension 20 uid 73,0 ) *54 (MRCItem litem &7 pos 1 dimension 50 uid 74,0 ) *55 (MRCItem litem &8 pos 2 dimension 100 uid 75,0 ) *56 (MRCItem litem &9 pos 3 dimension 50 uid 76,0 ) *57 (MRCItem litem &10 pos 4 dimension 100 uid 77,0 ) *58 (MRCItem litem &11 pos 5 dimension 100 uid 78,0 ) *59 (MRCItem litem &12 pos 6 dimension 50 uid 79,0 ) *60 (MRCItem litem &13 pos 7 dimension 80 uid 80,0 ) ] ) fixedCol 4 fixedRow 2 name "Ports" uid 67,0 vaOverrides [ ] ) ] ) uid 52,0 ) genericsCommonDM (CommonDM ldm (LogicalDM emptyRow *61 (LEmptyRow ) uid 82,0 optionalChildren [ *62 (RefLabelRowHdr ) *63 (TitleRowHdr ) *64 (FilterRowHdr ) *65 (RefLabelColHdr tm "RefLabelColHdrMgr" ) *66 (RowExpandColHdr tm "RowExpandColHdrMgr" ) *67 (GroupColHdr tm "GroupColHdrMgr" ) *68 (NameColHdr tm "GenericNameColHdrMgr" ) *69 (TypeColHdr tm "GenericTypeColHdrMgr" ) *70 (InitColHdr tm "GenericValueColHdrMgr" ) *71 (PragmaColHdr tm "GenericPragmaColHdrMgr" ) *72 (EolColHdr tm "GenericEolColHdrMgr" ) ] ) pdm (PhysicalDM displayShortBounds 1 editShortBounds 1 uid 94,0 optionalChildren [ *73 (Sheet sheetRow (SheetRow headerVa (MVa cellColor "49152,49152,49152" fontColor "0,0,0" font "Tahoma,10,0" ) cellVa (MVa cellColor "65535,65535,65535" fontColor "0,0,0" font "Tahoma,10,0" ) groupVa (MVa cellColor "39936,56832,65280" fontColor "0,0,0" font "Tahoma,10,0" ) emptyMRCItem *74 (MRCItem litem &61 pos 3 dimension 20 ) uid 96,0 optionalChildren [ *75 (MRCItem litem &62 pos 0 dimension 20 uid 97,0 ) *76 (MRCItem litem &63 pos 1 dimension 23 uid 98,0 ) *77 (MRCItem litem &64 pos 2 hidden 1 dimension 20 uid 99,0 ) ] ) sheetCol (SheetCol propVa (MVa cellColor "0,49152,49152" fontColor "0,0,0" font "Tahoma,10,0" textAngle 90 ) uid 100,0 optionalChildren [ *78 (MRCItem litem &65 pos 0 dimension 20 uid 101,0 ) *79 (MRCItem litem &67 pos 1 dimension 50 uid 102,0 ) *80 (MRCItem litem &68 pos 2 dimension 100 uid 103,0 ) *81 (MRCItem litem &69 pos 3 dimension 100 uid 104,0 ) *82 (MRCItem litem &70 pos 4 dimension 50 uid 105,0 ) *83 (MRCItem litem &71 pos 5 dimension 50 uid 106,0 ) *84 (MRCItem litem &72 pos 6 dimension 80 uid 107,0 ) ] ) fixedCol 3 fixedRow 2 name "Ports" uid 95,0 vaOverrides [ ] ) ] ) uid 81,0 type 1 ) VExpander (VariableExpander vvMap [ (vvPair variable "HDLDir" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hdl" ) (vvPair variable "HDSDir" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds" ) (vvPair variable "SideDataDesignDir" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb.info" ) (vvPair variable "SideDataUserDir" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb.user" ) (vvPair variable "SourceDir" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds" ) (vvPair variable "appl" value "HDL Designer" ) (vvPair variable "arch_name" value "symbol" ) (vvPair variable "config" value "%(unit)_%(view)_config" ) (vvPair variable "d" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds\\@f@a@d_main" ) (vvPair variable "d_logical" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds\\FAD_main" ) (vvPair variable "date" value "13.04.2010" ) (vvPair variable "day" value "Di" ) (vvPair variable "day_long" value "Dienstag" ) (vvPair variable "dd" value "13" ) (vvPair variable "entity_name" value "FAD_main" ) (vvPair variable "ext" value "" ) (vvPair variable "f" value "symbol.sb" ) (vvPair variable "f_logical" value "symbol.sb" ) (vvPair variable "f_noext" value "symbol" ) (vvPair variable "group" value "UNKNOWN" ) (vvPair variable "host" value "E5PCXX" ) (vvPair variable "language" value "VHDL" ) (vvPair variable "library" value "FACT_FAD_lib" ) (vvPair variable "library_downstream_HdsLintPlugin" value "$HDS_PROJECT_DIR/FACT_FAD_lib/designcheck" ) (vvPair variable "library_downstream_ISEPARInvoke" value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise" ) (vvPair variable "library_downstream_ImpactInvoke" value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise" ) (vvPair variable "library_downstream_ModelSimCompiler" value "$HDS_PROJECT_DIR/FACT_FAD_lib/work" ) (vvPair variable "library_downstream_PrecisionSynthesisDataPrep" value "$HDS_PROJECT_DIR/FACT_FAD_lib/ps" ) (vvPair variable "library_downstream_XSTDataPrep" value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise" ) (vvPair variable "mm" value "04" ) (vvPair variable "module_name" value "FAD_main" ) (vvPair variable "month" value "Apr" ) (vvPair variable "month_long" value "April" ) (vvPair variable "p" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb" ) (vvPair variable "p_logical" value "D:\\Kai\\FPGA\\FACT_FAD\\FACT_FAD_lib\\hds\\FAD_main\\symbol.sb" ) (vvPair variable "package_name" value "" ) (vvPair variable "project_name" value "FACT_FAD" ) (vvPair variable "series" value "HDL Designer Series" ) (vvPair variable "task_DesignCompilerPath" value "" ) (vvPair variable "task_LeonardoPath" value "$HDS_HOME/../Exemplar/bin/win32" ) (vvPair variable "task_ModelSimPath" value "D:\\Programme\\FPGAdv82LSPS\\Modeltech\\win32" ) (vvPair variable "task_NC-SimPath" value "" ) (vvPair variable "task_PrecisionRTLPath" value "$HDS_HOME/../Precision/Mgc_home/bin" ) (vvPair variable "task_QuestaSimPath" value "" ) (vvPair variable "task_VCSPath" value "" ) (vvPair variable "this_ext" value "sb" ) (vvPair variable "this_file" value "symbol" ) (vvPair variable "this_file_logical" value "symbol" ) (vvPair variable "time" value "15:16:53" ) (vvPair variable "unit" value "FAD_main" ) (vvPair variable "user" value "kai" ) (vvPair variable "version" value "2009.1 (Build 12)" ) (vvPair variable "view" value "symbol" ) (vvPair variable "year" value "2010" ) (vvPair variable "yy" value "10" ) ] ) LanguageMgr "VhdlLangMgr" uid 51,0 optionalChildren [ *85 (SymbolBody uid 8,0 optionalChildren [ *86 (CptPort uid 135,0 ps "OnEdgeStrategy" shape (Triangle uid 136,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,18625,43750,19375" ) tg (CPTG uid 137,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 138,0 va (VaSet ) xt "38400,18500,42000,19500" st "wiz_reset" ju 2 blo "42000,19300" tm "CptPortNameMgr" ) ) dt (MLText uid 140,0 va (VaSet font "Courier New,8,0" ) xt "44000,13200,77000,14000" st "wiz_reset : OUT std_logic := '1' ;" ) thePort (LogicalPort m 1 decl (Decl n "wiz_reset" t "std_logic" o 15 suid 2,0 i "'1'" ) ) ) *87 (CptPort uid 163,0 ps "OnEdgeStrategy" shape (Triangle uid 164,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,24625,43750,25375" ) tg (CPTG uid 165,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 166,0 va (VaSet ) xt "38000,24500,42000,25500" st "led : (7:0)" ju 2 blo "42000,25300" tm "CptPortNameMgr" ) ) dt (MLText uid 168,0 va (VaSet font "Courier New,8,0" ) xt "44000,10000,83000,10800" st "led : OUT std_logic_vector (7 downto 0) := (OTHERS => '0') ;" ) thePort (LogicalPort m 1 decl (Decl n "led" t "std_logic_vector" b "(7 downto 0)" o 11 suid 7,0 i "(OTHERS => '0')" ) ) ) *88 (CptPort uid 464,0 ps "OnEdgeStrategy" shape (Triangle uid 465,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "14250,12625,15000,13375" ) tg (CPTG uid 466,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 467,0 va (VaSet ) xt "16000,12500,18800,13500" st "trigger" blo "16000,13300" tm "CptPortNameMgr" ) ) dt (MLText uid 468,0 va (VaSet font "Courier New,8,0" ) xt "44000,6000,63500,6800" st "trigger : IN std_logic ;" ) thePort (LogicalPort decl (Decl n "trigger" t "std_logic" preAdd 0 posAdd 0 o 6 suid 18,0 ) ) ) *89 (CptPort uid 833,0 ps "OnEdgeStrategy" shape (Triangle uid 834,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,25625,43750,26375" ) tg (CPTG uid 835,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 836,0 va (VaSet ) xt "38800,25500,42000,26500" st "adc_oeb" ju 2 blo "42000,26300" tm "CptPortNameMgr" ) ) dt (MLText uid 837,0 va (VaSet font "Courier New,8,0" ) xt "44000,9200,77000,10000" st "adc_oeb : OUT std_logic := '1' ;" ) thePort (LogicalPort m 1 decl (Decl n "adc_oeb" t "std_logic" o 10 suid 21,0 i "'1'" ) ) ) *90 (CptPort uid 923,0 ps "OnEdgeStrategy" shape (Triangle uid 924,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "14250,16625,15000,17375" ) tg (CPTG uid 925,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 926,0 va (VaSet ) xt "16000,16500,21900,17500" st "board_id : (3:0)" blo "16000,17300" tm "CptPortNameMgr" ) ) dt (MLText uid 927,0 va (VaSet font "Courier New,8,0" ) xt "44000,4400,73500,5200" st "board_id : IN std_logic_vector (3 downto 0) ;" ) thePort (LogicalPort decl (Decl n "board_id" t "std_logic_vector" b "(3 downto 0)" preAdd 0 posAdd 0 o 4 suid 24,0 ) ) ) *91 (CptPort uid 928,0 ps "OnEdgeStrategy" shape (Triangle uid 929,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "14250,17625,15000,18375" ) tg (CPTG uid 930,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 931,0 va (VaSet ) xt "16000,17500,21700,18500" st "crate_id : (1:0)" blo "16000,18300" tm "CptPortNameMgr" ) ) dt (MLText uid 932,0 va (VaSet font "Courier New,8,0" ) xt "44000,5200,73500,6000" st "crate_id : IN std_logic_vector (1 downto 0) ;" ) thePort (LogicalPort decl (Decl n "crate_id" t "std_logic_vector" b "(1 downto 0)" o 5 suid 25,0 ) ) ) *92 (CptPort uid 1037,0 ps "OnEdgeStrategy" shape (Triangle uid 1038,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,26625,43750,27375" ) tg (CPTG uid 1039,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 1040,0 va (VaSet ) xt "36000,26500,42000,27500" st "wiz_addr : (9:0)" ju 2 blo "42000,27300" tm "CptPortNameMgr" ) ) dt (MLText uid 1041,0 va (VaSet font "Courier New,8,0" ) xt "44000,10800,73500,11600" st "wiz_addr : OUT std_logic_vector (9 DOWNTO 0) ;" ) thePort (LogicalPort m 1 decl (Decl n "wiz_addr" t "std_logic_vector" b "(9 DOWNTO 0)" o 12 suid 26,0 ) ) ) *93 (CptPort uid 1042,0 ps "OnEdgeStrategy" shape (Diamond uid 1043,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,27625,43750,28375" ) tg (CPTG uid 1044,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 1045,0 va (VaSet ) xt "35700,27500,42000,28500" st "wiz_data : (15:0)" ju 2 blo "42000,28300" tm "CptPortNameMgr" ) ) dt (MLText uid 1046,0 va (VaSet font "Courier New,8,0" ) xt "44000,14800,73000,15600" st "wiz_data : INOUT std_logic_vector (15 DOWNTO 0)" ) thePort (LogicalPort m 2 decl (Decl n "wiz_data" t "std_logic_vector" b "(15 DOWNTO 0)" o 17 suid 27,0 ) ) ) *94 (CptPort uid 1047,0 ps "OnEdgeStrategy" shape (Triangle uid 1048,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,28625,43750,29375" ) tg (CPTG uid 1049,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 1050,0 va (VaSet ) xt "39300,28500,42000,29500" st "wiz_cs" ju 2 blo "42000,29300" tm "CptPortNameMgr" ) ) dt (MLText uid 1051,0 va (VaSet font "Courier New,8,0" ) xt "44000,11600,77000,12400" st "wiz_cs : OUT std_logic := '1' ;" ) thePort (LogicalPort m 1 decl (Decl n "wiz_cs" t "std_logic" o 13 suid 28,0 i "'1'" ) ) ) *95 (CptPort uid 1052,0 ps "OnEdgeStrategy" shape (Triangle uid 1053,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,29625,43750,30375" ) tg (CPTG uid 1054,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 1055,0 va (VaSet ) xt "39300,29500,42000,30500" st "wiz_wr" ju 2 blo "42000,30300" tm "CptPortNameMgr" ) ) dt (MLText uid 1056,0 va (VaSet font "Courier New,8,0" ) xt "44000,14000,77000,14800" st "wiz_wr : OUT std_logic := '1' ;" ) thePort (LogicalPort m 1 decl (Decl n "wiz_wr" t "std_logic" o 16 suid 29,0 i "'1'" ) ) ) *96 (CptPort uid 1057,0 ps "OnEdgeStrategy" shape (Triangle uid 1058,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,30625,43750,31375" ) tg (CPTG uid 1059,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 1060,0 va (VaSet ) xt "39400,30500,42000,31500" st "wiz_rd" ju 2 blo "42000,31300" tm "CptPortNameMgr" ) ) dt (MLText uid 1061,0 va (VaSet font "Courier New,8,0" ) xt "44000,12400,77000,13200" st "wiz_rd : OUT std_logic := '1' ;" ) thePort (LogicalPort m 1 decl (Decl n "wiz_rd" t "std_logic" o 14 suid 30,0 i "'1'" ) ) ) *97 (CptPort uid 1062,0 ps "OnEdgeStrategy" shape (Triangle uid 1063,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "14250,18625,15000,19375" ) tg (CPTG uid 1064,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 1065,0 va (VaSet ) xt "16000,18500,18700,19500" st "wiz_int" blo "16000,19300" tm "CptPortNameMgr" ) ) dt (MLText uid 1066,0 va (VaSet font "Courier New,8,0" ) xt "44000,6800,63500,7600" st "wiz_int : IN std_logic ;" ) thePort (LogicalPort decl (Decl n "wiz_int" t "std_logic" o 7 suid 31,0 ) ) ) *98 (CptPort uid 1389,0 ps "OnEdgeStrategy" shape (Triangle uid 1390,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,31625,43750,32375" ) tg (CPTG uid 1391,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 1392,0 va (VaSet ) xt "37500,31500,42000,32500" st "CLK_25_PS" ju 2 blo "42000,32300" tm "CptPortNameMgr" ) ) dt (MLText uid 1393,0 va (VaSet font "Courier New,8,0" ) xt "44000,7600,63500,8400" st "CLK_25_PS : OUT std_logic ;" ) thePort (LogicalPort m 1 decl (Decl n "CLK_25_PS" t "std_logic" o 8 suid 35,0 ) ) ) *99 (CptPort uid 1725,0 ps "OnEdgeStrategy" shape (Triangle uid 1726,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,32625,43750,33375" ) tg (CPTG uid 1727,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 1728,0 va (VaSet ) xt "38900,32500,42000,33500" st "CLK_50" ju 2 blo "42000,33300" tm "CptPortNameMgr" ) ) dt (MLText uid 1729,0 va (VaSet font "Courier New,8,0" ) xt "44000,8400,63500,9200" st "CLK_50 : OUT std_logic ;" ) thePort (LogicalPort m 1 decl (Decl n "CLK_50" t "std_logic" preAdd 0 posAdd 0 o 9 suid 37,0 ) ) ) *100 (CptPort uid 1755,0 ps "OnEdgeStrategy" shape (Triangle uid 1756,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "14250,19625,15000,20375" ) tg (CPTG uid 1757,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 1758,0 va (VaSet ) xt "16000,19500,17900,20500" st "CLK" blo "16000,20300" tm "CptPortNameMgr" ) ) dt (MLText uid 1759,0 va (VaSet font "Courier New,8,0" ) xt "44000,2000,63500,2800" st "CLK : IN std_logic ;" ) thePort (LogicalPort decl (Decl n "CLK" t "std_logic" o 1 suid 38,0 ) ) ) *101 (CptPort uid 1976,0 ps "OnEdgeStrategy" shape (Triangle uid 1977,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "14250,21625,15000,22375" ) tg (CPTG uid 1978,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 1979,0 va (VaSet ) xt "16000,21500,24000,22500" st "adc_otr_array : (3:0)" blo "16000,22300" tm "CptPortNameMgr" ) ) dt (MLText uid 1980,0 va (VaSet font "Courier New,8,0" ) xt "44000,3600,73500,4400" st "adc_otr_array : IN std_logic_vector (3 DOWNTO 0) ;" ) thePort (LogicalPort decl (Decl n "adc_otr_array" t "std_logic_vector" b "(3 DOWNTO 0)" o 3 suid 40,0 ) ) ) *102 (CptPort uid 2282,0 ps "OnEdgeStrategy" shape (Triangle uid 2283,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "14250,22625,15000,23375" ) tg (CPTG uid 2284,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2285,0 va (VaSet ) xt "16000,22500,21900,23500" st "adc_data_array" blo "16000,23300" tm "CptPortNameMgr" ) ) dt (MLText uid 2286,0 va (VaSet font "Courier New,8,0" ) xt "44000,2800,69000,3600" st "adc_data_array : IN adc_data_array_type ;" ) thePort (LogicalPort decl (Decl n "adc_data_array" t "adc_data_array_type" o 2 suid 41,0 ) ) ) ] shape (Rectangle uid 584,0 va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "15000,-1000,43000,34000" ) oxt "15000,-1000,43000,26000" biTextGroup (BiTextGroup uid 10,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" first (Text uid 11,0 va (VaSet font "Arial,8,1" ) xt "22200,8000,28400,9000" st "FACT_FAD_lib" blo "22200,8800" ) second (Text uid 12,0 va (VaSet font "Arial,8,1" ) xt "22200,9000,26400,10000" st "FAD_main" blo "22200,9800" ) ) gi *103 (GenericInterface uid 13,0 ps "CenterOffsetStrategy" matrix (Matrix uid 14,0 text (MLText uid 15,0 va (VaSet font "Courier New,8,0" ) xt "0,12000,11500,12800" st "Generic Declarations" ) header "Generic Declarations" showHdrWhenContentsEmpty 1 ) elements [ ] ) portInstanceVisAsIs 1 portInstanceVis (PortSigDisplay ) portVis (PortSigDisplay ) ) *104 (Grouping uid 16,0 optionalChildren [ *105 (CommentText uid 18,0 shape (Rectangle uid 19,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "36000,48000,53000,49000" ) oxt "18000,70000,35000,71000" text (MLText uid 20,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "36200,48000,44400,49000" st " by %user on %dd %month %year " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 17000 ) position 1 ignorePrefs 1 titleBlock 1 ) *106 (CommentText uid 21,0 shape (Rectangle uid 22,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "53000,44000,57000,45000" ) oxt "35000,66000,39000,67000" text (MLText uid 23,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "53200,44000,56200,45000" st " Project: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *107 (CommentText uid 24,0 shape (Rectangle uid 25,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "36000,46000,53000,47000" ) oxt "18000,68000,35000,69000" text (MLText uid 26,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "36200,46000,46200,47000" st " " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 17000 ) position 1 ignorePrefs 1 titleBlock 1 ) *108 (CommentText uid 27,0 shape (Rectangle uid 28,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,46000,36000,47000" ) oxt "14000,68000,18000,69000" text (MLText uid 29,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "32200,46000,34300,47000" st " Title: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *109 (CommentText uid 30,0 shape (Rectangle uid 31,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "53000,45000,73000,49000" ) oxt "35000,67000,55000,71000" text (MLText uid 32,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "53200,45200,62400,46200" st " " tm "CommentText" wrapOption 3 visibleHeight 4000 visibleWidth 20000 ) ignorePrefs 1 titleBlock 1 ) *110 (CommentText uid 33,0 shape (Rectangle uid 34,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "57000,44000,73000,45000" ) oxt "39000,66000,55000,67000" text (MLText uid 35,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "57200,44000,61700,45000" st " %project_name " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 16000 ) position 1 ignorePrefs 1 titleBlock 1 ) *111 (CommentText uid 36,0 shape (Rectangle uid 37,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,44000,53000,46000" ) oxt "14000,66000,35000,68000" text (MLText uid 38,0 va (VaSet fg "32768,0,0" ) xt "39150,44500,45850,45500" st " " ju 0 tm "CommentText" wrapOption 3 visibleHeight 2000 visibleWidth 21000 ) position 1 ignorePrefs 1 titleBlock 1 ) *112 (CommentText uid 39,0 shape (Rectangle uid 40,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,47000,36000,48000" ) oxt "14000,69000,18000,70000" text (MLText uid 41,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "32200,47000,34300,48000" st " Path: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *113 (CommentText uid 42,0 shape (Rectangle uid 43,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,48000,36000,49000" ) oxt "14000,70000,18000,71000" text (MLText uid 44,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "32200,48000,34900,49000" st " Edited: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *114 (CommentText uid 45,0 shape (Rectangle uid 46,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "36000,47000,53000,48000" ) oxt "18000,69000,35000,70000" text (MLText uid 47,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "36200,47000,49000,48000" st " %library/%unit/%view " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 17000 ) position 1 ignorePrefs 1 titleBlock 1 ) ] shape (GroupingShape uid 17,0 va (VaSet vasetType 1 fg "65535,65535,65535" lineStyle 2 lineWidth 2 ) xt "32000,44000,73000,49000" ) oxt "14000,66000,55000,71000" ) ] bg "65535,65535,65535" grid (Grid origin "0,0" isVisible 1 isActive 1 xSpacing 1000 xySpacing 1000 xShown 1 yShown 1 color "26368,26368,26368" ) packageList *115 (PackageList uid 48,0 stg "VerticalLayoutStrategy" textVec [ *116 (Text uid 49,0 va (VaSet font "arial,8,1" ) xt "0,0,5400,1000" st "Package List" blo "0,800" ) *117 (MLText uid 50,0 va (VaSet ) xt "0,1000,10900,4000" st "LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_arith.all;" tm "PackageList" ) ] ) windowSize "0,0,1015,690" viewArea "0,0,0,0" cachedDiagramExtent "0,0,0,0" pageBreakOrigin "0,0" defaultCommentText (CommentText shape (Rectangle layer 0 va (VaSet vasetType 1 fg "65280,65280,46080" lineColor "0,0,32768" ) xt "0,0,15000,5000" ) text (MLText va (VaSet fg "0,0,32768" ) xt "200,200,2000,1200" st " Text " tm "CommentText" wrapOption 3 visibleHeight 4600 visibleWidth 14600 ) ) defaultPanel (Panel shape (RectFrame va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "32768,0,0" lineWidth 3 ) xt "0,0,20000,20000" ) title (TextAssociate ps "TopLeftStrategy" text (Text va (VaSet font "Arial,8,1" ) xt "1000,1000,3800,2000" st "Panel0" blo "1000,1800" tm "PanelText" ) ) ) parentGraphicsRef (HdmGraphicsRef libraryName "" entityName "" viewName "" ) defaultSymbolBody (SymbolBody shape (Rectangle va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "15000,6000,33000,26000" ) biTextGroup (BiTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" first (Text va (VaSet font "Arial,8,1" ) xt "22200,15000,25800,16000" st "" blo "22200,15800" ) second (Text va (VaSet font "Arial,8,1" ) xt "22200,16000,24800,17000" st "" blo "22200,16800" ) ) gi *118 (GenericInterface ps "CenterOffsetStrategy" matrix (Matrix text (MLText va (VaSet font "Courier New,8,0" ) xt "0,12000,11500,12800" st "Generic Declarations" ) header "Generic Declarations" showHdrWhenContentsEmpty 1 ) elements [ ] ) portInstanceVisAsIs 1 portInstanceVis (PortSigDisplay sIVOD 1 ) portVis (PortSigDisplay sIVOD 1 ) ) defaultCptPort (CptPort ps "OnEdgeStrategy" shape (Triangle ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "0,0,750,750" ) tg (CPTG ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text va (VaSet ) xt "0,750,1400,1750" st "In0" blo "0,1550" tm "CptPortNameMgr" ) ) dt (MLText va (VaSet font "Courier New,8,0" ) ) thePort (LogicalPort decl (Decl n "In0" t "std_logic_vector" b "(15 DOWNTO 0)" o 0 ) ) ) defaultCptPortBuffer (CptPort ps "OnEdgeStrategy" shape (Diamond va (VaSet vasetType 1 fg "65535,65535,65535" bg "0,0,0" ) xt "0,0,750,750" ) tg (CPTG ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text va (VaSet ) xt "0,750,2800,1750" st "Buffer0" blo "0,1550" tm "CptPortNameMgr" ) ) dt (MLText va (VaSet font "Courier New,8,0" ) ) thePort (LogicalPort m 3 decl (Decl n "Buffer0" t "std_logic_vector" b "(15 DOWNTO 0)" o 0 ) ) ) DeclarativeBlock *119 (SymDeclBlock uid 1,0 stg "SymDeclLayoutStrategy" declLabel (Text uid 2,0 va (VaSet font "Arial,8,1" ) xt "42000,0,47400,1000" st "Declarations" blo "42000,800" ) portLabel (Text uid 3,0 va (VaSet font "Arial,8,1" ) xt "42000,1000,44700,2000" st "Ports:" blo "42000,1800" ) externalLabel (Text uid 4,0 va (VaSet font "Arial,8,1" ) xt "42000,15600,44400,16600" st "User:" blo "42000,16400" ) internalLabel (Text uid 6,0 va (VaSet isHidden 1 font "Arial,8,1" ) xt "42000,0,47800,1000" st "Internal User:" blo "42000,800" ) externalText (MLText uid 5,0 va (VaSet font "Courier New,8,0" ) xt "44000,16600,44000,16600" tm "SyDeclarativeTextMgr" ) internalText (MLText uid 7,0 va (VaSet isHidden 1 font "Courier New,8,0" ) xt "42000,0,42000,0" tm "SyDeclarativeTextMgr" ) ) lastUid 2355,0 okToSyncOnLoad 1 OkToSyncGenericsOnLoad 1 activeModelName "Symbol:CDM" )