source: firmware/FAD/FACT_FAD_lib/hds/phase_shifter/symbol.sb@ 19875

Last change on this file since 19875 was 11755, checked in by neise, 13 years ago
reinit of this svn repos .... it was all too messy deleted the old folders and restarted with FACT_FAD_lib only. (well and the testbenches)
File size: 31.0 KB
Line 
1DocumentHdrVersion "1.1"
2Header (DocumentHdr
3version 2
4dmPackageRefs [
5(DmPackageRef
6library "ieee"
7unitName "std_logic_1164"
8)
9(DmPackageRef
10library "IEEE"
11unitName "NUMERIC_STD"
12)
13(DmPackageRef
14library "FACT_FAD_lib"
15unitName "fad_definitions"
16)
17]
18libraryRefs [
19"ieee"
20"FACT_FAD_lib"
21]
22)
23version "24.1"
24appVersion "2009.1 (Build 12)"
25model (Symbol
26commonDM (CommonDM
27ldm (LogicalDM
28ordering 1
29suid 19,0
30usingSuid 1
31emptyRow *1 (LEmptyRow
32)
33uid 157,0
34optionalChildren [
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36)
37*3 (TitleRowHdr
38)
39*4 (FilterRowHdr
40)
41*5 (RefLabelColHdr
42tm "RefLabelColHdrMgr"
43)
44*6 (RowExpandColHdr
45tm "RowExpandColHdrMgr"
46)
47*7 (GroupColHdr
48tm "GroupColHdrMgr"
49)
50*8 (NameColHdr
51tm "NameColHdrMgr"
52)
53*9 (ModeColHdr
54tm "ModeColHdrMgr"
55)
56*10 (TypeColHdr
57tm "TypeColHdrMgr"
58)
59*11 (BoundsColHdr
60tm "BoundsColHdrMgr"
61)
62*12 (InitColHdr
63tm "InitColHdrMgr"
64)
65*13 (EolColHdr
66tm "EolColHdrMgr"
67)
68*14 (LogPort
69port (LogicalPort
70decl (Decl
71n "CLK"
72t "std_logic"
73preAdd 0
74posAdd 0
75o 1
76suid 1,0
77)
78)
79uid 124,0
80)
81*15 (LogPort
82port (LogicalPort
83m 1
84decl (Decl
85n "PSCLK"
86t "std_logic"
87prec "-- interface to: clock_generator_variable_PS_struct.vhd"
88preAdd 0
89posAdd 0
90o 3
91suid 2,0
92)
93)
94uid 126,0
95)
96*16 (LogPort
97port (LogicalPort
98m 1
99decl (Decl
100n "PSEN"
101t "std_logic"
102preAdd 0
103posAdd 0
104o 4
105suid 3,0
106i "'0'"
107)
108)
109uid 128,0
110)
111*17 (LogPort
112port (LogicalPort
113m 1
114decl (Decl
115n "PSINCDEC"
116t "std_logic"
117eolc "-- default is 'incrementing'"
118preAdd 0
119posAdd 0
120o 5
121suid 4,0
122i "'1'"
123)
124)
125uid 130,0
126)
127*18 (LogPort
128port (LogicalPort
129decl (Decl
130n "PSDONE"
131t "std_logic"
132eolc "-- will pulse once, if phase shifting was done."
133preAdd 0
134posAdd 0
135o 6
136suid 5,0
137)
138)
139uid 132,0
140)
141*19 (LogPort
142port (LogicalPort
143decl (Decl
144n "LOCKED"
145t "std_logic"
146eolc "-- when is this going high?"
147preAdd 0
148posAdd 0
149o 7
150suid 6,0
151)
152)
153uid 134,0
154)
155*20 (LogPort
156port (LogicalPort
157decl (Decl
158n "shift_phase"
159t "std_logic"
160prec "-- interface to: w5300_modul.vhd"
161preAdd 0
162posAdd 0
163o 8
164suid 8,0
165)
166)
167uid 138,0
168)
169*21 (LogPort
170port (LogicalPort
171decl (Decl
172n "direction"
173t "std_logic"
174eolc "-- corresponds to 'PSINCDEC'"
175preAdd 0
176posAdd 0
177o 9
178suid 9,0
179)
180)
181uid 140,0
182)
183*22 (LogPort
184port (LogicalPort
185m 1
186decl (Decl
187n "shifting"
188t "std_logic"
189prec "-- status:"
190preAdd 0
191posAdd 0
192o 11
193suid 10,0
194i "'0'"
195)
196)
197uid 142,0
198)
199*23 (LogPort
200port (LogicalPort
201m 1
202decl (Decl
203n "ready"
204t "std_logic"
205preAdd 0
206posAdd 0
207o 12
208suid 11,0
209i "'0'"
210)
211)
212uid 144,0
213)
214*24 (LogPort
215port (LogicalPort
216m 1
217decl (Decl
218n "offset"
219t "std_logic_vector"
220b "(7 DOWNTO 0)"
221preAdd 0
222posAdd 0
223o 15
224suid 12,0
225i "(OTHERS => '0')"
226)
227)
228uid 146,0
229)
230*25 (LogPort
231port (LogicalPort
232m 1
233decl (Decl
234n "rst"
235t "std_logic"
236eolc "--asynch in of DCM"
237posAdd 0
238o 2
239suid 15,0
240i "'0'"
241)
242)
243uid 286,0
244)
245*26 (LogPort
246port (LogicalPort
247decl (Decl
248n "reset_DCM"
249t "std_logic"
250eolc "-- asynch in: orders us, to reset the DCM"
251posAdd 0
252o 10
253suid 17,0
254)
255)
256uid 369,0
257)
258*27 (LogPort
259port (LogicalPort
260m 1
261decl (Decl
262n "locked_status_o"
263t "std_logic"
264o 13
265suid 18,0
266)
267)
268uid 428,0
269)
270*28 (LogPort
271port (LogicalPort
272m 1
273decl (Decl
274n "ready_status_o"
275t "std_logic"
276o 14
277suid 19,0
278)
279)
280uid 430,0
281)
282]
283)
284pdm (PhysicalDM
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459pos 4
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461uid 181,0
462)
463*54 (MRCItem
464litem &11
465pos 5
466dimension 100
467uid 182,0
468)
469*55 (MRCItem
470litem &12
471pos 6
472dimension 50
473uid 183,0
474)
475*56 (MRCItem
476litem &13
477pos 7
478dimension 80
479uid 184,0
480)
481]
482)
483fixedCol 4
484fixedRow 2
485name "Ports"
486uid 171,0
487vaOverrides [
488]
489)
490]
491)
492uid 156,0
493)
494genericsCommonDM (CommonDM
495ldm (LogicalDM
496emptyRow *57 (LEmptyRow
497)
498uid 186,0
499optionalChildren [
500*58 (RefLabelRowHdr
501)
502*59 (TitleRowHdr
503)
504*60 (FilterRowHdr
505)
506*61 (RefLabelColHdr
507tm "RefLabelColHdrMgr"
508)
509*62 (RowExpandColHdr
510tm "RowExpandColHdrMgr"
511)
512*63 (GroupColHdr
513tm "GroupColHdrMgr"
514)
515*64 (NameColHdr
516tm "GenericNameColHdrMgr"
517)
518*65 (TypeColHdr
519tm "GenericTypeColHdrMgr"
520)
521*66 (InitColHdr
522tm "GenericValueColHdrMgr"
523)
524*67 (PragmaColHdr
525tm "GenericPragmaColHdrMgr"
526)
527*68 (EolColHdr
528tm "GenericEolColHdrMgr"
529)
530]
531)
532pdm (PhysicalDM
533displayShortBounds 1
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537*69 (Sheet
538sheetRow (SheetRow
539headerVa (MVa
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542font "Tahoma,10,0"
543)
544cellVa (MVa
545cellColor "65535,65535,65535"
546fontColor "0,0,0"
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556pos 3
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558)
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561*71 (MRCItem
562litem &58
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567*72 (MRCItem
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571uid 202,0
572)
573*73 (MRCItem
574litem &60
575pos 2
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578uid 203,0
579)
580]
581)
582sheetCol (SheetCol
583propVa (MVa
584cellColor "0,49152,49152"
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589uid 204,0
590optionalChildren [
591*74 (MRCItem
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596)
597*75 (MRCItem
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602)
603*76 (MRCItem
604litem &64
605pos 2
606dimension 100
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608)
609*77 (MRCItem
610litem &65
611pos 3
612dimension 100
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614)
615*78 (MRCItem
616litem &66
617pos 4
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621*79 (MRCItem
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627*80 (MRCItem
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629pos 6
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634)
635fixedCol 3
636fixedRow 2
637name "Ports"
638uid 199,0
639vaOverrides [
640]
641)
642]
643)
644uid 185,0
645type 1
646)
647VExpander (VariableExpander
648vvMap [
649(vvPair
650variable "HDLDir"
651value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
652)
653(vvPair
654variable "HDSDir"
655value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
656)
657(vvPair
658variable "SideDataDesignDir"
659value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\phase_shifter\\symbol.sb.info"
660)
661(vvPair
662variable "SideDataUserDir"
663value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\phase_shifter\\symbol.sb.user"
664)
665(vvPair
666variable "SourceDir"
667value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
668)
669(vvPair
670variable "appl"
671value "HDL Designer"
672)
673(vvPair
674variable "arch_name"
675value "symbol"
676)
677(vvPair
678variable "config"
679value "%(unit)_%(view)_config"
680)
681(vvPair
682variable "d"
683value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\phase_shifter"
684)
685(vvPair
686variable "d_logical"
687value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\phase_shifter"
688)
689(vvPair
690variable "date"
691value "03.03.2011"
692)
693(vvPair
694variable "day"
695value "Do"
696)
697(vvPair
698variable "day_long"
699value "Donnerstag"
700)
701(vvPair
702variable "dd"
703value "03"
704)
705(vvPair
706variable "entity_name"
707value "phase_shifter"
708)
709(vvPair
710variable "ext"
711value "<TBD>"
712)
713(vvPair
714variable "f"
715value "symbol.sb"
716)
717(vvPair
718variable "f_logical"
719value "symbol.sb"
720)
721(vvPair
722variable "f_noext"
723value "symbol"
724)
725(vvPair
726variable "group"
727value "UNKNOWN"
728)
729(vvPair
730variable "host"
731value "IHP110"
732)
733(vvPair
734variable "language"
735value "VHDL"
736)
737(vvPair
738variable "library"
739value "FACT_FAD_lib"
740)
741(vvPair
742variable "library_downstream_HdsLintPlugin"
743value "$HDS_PROJECT_DIR/FACT_FAD_lib/designcheck"
744)
745(vvPair
746variable "library_downstream_ISEPARInvoke"
747value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
748)
749(vvPair
750variable "library_downstream_ImpactInvoke"
751value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
752)
753(vvPair
754variable "library_downstream_ModelSimCompiler"
755value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
756)
757(vvPair
758variable "library_downstream_XSTDataPrep"
759value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
760)
761(vvPair
762variable "mm"
763value "03"
764)
765(vvPair
766variable "module_name"
767value "phase_shifter"
768)
769(vvPair
770variable "month"
771value "Mrz"
772)
773(vvPair
774variable "month_long"
775value "März"
776)
777(vvPair
778variable "p"
779value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\phase_shifter\\symbol.sb"
780)
781(vvPair
782variable "p_logical"
783value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\phase_shifter\\symbol.sb"
784)
785(vvPair
786variable "package_name"
787value "<Undefined Variable>"
788)
789(vvPair
790variable "project_name"
791value "FACT_FAD"
792)
793(vvPair
794variable "series"
795value "HDL Designer Series"
796)
797(vvPair
798variable "task_DesignCompilerPath"
799value "<TBD>"
800)
801(vvPair
802variable "task_LeonardoPath"
803value "<TBD>"
804)
805(vvPair
806variable "task_ModelSimPath"
807value "D:\\modeltech_6.5e\\win32"
808)
809(vvPair
810variable "task_NC-SimPath"
811value "<TBD>"
812)
813(vvPair
814variable "task_PrecisionRTLPath"
815value "<TBD>"
816)
817(vvPair
818variable "task_QuestaSimPath"
819value "<TBD>"
820)
821(vvPair
822variable "task_VCSPath"
823value "<TBD>"
824)
825(vvPair
826variable "this_ext"
827value "sb"
828)
829(vvPair
830variable "this_file"
831value "symbol"
832)
833(vvPair
834variable "this_file_logical"
835value "symbol"
836)
837(vvPair
838variable "time"
839value "09:46:07"
840)
841(vvPair
842variable "unit"
843value "phase_shifter"
844)
845(vvPair
846variable "user"
847value "daqct3"
848)
849(vvPair
850variable "version"
851value "2009.1 (Build 12)"
852)
853(vvPair
854variable "view"
855value "symbol"
856)
857(vvPair
858variable "year"
859value "2011"
860)
861(vvPair
862variable "yy"
863value "11"
864)
865]
866)
867LanguageMgr "VhdlLangMgr"
868uid 155,0
869optionalChildren [
870*81 (SymbolBody
871uid 8,0
872optionalChildren [
873*82 (CptPort
874uid 48,0
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876shape (Triangle
877uid 49,0
878ro 90
879va (VaSet
880vasetType 1
881fg "0,65535,0"
882)
883xt "49250,8625,50000,9375"
884)
885tg (CPTG
886uid 50,0
887ps "CptPortTextPlaceStrategy"
888stg "VerticalLayoutStrategy"
889f (Text
890uid 51,0
891va (VaSet
892)
893xt "51000,8500,52800,9500"
894st "CLK"
895blo "51000,9300"
896tm "CptPortNameMgr"
897)
898)
899dt (MLText
900uid 52,0
901va (VaSet
902font "Courier New,8,0"
903)
904xt "2000,8000,22000,8800"
905st "CLK : IN std_logic ;
906"
907)
908thePort (LogicalPort
909decl (Decl
910n "CLK"
911t "std_logic"
912preAdd 0
913posAdd 0
914o 1
915suid 1,0
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917)
918)
919*83 (CptPort
920uid 53,0
921ps "OnEdgeStrategy"
922shape (Triangle
923uid 54,0
924ro 90
925va (VaSet
926vasetType 1
927fg "0,65535,0"
928)
929xt "66000,8625,66750,9375"
930)
931tg (CPTG
932uid 55,0
933ps "CptPortTextPlaceStrategy"
934stg "RightVerticalLayoutStrategy"
935f (Text
936uid 56,0
937va (VaSet
938)
939xt "62200,8500,65000,9500"
940st "PSCLK"
941ju 2
942blo "65000,9300"
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946dt (MLText
947uid 57,0
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951xt "2000,9600,31500,11200"
952st "-- interface to: clock_generator_variable_PS_struct.vhd
953PSCLK : OUT std_logic ;
954"
955)
956thePort (LogicalPort
957m 1
958decl (Decl
959n "PSCLK"
960t "std_logic"
961prec "-- interface to: clock_generator_variable_PS_struct.vhd"
962preAdd 0
963posAdd 0
964o 3
965suid 2,0
966)
967)
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969*84 (CptPort
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978)
979xt "66000,10625,66750,11375"
980)
981tg (CPTG
982uid 60,0
983ps "CptPortTextPlaceStrategy"
984stg "RightVerticalLayoutStrategy"
985f (Text
986uid 61,0
987va (VaSet
988)
989xt "62500,10500,65000,11500"
990st "PSEN"
991ju 2
992blo "65000,11300"
993tm "CptPortNameMgr"
994)
995)
996dt (MLText
997uid 62,0
998va (VaSet
999font "Courier New,8,0"
1000)
1001xt "2000,11200,35500,12000"
1002st "PSEN : OUT std_logic := '0' ;
1003"
1004)
1005thePort (LogicalPort
1006m 1
1007decl (Decl
1008n "PSEN"
1009t "std_logic"
1010preAdd 0
1011posAdd 0
1012o 4
1013suid 3,0
1014i "'0'"
1015)
1016)
1017)
1018*85 (CptPort
1019uid 63,0
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1021shape (Triangle
1022uid 64,0
1023ro 90
1024va (VaSet
1025vasetType 1
1026fg "0,65535,0"
1027)
1028xt "66000,12625,66750,13375"
1029)
1030tg (CPTG
1031uid 65,0
1032ps "CptPortTextPlaceStrategy"
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1035uid 66,0
1036va (VaSet
1037)
1038xt "60500,12500,65000,13500"
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1040ju 2
1041blo "65000,13300"
1042tm "CptPortNameMgr"
1043)
1044)
1045dt (MLText
1046uid 67,0
1047va (VaSet
1048font "Courier New,8,0"
1049)
1050xt "2000,12000,50000,12800"
1051st "PSINCDEC : OUT std_logic := '1' ; -- default is 'incrementing'
1052"
1053)
1054thePort (LogicalPort
1055m 1
1056decl (Decl
1057n "PSINCDEC"
1058t "std_logic"
1059eolc "-- default is 'incrementing'"
1060preAdd 0
1061posAdd 0
1062o 5
1063suid 4,0
1064i "'1'"
1065)
1066)
1067)
1068*86 (CptPort
1069uid 68,0
1070ps "OnEdgeStrategy"
1071shape (Triangle
1072uid 69,0
1073ro 90
1074va (VaSet
1075vasetType 1
1076fg "0,65535,0"
1077)
1078xt "49250,10625,50000,11375"
1079)
1080tg (CPTG
1081uid 70,0
1082ps "CptPortTextPlaceStrategy"
1083stg "VerticalLayoutStrategy"
1084f (Text
1085uid 71,0
1086va (VaSet
1087)
1088xt "51000,10500,54700,11500"
1089st "PSDONE"
1090blo "51000,11300"
1091tm "CptPortNameMgr"
1092)
1093)
1094dt (MLText
1095uid 72,0
1096va (VaSet
1097font "Courier New,8,0"
1098)
1099xt "2000,12800,46500,13600"
1100st "PSDONE : IN std_logic ; -- will pulse once, if phase shifting was done.
1101"
1102)
1103thePort (LogicalPort
1104decl (Decl
1105n "PSDONE"
1106t "std_logic"
1107eolc "-- will pulse once, if phase shifting was done."
1108preAdd 0
1109posAdd 0
1110o 6
1111suid 5,0
1112)
1113)
1114)
1115*87 (CptPort
1116uid 73,0
1117ps "OnEdgeStrategy"
1118shape (Triangle
1119uid 74,0
1120ro 90
1121va (VaSet
1122vasetType 1
1123fg "0,65535,0"
1124)
1125xt "49250,12625,50000,13375"
1126)
1127tg (CPTG
1128uid 75,0
1129ps "CptPortTextPlaceStrategy"
1130stg "VerticalLayoutStrategy"
1131f (Text
1132uid 76,0
1133va (VaSet
1134)
1135xt "51000,12500,54500,13500"
1136st "LOCKED"
1137blo "51000,13300"
1138tm "CptPortNameMgr"
1139)
1140)
1141dt (MLText
1142uid 77,0
1143va (VaSet
1144font "Courier New,8,0"
1145)
1146xt "2000,13600,36500,14400"
1147st "LOCKED : IN std_logic ; -- when is this going high?
1148"
1149)
1150thePort (LogicalPort
1151decl (Decl
1152n "LOCKED"
1153t "std_logic"
1154eolc "-- when is this going high?"
1155preAdd 0
1156posAdd 0
1157o 7
1158suid 6,0
1159)
1160)
1161)
1162*88 (CptPort
1163uid 83,0
1164ps "OnEdgeStrategy"
1165shape (Triangle
1166uid 84,0
1167ro 90
1168va (VaSet
1169vasetType 1
1170fg "0,65535,0"
1171)
1172xt "49250,16625,50000,17375"
1173)
1174tg (CPTG
1175uid 85,0
1176ps "CptPortTextPlaceStrategy"
1177stg "VerticalLayoutStrategy"
1178f (Text
1179uid 86,0
1180va (VaSet
1181)
1182xt "51000,16500,56400,17500"
1183st "shift_phase"
1184blo "51000,17300"
1185tm "CptPortNameMgr"
1186)
1187)
1188dt (MLText
1189uid 87,0
1190va (VaSet
1191font "Courier New,8,0"
1192)
1193xt "2000,14400,22000,16000"
1194st "-- interface to: w5300_modul.vhd
1195shift_phase : IN std_logic ;
1196"
1197)
1198thePort (LogicalPort
1199decl (Decl
1200n "shift_phase"
1201t "std_logic"
1202prec "-- interface to: w5300_modul.vhd"
1203preAdd 0
1204posAdd 0
1205o 8
1206suid 8,0
1207)
1208)
1209)
1210*89 (CptPort
1211uid 88,0
1212ps "OnEdgeStrategy"
1213shape (Triangle
1214uid 89,0
1215ro 90
1216va (VaSet
1217vasetType 1
1218fg "0,65535,0"
1219)
1220xt "49250,18625,50000,19375"
1221)
1222tg (CPTG
1223uid 90,0
1224ps "CptPortTextPlaceStrategy"
1225stg "VerticalLayoutStrategy"
1226f (Text
1227uid 91,0
1228va (VaSet
1229)
1230xt "51000,18500,54700,19500"
1231st "direction"
1232blo "51000,19300"
1233tm "CptPortNameMgr"
1234)
1235)
1236dt (MLText
1237uid 92,0
1238va (VaSet
1239font "Courier New,8,0"
1240)
1241xt "2000,16000,37000,16800"
1242st "direction : IN std_logic ; -- corresponds to 'PSINCDEC'
1243"
1244)
1245thePort (LogicalPort
1246decl (Decl
1247n "direction"
1248t "std_logic"
1249eolc "-- corresponds to 'PSINCDEC'"
1250preAdd 0
1251posAdd 0
1252o 9
1253suid 9,0
1254)
1255)
1256)
1257*90 (CptPort
1258uid 93,0
1259ps "OnEdgeStrategy"
1260shape (Triangle
1261uid 94,0
1262ro 90
1263va (VaSet
1264vasetType 1
1265fg "0,65535,0"
1266)
1267xt "66000,14625,66750,15375"
1268)
1269tg (CPTG
1270uid 95,0
1271ps "CptPortTextPlaceStrategy"
1272stg "RightVerticalLayoutStrategy"
1273f (Text
1274uid 96,0
1275va (VaSet
1276)
1277xt "61700,14500,65000,15500"
1278st "shifting"
1279ju 2
1280blo "65000,15300"
1281tm "CptPortNameMgr"
1282)
1283)
1284dt (MLText
1285uid 97,0
1286va (VaSet
1287font "Courier New,8,0"
1288)
1289xt "2000,17600,35500,19200"
1290st "-- status:
1291shifting : OUT std_logic := '0' ;
1292"
1293)
1294thePort (LogicalPort
1295m 1
1296decl (Decl
1297n "shifting"
1298t "std_logic"
1299prec "-- status:"
1300preAdd 0
1301posAdd 0
1302o 11
1303suid 10,0
1304i "'0'"
1305)
1306)
1307)
1308*91 (CptPort
1309uid 98,0
1310ps "OnEdgeStrategy"
1311shape (Triangle
1312uid 99,0
1313ro 90
1314va (VaSet
1315vasetType 1
1316fg "0,65535,0"
1317)
1318xt "66000,16625,66750,17375"
1319)
1320tg (CPTG
1321uid 100,0
1322ps "CptPortTextPlaceStrategy"
1323stg "RightVerticalLayoutStrategy"
1324f (Text
1325uid 101,0
1326va (VaSet
1327)
1328xt "62500,16500,65000,17500"
1329st "ready"
1330ju 2
1331blo "65000,17300"
1332tm "CptPortNameMgr"
1333)
1334)
1335dt (MLText
1336uid 102,0
1337va (VaSet
1338font "Courier New,8,0"
1339)
1340xt "2000,19200,35500,20000"
1341st "ready : OUT std_logic := '0' ;
1342"
1343)
1344thePort (LogicalPort
1345m 1
1346decl (Decl
1347n "ready"
1348t "std_logic"
1349preAdd 0
1350posAdd 0
1351o 12
1352suid 11,0
1353i "'0'"
1354)
1355)
1356)
1357*92 (CptPort
1358uid 103,0
1359ps "OnEdgeStrategy"
1360shape (Triangle
1361uid 104,0
1362ro 90
1363va (VaSet
1364vasetType 1
1365fg "0,65535,0"
1366)
1367xt "66000,18625,66750,19375"
1368)
1369tg (CPTG
1370uid 105,0
1371ps "CptPortTextPlaceStrategy"
1372stg "RightVerticalLayoutStrategy"
1373f (Text
1374uid 106,0
1375va (VaSet
1376)
1377xt "62200,18500,65000,19500"
1378st "offset"
1379ju 2
1380blo "65000,19300"
1381tm "CptPortNameMgr"
1382)
1383)
1384dt (MLText
1385uid 107,0
1386va (VaSet
1387font "Courier New,8,0"
1388)
1389xt "2000,21600,40500,22400"
1390st "offset : OUT std_logic_vector (7 DOWNTO 0) := (OTHERS => '0')
1391"
1392)
1393thePort (LogicalPort
1394m 1
1395decl (Decl
1396n "offset"
1397t "std_logic_vector"
1398b "(7 DOWNTO 0)"
1399preAdd 0
1400posAdd 0
1401o 15
1402suid 12,0
1403i "(OTHERS => '0')"
1404)
1405)
1406)
1407*93 (CommentText
1408uid 121,0
1409ps "EdgeToEdgeStrategy"
1410shape (Rectangle
1411uid 122,0
1412layer 0
1413va (VaSet
1414vasetType 1
1415fg "65280,65280,46080"
1416lineColor "0,0,32768"
1417)
1418xt "50000,2000,65000,6400"
1419)
1420oxt "50000,2000,65000,6000"
1421text (MLText
1422uid 123,0
1423va (VaSet
1424fg "0,0,32768"
1425)
1426xt "50200,2200,61600,6200"
1427st "
1428
1429"
1430tm "CommentText"
1431wrapOption 3
1432visibleHeight 4400
1433visibleWidth 15000
1434)
1435included 1
1436excludeCommentLeader 1
1437)
1438*94 (CptPort
1439uid 281,0
1440ps "OnEdgeStrategy"
1441shape (Triangle
1442uid 394,0
1443ro 270
1444va (VaSet
1445vasetType 1
1446fg "0,65535,0"
1447)
1448xt "49250,19625,50000,20375"
1449)
1450tg (CPTG
1451uid 283,0
1452ps "CptPortTextPlaceStrategy"
1453stg "VerticalLayoutStrategy"
1454f (Text
1455uid 284,0
1456va (VaSet
1457)
1458xt "51000,19500,52600,20500"
1459st "rst"
1460blo "51000,20300"
1461tm "CptPortNameMgr"
1462)
1463)
1464dt (MLText
1465uid 285,0
1466va (VaSet
1467font "Courier New,8,0"
1468)
1469xt "2000,8800,45000,9600"
1470st "rst : OUT std_logic := '0' ; --asynch in of DCM
1471"
1472)
1473thePort (LogicalPort
1474m 1
1475decl (Decl
1476n "rst"
1477t "std_logic"
1478eolc "--asynch in of DCM"
1479posAdd 0
1480o 2
1481suid 15,0
1482i "'0'"
1483)
1484)
1485)
1486*95 (CptPort
1487uid 362,0
1488ps "OnEdgeStrategy"
1489shape (Triangle
1490uid 363,0
1491ro 90
1492va (VaSet
1493vasetType 1
1494fg "0,65535,0"
1495)
1496xt "49250,21625,50000,22375"
1497)
1498tg (CPTG
1499uid 364,0
1500ps "CptPortTextPlaceStrategy"
1501stg "VerticalLayoutStrategy"
1502f (Text
1503uid 365,0
1504va (VaSet
1505)
1506xt "51000,21500,55700,22500"
1507st "reset_DCM"
1508blo "51000,22300"
1509tm "CptPortNameMgr"
1510)
1511)
1512dt (MLText
1513uid 366,0
1514va (VaSet
1515font "Courier New,8,0"
1516)
1517xt "2000,16800,43500,17600"
1518st "reset_DCM : IN std_logic ; -- asynch in: orders us, to reset the DCM
1519"
1520)
1521thePort (LogicalPort
1522decl (Decl
1523n "reset_DCM"
1524t "std_logic"
1525eolc "-- asynch in: orders us, to reset the DCM"
1526posAdd 0
1527o 10
1528suid 17,0
1529)
1530)
1531)
1532*96 (CptPort
1533uid 418,0
1534ps "OnEdgeStrategy"
1535shape (Triangle
1536uid 419,0
1537ro 90
1538va (VaSet
1539vasetType 1
1540fg "0,65535,0"
1541)
1542xt "66000,19625,66750,20375"
1543)
1544tg (CPTG
1545uid 420,0
1546ps "CptPortTextPlaceStrategy"
1547stg "RightVerticalLayoutStrategy"
1548f (Text
1549uid 421,0
1550va (VaSet
1551)
1552xt "57900,19500,65000,20500"
1553st "locked_status_o"
1554ju 2
1555blo "65000,20300"
1556tm "CptPortNameMgr"
1557)
1558)
1559dt (MLText
1560uid 422,0
1561va (VaSet
1562font "Courier New,8,0"
1563)
1564xt "2000,20000,22000,20800"
1565st "locked_status_o : OUT std_logic ;
1566"
1567)
1568thePort (LogicalPort
1569m 1
1570decl (Decl
1571n "locked_status_o"
1572t "std_logic"
1573o 13
1574suid 18,0
1575)
1576)
1577)
1578*97 (CptPort
1579uid 423,0
1580ps "OnEdgeStrategy"
1581shape (Triangle
1582uid 424,0
1583ro 90
1584va (VaSet
1585vasetType 1
1586fg "0,65535,0"
1587)
1588xt "66000,20625,66750,21375"
1589)
1590tg (CPTG
1591uid 425,0
1592ps "CptPortTextPlaceStrategy"
1593stg "RightVerticalLayoutStrategy"
1594f (Text
1595uid 426,0
1596va (VaSet
1597)
1598xt "58200,20500,65000,21500"
1599st "ready_status_o"
1600ju 2
1601blo "65000,21300"
1602tm "CptPortNameMgr"
1603)
1604)
1605dt (MLText
1606uid 427,0
1607va (VaSet
1608font "Courier New,8,0"
1609)
1610xt "2000,20800,22000,21600"
1611st "ready_status_o : OUT std_logic ;
1612"
1613)
1614thePort (LogicalPort
1615m 1
1616decl (Decl
1617n "ready_status_o"
1618t "std_logic"
1619o 14
1620suid 19,0
1621)
1622)
1623)
1624]
1625shape (Rectangle
1626uid 9,0
1627va (VaSet
1628vasetType 1
1629fg "0,65535,0"
1630lineColor "0,32896,0"
1631lineWidth 2
1632)
1633xt "50000,7000,66000,25000"
1634)
1635oxt "50000,7000,63000,25000"
1636biTextGroup (BiTextGroup
1637uid 10,0
1638ps "CenterOffsetStrategy"
1639stg "VerticalLayoutStrategy"
1640first (Text
1641uid 11,0
1642va (VaSet
1643font "Arial,8,1"
1644)
1645xt "54700,15000,60900,16000"
1646st "FACT_FAD_lib"
1647blo "54700,15800"
1648)
1649second (Text
1650uid 12,0
1651va (VaSet
1652font "Arial,8,1"
1653)
1654xt "54700,16000,60500,17000"
1655st "phase_shifter"
1656blo "54700,16800"
1657)
1658)
1659gi *98 (GenericInterface
1660uid 13,0
1661ps "CenterOffsetStrategy"
1662matrix (Matrix
1663uid 14,0
1664text (MLText
1665uid 15,0
1666va (VaSet
1667font "Courier New,8,0"
1668)
1669xt "50000,5200,61500,6000"
1670st "Generic Declarations"
1671)
1672header "Generic Declarations"
1673showHdrWhenContentsEmpty 1
1674)
1675elements [
1676]
1677)
1678portInstanceVisAsIs 1
1679portInstanceVis (PortSigDisplay
1680sIVOD 1
1681)
1682portVis (PortSigDisplay
1683sTC 0
1684)
1685)
1686*99 (Grouping
1687uid 16,0
1688optionalChildren [
1689*100 (CommentText
1690uid 18,0
1691shape (Rectangle
1692uid 19,0
1693sl 0
1694va (VaSet
1695vasetType 1
1696fg "65280,65280,46080"
1697)
1698xt "54000,33000,71000,34000"
1699)
1700oxt "18000,70000,35000,71000"
1701text (MLText
1702uid 20,0
1703va (VaSet
1704fg "0,0,32768"
1705bg "0,0,32768"
1706)
1707xt "54200,33000,63800,34000"
1708st "
1709by %user on %dd %month %year
1710"
1711tm "CommentText"
1712wrapOption 3
1713visibleHeight 1000
1714visibleWidth 17000
1715)
1716position 1
1717ignorePrefs 1
1718titleBlock 1
1719)
1720*101 (CommentText
1721uid 21,0
1722shape (Rectangle
1723uid 22,0
1724sl 0
1725va (VaSet
1726vasetType 1
1727fg "65280,65280,46080"
1728)
1729xt "71000,29000,75000,30000"
1730)
1731oxt "35000,66000,39000,67000"
1732text (MLText
1733uid 23,0
1734va (VaSet
1735fg "0,0,32768"
1736bg "0,0,32768"
1737)
1738xt "71200,29000,74200,30000"
1739st "
1740Project:
1741"
1742tm "CommentText"
1743wrapOption 3
1744visibleHeight 1000
1745visibleWidth 4000
1746)
1747position 1
1748ignorePrefs 1
1749titleBlock 1
1750)
1751*102 (CommentText
1752uid 24,0
1753shape (Rectangle
1754uid 25,0
1755sl 0
1756va (VaSet
1757vasetType 1
1758fg "65280,65280,46080"
1759)
1760xt "54000,31000,71000,32000"
1761)
1762oxt "18000,68000,35000,69000"
1763text (MLText
1764uid 26,0
1765va (VaSet
1766fg "0,0,32768"
1767bg "0,0,32768"
1768)
1769xt "54200,31000,64200,32000"
1770st "
1771<enter diagram title here>
1772"
1773tm "CommentText"
1774wrapOption 3
1775visibleHeight 1000
1776visibleWidth 17000
1777)
1778position 1
1779ignorePrefs 1
1780titleBlock 1
1781)
1782*103 (CommentText
1783uid 27,0
1784shape (Rectangle
1785uid 28,0
1786sl 0
1787va (VaSet
1788vasetType 1
1789fg "65280,65280,46080"
1790)
1791xt "50000,31000,54000,32000"
1792)
1793oxt "14000,68000,18000,69000"
1794text (MLText
1795uid 29,0
1796va (VaSet
1797fg "0,0,32768"
1798bg "0,0,32768"
1799)
1800xt "50200,31000,52300,32000"
1801st "
1802Title:
1803"
1804tm "CommentText"
1805wrapOption 3
1806visibleHeight 1000
1807visibleWidth 4000
1808)
1809position 1
1810ignorePrefs 1
1811titleBlock 1
1812)
1813*104 (CommentText
1814uid 30,0
1815shape (Rectangle
1816uid 31,0
1817sl 0
1818va (VaSet
1819vasetType 1
1820fg "65280,65280,46080"
1821)
1822xt "71000,30000,91000,34000"
1823)
1824oxt "35000,67000,55000,71000"
1825text (MLText
1826uid 32,0
1827va (VaSet
1828fg "0,0,32768"
1829bg "0,0,32768"
1830)
1831xt "71200,30200,80400,31200"
1832st "
1833<enter comments here>
1834"
1835tm "CommentText"
1836wrapOption 3
1837visibleHeight 4000
1838visibleWidth 20000
1839)
1840ignorePrefs 1
1841titleBlock 1
1842)
1843*105 (CommentText
1844uid 33,0
1845shape (Rectangle
1846uid 34,0
1847sl 0
1848va (VaSet
1849vasetType 1
1850fg "65280,65280,46080"
1851)
1852xt "75000,29000,91000,30000"
1853)
1854oxt "39000,66000,55000,67000"
1855text (MLText
1856uid 35,0
1857va (VaSet
1858fg "0,0,32768"
1859bg "0,0,32768"
1860)
1861xt "75200,29000,79700,30000"
1862st "
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1864"
1865tm "CommentText"
1866wrapOption 3
1867visibleHeight 1000
1868visibleWidth 16000
1869)
1870position 1
1871ignorePrefs 1
1872titleBlock 1
1873)
1874*106 (CommentText
1875uid 36,0
1876shape (Rectangle
1877uid 37,0
1878sl 0
1879va (VaSet
1880vasetType 1
1881fg "65280,65280,46080"
1882)
1883xt "50000,29000,71000,31000"
1884)
1885oxt "14000,66000,35000,68000"
1886text (MLText
1887uid 38,0
1888va (VaSet
1889fg "32768,0,0"
1890)
1891xt "57150,29500,63850,30500"
1892st "
1893<company name>
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1895ju 0
1896tm "CommentText"
1897wrapOption 3
1898visibleHeight 2000
1899visibleWidth 21000
1900)
1901position 1
1902ignorePrefs 1
1903titleBlock 1
1904)
1905*107 (CommentText
1906uid 39,0
1907shape (Rectangle
1908uid 40,0
1909sl 0
1910va (VaSet
1911vasetType 1
1912fg "65280,65280,46080"
1913)
1914xt "50000,32000,54000,33000"
1915)
1916oxt "14000,69000,18000,70000"
1917text (MLText
1918uid 41,0
1919va (VaSet
1920fg "0,0,32768"
1921bg "0,0,32768"
1922)
1923xt "50200,32000,52300,33000"
1924st "
1925Path:
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1927tm "CommentText"
1928wrapOption 3
1929visibleHeight 1000
1930visibleWidth 4000
1931)
1932position 1
1933ignorePrefs 1
1934titleBlock 1
1935)
1936*108 (CommentText
1937uid 42,0
1938shape (Rectangle
1939uid 43,0
1940sl 0
1941va (VaSet
1942vasetType 1
1943fg "65280,65280,46080"
1944)
1945xt "50000,33000,54000,34000"
1946)
1947oxt "14000,70000,18000,71000"
1948text (MLText
1949uid 44,0
1950va (VaSet
1951fg "0,0,32768"
1952bg "0,0,32768"
1953)
1954xt "50200,33000,52900,34000"
1955st "
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1958tm "CommentText"
1959wrapOption 3
1960visibleHeight 1000
1961visibleWidth 4000
1962)
1963position 1
1964ignorePrefs 1
1965titleBlock 1
1966)
1967*109 (CommentText
1968uid 45,0
1969shape (Rectangle
1970uid 46,0
1971sl 0
1972va (VaSet
1973vasetType 1
1974fg "65280,65280,46080"
1975)
1976xt "54000,32000,71000,33000"
1977)
1978oxt "18000,69000,35000,70000"
1979text (MLText
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2031Created using Mentor Graphics HDL2Graphics(TM) Technology
2032on - 10:55:50 02.08.2010
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