source: firmware/FAD/FACT_FAD_lib/hds/spi_interface/struct.bd

Last change on this file was 11755, checked in by neise, 13 years ago
reinit of this svn repos .... it was all too messy deleted the old folders and restarted with FACT_FAD_lib only. (well and the testbenches)
File size: 90.7 KB
Line 
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1024uid 473,0
1025sl 0
1026ro 270
1027xt "4000,35625,5500,36375"
1028)
1029(Line
1030uid 474,0
1031sl 0
1032ro 270
1033xt "5500,36000,6000,36000"
1034pts [
1035"5500,36000"
1036"6000,36000"
1037]
1038)
1039]
1040)
1041stc 0
1042sf 1
1043tg (WTG
1044uid 475,0
1045ps "PortIoTextPlaceStrategy"
1046stg "STSignalDisplayStrategy"
1047f (Text
1048uid 476,0
1049va (VaSet
1050)
1051xt "-1200,35500,3000,36500"
1052st "dac_array"
1053ju 2
1054blo "3000,36300"
1055tm "WireNameMgr"
1056)
1057)
1058)
1059*24 (Net
1060uid 487,0
1061decl (Decl
1062n "dac_array"
1063t "dac_array_type"
1064o 3
1065suid 17,0
1066)
1067declText (MLText
1068uid 488,0
1069va (VaSet
1070font "Courier New,8,0"
1071)
1072xt "-2000,13200,18000,14000"
1073st "dac_array : dac_array_type
1074"
1075)
1076)
1077*25 (PortIoOut
1078uid 1148,0
1079shape (CompositeShape
1080uid 1149,0
1081va (VaSet
1082vasetType 1
1083fg "0,0,32768"
1084)
1085optionalChildren [
1086(Pentagon
1087uid 1150,0
1088sl 0
1089ro 90
1090xt "4000,33625,5500,34375"
1091)
1092(Line
1093uid 1151,0
1094sl 0
1095ro 90
1096xt "5500,34000,6000,34000"
1097pts [
1098"6000,34000"
1099"5500,34000"
1100]
1101)
1102]
1103)
1104stc 0
1105sf 1
1106tg (WTG
1107uid 1152,0
1108ps "PortIoTextPlaceStrategy"
1109stg "STSignalDisplayStrategy"
1110f (Text
1111uid 1153,0
1112va (VaSet
1113)
1114xt "-2700,33500,3000,34500"
1115st "config_ready"
1116ju 2
1117blo "3000,34300"
1118tm "WireNameMgr"
1119)
1120)
1121)
1122*26 (Net
1123uid 1225,0
1124decl (Decl
1125n "config_start"
1126t "std_logic"
1127o 2
1128suid 27,0
1129)
1130declText (MLText
1131uid 1226,0
1132va (VaSet
1133font "Courier New,8,0"
1134)
1135xt "-2000,12400,15500,13200"
1136st "config_start : std_logic
1137"
1138)
1139)
1140*27 (Net
1141uid 1231,0
1142decl (Decl
1143n "config_ready"
1144t "std_logic"
1145o 4
1146suid 28,0
1147)
1148declText (MLText
1149uid 1232,0
1150va (VaSet
1151font "Courier New,8,0"
1152)
1153xt "-2000,14800,15500,15600"
1154st "config_ready : std_logic
1155"
1156)
1157)
1158*28 (Net
1159uid 1243,0
1160decl (Decl
1161n "dac_config_ready"
1162t "std_logic"
1163o 11
1164suid 30,0
1165)
1166declText (MLText
1167uid 1244,0
1168va (VaSet
1169font "Courier New,8,0"
1170)
1171xt "-2000,24600,19000,25400"
1172st "SIGNAL dac_config_ready : std_logic
1173"
1174)
1175)
1176*29 (Net
1177uid 1249,0
1178decl (Decl
1179n "dac_config_start"
1180t "std_logic"
1181o 12
1182suid 31,0
1183)
1184declText (MLText
1185uid 1250,0
1186va (VaSet
1187font "Courier New,8,0"
1188)
1189xt "-2000,25400,19000,26200"
1190st "SIGNAL dac_config_start : std_logic
1191"
1192)
1193)
1194*30 (Net
1195uid 1326,0
1196decl (Decl
1197n "dac_id"
1198t "std_logic_vector"
1199b "(2 DOWNTO 0)"
1200o 13
1201suid 32,0
1202)
1203declText (MLText
1204uid 1327,0
1205va (VaSet
1206font "Courier New,8,0"
1207)
1208xt "-2000,26200,29000,27000"
1209st "SIGNAL dac_id : std_logic_vector(2 DOWNTO 0)
1210"
1211)
1212)
1213*31 (Net
1214uid 1334,0
1215decl (Decl
1216n "sensor_id"
1217t "std_logic_vector"
1218b "(1 DOWNTO 0)"
1219o 15
1220suid 33,0
1221)
1222declText (MLText
1223uid 1335,0
1224va (VaSet
1225font "Courier New,8,0"
1226)
1227xt "-2000,30200,29000,31000"
1228st "SIGNAL sensor_id : std_logic_vector(1 DOWNTO 0)
1229"
1230)
1231)
1232*32 (Net
1233uid 1342,0
1234decl (Decl
1235n "sensor_start"
1236t "std_logic"
1237o 16
1238suid 34,0
1239)
1240declText (MLText
1241uid 1343,0
1242va (VaSet
1243font "Courier New,8,0"
1244)
1245xt "-2000,31000,19000,31800"
1246st "SIGNAL sensor_start : std_logic
1247"
1248)
1249)
1250*33 (Net
1251uid 1350,0
1252decl (Decl
1253n "sensor_valid"
1254t "std_logic"
1255o 17
1256suid 35,0
1257)
1258declText (MLText
1259uid 1351,0
1260va (VaSet
1261font "Courier New,8,0"
1262)
1263xt "-2000,31800,19000,32600"
1264st "SIGNAL sensor_valid : std_logic
1265"
1266)
1267)
1268*34 (PortIoOut
1269uid 1576,0
1270shape (CompositeShape
1271uid 1577,0
1272va (VaSet
1273vasetType 1
1274fg "0,0,32768"
1275)
1276optionalChildren [
1277(Pentagon
1278uid 1578,0
1279sl 0
1280ro 90
1281xt "4000,37625,5500,38375"
1282)
1283(Line
1284uid 1579,0
1285sl 0
1286ro 90
1287xt "5500,38000,6000,38000"
1288pts [
1289"6000,38000"
1290"5500,38000"
1291]
1292)
1293]
1294)
1295stc 0
1296sf 1
1297tg (WTG
1298uid 1580,0
1299ps "PortIoTextPlaceStrategy"
1300stg "STSignalDisplayStrategy"
1301f (Text
1302uid 1581,0
1303va (VaSet
1304)
1305xt "-2800,37500,3000,38500"
1306st "sensor_array"
1307ju 2
1308blo "3000,38300"
1309tm "WireNameMgr"
1310)
1311)
1312)
1313*35 (PortIoOut
1314uid 1582,0
1315shape (CompositeShape
1316uid 1583,0
1317va (VaSet
1318vasetType 1
1319fg "0,0,32768"
1320)
1321optionalChildren [
1322(Pentagon
1323uid 1584,0
1324sl 0
1325ro 90
1326xt "4000,36625,5500,37375"
1327)
1328(Line
1329uid 1585,0
1330sl 0
1331ro 90
1332xt "5500,37000,6000,37000"
1333pts [
1334"6000,37000"
1335"5500,37000"
1336]
1337)
1338]
1339)
1340stc 0
1341sf 1
1342tg (WTG
1343uid 1586,0
1344ps "PortIoTextPlaceStrategy"
1345stg "STSignalDisplayStrategy"
1346f (Text
1347uid 1587,0
1348va (VaSet
1349)
1350xt "-2900,36500,3000,37500"
1351st "sensor_ready"
1352ju 2
1353blo "3000,37300"
1354tm "WireNameMgr"
1355)
1356)
1357)
1358*36 (Net
1359uid 1596,0
1360decl (Decl
1361n "sensor_array"
1362t "sensor_array_type"
1363o 7
1364suid 37,0
1365)
1366declText (MLText
1367uid 1597,0
1368va (VaSet
1369font "Courier New,8,0"
1370)
1371xt "-2000,18800,20000,19600"
1372st "sensor_array : sensor_array_type
1373"
1374)
1375)
1376*37 (Net
1377uid 1602,0
1378decl (Decl
1379n "sensor_ready"
1380t "std_logic"
1381o 9
1382suid 38,0
1383)
1384declText (MLText
1385uid 1603,0
1386va (VaSet
1387font "Courier New,8,0"
1388)
1389xt "-2000,20400,15500,21200"
1390st "sensor_ready : std_logic
1391"
1392)
1393)
1394*38 (SaComponent
1395uid 2195,0
1396optionalChildren [
1397*39 (CptPort
1398uid 2143,0
1399ps "OnEdgeStrategy"
1400shape (Triangle
1401uid 2144,0
1402ro 90
1403va (VaSet
1404vasetType 1
1405fg "0,65535,0"
1406)
1407xt "10250,31625,11000,32375"
1408)
1409tg (CPTG
1410uid 2145,0
1411ps "CptPortTextPlaceStrategy"
1412stg "VerticalLayoutStrategy"
1413f (Text
1414uid 2146,0
1415va (VaSet
1416)
1417xt "12000,31500,13500,32500"
1418st "clk"
1419blo "12000,32300"
1420)
1421)
1422thePort (LogicalPort
1423decl (Decl
1424n "clk"
1425t "std_logic"
1426o 1
1427)
1428)
1429)
1430*40 (CptPort
1431uid 2147,0
1432ps "OnEdgeStrategy"
1433shape (Triangle
1434uid 2148,0
1435ro 90
1436va (VaSet
1437vasetType 1
1438fg "0,65535,0"
1439)
1440xt "10250,32625,11000,33375"
1441)
1442tg (CPTG
1443uid 2149,0
1444ps "CptPortTextPlaceStrategy"
1445stg "VerticalLayoutStrategy"
1446f (Text
1447uid 2150,0
1448va (VaSet
1449)
1450xt "12000,32500,17600,33500"
1451st "config_start"
1452blo "12000,33300"
1453)
1454)
1455thePort (LogicalPort
1456decl (Decl
1457n "config_start"
1458t "std_logic"
1459o 2
1460)
1461)
1462)
1463*41 (CptPort
1464uid 2151,0
1465ps "OnEdgeStrategy"
1466shape (Triangle
1467uid 2152,0
1468ro 270
1469va (VaSet
1470vasetType 1
1471fg "0,65535,0"
1472)
1473xt "10250,33625,11000,34375"
1474)
1475tg (CPTG
1476uid 2153,0
1477ps "CptPortTextPlaceStrategy"
1478stg "VerticalLayoutStrategy"
1479f (Text
1480uid 2154,0
1481va (VaSet
1482)
1483xt "12000,33500,17700,34500"
1484st "config_ready"
1485blo "12000,34300"
1486)
1487)
1488thePort (LogicalPort
1489m 1
1490decl (Decl
1491n "config_ready"
1492t "std_logic"
1493o 3
1494i "'1'"
1495)
1496)
1497)
1498*42 (CptPort
1499uid 2155,0
1500ps "OnEdgeStrategy"
1501shape (Triangle
1502uid 2156,0
1503ro 270
1504va (VaSet
1505vasetType 1
1506fg "0,65535,0"
1507)
1508xt "10250,36625,11000,37375"
1509)
1510tg (CPTG
1511uid 2157,0
1512ps "CptPortTextPlaceStrategy"
1513stg "VerticalLayoutStrategy"
1514f (Text
1515uid 2158,0
1516va (VaSet
1517)
1518xt "12000,36500,17500,37500"
1519st "sensor_valid"
1520blo "12000,37300"
1521)
1522)
1523thePort (LogicalPort
1524m 1
1525decl (Decl
1526n "sensor_valid"
1527t "std_logic"
1528o 7
1529i "'0'"
1530)
1531)
1532)
1533*43 (CptPort
1534uid 2159,0
1535ps "OnEdgeStrategy"
1536shape (Triangle
1537uid 2160,0
1538ro 90
1539va (VaSet
1540vasetType 1
1541fg "0,65535,0"
1542)
1543xt "10250,35625,11000,36375"
1544)
1545tg (CPTG
1546uid 2161,0
1547ps "CptPortTextPlaceStrategy"
1548stg "VerticalLayoutStrategy"
1549f (Text
1550uid 2162,0
1551va (VaSet
1552)
1553xt "12000,35500,16200,36500"
1554st "dac_array"
1555blo "12000,36300"
1556)
1557)
1558thePort (LogicalPort
1559decl (Decl
1560n "dac_array"
1561t "dac_array_type"
1562o 4
1563)
1564)
1565)
1566*44 (CptPort
1567uid 2163,0
1568ps "OnEdgeStrategy"
1569shape (Triangle
1570uid 2164,0
1571ro 270
1572va (VaSet
1573vasetType 1
1574fg "0,65535,0"
1575)
1576xt "10250,37625,11000,38375"
1577)
1578tg (CPTG
1579uid 2165,0
1580ps "CptPortTextPlaceStrategy"
1581stg "VerticalLayoutStrategy"
1582f (Text
1583uid 2166,0
1584va (VaSet
1585)
1586xt "12000,37500,17800,38500"
1587st "sensor_array"
1588blo "12000,38300"
1589)
1590)
1591thePort (LogicalPort
1592m 1
1593decl (Decl
1594n "sensor_array"
1595t "sensor_array_type"
1596o 6
1597)
1598)
1599)
1600*45 (CptPort
1601uid 2167,0
1602ps "OnEdgeStrategy"
1603shape (Triangle
1604uid 2168,0
1605ro 90
1606va (VaSet
1607vasetType 1
1608fg "0,65535,0"
1609)
1610xt "28000,34625,28750,35375"
1611)
1612tg (CPTG
1613uid 2169,0
1614ps "CptPortTextPlaceStrategy"
1615stg "RightVerticalLayoutStrategy"
1616f (Text
1617uid 2170,0
1618va (VaSet
1619)
1620xt "19600,34500,27000,35500"
1621st "dac_config_start"
1622ju 2
1623blo "27000,35300"
1624)
1625)
1626thePort (LogicalPort
1627m 1
1628decl (Decl
1629n "dac_config_start"
1630t "std_logic"
1631o 10
1632i "'0'"
1633)
1634)
1635)
1636*46 (CptPort
1637uid 2171,0
1638ps "OnEdgeStrategy"
1639shape (Triangle
1640uid 2172,0
1641ro 270
1642va (VaSet
1643vasetType 1
1644fg "0,65535,0"
1645)
1646xt "28000,40625,28750,41375"
1647)
1648tg (CPTG
1649uid 2173,0
1650ps "CptPortTextPlaceStrategy"
1651stg "RightVerticalLayoutStrategy"
1652f (Text
1653uid 2174,0
1654va (VaSet
1655)
1656xt "19500,40500,27000,41500"
1657st "dac_config_ready"
1658ju 2
1659blo "27000,41300"
1660)
1661)
1662thePort (LogicalPort
1663decl (Decl
1664n "dac_config_ready"
1665t "std_logic"
1666o 11
1667)
1668)
1669)
1670*47 (CptPort
1671uid 2175,0
1672ps "OnEdgeStrategy"
1673shape (Triangle
1674uid 2176,0
1675ro 90
1676va (VaSet
1677vasetType 1
1678fg "0,65535,0"
1679)
1680xt "28000,35625,28750,36375"
1681)
1682tg (CPTG
1683uid 2177,0
1684ps "CptPortTextPlaceStrategy"
1685stg "RightVerticalLayoutStrategy"
1686f (Text
1687uid 2178,0
1688va (VaSet
1689)
1690xt "19000,35500,27000,36500"
1691st "sensor_read_start"
1692ju 2
1693blo "27000,36300"
1694)
1695)
1696thePort (LogicalPort
1697m 1
1698decl (Decl
1699n "sensor_read_start"
1700t "std_logic"
1701o 8
1702i "'0'"
1703)
1704)
1705)
1706*48 (CptPort
1707uid 2179,0
1708ps "OnEdgeStrategy"
1709shape (Triangle
1710uid 2180,0
1711ro 270
1712va (VaSet
1713vasetType 1
1714fg "0,65535,0"
1715)
1716xt "28000,41625,28750,42375"
1717)
1718tg (CPTG
1719uid 2181,0
1720ps "CptPortTextPlaceStrategy"
1721stg "RightVerticalLayoutStrategy"
1722f (Text
1723uid 2182,0
1724va (VaSet
1725)
1726xt "19300,41500,27000,42500"
1727st "sensor_read_valid"
1728ju 2
1729blo "27000,42300"
1730)
1731)
1732thePort (LogicalPort
1733decl (Decl
1734n "sensor_read_valid"
1735t "std_logic"
1736o 9
1737)
1738)
1739)
1740*49 (CptPort
1741uid 2183,0
1742ps "OnEdgeStrategy"
1743shape (Triangle
1744uid 2184,0
1745ro 90
1746va (VaSet
1747vasetType 1
1748fg "0,65535,0"
1749)
1750xt "28000,31625,28750,32375"
1751)
1752tg (CPTG
1753uid 2185,0
1754ps "CptPortTextPlaceStrategy"
1755stg "RightVerticalLayoutStrategy"
1756f (Text
1757uid 2186,0
1758va (VaSet
1759)
1760xt "21200,31500,27000,32500"
1761st "dac_id : (2:0)"
1762ju 2
1763blo "27000,32300"
1764)
1765)
1766thePort (LogicalPort
1767m 1
1768decl (Decl
1769n "dac_id"
1770t "std_logic_vector"
1771b "(2 downto 0)"
1772o 14
1773i "(others => '0')"
1774)
1775)
1776)
1777*50 (CptPort
1778uid 2187,0
1779ps "OnEdgeStrategy"
1780shape (Triangle
1781uid 2188,0
1782ro 90
1783va (VaSet
1784vasetType 1
1785fg "0,65535,0"
1786)
1787xt "28000,32625,28750,33375"
1788)
1789tg (CPTG
1790uid 2189,0
1791ps "CptPortTextPlaceStrategy"
1792stg "RightVerticalLayoutStrategy"
1793f (Text
1794uid 2190,0
1795va (VaSet
1796)
1797xt "20200,32500,27000,33500"
1798st "sensor_id : (1:0)"
1799ju 2
1800blo "27000,33300"
1801)
1802)
1803thePort (LogicalPort
1804m 1
1805decl (Decl
1806n "sensor_id"
1807t "std_logic_vector"
1808b "(1 downto 0)"
1809o 15
1810i "(others => '0')"
1811)
1812)
1813)
1814*51 (CptPort
1815uid 2191,0
1816ps "OnEdgeStrategy"
1817shape (Diamond
1818uid 2192,0
1819ro 90
1820va (VaSet
1821vasetType 1
1822fg "0,65535,0"
1823)
1824xt "28000,37625,28750,38375"
1825)
1826tg (CPTG
1827uid 2193,0
1828ps "CptPortTextPlaceStrategy"
1829stg "RightVerticalLayoutStrategy"
1830f (Text
1831uid 2194,0
1832va (VaSet
1833)
1834xt "21600,37500,27000,38500"
1835st "data : (15:0)"
1836ju 2
1837blo "27000,38300"
1838)
1839)
1840thePort (LogicalPort
1841m 2
1842decl (Decl
1843n "data"
1844t "std_logic_vector"
1845b "(15 downto 0)"
1846o 16
1847i "(others => 'Z')"
1848)
1849)
1850)
1851*52 (CptPort
1852uid 2814,0
1853ps "OnEdgeStrategy"
1854shape (Triangle
1855uid 2815,0
1856ro 270
1857va (VaSet
1858vasetType 1
1859fg "0,65535,0"
1860)
1861xt "10250,39625,11000,40375"
1862)
1863tg (CPTG
1864uid 2816,0
1865ps "CptPortTextPlaceStrategy"
1866stg "VerticalLayoutStrategy"
1867f (Text
1868uid 2817,0
1869va (VaSet
1870)
1871xt "12000,39500,20000,40500"
1872st "current_dac_array"
1873blo "12000,40300"
1874)
1875)
1876thePort (LogicalPort
1877m 1
1878decl (Decl
1879n "current_dac_array"
1880t "dac_array_type"
1881o 5
1882i "( others => 0)"
1883)
1884)
1885)
1886*53 (CptPort
1887uid 3012,0
1888ps "OnEdgeStrategy"
1889shape (Triangle
1890uid 3013,0
1891ro 90
1892va (VaSet
1893vasetType 1
1894fg "0,65535,0"
1895)
1896xt "28000,45625,28750,46375"
1897)
1898tg (CPTG
1899uid 3014,0
1900ps "CptPortTextPlaceStrategy"
1901stg "RightVerticalLayoutStrategy"
1902f (Text
1903uid 3015,0
1904va (VaSet
1905)
1906xt "17700,45500,27000,46500"
1907st "sclk_enable_override"
1908ju 2
1909blo "27000,46300"
1910)
1911)
1912thePort (LogicalPort
1913m 1
1914decl (Decl
1915n "sclk_enable_override"
1916t "std_logic"
1917o 13
1918i "'0'"
1919)
1920)
1921)
1922*54 (CptPort
1923uid 3167,0
1924ps "OnEdgeStrategy"
1925shape (Triangle
1926uid 3168,0
1927ro 270
1928va (VaSet
1929vasetType 1
1930fg "0,65535,0"
1931)
1932xt "28000,42625,28750,43375"
1933)
1934tg (CPTG
1935uid 3169,0
1936ps "CptPortTextPlaceStrategy"
1937stg "RightVerticalLayoutStrategy"
1938f (Text
1939uid 3170,0
1940va (VaSet
1941)
1942xt "19300,42500,27000,43500"
1943st "spi_channel_ready"
1944ju 2
1945blo "27000,43300"
1946)
1947)
1948thePort (LogicalPort
1949decl (Decl
1950n "spi_channel_ready"
1951t "std_logic"
1952o 12
1953)
1954)
1955)
1956*55 (CptPort
1957uid 3253,0
1958ps "OnEdgeStrategy"
1959shape (Triangle
1960uid 3254,0
1961ro 270
1962va (VaSet
1963vasetType 1
1964fg "0,65535,0"
1965)
1966xt "28000,43625,28750,44375"
1967)
1968tg (CPTG
1969uid 3255,0
1970ps "CptPortTextPlaceStrategy"
1971stg "RightVerticalLayoutStrategy"
1972f (Text
1973uid 3256,0
1974va (VaSet
1975)
1976xt "14800,43500,27000,44500"
1977st "measured_temp_data : (15:0)"
1978ju 2
1979blo "27000,44300"
1980)
1981)
1982thePort (LogicalPort
1983decl (Decl
1984n "measured_temp_data"
1985t "std_logic_vector"
1986b "(15 downto 0)"
1987o 17
1988)
1989)
1990)
1991]
1992shape (Rectangle
1993uid 2196,0
1994va (VaSet
1995vasetType 1
1996fg "0,65535,0"
1997lineColor "0,32896,0"
1998lineWidth 2
1999)
2000xt "11000,31000,28000,47000"
2001)
2002oxt "0,0,8000,10000"
2003ttg (MlTextGroup
2004uid 2197,0
2005ps "CenterOffsetStrategy"
2006stg "VerticalLayoutStrategy"
2007textVec [
2008*56 (Text
2009uid 2198,0
2010va (VaSet
2011font "Arial,8,1"
2012)
2013xt "10350,47000,16550,48000"
2014st "FACT_FAD_lib"
2015blo "10350,47800"
2016tm "BdLibraryNameMgr"
2017)
2018*57 (Text
2019uid 2199,0
2020va (VaSet
2021font "Arial,8,1"
2022)
2023xt "10350,48000,16650,49000"
2024st "spi_distributor"
2025blo "10350,48800"
2026tm "CptNameMgr"
2027)
2028*58 (Text
2029uid 2200,0
2030va (VaSet
2031font "Arial,8,1"
2032)
2033xt "10350,49000,17250,50000"
2034st "I_spi_distributor"
2035blo "10350,49800"
2036tm "InstanceNameMgr"
2037)
2038]
2039)
2040ga (GenericAssociation
2041uid 2201,0
2042ps "EdgeToEdgeStrategy"
2043matrix (Matrix
2044uid 2202,0
2045text (MLText
2046uid 2203,0
2047va (VaSet
2048font "Courier New,8,0"
2049)
2050xt "11000,30200,37000,31000"
2051st "TEMP_MEASUREMENT_BEAT = 5*10**6 ( integer ) "
2052)
2053header ""
2054)
2055elements [
2056(GiElement
2057name "TEMP_MEASUREMENT_BEAT"
2058type "integer"
2059value "5*10**6"
2060)
2061]
2062)
2063viewicon (ZoomableIcon
2064uid 2204,0
2065sl 0
2066va (VaSet
2067vasetType 1
2068fg "49152,49152,49152"
2069)
2070xt "11250,45250,12750,46750"
2071iconName "VhdlFileViewIcon.png"
2072iconMaskName "VhdlFileViewIcon.msk"
2073ftype 10
2074)
2075ordering 1
2076viewiconposition 0
2077portVis (PortSigDisplay
2078)
2079archFileType "UNKNOWN"
2080)
2081*59 (SaComponent
2082uid 2249,0
2083optionalChildren [
2084*60 (CptPort
2085uid 2205,0
2086ps "OnEdgeStrategy"
2087shape (Triangle
2088uid 2206,0
2089ro 90
2090va (VaSet
2091vasetType 1
2092fg "0,65535,0"
2093)
2094xt "38250,30625,39000,31375"
2095)
2096tg (CPTG
2097uid 2207,0
2098ps "CptPortTextPlaceStrategy"
2099stg "VerticalLayoutStrategy"
2100f (Text
2101uid 2208,0
2102va (VaSet
2103)
2104xt "40000,30500,41300,31500"
2105st "clk"
2106blo "40000,31300"
2107)
2108)
2109thePort (LogicalPort
2110decl (Decl
2111n "clk"
2112t "std_logic"
2113o 1
2114)
2115)
2116)
2117*61 (CptPort
2118uid 2213,0
2119ps "OnEdgeStrategy"
2120shape (Triangle
2121uid 2214,0
2122ro 90
2123va (VaSet
2124vasetType 1
2125fg "0,65535,0"
2126)
2127xt "38250,31625,39000,32375"
2128)
2129tg (CPTG
2130uid 2215,0
2131ps "CptPortTextPlaceStrategy"
2132stg "VerticalLayoutStrategy"
2133f (Text
2134uid 2216,0
2135va (VaSet
2136)
2137xt "40000,31500,45800,32500"
2138st "dac_id : (2:0)"
2139blo "40000,32300"
2140)
2141)
2142thePort (LogicalPort
2143decl (Decl
2144n "dac_id"
2145t "std_logic_vector"
2146b "(2 DOWNTO 0)"
2147o 6
2148)
2149)
2150)
2151*62 (CptPort
2152uid 2217,0
2153ps "OnEdgeStrategy"
2154shape (Triangle
2155uid 2218,0
2156ro 90
2157va (VaSet
2158vasetType 1
2159fg "0,65535,0"
2160)
2161xt "38250,32625,39000,33375"
2162)
2163tg (CPTG
2164uid 2219,0
2165ps "CptPortTextPlaceStrategy"
2166stg "VerticalLayoutStrategy"
2167f (Text
2168uid 2220,0
2169va (VaSet
2170)
2171xt "40000,32500,46800,33500"
2172st "sensor_id : (1:0)"
2173blo "40000,33300"
2174)
2175)
2176thePort (LogicalPort
2177decl (Decl
2178n "sensor_id"
2179t "std_logic_vector"
2180b "(1 downto 0)"
2181o 7
2182)
2183)
2184)
2185*63 (CptPort
2186uid 2221,0
2187ps "OnEdgeStrategy"
2188shape (Diamond
2189uid 2222,0
2190ro 270
2191va (VaSet
2192vasetType 1
2193fg "0,65535,0"
2194)
2195xt "38250,37625,39000,38375"
2196)
2197tg (CPTG
2198uid 2223,0
2199ps "CptPortTextPlaceStrategy"
2200stg "VerticalLayoutStrategy"
2201f (Text
2202uid 2224,0
2203va (VaSet
2204)
2205xt "40000,37500,45400,38500"
2206st "data : (15:0)"
2207blo "40000,38300"
2208)
2209)
2210thePort (LogicalPort
2211m 2
2212decl (Decl
2213n "data"
2214t "std_logic_vector"
2215b "(15 DOWNTO 0)"
2216o 8
2217i "(others => 'Z')"
2218)
2219)
2220)
2221*64 (CptPort
2222uid 2225,0
2223ps "OnEdgeStrategy"
2224shape (Triangle
2225uid 2226,0
2226ro 90
2227va (VaSet
2228vasetType 1
2229fg "0,65535,0"
2230)
2231xt "55000,32625,55750,33375"
2232)
2233tg (CPTG
2234uid 2227,0
2235ps "CptPortTextPlaceStrategy"
2236stg "RightVerticalLayoutStrategy"
2237f (Text
2238uid 2228,0
2239va (VaSet
2240)
2241xt "51000,32500,54000,33500"
2242st "dac_cs"
2243ju 2
2244blo "54000,33300"
2245)
2246)
2247thePort (LogicalPort
2248m 1
2249decl (Decl
2250n "dac_cs"
2251t "std_logic"
2252o 4
2253i "'1'"
2254)
2255)
2256)
2257*65 (CptPort
2258uid 2229,0
2259ps "OnEdgeStrategy"
2260shape (Triangle
2261uid 2230,0
2262ro 90
2263va (VaSet
2264vasetType 1
2265fg "0,65535,0"
2266)
2267xt "55000,37625,55750,38375"
2268)
2269tg (CPTG
2270uid 2231,0
2271ps "CptPortTextPlaceStrategy"
2272stg "RightVerticalLayoutStrategy"
2273f (Text
2274uid 2232,0
2275va (VaSet
2276)
2277xt "47000,37500,54000,38500"
2278st "sensor_cs : (3:0)"
2279ju 2
2280blo "54000,38300"
2281)
2282)
2283thePort (LogicalPort
2284m 1
2285decl (Decl
2286n "sensor_cs"
2287t "std_logic_vector"
2288b "(3 DOWNTO 0)"
2289o 5
2290i "(others => '1')"
2291)
2292)
2293)
2294*66 (CptPort
2295uid 2233,0
2296ps "OnEdgeStrategy"
2297shape (Triangle
2298uid 2234,0
2299ro 90
2300va (VaSet
2301vasetType 1
2302fg "0,65535,0"
2303)
2304xt "38250,34625,39000,35375"
2305)
2306tg (CPTG
2307uid 2235,0
2308ps "CptPortTextPlaceStrategy"
2309stg "VerticalLayoutStrategy"
2310f (Text
2311uid 2236,0
2312va (VaSet
2313)
2314xt "40000,34500,44200,35500"
2315st "dac_start"
2316blo "40000,35300"
2317)
2318)
2319thePort (LogicalPort
2320decl (Decl
2321n "dac_start"
2322t "std_logic"
2323o 10
2324)
2325)
2326)
2327*67 (CptPort
2328uid 2237,0
2329ps "OnEdgeStrategy"
2330shape (Triangle
2331uid 2238,0
2332ro 270
2333va (VaSet
2334vasetType 1
2335fg "0,65535,0"
2336)
2337xt "38250,40625,39000,41375"
2338)
2339tg (CPTG
2340uid 2239,0
2341ps "CptPortTextPlaceStrategy"
2342stg "VerticalLayoutStrategy"
2343f (Text
2344uid 2240,0
2345va (VaSet
2346)
2347xt "40000,40500,44300,41500"
2348st "dac_ready"
2349blo "40000,41300"
2350)
2351)
2352thePort (LogicalPort
2353m 1
2354decl (Decl
2355n "dac_ready"
2356t "std_logic"
2357o 11
2358i "'0'"
2359)
2360)
2361)
2362*68 (CptPort
2363uid 2241,0
2364ps "OnEdgeStrategy"
2365shape (Triangle
2366uid 2242,0
2367ro 90
2368va (VaSet
2369vasetType 1
2370fg "0,65535,0"
2371)
2372xt "38250,35625,39000,36375"
2373)
2374tg (CPTG
2375uid 2243,0
2376ps "CptPortTextPlaceStrategy"
2377stg "VerticalLayoutStrategy"
2378f (Text
2379uid 2244,0
2380va (VaSet
2381)
2382xt "40000,35500,45800,36500"
2383st "sensor_start"
2384blo "40000,36300"
2385)
2386)
2387thePort (LogicalPort
2388decl (Decl
2389n "sensor_start"
2390t "std_logic"
2391o 12
2392)
2393)
2394)
2395*69 (CptPort
2396uid 2245,0
2397ps "OnEdgeStrategy"
2398shape (Triangle
2399uid 2246,0
2400ro 270
2401va (VaSet
2402vasetType 1
2403fg "0,65535,0"
2404)
2405xt "38250,41625,39000,42375"
2406)
2407tg (CPTG
2408uid 2247,0
2409ps "CptPortTextPlaceStrategy"
2410stg "VerticalLayoutStrategy"
2411f (Text
2412uid 2248,0
2413va (VaSet
2414)
2415xt "40000,41500,45500,42500"
2416st "sensor_valid"
2417blo "40000,42300"
2418)
2419)
2420thePort (LogicalPort
2421m 1
2422decl (Decl
2423n "sensor_valid"
2424t "std_logic"
2425o 13
2426i "'0'"
2427)
2428)
2429)
2430*70 (CptPort
2431uid 2351,0
2432ps "OnEdgeStrategy"
2433shape (Triangle
2434uid 2352,0
2435ro 90
2436va (VaSet
2437vasetType 1
2438fg "0,65535,0"
2439)
2440xt "55000,31625,55750,32375"
2441)
2442tg (CPTG
2443uid 2353,0
2444ps "CptPortTextPlaceStrategy"
2445stg "RightVerticalLayoutStrategy"
2446f (Text
2447uid 2354,0
2448va (VaSet
2449)
2450xt "52000,31500,54000,32500"
2451st "mosi"
2452ju 2
2453blo "54000,32300"
2454)
2455)
2456thePort (LogicalPort
2457m 1
2458decl (Decl
2459n "mosi"
2460t "std_logic"
2461o 3
2462i "'0'"
2463)
2464)
2465)
2466*71 (CptPort
2467uid 2398,0
2468ps "OnEdgeStrategy"
2469shape (Diamond
2470uid 2399,0
2471ro 90
2472va (VaSet
2473vasetType 1
2474fg "0,65535,0"
2475)
2476xt "55000,30625,55750,31375"
2477)
2478tg (CPTG
2479uid 2400,0
2480ps "CptPortTextPlaceStrategy"
2481stg "RightVerticalLayoutStrategy"
2482f (Text
2483uid 2401,0
2484va (VaSet
2485)
2486xt "52000,30500,54000,31500"
2487st "miso"
2488ju 2
2489blo "54000,31300"
2490)
2491)
2492thePort (LogicalPort
2493m 2
2494decl (Decl
2495n "miso"
2496t "std_logic"
2497o 2
2498i "'Z'"
2499)
2500)
2501)
2502*72 (CptPort
2503uid 3163,0
2504ps "OnEdgeStrategy"
2505shape (Triangle
2506uid 3164,0
2507ro 270
2508va (VaSet
2509vasetType 1
2510fg "0,65535,0"
2511)
2512xt "38250,42625,39000,43375"
2513)
2514tg (CPTG
2515uid 3165,0
2516ps "CptPortTextPlaceStrategy"
2517stg "VerticalLayoutStrategy"
2518f (Text
2519uid 3166,0
2520va (VaSet
2521)
2522xt "40000,42500,47700,43500"
2523st "spi_channel_ready"
2524blo "40000,43300"
2525)
2526)
2527thePort (LogicalPort
2528m 1
2529decl (Decl
2530n "spi_channel_ready"
2531t "std_logic"
2532o 14
2533i "'1'"
2534)
2535)
2536)
2537*73 (CptPort
2538uid 3249,0
2539ps "OnEdgeStrategy"
2540shape (Triangle
2541uid 3250,0
2542ro 270
2543va (VaSet
2544vasetType 1
2545fg "0,65535,0"
2546)
2547xt "38250,43625,39000,44375"
2548)
2549tg (CPTG
2550uid 3251,0
2551ps "CptPortTextPlaceStrategy"
2552stg "VerticalLayoutStrategy"
2553f (Text
2554uid 3252,0
2555va (VaSet
2556)
2557xt "40000,43500,52200,44500"
2558st "measured_temp_data : (15:0)"
2559blo "40000,44300"
2560)
2561)
2562thePort (LogicalPort
2563m 1
2564decl (Decl
2565n "measured_temp_data"
2566t "std_logic_vector"
2567b "(15 DOWNTO 0)"
2568o 9
2569i "(others => '0')"
2570)
2571)
2572)
2573]
2574shape (Rectangle
2575uid 2250,0
2576va (VaSet
2577vasetType 1
2578fg "0,65535,0"
2579lineColor "0,32896,0"
2580lineWidth 2
2581)
2582xt "39000,30000,55000,47000"
2583)
2584oxt "0,0,8000,10000"
2585ttg (MlTextGroup
2586uid 2251,0
2587ps "CenterOffsetStrategy"
2588stg "VerticalLayoutStrategy"
2589textVec [
2590*74 (Text
2591uid 2252,0
2592va (VaSet
2593font "Arial,8,1"
2594)
2595xt "47900,43000,54100,44000"
2596st "FACT_FAD_lib"
2597blo "47900,43800"
2598tm "BdLibraryNameMgr"
2599)
2600*75 (Text
2601uid 2253,0
2602va (VaSet
2603font "Arial,8,1"
2604)
2605xt "47900,44000,53800,45000"
2606st "spi_controller"
2607blo "47900,44800"
2608tm "CptNameMgr"
2609)
2610*76 (Text
2611uid 2254,0
2612va (VaSet
2613font "Arial,8,1"
2614)
2615xt "47900,45000,54400,46000"
2616st "I_spi_controller"
2617blo "47900,45800"
2618tm "InstanceNameMgr"
2619)
2620]
2621)
2622ga (GenericAssociation
2623uid 2255,0
2624ps "EdgeToEdgeStrategy"
2625matrix (Matrix
2626uid 2256,0
2627text (MLText
2628uid 2257,0
2629va (VaSet
2630font "Courier New,8,0"
2631)
2632xt "47000,30000,47000,30000"
2633)
2634header ""
2635)
2636elements [
2637]
2638)
2639viewicon (ZoomableIcon
2640uid 2258,0
2641sl 0
2642va (VaSet
2643vasetType 1
2644fg "49152,49152,49152"
2645)
2646xt "39250,45250,40750,46750"
2647iconName "VhdlFileViewIcon.png"
2648iconMaskName "VhdlFileViewIcon.msk"
2649ftype 10
2650)
2651ordering 1
2652viewiconposition 0
2653portVis (PortSigDisplay
2654)
2655archFileType "UNKNOWN"
2656)
2657*77 (Net
2658uid 2355,0
2659decl (Decl
2660n "mosi"
2661t "std_logic"
2662o 19
2663suid 46,0
2664i "'0'"
2665)
2666declText (MLText
2667uid 2356,0
2668va (VaSet
2669font "Courier New,8,0"
2670)
2671xt "-2000,17200,29500,18000"
2672st "mosi : std_logic := '0'
2673"
2674)
2675)
2676*78 (PortIoOut
2677uid 2363,0
2678shape (CompositeShape
2679uid 2364,0
2680va (VaSet
2681vasetType 1
2682fg "0,0,32768"
2683)
2684optionalChildren [
2685(Pentagon
2686uid 2365,0
2687sl 0
2688ro 270
2689xt "57500,31625,59000,32375"
2690)
2691(Line
2692uid 2366,0
2693sl 0
2694ro 270
2695xt "57000,32000,57500,32000"
2696pts [
2697"57000,32000"
2698"57500,32000"
2699]
2700)
2701]
2702)
2703stc 0
2704sf 1
2705tg (WTG
2706uid 2367,0
2707ps "PortIoTextPlaceStrategy"
2708stg "STSignalDisplayStrategy"
2709f (Text
2710uid 2368,0
2711va (VaSet
2712)
2713xt "60000,31500,62000,32500"
2714st "mosi"
2715blo "60000,32300"
2716tm "WireNameMgr"
2717)
2718)
2719)
2720*79 (Net
2721uid 2402,0
2722decl (Decl
2723n "miso"
2724t "std_logic"
2725preAdd 0
2726posAdd 0
2727o 10
2728suid 47,0
2729)
2730declText (MLText
2731uid 2403,0
2732va (VaSet
2733font "Courier New,8,0"
2734)
2735xt "-2000,21200,15500,22000"
2736st "miso : std_logic
2737"
2738)
2739)
2740*80 (SaComponent
2741uid 2645,0
2742optionalChildren [
2743*81 (CptPort
2744uid 2637,0
2745ps "OnEdgeStrategy"
2746shape (Triangle
2747uid 2638,0
2748ro 90
2749va (VaSet
2750vasetType 1
2751fg "0,65535,0"
2752)
2753xt "35250,9625,36000,10375"
2754)
2755tg (CPTG
2756uid 2639,0
2757ps "CptPortTextPlaceStrategy"
2758stg "VerticalLayoutStrategy"
2759f (Text
2760uid 2640,0
2761va (VaSet
2762)
2763xt "37000,9500,38300,10500"
2764st "clk"
2765blo "37000,10300"
2766)
2767)
2768thePort (LogicalPort
2769decl (Decl
2770n "clk"
2771t "std_logic"
2772o 1
2773)
2774)
2775)
2776*82 (CptPort
2777uid 2641,0
2778ps "OnEdgeStrategy"
2779shape (Triangle
2780uid 2642,0
2781ro 90
2782va (VaSet
2783vasetType 1
2784fg "0,65535,0"
2785)
2786xt "44000,9625,44750,10375"
2787)
2788tg (CPTG
2789uid 2643,0
2790ps "CptPortTextPlaceStrategy"
2791stg "RightVerticalLayoutStrategy"
2792f (Text
2793uid 2644,0
2794va (VaSet
2795)
2796xt "41300,9500,43000,10500"
2797st "sclk"
2798ju 2
2799blo "43000,10300"
2800)
2801)
2802thePort (LogicalPort
2803m 1
2804decl (Decl
2805n "sclk"
2806t "std_logic"
2807o 2
2808i "'0'"
2809)
2810)
2811)
2812]
2813shape (Rectangle
2814uid 2646,0
2815va (VaSet
2816vasetType 1
2817fg "0,65535,0"
2818lineColor "0,32896,0"
2819lineWidth 2
2820)
2821xt "36000,9000,44000,12000"
2822)
2823oxt "0,0,8000,10000"
2824ttg (MlTextGroup
2825uid 2647,0
2826ps "CenterOffsetStrategy"
2827stg "VerticalLayoutStrategy"
2828textVec [
2829*83 (Text
2830uid 2648,0
2831va (VaSet
2832font "Arial,8,1"
2833)
2834xt "36900,12000,43100,13000"
2835st "FACT_FAD_lib"
2836blo "36900,12800"
2837tm "BdLibraryNameMgr"
2838)
2839*84 (Text
2840uid 2649,0
2841va (VaSet
2842font "Arial,8,1"
2843)
2844xt "36900,13000,41700,14000"
2845st "clk_divider"
2846blo "36900,13800"
2847tm "CptNameMgr"
2848)
2849*85 (Text
2850uid 2650,0
2851va (VaSet
2852font "Arial,8,1"
2853)
2854xt "36900,14000,37900,15000"
2855st "I1"
2856blo "36900,14800"
2857tm "InstanceNameMgr"
2858)
2859]
2860)
2861ga (GenericAssociation
2862uid 2651,0
2863ps "EdgeToEdgeStrategy"
2864matrix (Matrix
2865uid 2652,0
2866text (MLText
2867uid 2653,0
2868va (VaSet
2869font "Courier New,8,0"
2870)
2871xt "36000,8200,52000,9000"
2872st "DIVIDER = 25 ( integer ) "
2873)
2874header ""
2875)
2876elements [
2877(GiElement
2878name "DIVIDER"
2879type "integer"
2880value "25"
2881)
2882]
2883)
2884viewicon (ZoomableIcon
2885uid 2654,0
2886sl 0
2887va (VaSet
2888vasetType 1
2889fg "49152,49152,49152"
2890)
2891xt "36250,10250,37750,11750"
2892iconName "VhdlFileViewIcon.png"
2893iconMaskName "VhdlFileViewIcon.msk"
2894ftype 10
2895)
2896ordering 1
2897viewiconposition 0
2898portVis (PortSigDisplay
2899)
2900archFileType "UNKNOWN"
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2902*86 (SaComponent
2903uid 2689,0
2904optionalChildren [
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2906uid 2681,0
2907ps "OnEdgeStrategy"
2908shape (Triangle
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2910ro 90
2911va (VaSet
2912vasetType 1
2913fg "0,65535,0"
2914)
2915xt "34250,17625,35000,18375"
2916)
2917tg (CPTG
2918uid 2683,0
2919ps "CptPortTextPlaceStrategy"
2920stg "VerticalLayoutStrategy"
2921f (Text
2922uid 2684,0
2923va (VaSet
2924)
2925xt "36000,17500,37300,18500"
2926st "clk"
2927blo "36000,18300"
2928)
2929)
2930thePort (LogicalPort
2931decl (Decl
2932n "clk"
2933t "std_logic"
2934o 1
2935)
2936)
2937)
2938*88 (CptPort
2939uid 2685,0
2940ps "OnEdgeStrategy"
2941shape (Triangle
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2943ro 90
2944va (VaSet
2945vasetType 1
2946fg "0,65535,0"
2947)
2948xt "43000,17625,43750,18375"
2949)
2950tg (CPTG
2951uid 2687,0
2952ps "CptPortTextPlaceStrategy"
2953stg "RightVerticalLayoutStrategy"
2954f (Text
2955uid 2688,0
2956va (VaSet
2957)
2958xt "40300,17500,42000,18500"
2959st "sclk"
2960ju 2
2961blo "42000,18300"
2962)
2963)
2964thePort (LogicalPort
2965m 1
2966decl (Decl
2967n "sclk"
2968t "std_logic"
2969o 2
2970i "'0'"
2971)
2972)
2973)
2974]
2975shape (Rectangle
2976uid 2690,0
2977va (VaSet
2978vasetType 1
2979fg "0,65535,0"
2980lineColor "0,32896,0"
2981lineWidth 2
2982)
2983xt "35000,17000,43000,20000"
2984)
2985oxt "0,0,8000,10000"
2986ttg (MlTextGroup
2987uid 2691,0
2988ps "CenterOffsetStrategy"
2989stg "VerticalLayoutStrategy"
2990textVec [
2991*89 (Text
2992uid 2692,0
2993va (VaSet
2994font "Arial,8,1"
2995)
2996xt "35900,20000,42100,21000"
2997st "FACT_FAD_lib"
2998blo "35900,20800"
2999tm "BdLibraryNameMgr"
3000)
3001*90 (Text
3002uid 2693,0
3003va (VaSet
3004font "Arial,8,1"
3005)
3006xt "35900,21000,40700,22000"
3007st "clk_divider"
3008blo "35900,21800"
3009tm "CptNameMgr"
3010)
3011*91 (Text
3012uid 2694,0
3013va (VaSet
3014font "Arial,8,1"
3015)
3016xt "35900,22000,47800,23000"
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3018blo "35900,22800"
3019tm "InstanceNameMgr"
3020)
3021]
3022)
3023ga (GenericAssociation
3024uid 2695,0
3025ps "EdgeToEdgeStrategy"
3026matrix (Matrix
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3028text (MLText
3029uid 2697,0
3030va (VaSet
3031font "Courier New,8,0"
3032)
3033xt "35000,16200,51000,17000"
3034st "DIVIDER = 25 ( integer ) "
3035)
3036header ""
3037)
3038elements [
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3040name "DIVIDER"
3041type "integer"
3042value "25"
3043)
3044]
3045)
3046viewicon (ZoomableIcon
3047uid 2698,0
3048sl 0
3049va (VaSet
3050vasetType 1
3051fg "49152,49152,49152"
3052)
3053xt "35250,18250,36750,19750"
3054iconName "VhdlFileViewIcon.png"
3055iconMaskName "VhdlFileViewIcon.msk"
3056ftype 10
3057)
3058ordering 1
3059viewiconposition 0
3060portVis (PortSigDisplay
3061)
3062archFileType "UNKNOWN"
3063)
3064*92 (Net
3065uid 2738,0
3066decl (Decl
3067n "T_sensor_start"
3068t "std_logic"
3069o 6
3070suid 52,0
3071)
3072declText (MLText
3073uid 2739,0
3074va (VaSet
3075font "Courier New,8,0"
3076)
3077xt "-2000,23000,19000,23800"
3078st "SIGNAL T_sensor_start : std_logic
3079"
3080)
3081)
3082*93 (Net
3083uid 2826,0
3084lang 10
3085decl (Decl
3086n "current_dac_array"
3087t "dac_array_type"
3088o 21
3089suid 55,0
3090i "( others => 0)"
3091)
3092declText (MLText
3093uid 2827,0
3094va (VaSet
3095font "Courier New,8,0"
3096)
3097xt "-2000,15600,35000,16400"
3098st "current_dac_array : dac_array_type := ( others => 0)
3099"
3100)
3101)
3102*94 (PortIoOut
3103uid 2834,0
3104shape (CompositeShape
3105uid 2835,0
3106va (VaSet
3107vasetType 1
3108fg "0,0,32768"
3109)
3110optionalChildren [
3111(Pentagon
3112uid 2836,0
3113sl 0
3114ro 90
3115xt "4000,39625,5500,40375"
3116)
3117(Line
3118uid 2837,0
3119sl 0
3120ro 90
3121xt "5500,40000,6000,40000"
3122pts [
3123"6000,40000"
3124"5500,40000"
3125]
3126)
3127]
3128)
3129stc 0
3130sf 1
3131tg (WTG
3132uid 2838,0
3133ps "PortIoTextPlaceStrategy"
3134stg "STSignalDisplayStrategy"
3135f (Text
3136uid 2839,0
3137va (VaSet
3138)
3139xt "-5000,39500,3000,40500"
3140st "current_dac_array"
3141ju 2
3142blo "3000,40300"
3143tm "WireNameMgr"
3144)
3145)
3146)
3147*95 (MWC
3148uid 2965,0
3149optionalChildren [
3150*96 (CptPort
3151uid 2937,0
3152optionalChildren [
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3154uid 2941,0
3155layer 5
3156sl 0
3157va (VaSet
3158vasetType 3
3159)
3160xt "84000,12000,85000,12000"
3161pts [
3162"85000,12000"
3163"84000,12000"
3164]
3165)
3166*98 (Property
3167uid 2942,0
3168pclass "_MW_GEOM_"
3169pname "fixed"
3170ptn "String"
3171)
3172]
3173ps "OnEdgeStrategy"
3174shape (Triangle
3175uid 2938,0
3176ro 90
3177va (VaSet
3178vasetType 1
3179isHidden 1
3180fg "0,65535,65535"
3181)
3182xt "85000,11625,85750,12375"
3183)
3184tg (CPTG
3185uid 2939,0
3186ps "CptPortTextPlaceStrategy"
3187stg "RightVerticalLayoutStrategy"
3188f (Text
3189uid 2940,0
3190sl 0
3191va (VaSet
3192isHidden 1
3193font "arial,8,0"
3194)
3195xt "86419,11342,88219,12342"
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3197ju 2
3198blo "88219,12142"
3199)
3200)
3201thePort (LogicalPort
3202m 1
3203decl (Decl
3204n "dout"
3205t "std_logic"
3206o 6
3207suid 1,0
3208)
3209)
3210)
3211*99 (CptPort
3212uid 2943,0
3213optionalChildren [
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3215uid 2947,0
3216layer 5
3217sl 0
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3219vasetType 3
3220)
3221xt "79000,11000,80000,11000"
3222pts [
3223"79000,11000"
3224"80000,11000"
3225]
3226)
3227]
3228ps "OnEdgeStrategy"
3229shape (Triangle
3230uid 2944,0
3231ro 90
3232va (VaSet
3233vasetType 1
3234isHidden 1
3235fg "0,65535,65535"
3236)
3237xt "78250,10625,79000,11375"
3238)
3239tg (CPTG
3240uid 2945,0
3241ps "CptPortTextPlaceStrategy"
3242stg "VerticalLayoutStrategy"
3243f (Text
3244uid 2946,0
3245sl 0
3246va (VaSet
3247isHidden 1
3248font "arial,8,0"
3249)
3250xt "75885,10294,77685,11294"
3251st "din0"
3252blo "75885,11094"
3253)
3254)
3255thePort (LogicalPort
3256decl (Decl
3257n "din0"
3258t "std_logic"
3259o 21
3260suid 2,0
3261i "'0'"
3262)
3263)
3264)
3265*101 (CptPort
3266uid 2948,0
3267optionalChildren [
3268*102 (Line
3269uid 2952,0
3270layer 5
3271sl 0
3272va (VaSet
3273vasetType 3
3274)
3275xt "79000,13000,80000,13000"
3276pts [
3277"79000,13000"
3278"80000,13000"
3279]
3280)
3281]
3282ps "OnEdgeStrategy"
3283shape (Triangle
3284uid 2949,0
3285ro 90
3286va (VaSet
3287vasetType 1
3288isHidden 1
3289fg "0,65535,65535"
3290)
3291xt "78250,12625,79000,13375"
3292)
3293tg (CPTG
3294uid 2950,0
3295ps "CptPortTextPlaceStrategy"
3296stg "VerticalLayoutStrategy"
3297f (Text
3298uid 2951,0
3299sl 0
3300va (VaSet
3301isHidden 1
3302font "arial,8,0"
3303)
3304xt "76000,12700,77800,13700"
3305st "din1"
3306blo "76000,13500"
3307)
3308)
3309thePort (LogicalPort
3310decl (Decl
3311n "din1"
3312t "std_logic"
3313o 22
3314suid 3,0
3315i "'0'"
3316)
3317)
3318)
3319*103 (CommentGraphic
3320uid 2953,0
3321optionalChildren [
3322*104 (Property
3323uid 2955,0
3324pclass "_MW_GEOM_"
3325pname "expand"
3326ptn "String"
3327)
3328]
3329shape (PolyLine2D
3330pts [
3331"80000,14000"
3332"80000,14000"
3333]
3334uid 2954,0
3335layer 0
3336sl 0
3337va (VaSet
3338vasetType 1
3339transparent 1
3340fg "49152,49152,49152"
3341)
3342xt "80000,14000,80000,14000"
3343)
3344oxt "7000,10000,7000,10000"
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3346*105 (CommentGraphic
3347uid 2956,0
3348optionalChildren [
3349*106 (Property
3350uid 2958,0
3351pclass "_MW_GEOM_"
3352pname "expand"
3353ptn "String"
3354)
3355]
3356shape (PolyLine2D
3357pts [
3358"80000,10000"
3359"80000,10000"
3360]
3361uid 2957,0
3362layer 0
3363sl 0
3364va (VaSet
3365vasetType 1
3366transparent 1
3367fg "49152,49152,49152"
3368)
3369xt "80000,10000,80000,10000"
3370)
3371oxt "7000,6000,7000,6000"
3372)
3373*107 (Grouping
3374uid 2959,0
3375optionalChildren [
3376*108 (CommentGraphic
3377uid 2961,0
3378shape (PolyLine2D
3379pts [
3380"82000,14000"
3381"80000,14000"
3382"80000,10000"
3383"82000,10000"
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3385uid 2962,0
3386layer 0
3387sl 0
3388va (VaSet
3389vasetType 1
3390fg "0,65535,65535"
3391lineColor "26368,26368,26368"
3392)
3393xt "80000,10000,82000,14000"
3394)
3395oxt "7000,6000,9000,10000"
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3398uid 2963,0
3399shape (Arc2D
3400pts [
3401"82000,10000"
3402"84000,12000"
3403"82000,14000"
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3405uid 2964,0
3406layer 0
3407sl 0
3408va (VaSet
3409vasetType 1
3410fg "0,65535,65535"
3411lineColor "26368,26368,26368"
3412)
3413xt "82000,10000,84000,14000"
3414)
3415oxt "9000,6000,11000,10000"
3416)
3417]
3418shape (GroupingShape
3419uid 2960,0
3420sl 0
3421va (VaSet
3422vasetType 1
3423fg "65535,65535,65535"
3424lineStyle 2
3425lineWidth 2
3426)
3427xt "80000,10000,84000,14000"
3428)
3429oxt "7000,6000,11000,10000"
3430)
3431]
3432shape (Rectangle
3433uid 2966,0
3434va (VaSet
3435vasetType 1
3436transparent 1
3437fg "65535,65535,65535"
3438lineWidth -1
3439)
3440xt "79000,10000,85000,14000"
3441fos 1
3442)
3443showPorts 0
3444oxt "6000,6000,12000,10000"
3445ttg (MlTextGroup
3446uid 2967,0
3447ps "CenterOffsetStrategy"
3448stg "VerticalLayoutStrategy"
3449textVec [
3450*110 (Text
3451uid 2968,0
3452va (VaSet
3453isHidden 1
3454font "arial,8,0"
3455)
3456xt "80500,12500,85300,13500"
3457st "moduleware"
3458blo "80500,13300"
3459)
3460*111 (Text
3461uid 2969,0
3462va (VaSet
3463font "arial,8,0"
3464)
3465xt "80500,13500,82100,14500"
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3467blo "80500,14300"
3468)
3469*112 (Text
3470uid 2970,0
3471va (VaSet
3472font "arial,8,0"
3473)
3474xt "80500,14500,81500,15500"
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3476blo "80500,15300"
3477tm "InstanceNameMgr"
3478)
3479]
3480)
3481ga (GenericAssociation
3482uid 2971,0
3483ps "EdgeToEdgeStrategy"
3484matrix (Matrix
3485uid 2972,0
3486text (MLText
3487uid 2973,0
3488va (VaSet
3489font "arial,8,0"
3490)
3491xt "64000,1000,64000,1000"
3492)
3493header ""
3494)
3495elements [
3496]
3497)
3498sed 1
3499awe 1
3500portVis (PortSigDisplay
3501sN 0
3502sTC 0
3503selT 0
3504)
3505prms (Property
3506pclass "params"
3507pname "params"
3508ptn "String"
3509)
3510de 2
3511visOptions (mwParamsVisibilityOptions
3512)
3513)
3514*113 (Net
3515uid 2980,0
3516decl (Decl
3517n "clk_2Mhz"
3518t "std_logic"
3519o 21
3520suid 58,0
3521i "'0'"
3522)
3523declText (MLText
3524uid 2981,0
3525va (VaSet
3526font "Courier New,8,0"
3527)
3528xt "-2000,23800,33000,24600"
3529st "SIGNAL clk_2Mhz : std_logic := '0'
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3531)
3532)
3533*114 (Net
3534uid 2990,0
3535decl (Decl
3536n "sclk_enable_sig"
3537t "std_logic"
3538o 22
3539suid 60,0
3540i "'0'"
3541)
3542declText (MLText
3543uid 2991,0
3544va (VaSet
3545font "Courier New,8,0"
3546)
3547xt "-2000,29400,33000,30200"
3548st "SIGNAL sclk_enable_sig : std_logic := '0'
3549"
3550)
3551)
3552*115 (PortIoIn
3553uid 2998,0
3554shape (CompositeShape
3555uid 2999,0
3556va (VaSet
3557vasetType 1
3558fg "0,0,32768"
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3560optionalChildren [
3561(Pentagon
3562uid 3000,0
3563sl 0
3564ro 270
3565xt "53000,14625,54500,15375"
3566)
3567(Line
3568uid 3001,0
3569sl 0
3570ro 270
3571xt "54500,15000,55000,15000"
3572pts [
3573"54500,15000"
3574"55000,15000"
3575]
3576)
3577]
3578)
3579stc 0
3580sf 1
3581tg (WTG
3582uid 3002,0
3583ps "PortIoTextPlaceStrategy"
3584stg "STSignalDisplayStrategy"
3585f (Text
3586uid 3003,0
3587va (VaSet
3588)
3589xt "46100,14500,52000,15500"
3590st "sclk_enable_i"
3591ju 2
3592blo "52000,15300"
3593tm "WireNameMgr"
3594)
3595)
3596)
3597*116 (Net
3598uid 3010,0
3599decl (Decl
3600n "sclk_enable_i"
3601t "std_logic"
3602o 23
3603suid 61,0
3604)
3605declText (MLText
3606uid 3011,0
3607va (VaSet
3608font "Courier New,8,0"
3609)
3610xt "-2000,14000,15500,14800"
3611st "sclk_enable_i : std_logic
3612"
3613)
3614)
3615*117 (Net
3616uid 3016,0
3617decl (Decl
3618n "sclk_enable_override"
3619t "std_logic"
3620o 24
3621suid 62,0
3622i "'0'"
3623)
3624declText (MLText
3625uid 3017,0
3626va (VaSet
3627font "Courier New,8,0"
3628)
3629xt "-2000,28600,33000,29400"
3630st "SIGNAL sclk_enable_override : std_logic := '0'
3631"
3632)
3633)
3634*118 (MWC
3635uid 3068,0
3636optionalChildren [
3637*119 (CptPort
3638uid 3032,0
3639optionalChildren [
3640*120 (Line
3641uid 3036,0
3642layer 5
3643sl 0
3644va (VaSet
3645vasetType 3
3646)
3647xt "63000,17000,64589,17000"
3648pts [
3649"63000,17000"
3650"64589,17000"
3651]
3652)
3653]
3654ps "OnEdgeStrategy"
3655shape (Triangle
3656uid 3033,0
3657ro 90
3658va (VaSet
3659vasetType 1
3660isHidden 1
3661fg "0,65535,65535"
3662)
3663xt "62250,16625,63000,17375"
3664)
3665tg (CPTG
3666uid 3034,0
3667ps "CptPortTextPlaceStrategy"
3668stg "VerticalLayoutStrategy"
3669f (Text
3670uid 3035,0
3671sl 0
3672va (VaSet
3673isHidden 1
3674font "arial,8,0"
3675)
3676xt "66750,14700,68550,15700"
3677st "din1"
3678blo "66750,15500"
3679)
3680)
3681thePort (LogicalPort
3682decl (Decl
3683n "din1"
3684t "std_logic"
3685o 24
3686suid 1,0
3687i "'0'"
3688)
3689)
3690)
3691*121 (CptPort
3692uid 3037,0
3693optionalChildren [
3694*122 (Property
3695uid 3041,0
3696pclass "_MW_GEOM_"
3697pname "fixed"
3698ptn "String"
3699)
3700*123 (Line
3701uid 3042,0
3702layer 5
3703sl 0
3704va (VaSet
3705vasetType 3
3706)
3707xt "68000,16000,69000,16000"
3708pts [
3709"69000,16000"
3710"68000,16000"
3711]
3712)
3713]
3714ps "OnEdgeStrategy"
3715shape (Triangle
3716uid 3038,0
3717ro 90
3718va (VaSet
3719vasetType 1
3720isHidden 1
3721fg "0,65535,65535"
3722)
3723xt "69000,15625,69750,16375"
3724)
3725tg (CPTG
3726uid 3039,0
3727ps "CptPortTextPlaceStrategy"
3728stg "RightVerticalLayoutStrategy"
3729f (Text
3730uid 3040,0
3731sl 0
3732va (VaSet
3733isHidden 1
3734font "arial,8,0"
3735)
3736xt "63500,15532,65300,16532"
3737st "dout"
3738ju 2
3739blo "65300,16332"
3740)
3741)
3742thePort (LogicalPort
3743m 1
3744decl (Decl
3745n "dout"
3746t "std_logic"
3747o 22
3748suid 2,0
3749i "'0'"
3750)
3751)
3752)
3753*124 (CptPort
3754uid 3043,0
3755optionalChildren [
3756*125 (Line
3757uid 3047,0
3758layer 5
3759sl 0
3760va (VaSet
3761vasetType 3
3762)
3763xt "63000,15000,64589,15000"
3764pts [
3765"63000,15000"
3766"64589,15000"
3767]
3768)
3769]
3770ps "OnEdgeStrategy"
3771shape (Triangle
3772uid 3044,0
3773ro 90
3774va (VaSet
3775vasetType 1
3776isHidden 1
3777fg "0,65535,65535"
3778)
3779xt "62250,14625,63000,15375"
3780)
3781tg (CPTG
3782uid 3045,0
3783ps "CptPortTextPlaceStrategy"
3784stg "VerticalLayoutStrategy"
3785f (Text
3786uid 3046,0
3787sl 0
3788va (VaSet
3789isHidden 1
3790font "arial,8,0"
3791)
3792xt "66635,16294,68435,17294"
3793st "din0"
3794blo "66635,17094"
3795)
3796)
3797thePort (LogicalPort
3798decl (Decl
3799n "din0"
3800t "std_logic"
3801o 23
3802suid 3,0
3803)
3804)
3805)
3806*126 (CommentGraphic
3807uid 3048,0
3808shape (Arc2D
3809pts [
3810"64000,14004"
3811"66263,14521"
3812"68000,16000"
3813]
3814uid 3049,0
3815layer 8
3816sl 0
3817va (VaSet
3818vasetType 1
3819fg "0,65535,65535"
3820bg "0,65535,65535"
3821lineColor "26368,26368,26368"
3822)
3823xt "64000,14003,68000,16000"
3824)
3825oxt "7000,6003,11000,8000"
3826)
3827*127 (CommentGraphic
3828uid 3050,0
3829shape (Arc2D
3830pts [
3831"68000,16005"
3832"66449,17394"
3833"63996,17998"
3834]
3835uid 3051,0
3836layer 0
3837sl 0
3838va (VaSet
3839vasetType 1
3840fg "0,65535,65535"
3841bg "0,65535,65535"
3842lineColor "26368,26368,26368"
3843)
3844xt "63996,16005,68000,18000"
3845)
3846oxt "6996,8005,11000,10000"
3847)
3848*128 (Grouping
3849uid 3052,0
3850optionalChildren [
3851*129 (CommentGraphic
3852uid 3054,0
3853optionalChildren [
3854*130 (Property
3855uid 3056,0
3856pclass "_MW_GEOM_"
3857pname "arc"
3858ptn "String"
3859)
3860]
3861shape (CustomPolygon
3862pts [
3863"64000,17998"
3864"64000,14000"
3865"65183,14211"
3866"66952,15156"
3867"68000,16000"
3868"66048,17132"
3869"64000,17998"
3870]
3871uid 3055,0
3872layer 0
3873sl 0
3874va (VaSet
3875vasetType 1
3876transparent 1
3877fg "0,65535,65535"
3878lineColor "32768,0,32768"
3879fillStyle 1
3880)
3881xt "64000,14000,68000,17998"
3882)
3883oxt "7000,6000,11000,9998"
3884)
3885*131 (CommentGraphic
3886uid 3057,0
3887optionalChildren [
3888*132 (Property
3889uid 3059,0
3890pclass "_MW_GEOM_"
3891pname "arc"
3892ptn "String"
3893)
3894]
3895shape (Arc2D
3896pts [
3897"64000,14000"
3898"64763,16001"
3899"64000,18000"
3900]
3901uid 3058,0
3902layer 0
3903sl 0
3904va (VaSet
3905vasetType 1
3906transparent 1
3907fg "0,65535,65535"
3908bg "0,65535,65535"
3909lineColor "26368,26368,26368"
3910fillStyle 1
3911)
3912xt "64000,14000,64762,18000"
3913)
3914oxt "7000,6000,7762,10000"
3915)
3916]
3917shape (GroupingShape
3918uid 3053,0
3919sl 0
3920va (VaSet
3921vasetType 1
3922fg "65535,65535,65535"
3923lineStyle 2
3924lineWidth 2
3925)
3926xt "64000,14000,68000,18000"
3927)
3928oxt "7000,6000,11000,10000"
3929)
3930*133 (CommentGraphic
3931uid 3060,0
3932shape (PolyLine2D
3933pts [
3934"68000,16000"
3935"68000,16000"
3936]
3937uid 3061,0
3938layer 0
3939sl 0
3940va (VaSet
3941vasetType 1
3942transparent 1
3943fg "49152,49152,49152"
3944)
3945xt "68000,16000,68000,16000"
3946)
3947oxt "11000,8000,11000,8000"
3948)
3949*134 (CommentGraphic
3950uid 3062,0
3951optionalChildren [
3952*135 (Property
3953uid 3064,0
3954pclass "_MW_GEOM_"
3955pname "expand"
3956ptn "String"
3957)
3958]
3959shape (PolyLine2D
3960pts [
3961"64000,14000"
3962"64000,14000"
3963]
3964uid 3063,0
3965layer 0
3966sl 0
3967va (VaSet
3968vasetType 1
3969transparent 1
3970fg "49152,49152,49152"
3971)
3972xt "64000,14000,64000,14000"
3973)
3974oxt "7000,6000,7000,6000"
3975)
3976*136 (CommentGraphic
3977uid 3065,0
3978optionalChildren [
3979*137 (Property
3980uid 3067,0
3981pclass "_MW_GEOM_"
3982pname "expand"
3983ptn "String"
3984)
3985]
3986shape (PolyLine2D
3987pts [
3988"64000,18000"
3989"64000,18000"
3990]
3991uid 3066,0
3992layer 0
3993sl 0
3994va (VaSet
3995vasetType 1
3996transparent 1
3997fg "49152,49152,49152"
3998)
3999xt "64000,18000,64000,18000"
4000)
4001oxt "7000,10000,7000,10000"
4002)
4003]
4004shape (Rectangle
4005uid 3069,0
4006va (VaSet
4007vasetType 1
4008transparent 1
4009fg "65535,65535,65535"
4010lineWidth -1
4011)
4012xt "63000,14000,69000,18000"
4013fos 1
4014)
4015showPorts 0
4016oxt "6000,6000,12000,10000"
4017ttg (MlTextGroup
4018uid 3070,0
4019ps "CenterOffsetStrategy"
4020stg "VerticalLayoutStrategy"
4021textVec [
4022*138 (Text
4023uid 3071,0
4024va (VaSet
4025isHidden 1
4026font "arial,8,0"
4027)
4028xt "64500,16500,69300,17500"
4029st "moduleware"
4030blo "64500,17300"
4031)
4032*139 (Text
4033uid 3072,0
4034va (VaSet
4035font "arial,8,0"
4036)
4037xt "64500,17500,65600,18500"
4038st "or"
4039blo "64500,18300"
4040)
4041*140 (Text
4042uid 3073,0
4043va (VaSet
4044font "arial,8,0"
4045)
4046xt "64500,18500,65500,19500"
4047st "I2"
4048blo "64500,19300"
4049tm "InstanceNameMgr"
4050)
4051]
4052)
4053ga (GenericAssociation
4054uid 3074,0
4055ps "EdgeToEdgeStrategy"
4056matrix (Matrix
4057uid 3075,0
4058text (MLText
4059uid 3076,0
4060va (VaSet
4061font "arial,8,0"
4062)
4063xt "48000,5000,48000,5000"
4064)
4065header ""
4066)
4067elements [
4068]
4069)
4070sed 1
4071awe 1
4072portVis (PortSigDisplay
4073sN 0
4074sTC 0
4075selT 0
4076)
4077prms (Property
4078pclass "params"
4079pname "params"
4080ptn "String"
4081)
4082de 2
4083visOptions (mwParamsVisibilityOptions
4084)
4085)
4086*141 (Net
4087uid 3171,0
4088decl (Decl
4089n "spi_channel_ready"
4090t "std_logic"
4091o 25
4092suid 65,0
4093i "'1'"
4094)
4095declText (MLText
4096uid 3172,0
4097va (VaSet
4098font "Courier New,8,0"
4099)
4100xt "-2000,32600,33000,33400"
4101st "SIGNAL spi_channel_ready : std_logic := '1'
4102"
4103)
4104)
4105*142 (Net
4106uid 3257,0
4107decl (Decl
4108n "measured_temp_data"
4109t "std_logic_vector"
4110b "(15 DOWNTO 0)"
4111o 26
4112suid 66,0
4113i "(others => '0')"
4114)
4115declText (MLText
4116uid 3258,0
4117va (VaSet
4118font "Courier New,8,0"
4119)
4120xt "-2000,27800,39000,28600"
4121st "SIGNAL measured_temp_data : std_logic_vector(15 DOWNTO 0) := (others => '0')
4122"
4123)
4124)
4125*143 (Wire
4126uid 214,0
4127shape (OrthoPolyLine
4128uid 215,0
4129va (VaSet
4130vasetType 3
4131)
4132xt "85000,12000,88000,12000"
4133pts [
4134"85000,12000"
4135"88000,12000"
4136]
4137)
4138start &96
4139end &21
4140sat 32
4141eat 32
4142stc 0
4143st 0
4144sf 1
4145si 0
4146tg (WTG
4147uid 218,0
4148ps "ConnStartEndStrategy"
4149stg "STSignalDisplayStrategy"
4150f (Text
4151uid 219,0
4152va (VaSet
4153)
4154xt "87000,11000,88700,12000"
4155st "sclk"
4156blo "87000,11800"
4157tm "WireNameMgr"
4158)
4159)
4160on &12
4161)
4162*144 (Wire
4163uid 222,0
4164shape (OrthoPolyLine
4165uid 223,0
4166va (VaSet
4167vasetType 3
4168)
4169xt "33000,10000,35250,10000"
4170pts [
4171"35250,10000"
4172"33000,10000"
4173]
4174)
4175start &81
4176end &14
4177sat 32
4178eat 32
4179stc 0
4180st 0
4181sf 1
4182si 0
4183tg (WTG
4184uid 226,0
4185ps "ConnStartEndStrategy"
4186stg "STSignalDisplayStrategy"
4187f (Text
4188uid 227,0
4189va (VaSet
4190isHidden 1
4191)
4192xt "35000,9000,39200,10000"
4193st "clk_50MHz"
4194blo "35000,9800"
4195tm "WireNameMgr"
4196)
4197)
4198on &13
4199)
4200*145 (Wire
4201uid 244,0
4202shape (OrthoPolyLine
4203uid 245,0
4204va (VaSet
4205vasetType 3
4206)
4207xt "55750,31000,57000,31000"
4208pts [
4209"55750,31000"
4210"57000,31000"
4211]
4212)
4213start &71
4214end &17
4215sat 32
4216eat 32
4217stc 0
4218st 0
4219sf 1
4220si 0
4221tg (WTG
4222uid 248,0
4223ps "ConnStartEndStrategy"
4224stg "STSignalDisplayStrategy"
4225f (Text
4226uid 249,0
4227va (VaSet
4228isHidden 1
4229)
4230xt "57000,30000,59000,31000"
4231st "miso"
4232blo "57000,30800"
4233tm "WireNameMgr"
4234)
4235)
4236on &79
4237)
4238*146 (Wire
4239uid 252,0
4240shape (OrthoPolyLine
4241uid 253,0
4242va (VaSet
4243vasetType 3
4244)
4245xt "55750,33000,57000,33000"
4246pts [
4247"55750,33000"
4248"57000,33000"
4249]
4250)
4251start &64
4252end &18
4253sat 32
4254eat 32
4255stc 0
4256st 0
4257sf 1
4258si 0
4259tg (WTG
4260uid 256,0
4261ps "ConnStartEndStrategy"
4262stg "STSignalDisplayStrategy"
4263f (Text
4264uid 257,0
4265va (VaSet
4266isHidden 1
4267)
4268xt "57000,32000,59800,33000"
4269st "dac_cs"
4270blo "57000,32800"
4271tm "WireNameMgr"
4272)
4273)
4274on &15
4275)
4276*147 (Wire
4277uid 260,0
4278shape (OrthoPolyLine
4279uid 261,0
4280va (VaSet
4281vasetType 3
4282lineWidth 2
4283)
4284xt "55750,38000,57000,38000"
4285pts [
4286"55750,38000"
4287"57000,38000"
4288]
4289)
4290start &65
4291end &19
4292sat 32
4293eat 32
4294sty 1
4295stc 0
4296st 0
4297sf 1
4298si 0
4299tg (WTG
4300uid 264,0
4301ps "ConnStartEndStrategy"
4302stg "STSignalDisplayStrategy"
4303f (Text
4304uid 265,0
4305va (VaSet
4306isHidden 1
4307)
4308xt "59000,37000,62900,38000"
4309st "sensor_cs"
4310blo "59000,37800"
4311tm "WireNameMgr"
4312)
4313)
4314on &16
4315)
4316*148 (Wire
4317uid 451,0
4318shape (OrthoPolyLine
4319uid 452,0
4320va (VaSet
4321vasetType 3
4322lineWidth 2
4323)
4324xt "28750,38000,38250,38000"
4325pts [
4326"38250,38000"
4327"28750,38000"
4328]
4329)
4330start &63
4331end &51
4332sat 32
4333eat 32
4334sty 1
4335st 0
4336sf 1
4337si 0
4338tg (WTG
4339uid 455,0
4340ps "ConnStartEndStrategy"
4341stg "STSignalDisplayStrategy"
4342f (Text
4343uid 456,0
4344va (VaSet
4345)
4346xt "31000,37000,35800,38000"
4347st "data : (15:0)"
4348blo "31000,37800"
4349tm "WireNameMgr"
4350)
4351)
4352on &22
4353)
4354*149 (Wire
4355uid 489,0
4356shape (OrthoPolyLine
4357uid 490,0
4358va (VaSet
4359vasetType 3
4360lineWidth 2
4361)
4362xt "6000,36000,10250,36000"
4363pts [
4364"6000,36000"
4365"10250,36000"
4366]
4367)
4368start &23
4369end &43
4370sat 32
4371eat 32
4372sty 1
4373stc 0
4374st 0
4375sf 1
4376si 0
4377tg (WTG
4378uid 493,0
4379ps "ConnStartEndStrategy"
4380stg "STSignalDisplayStrategy"
4381f (Text
4382uid 494,0
4383va (VaSet
4384isHidden 1
4385)
4386xt "13000,38000,16700,39000"
4387st "dac_array"
4388blo "13000,38800"
4389tm "WireNameMgr"
4390)
4391)
4392on &24
4393)
4394*150 (Wire
4395uid 1227,0
4396shape (OrthoPolyLine
4397uid 1228,0
4398va (VaSet
4399vasetType 3
4400)
4401xt "6000,33000,10250,33000"
4402pts [
4403"10250,33000"
4404"6000,33000"
4405]
4406)
4407start &40
4408end &20
4409sat 32
4410eat 32
4411stc 0
4412st 0
4413sf 1
4414si 0
4415tg (WTG
4416uid 1229,0
4417ps "ConnStartEndStrategy"
4418stg "STSignalDisplayStrategy"
4419f (Text
4420uid 1230,0
4421va (VaSet
4422isHidden 1
4423)
4424xt "9250,40000,14050,41000"
4425st "config_start"
4426blo "9250,40800"
4427tm "WireNameMgr"
4428)
4429)
4430on &26
4431)
4432*151 (Wire
4433uid 1233,0
4434shape (OrthoPolyLine
4435uid 1234,0
4436va (VaSet
4437vasetType 3
4438)
4439xt "6000,34000,10250,34000"
4440pts [
4441"10250,34000"
4442"6000,34000"
4443]
4444)
4445start &41
4446end &25
4447sat 32
4448eat 32
4449stc 0
4450st 0
4451sf 1
4452si 0
4453tg (WTG
4454uid 1235,0
4455ps "ConnStartEndStrategy"
4456stg "STSignalDisplayStrategy"
4457f (Text
4458uid 1236,0
4459va (VaSet
4460isHidden 1
4461)
4462xt "12250,45000,17350,46000"
4463st "config_ready"
4464blo "12250,45800"
4465tm "WireNameMgr"
4466)
4467)
4468on &27
4469)
4470*152 (Wire
4471uid 1245,0
4472shape (OrthoPolyLine
4473uid 1246,0
4474va (VaSet
4475vasetType 3
4476)
4477xt "28750,41000,38250,41000"
4478pts [
4479"28750,41000"
4480"38250,41000"
4481]
4482)
4483start &46
4484end &67
4485sat 32
4486eat 32
4487st 0
4488sf 1
4489si 0
4490tg (WTG
4491uid 1247,0
4492ps "ConnStartEndStrategy"
4493stg "STSignalDisplayStrategy"
4494f (Text
4495uid 1248,0
4496va (VaSet
4497)
4498xt "30000,40000,36700,41000"
4499st "dac_config_ready"
4500blo "30000,40800"
4501tm "WireNameMgr"
4502)
4503)
4504on &28
4505)
4506*153 (Wire
4507uid 1251,0
4508shape (OrthoPolyLine
4509uid 1252,0
4510va (VaSet
4511vasetType 3
4512)
4513xt "28750,35000,38250,35000"
4514pts [
4515"28750,35000"
4516"38250,35000"
4517]
4518)
4519start &45
4520end &66
4521sat 32
4522eat 32
4523st 0
4524sf 1
4525si 0
4526tg (WTG
4527uid 1253,0
4528ps "ConnStartEndStrategy"
4529stg "STSignalDisplayStrategy"
4530f (Text
4531uid 1254,0
4532va (VaSet
4533)
4534xt "31000,34000,37400,35000"
4535st "dac_config_start"
4536blo "31000,34800"
4537tm "WireNameMgr"
4538)
4539)
4540on &29
4541)
4542*154 (Wire
4543uid 1328,0
4544shape (OrthoPolyLine
4545uid 1329,0
4546va (VaSet
4547vasetType 3
4548lineWidth 2
4549)
4550xt "28750,32000,38250,32000"
4551pts [
4552"38250,32000"
4553"28750,32000"
4554]
4555)
4556start &61
4557end &49
4558sat 32
4559eat 32
4560sty 1
4561st 0
4562sf 1
4563si 0
4564tg (WTG
4565uid 1332,0
4566ps "ConnStartEndStrategy"
4567stg "STSignalDisplayStrategy"
4568f (Text
4569uid 1333,0
4570va (VaSet
4571)
4572xt "31000,31000,36200,32000"
4573st "dac_id : (2:0)"
4574blo "31000,31800"
4575tm "WireNameMgr"
4576)
4577)
4578on &30
4579)
4580*155 (Wire
4581uid 1336,0
4582shape (OrthoPolyLine
4583uid 1337,0
4584va (VaSet
4585vasetType 3
4586lineWidth 2
4587)
4588xt "28750,33000,38250,33000"
4589pts [
4590"38250,33000"
4591"28750,33000"
4592]
4593)
4594start &62
4595end &50
4596sat 32
4597eat 32
4598sty 1
4599st 0
4600sf 1
4601si 0
4602tg (WTG
4603uid 1340,0
4604ps "ConnStartEndStrategy"
4605stg "STSignalDisplayStrategy"
4606f (Text
4607uid 1341,0
4608va (VaSet
4609)
4610xt "31000,32000,37300,33000"
4611st "sensor_id : (1:0)"
4612blo "31000,32800"
4613tm "WireNameMgr"
4614)
4615)
4616on &31
4617)
4618*156 (Wire
4619uid 1344,0
4620shape (OrthoPolyLine
4621uid 1345,0
4622va (VaSet
4623vasetType 3
4624)
4625xt "28750,36000,38250,36000"
4626pts [
4627"28750,36000"
4628"38250,36000"
4629]
4630)
4631start &47
4632end &68
4633sat 32
4634eat 32
4635st 0
4636sf 1
4637si 0
4638tg (WTG
4639uid 1348,0
4640ps "ConnStartEndStrategy"
4641stg "STSignalDisplayStrategy"
4642f (Text
4643uid 1349,0
4644va (VaSet
4645)
4646xt "31000,35000,36000,36000"
4647st "sensor_start"
4648blo "31000,35800"
4649tm "WireNameMgr"
4650)
4651)
4652on &32
4653)
4654*157 (Wire
4655uid 1352,0
4656shape (OrthoPolyLine
4657uid 1353,0
4658va (VaSet
4659vasetType 3
4660)
4661xt "28750,42000,38250,42000"
4662pts [
4663"38250,42000"
4664"28750,42000"
4665]
4666)
4667start &69
4668end &48
4669sat 32
4670eat 32
4671st 0
4672sf 1
4673si 0
4674tg (WTG
4675uid 1356,0
4676ps "ConnStartEndStrategy"
4677stg "STSignalDisplayStrategy"
4678f (Text
4679uid 1357,0
4680va (VaSet
4681)
4682xt "31000,41000,36000,42000"
4683st "sensor_valid"
4684blo "31000,41800"
4685tm "WireNameMgr"
4686)
4687)
4688on &33
4689)
4690*158 (Wire
4691uid 1598,0
4692shape (OrthoPolyLine
4693uid 1599,0
4694va (VaSet
4695vasetType 3
4696lineWidth 2
4697)
4698xt "6000,38000,10250,38000"
4699pts [
4700"10250,38000"
4701"6000,38000"
4702]
4703)
4704start &44
4705end &34
4706sat 32
4707eat 32
4708sty 1
4709stc 0
4710st 0
4711sf 1
4712si 0
4713tg (WTG
4714uid 1600,0
4715ps "ConnStartEndStrategy"
4716stg "STSignalDisplayStrategy"
4717f (Text
4718uid 1601,0
4719va (VaSet
4720isHidden 1
4721)
4722xt "5250,41000,10450,42000"
4723st "sensor_array"
4724blo "5250,41800"
4725tm "WireNameMgr"
4726)
4727)
4728on &36
4729)
4730*159 (Wire
4731uid 1604,0
4732shape (OrthoPolyLine
4733uid 1605,0
4734va (VaSet
4735vasetType 3
4736)
4737xt "6000,37000,10250,37000"
4738pts [
4739"10250,37000"
4740"6000,37000"
4741]
4742)
4743start &42
4744end &35
4745sat 32
4746eat 32
4747stc 0
4748st 0
4749sf 1
4750si 0
4751tg (WTG
4752uid 1606,0
4753ps "ConnStartEndStrategy"
4754stg "STSignalDisplayStrategy"
4755f (Text
4756uid 1607,0
4757va (VaSet
4758isHidden 1
4759)
4760xt "4250,44000,9550,45000"
4761st "sensor_ready"
4762blo "4250,44800"
4763tm "WireNameMgr"
4764)
4765)
4766on &37
4767)
4768*160 (Wire
4769uid 2002,0
4770shape (OrthoPolyLine
4771uid 2003,0
4772va (VaSet
4773vasetType 3
4774)
4775xt "34000,31000,38250,31000"
4776pts [
4777"34000,31000"
4778"38250,31000"
4779]
4780)
4781end &60
4782sat 16
4783eat 32
4784stc 0
4785st 0
4786sf 1
4787si 0
4788tg (WTG
4789uid 2004,0
4790ps "ConnStartEndStrategy"
4791stg "STSignalDisplayStrategy"
4792f (Text
4793uid 2005,0
4794va (VaSet
4795)
4796xt "35000,30000,36700,31000"
4797st "sclk"
4798blo "35000,30800"
4799tm "WireNameMgr"
4800)
4801)
4802on &12
4803)
4804*161 (Wire
4805uid 2357,0
4806shape (OrthoPolyLine
4807uid 2358,0
4808va (VaSet
4809vasetType 3
4810)
4811xt "55750,32000,57000,32000"
4812pts [
4813"55750,32000"
4814"57000,32000"
4815]
4816)
4817start &70
4818end &78
4819es 0
4820sat 32
4821eat 32
4822stc 0
4823st 0
4824sf 1
4825si 0
4826tg (WTG
4827uid 2361,0
4828ps "ConnStartEndStrategy"
4829stg "STSignalDisplayStrategy"
4830f (Text
4831uid 2362,0
4832va (VaSet
4833isHidden 1
4834)
4835xt "57000,38000,59000,39000"
4836st "mosi"
4837blo "57000,38800"
4838tm "WireNameMgr"
4839)
4840)
4841on &77
4842)
4843*162 (Wire
4844uid 2631,0
4845shape (OrthoPolyLine
4846uid 2632,0
4847va (VaSet
4848vasetType 3
4849)
4850xt "30000,18000,34250,18000"
4851pts [
4852"30000,18000"
4853"34250,18000"
4854]
4855)
4856end &87
4857sat 16
4858eat 32
4859st 0
4860sf 1
4861si 0
4862tg (WTG
4863uid 2635,0
4864ps "ConnStartEndStrategy"
4865stg "STSignalDisplayStrategy"
4866f (Text
4867uid 2636,0
4868va (VaSet
4869)
4870xt "32000,17000,33700,18000"
4871st "sclk"
4872blo "32000,17800"
4873tm "WireNameMgr"
4874)
4875)
4876on &12
4877)
4878*163 (Wire
4879uid 2732,0
4880shape (OrthoPolyLine
4881uid 2733,0
4882va (VaSet
4883vasetType 3
4884)
4885xt "43750,18000,48000,18000"
4886pts [
4887"43750,18000"
4888"48000,18000"
4889]
4890)
4891start &88
4892sat 32
4893eat 16
4894st 0
4895sf 1
4896si 0
4897tg (WTG
4898uid 2736,0
4899ps "ConnStartEndStrategy"
4900stg "STSignalDisplayStrategy"
4901f (Text
4902uid 2737,0
4903va (VaSet
4904)
4905xt "45000,17000,50900,18000"
4906st "T_sensor_start"
4907blo "45000,17800"
4908tm "WireNameMgr"
4909)
4910)
4911on &92
4912)
4913*164 (Wire
4914uid 2828,0
4915shape (OrthoPolyLine
4916uid 2829,0
4917va (VaSet
4918vasetType 3
4919)
4920xt "6000,40000,10250,40000"
4921pts [
4922"10250,40000"
4923"6000,40000"
4924]
4925)
4926start &52
4927end &94
4928sat 32
4929eat 32
4930stc 0
4931st 0
4932sf 1
4933si 0
4934tg (WTG
4935uid 2832,0
4936ps "ConnStartEndStrategy"
4937stg "STSignalDisplayStrategy"
4938f (Text
4939uid 2833,0
4940va (VaSet
4941isHidden 1
4942)
4943xt "7000,39000,13900,40000"
4944st "current_dac_array"
4945blo "7000,39800"
4946tm "WireNameMgr"
4947)
4948)
4949on &93
4950)
4951*165 (Wire
4952uid 2976,0
4953shape (OrthoPolyLine
4954uid 2977,0
4955va (VaSet
4956vasetType 3
4957)
4958xt "44750,10000,79000,11000"
4959pts [
4960"44750,10000"
4961"76000,10000"
4962"76000,11000"
4963"79000,11000"
4964]
4965)
4966start &82
4967end &99
4968sat 32
4969eat 32
4970st 0
4971sf 1
4972si 0
4973tg (WTG
4974uid 2978,0
4975ps "ConnStartEndStrategy"
4976stg "STSignalDisplayStrategy"
4977f (Text
4978uid 2979,0
4979va (VaSet
4980)
4981xt "46750,9000,50350,10000"
4982st "clk_2Mhz"
4983blo "46750,9800"
4984tm "WireNameMgr"
4985)
4986)
4987on &113
4988)
4989*166 (Wire
4990uid 3004,0
4991shape (OrthoPolyLine
4992uid 3005,0
4993va (VaSet
4994vasetType 3
4995)
4996xt "55000,15000,63000,15000"
4997pts [
4998"55000,15000"
4999"63000,15000"
5000]
5001)
5002start &115
5003end &124
5004es 0
5005sat 32
5006eat 32
5007st 0
5008sf 1
5009si 0
5010tg (WTG
5011uid 3008,0
5012ps "ConnStartEndStrategy"
5013stg "STSignalDisplayStrategy"
5014f (Text
5015uid 3009,0
5016va (VaSet
5017isHidden 1
5018)
5019xt "57000,14000,62300,15000"
5020st "sclk_enable_i"
5021blo "57000,14800"
5022tm "WireNameMgr"
5023)
5024)
5025on &116
5026)
5027*167 (Wire
5028uid 3018,0
5029shape (OrthoPolyLine
5030uid 3019,0
5031va (VaSet
5032vasetType 3
5033)
5034xt "28750,46000,32000,50000"
5035pts [
5036"28750,46000"
5037"32000,50000"
5038]
5039)
5040start &53
5041sat 32
5042eat 16
5043st 0
5044sf 1
5045si 0
5046tg (WTG
5047uid 3022,0
5048ps "ConnStartEndStrategy"
5049stg "STSignalDisplayStrategy"
5050f (Text
5051uid 3023,0
5052va (VaSet
5053)
5054xt "32000,49000,40200,50000"
5055st "sclk_enable_override"
5056blo "32000,49800"
5057tm "WireNameMgr"
5058)
5059)
5060on &117
5061)
5062*168 (Wire
5063uid 3024,0
5064shape (OrthoPolyLine
5065uid 3025,0
5066va (VaSet
5067vasetType 3
5068)
5069xt "54000,17000,63000,17000"
5070pts [
5071"63000,17000"
5072"54000,17000"
5073]
5074)
5075start &119
5076sat 32
5077eat 16
5078st 0
5079sf 1
5080si 0
5081tg (WTG
5082uid 3030,0
5083ps "ConnStartEndStrategy"
5084stg "STSignalDisplayStrategy"
5085f (Text
5086uid 3031,0
5087va (VaSet
5088)
5089xt "54000,16000,62200,17000"
5090st "sclk_enable_override"
5091blo "54000,16800"
5092tm "WireNameMgr"
5093)
5094)
5095on &117
5096)
5097*169 (Wire
5098uid 3079,0
5099shape (OrthoPolyLine
5100uid 3080,0
5101va (VaSet
5102vasetType 3
5103)
5104xt "69000,13000,79000,16000"
5105pts [
5106"69000,16000"
5107"72000,16000"
5108"72000,13000"
5109"79000,13000"
5110]
5111)
5112start &121
5113end &101
5114sat 32
5115eat 32
5116stc 0
5117st 0
5118sf 1
5119si 0
5120tg (WTG
5121uid 3083,0
5122ps "ConnStartEndStrategy"
5123stg "STSignalDisplayStrategy"
5124f (Text
5125uid 3084,0
5126va (VaSet
5127)
5128xt "72000,12000,78200,13000"
5129st "sclk_enable_sig"
5130blo "72000,12800"
5131tm "WireNameMgr"
5132)
5133)
5134on &114
5135)
5136*170 (Wire
5137uid 3155,0
5138shape (OrthoPolyLine
5139uid 3156,0
5140va (VaSet
5141vasetType 3
5142)
5143xt "7000,32000,10250,32000"
5144pts [
5145"7000,32000"
5146"10250,32000"
5147]
5148)
5149end &39
5150sat 16
5151eat 32
5152stc 0
5153st 0
5154sf 1
5155si 0
5156tg (WTG
5157uid 3161,0
5158ps "ConnStartEndStrategy"
5159stg "STSignalDisplayStrategy"
5160f (Text
5161uid 3162,0
5162va (VaSet
5163)
5164xt "8000,31000,9900,32000"
5165st "sclk"
5166blo "8000,31800"
5167tm "WireNameMgr"
5168)
5169)
5170on &12
5171)
5172*171 (Wire
5173uid 3173,0
5174shape (OrthoPolyLine
5175uid 3174,0
5176va (VaSet
5177vasetType 3
5178)
5179xt "28750,43000,38250,43000"
5180pts [
5181"38250,43000"
5182"28750,43000"
5183]
5184)
5185start &72
5186end &54
5187sat 32
5188eat 32
5189st 0
5190sf 1
5191si 0
5192tg (WTG
5193uid 3175,0
5194ps "ConnStartEndStrategy"
5195stg "STSignalDisplayStrategy"
5196f (Text
5197uid 3176,0
5198va (VaSet
5199)
5200xt "29250,42000,36950,43000"
5201st "spi_channel_ready"
5202blo "29250,42800"
5203tm "WireNameMgr"
5204)
5205)
5206on &141
5207)
5208*172 (Wire
5209uid 3259,0
5210shape (OrthoPolyLine
5211uid 3260,0
5212va (VaSet
5213vasetType 3
5214)
5215xt "28750,44000,38250,44000"
5216pts [
5217"38250,44000"
5218"28750,44000"
5219]
5220)
5221start &73
5222end &55
5223sat 32
5224eat 32
5225st 0
5226sf 1
5227si 0
5228tg (WTG
5229uid 3261,0
5230ps "ConnStartEndStrategy"
5231stg "STSignalDisplayStrategy"
5232f (Text
5233uid 3262,0
5234va (VaSet
5235)
5236xt "25250,43000,37450,44000"
5237st "measured_temp_data : (15:0)"
5238blo "25250,43800"
5239tm "WireNameMgr"
5240)
5241)
5242on &142
5243)
5244]
5245bg "65535,65535,65535"
5246grid (Grid
5247origin "0,0"
5248isVisible 1
5249isActive 1
5250xSpacing 1000
5251xySpacing 1000
5252xShown 1
5253yShown 1
5254color "26368,26368,26368"
5255)
5256packageList *173 (PackageList
5257uid 41,0
5258stg "VerticalLayoutStrategy"
5259textVec [
5260*174 (Text
5261uid 42,0
5262va (VaSet
5263font "arial,8,1"
5264)
5265xt "-4000,1000,1400,2000"
5266st "Package List"
5267blo "-4000,1800"
5268)
5269*175 (MLText
5270uid 43,0
5271va (VaSet
5272)
5273xt "-4000,2000,12100,9000"
5274st "LIBRARY ieee;
5275USE ieee.std_logic_1164.all;
5276USE ieee.std_logic_arith.all;
5277USE ieee.std_logic_unsigned.all;
5278LIBRARY FACT_FAD_lib;
5279USE FACT_FAD_lib.fad_definitions.all;
5280USE IEEE.NUMERIC_STD.ALL;"
5281tm "PackageList"
5282)
5283]
5284)
5285compDirBlock (MlTextGroup
5286uid 44,0
5287stg "VerticalLayoutStrategy"
5288textVec [
5289*176 (Text
5290uid 45,0
5291va (VaSet
5292isHidden 1
5293font "Arial,8,1"
5294)
5295xt "20000,0,28100,1000"
5296st "Compiler Directives"
5297blo "20000,800"
5298)
5299*177 (Text
5300uid 46,0
5301va (VaSet
5302isHidden 1
5303font "Arial,8,1"
5304)
5305xt "20000,1000,29600,2000"
5306st "Pre-module directives:"
5307blo "20000,1800"
5308)
5309*178 (MLText
5310uid 47,0
5311va (VaSet
5312isHidden 1
5313)
5314xt "20000,2000,28200,4000"
5315st "`resetall
5316`timescale 1ns/10ps"
5317tm "BdCompilerDirectivesTextMgr"
5318)
5319*179 (Text
5320uid 48,0
5321va (VaSet
5322isHidden 1
5323font "Arial,8,1"
5324)
5325xt "20000,4000,30100,5000"
5326st "Post-module directives:"
5327blo "20000,4800"
5328)
5329*180 (MLText
5330uid 49,0
5331va (VaSet
5332isHidden 1
5333)
5334xt "20000,0,20000,0"
5335tm "BdCompilerDirectivesTextMgr"
5336)
5337*181 (Text
5338uid 50,0
5339va (VaSet
5340isHidden 1
5341font "Arial,8,1"
5342)
5343xt "20000,5000,29900,6000"
5344st "End-module directives:"
5345blo "20000,5800"
5346)
5347*182 (MLText
5348uid 51,0
5349va (VaSet
5350isHidden 1
5351)
5352xt "20000,6000,20000,6000"
5353tm "BdCompilerDirectivesTextMgr"
5354)
5355]
5356associable 1
5357)
5358windowSize "0,22,1681,1050"
5359viewArea "500,12900,94068,69604"
5360cachedDiagramExtent "-5000,0,92900,50400"
5361pageSetupInfo (PageSetupInfo
5362ptrCmd "\\\\printer\\hpk_e25,winspool,"
5363fileName "Samba Printer Port"
5364toPrinter 1
5365numCopies 2
5366paperWidth 1077
5367paperHeight 761
5368windowsPaperWidth 1077
5369windowsPaperHeight 761
5370paperType "A4"
5371windowsPaperName "A4"
5372windowsPaperType 9
5373exportedDirectories [
5374"$HDS_PROJECT_DIR/HTMLExport"
5375]
5376exportStdIncludeRefs 1
5377exportStdPackageRefs 1
5378)
5379hasePageBreakOrigin 1
5380pageBreakOrigin "-5000,0"
5381lastUid 3463,0
5382defaultCommentText (CommentText
5383shape (Rectangle
5384layer 0
5385va (VaSet
5386vasetType 1
5387fg "65280,65280,46080"
5388lineColor "0,0,32768"
5389)
5390xt "0,0,15000,5000"
5391)
5392text (MLText
5393va (VaSet
5394fg "0,0,32768"
5395)
5396xt "200,200,2400,1200"
5397st "
5398Text
5399"
5400tm "CommentText"
5401wrapOption 3
5402visibleHeight 4600
5403visibleWidth 14600
5404)
5405)
5406defaultPanel (Panel
5407shape (RectFrame
5408va (VaSet
5409vasetType 1
5410fg "65535,65535,65535"
5411lineColor "32768,0,0"
5412lineWidth 2
5413)
5414xt "0,0,20000,20000"
5415)
5416title (TextAssociate
5417ps "TopLeftStrategy"
5418text (Text
5419va (VaSet
5420font "Arial,8,1"
5421)
5422xt "1000,1000,3800,2000"
5423st "Panel0"
5424blo "1000,1800"
5425tm "PanelText"
5426)
5427)
5428)
5429defaultBlk (Blk
5430shape (Rectangle
5431va (VaSet
5432vasetType 1
5433fg "39936,56832,65280"
5434lineColor "0,0,32768"
5435lineWidth 2
5436)
5437xt "0,0,8000,10000"
5438)
5439ttg (MlTextGroup
5440ps "CenterOffsetStrategy"
5441stg "VerticalLayoutStrategy"
5442textVec [
5443*183 (Text
5444va (VaSet
5445font "Arial,8,1"
5446)
5447xt "2200,3500,5800,4500"
5448st "<library>"
5449blo "2200,4300"
5450tm "BdLibraryNameMgr"
5451)
5452*184 (Text
5453va (VaSet
5454font "Arial,8,1"
5455)
5456xt "2200,4500,5600,5500"
5457st "<block>"
5458blo "2200,5300"
5459tm "BlkNameMgr"
5460)
5461*185 (Text
5462va (VaSet
5463font "Arial,8,1"
5464)
5465xt "2200,5500,3200,6500"
5466st "I0"
5467blo "2200,6300"
5468tm "InstanceNameMgr"
5469)
5470]
5471)
5472ga (GenericAssociation
5473ps "EdgeToEdgeStrategy"
5474matrix (Matrix
5475text (MLText
5476va (VaSet
5477font "Courier New,8,0"
5478)
5479xt "2200,13500,2200,13500"
5480)
5481header ""
5482)
5483elements [
5484]
5485)
5486viewicon (ZoomableIcon
5487sl 0
5488va (VaSet
5489vasetType 1
5490fg "49152,49152,49152"
5491)
5492xt "0,0,1500,1500"
5493iconName "UnknownFile.png"
5494iconMaskName "UnknownFile.msk"
5495)
5496viewiconposition 0
5497)
5498defaultMWComponent (MWC
5499shape (Rectangle
5500va (VaSet
5501vasetType 1
5502fg "0,65535,0"
5503lineColor "0,32896,0"
5504lineWidth 2
5505)
5506xt "0,0,8000,10000"
5507)
5508ttg (MlTextGroup
5509ps "CenterOffsetStrategy"
5510stg "VerticalLayoutStrategy"
5511textVec [
5512*186 (Text
5513va (VaSet
5514font "Arial,8,1"
5515)
5516xt "550,3500,3450,4500"
5517st "Library"
5518blo "550,4300"
5519)
5520*187 (Text
5521va (VaSet
5522font "Arial,8,1"
5523)
5524xt "550,4500,7450,5500"
5525st "MWComponent"
5526blo "550,5300"
5527)
5528*188 (Text
5529va (VaSet
5530font "Arial,8,1"
5531)
5532xt "550,5500,1550,6500"
5533st "I0"
5534blo "550,6300"
5535tm "InstanceNameMgr"
5536)
5537]
5538)
5539ga (GenericAssociation
5540ps "EdgeToEdgeStrategy"
5541matrix (Matrix
5542text (MLText
5543va (VaSet
5544font "Courier New,8,0"
5545)
5546xt "-6450,1500,-6450,1500"
5547)
5548header ""
5549)
5550elements [
5551]
5552)
5553portVis (PortSigDisplay
5554)
5555prms (Property
5556pclass "params"
5557pname "params"
5558ptn "String"
5559)
5560visOptions (mwParamsVisibilityOptions
5561)
5562)
5563defaultSaComponent (SaComponent
5564shape (Rectangle
5565va (VaSet
5566vasetType 1
5567fg "0,65535,0"
5568lineColor "0,32896,0"
5569lineWidth 2
5570)
5571xt "0,0,8000,10000"
5572)
5573ttg (MlTextGroup
5574ps "CenterOffsetStrategy"
5575stg "VerticalLayoutStrategy"
5576textVec [
5577*189 (Text
5578va (VaSet
5579font "Arial,8,1"
5580)
5581xt "900,3500,3800,4500"
5582st "Library"
5583blo "900,4300"
5584tm "BdLibraryNameMgr"
5585)
5586*190 (Text
5587va (VaSet
5588font "Arial,8,1"
5589)
5590xt "900,4500,7100,5500"
5591st "SaComponent"
5592blo "900,5300"
5593tm "CptNameMgr"
5594)
5595*191 (Text
5596va (VaSet
5597font "Arial,8,1"
5598)
5599xt "900,5500,1900,6500"
5600st "I0"
5601blo "900,6300"
5602tm "InstanceNameMgr"
5603)
5604]
5605)
5606ga (GenericAssociation
5607ps "EdgeToEdgeStrategy"
5608matrix (Matrix
5609text (MLText
5610va (VaSet
5611font "Courier New,8,0"
5612)
5613xt "-6100,1500,-6100,1500"
5614)
5615header ""
5616)
5617elements [
5618]
5619)
5620viewicon (ZoomableIcon
5621sl 0
5622va (VaSet
5623vasetType 1
5624fg "49152,49152,49152"
5625)
5626xt "0,0,1500,1500"
5627iconName "UnknownFile.png"
5628iconMaskName "UnknownFile.msk"
5629)
5630viewiconposition 0
5631portVis (PortSigDisplay
5632)
5633archFileType "UNKNOWN"
5634)
5635defaultVhdlComponent (VhdlComponent
5636shape (Rectangle
5637va (VaSet
5638vasetType 1
5639fg "0,65535,0"
5640lineColor "0,32896,0"
5641lineWidth 2
5642)
5643xt "0,0,8000,10000"
5644)
5645ttg (MlTextGroup
5646ps "CenterOffsetStrategy"
5647stg "VerticalLayoutStrategy"
5648textVec [
5649*192 (Text
5650va (VaSet
5651font "Arial,8,1"
5652)
5653xt "500,3500,3400,4500"
5654st "Library"
5655blo "500,4300"
5656)
5657*193 (Text
5658va (VaSet
5659font "Arial,8,1"
5660)
5661xt "500,4500,7500,5500"
5662st "VhdlComponent"
5663blo "500,5300"
5664)
5665*194 (Text
5666va (VaSet
5667font "Arial,8,1"
5668)
5669xt "500,5500,1500,6500"
5670st "I0"
5671blo "500,6300"
5672tm "InstanceNameMgr"
5673)
5674]
5675)
5676ga (GenericAssociation
5677ps "EdgeToEdgeStrategy"
5678matrix (Matrix
5679text (MLText
5680va (VaSet
5681font "Courier New,8,0"
5682)
5683xt "-6500,1500,-6500,1500"
5684)
5685header ""
5686)
5687elements [
5688]
5689)
5690portVis (PortSigDisplay
5691)
5692entityPath ""
5693archName ""
5694archPath ""
5695)
5696defaultVerilogComponent (VerilogComponent
5697shape (Rectangle
5698va (VaSet
5699vasetType 1
5700fg "0,65535,0"
5701lineColor "0,32896,0"
5702lineWidth 2
5703)
5704xt "-450,0,8450,10000"
5705)
5706ttg (MlTextGroup
5707ps "CenterOffsetStrategy"
5708stg "VerticalLayoutStrategy"
5709textVec [
5710*195 (Text
5711va (VaSet
5712font "Arial,8,1"
5713)
5714xt "50,3500,2950,4500"
5715st "Library"
5716blo "50,4300"
5717)
5718*196 (Text
5719va (VaSet
5720font "Arial,8,1"
5721)
5722xt "50,4500,7950,5500"
5723st "VerilogComponent"
5724blo "50,5300"
5725)
5726*197 (Text
5727va (VaSet
5728font "Arial,8,1"
5729)
5730xt "50,5500,1050,6500"
5731st "I0"
5732blo "50,6300"
5733tm "InstanceNameMgr"
5734)
5735]
5736)
5737ga (GenericAssociation
5738ps "EdgeToEdgeStrategy"
5739matrix (Matrix
5740text (MLText
5741va (VaSet
5742font "Courier New,8,0"
5743)
5744xt "-6950,1500,-6950,1500"
5745)
5746header ""
5747)
5748elements [
5749]
5750)
5751entityPath ""
5752)
5753defaultHdlText (HdlText
5754shape (Rectangle
5755va (VaSet
5756vasetType 1
5757fg "65535,65535,37120"
5758lineColor "0,0,32768"
5759lineWidth 2
5760)
5761xt "0,0,8000,10000"
5762)
5763ttg (MlTextGroup
5764ps "CenterOffsetStrategy"
5765stg "VerticalLayoutStrategy"
5766textVec [
5767*198 (Text
5768va (VaSet
5769font "Arial,8,1"
5770)
5771xt "3150,4000,4850,5000"
5772st "eb1"
5773blo "3150,4800"
5774tm "HdlTextNameMgr"
5775)
5776*199 (Text
5777va (VaSet
5778font "Arial,8,1"
5779)
5780xt "3150,5000,3950,6000"
5781st "1"
5782blo "3150,5800"
5783tm "HdlTextNumberMgr"
5784)
5785]
5786)
5787viewicon (ZoomableIcon
5788sl 0
5789va (VaSet
5790vasetType 1
5791fg "49152,49152,49152"
5792)
5793xt "0,0,1500,1500"
5794iconName "UnknownFile.png"
5795iconMaskName "UnknownFile.msk"
5796)
5797viewiconposition 0
5798)
5799defaultEmbeddedText (EmbeddedText
5800commentText (CommentText
5801ps "CenterOffsetStrategy"
5802shape (Rectangle
5803va (VaSet
5804vasetType 1
5805fg "65535,65535,65535"
5806lineColor "0,0,32768"
5807lineWidth 2
5808)
5809xt "0,0,18000,5000"
5810)
5811text (MLText
5812va (VaSet
5813)
5814xt "200,200,2400,1200"
5815st "
5816Text
5817"
5818tm "HdlTextMgr"
5819wrapOption 3
5820visibleHeight 4600
5821visibleWidth 17600
5822)
5823)
5824)
5825defaultGlobalConnector (GlobalConnector
5826shape (Circle
5827va (VaSet
5828vasetType 1
5829fg "65535,65535,0"
5830)
5831xt "-1000,-1000,1000,1000"
5832radius 1000
5833)
5834name (Text
5835va (VaSet
5836font "Arial,8,1"
5837)
5838xt "-500,-500,500,500"
5839st "G"
5840blo "-500,300"
5841)
5842)
5843defaultRipper (Ripper
5844ps "OnConnectorStrategy"
5845shape (Line2D
5846pts [
5847"0,0"
5848"1000,1000"
5849]
5850va (VaSet
5851vasetType 1
5852)
5853xt "0,0,1000,1000"
5854)
5855)
5856defaultBdJunction (BdJunction
5857ps "OnConnectorStrategy"
5858shape (Circle
5859va (VaSet
5860vasetType 1
5861)
5862xt "-400,-400,400,400"
5863radius 400
5864)
5865)
5866defaultPortIoIn (PortIoIn
5867shape (CompositeShape
5868va (VaSet
5869vasetType 1
5870fg "0,0,32768"
5871)
5872optionalChildren [
5873(Pentagon
5874sl 0
5875ro 270
5876xt "-2000,-375,-500,375"
5877)
5878(Line
5879sl 0
5880ro 270
5881xt "-500,0,0,0"
5882pts [
5883"-500,0"
5884"0,0"
5885]
5886)
5887]
5888)
5889stc 0
5890sf 1
5891tg (WTG
5892ps "PortIoTextPlaceStrategy"
5893stg "STSignalDisplayStrategy"
5894f (Text
5895va (VaSet
5896)
5897xt "-1375,-1000,-1375,-1000"
5898ju 2
5899blo "-1375,-1000"
5900tm "WireNameMgr"
5901)
5902)
5903)
5904defaultPortIoOut (PortIoOut
5905shape (CompositeShape
5906va (VaSet
5907vasetType 1
5908fg "0,0,32768"
5909)
5910optionalChildren [
5911(Pentagon
5912sl 0
5913ro 270
5914xt "500,-375,2000,375"
5915)
5916(Line
5917sl 0
5918ro 270
5919xt "0,0,500,0"
5920pts [
5921"0,0"
5922"500,0"
5923]
5924)
5925]
5926)
5927stc 0
5928sf 1
5929tg (WTG
5930ps "PortIoTextPlaceStrategy"
5931stg "STSignalDisplayStrategy"
5932f (Text
5933va (VaSet
5934)
5935xt "625,-1000,625,-1000"
5936blo "625,-1000"
5937tm "WireNameMgr"
5938)
5939)
5940)
5941defaultPortIoInOut (PortIoInOut
5942shape (CompositeShape
5943va (VaSet
5944vasetType 1
5945fg "0,0,32768"
5946)
5947optionalChildren [
5948(Hexagon
5949sl 0
5950xt "500,-375,2000,375"
5951)
5952(Line
5953sl 0
5954xt "0,0,500,0"
5955pts [
5956"0,0"
5957"500,0"
5958]
5959)
5960]
5961)
5962stc 0
5963sf 1
5964tg (WTG
5965ps "PortIoTextPlaceStrategy"
5966stg "STSignalDisplayStrategy"
5967f (Text
5968va (VaSet
5969)
5970xt "0,-375,0,-375"
5971blo "0,-375"
5972tm "WireNameMgr"
5973)
5974)
5975)
5976defaultPortIoBuffer (PortIoBuffer
5977shape (CompositeShape
5978va (VaSet
5979vasetType 1
5980fg "65535,65535,65535"
5981lineColor "0,0,32768"
5982)
5983optionalChildren [
5984(Hexagon
5985sl 0
5986xt "500,-375,2000,375"
5987)
5988(Line
5989sl 0
5990xt "0,0,500,0"
5991pts [
5992"0,0"
5993"500,0"
5994]
5995)
5996]
5997)
5998stc 0
5999sf 1
6000tg (WTG
6001ps "PortIoTextPlaceStrategy"
6002stg "STSignalDisplayStrategy"
6003f (Text
6004va (VaSet
6005)
6006xt "0,-375,0,-375"
6007blo "0,-375"
6008tm "WireNameMgr"
6009)
6010)
6011)
6012defaultSignal (Wire
6013shape (OrthoPolyLine
6014va (VaSet
6015vasetType 3
6016)
6017pts [
6018"0,0"
6019"0,0"
6020]
6021)
6022ss 0
6023es 0
6024sat 32
6025eat 32
6026st 0
6027sf 1
6028si 0
6029tg (WTG
6030ps "ConnStartEndStrategy"
6031stg "STSignalDisplayStrategy"
6032f (Text
6033va (VaSet
6034)
6035xt "0,0,1900,1000"
6036st "sig0"
6037blo "0,800"
6038tm "WireNameMgr"
6039)
6040)
6041)
6042defaultBus (Wire
6043shape (OrthoPolyLine
6044va (VaSet
6045vasetType 3
6046lineWidth 2
6047)
6048pts [
6049"0,0"
6050"0,0"
6051]
6052)
6053ss 0
6054es 0
6055sat 32
6056eat 32
6057sty 1
6058st 0
6059sf 1
6060si 0
6061tg (WTG
6062ps "ConnStartEndStrategy"
6063stg "STSignalDisplayStrategy"
6064f (Text
6065va (VaSet
6066)
6067xt "0,0,2400,1000"
6068st "dbus0"
6069blo "0,800"
6070tm "WireNameMgr"
6071)
6072)
6073)
6074defaultBundle (Bundle
6075shape (OrthoPolyLine
6076va (VaSet
6077vasetType 3
6078lineColor "32768,0,0"
6079lineWidth 2
6080)
6081pts [
6082"0,0"
6083"0,0"
6084]
6085)
6086ss 0
6087es 0
6088sat 32
6089eat 32
6090textGroup (BiTextGroup
6091ps "ConnStartEndStrategy"
6092stg "VerticalLayoutStrategy"
6093first (Text
6094va (VaSet
6095)
6096xt "0,0,3000,1000"
6097st "bundle0"
6098blo "0,800"
6099tm "BundleNameMgr"
6100)
6101second (MLText
6102va (VaSet
6103)
6104xt "0,1000,1000,2000"
6105st "()"
6106tm "BundleContentsMgr"
6107)
6108)
6109bundleNet &0
6110)
6111defaultPortMapFrame (PortMapFrame
6112ps "PortMapFrameStrategy"
6113shape (RectFrame
6114va (VaSet
6115vasetType 1
6116fg "65535,65535,65535"
6117lineColor "0,0,32768"
6118lineWidth 2
6119)
6120xt "0,0,10000,12000"
6121)
6122portMapText (BiTextGroup
6123ps "BottomRightOffsetStrategy"
6124stg "VerticalLayoutStrategy"
6125first (MLText
6126va (VaSet
6127)
6128)
6129second (MLText
6130va (VaSet
6131)
6132tm "PortMapTextMgr"
6133)
6134)
6135)
6136defaultGenFrame (Frame
6137shape (RectFrame
6138va (VaSet
6139vasetType 1
6140fg "65535,65535,65535"
6141lineColor "26368,26368,26368"
6142lineStyle 2
6143lineWidth 2
6144)
6145xt "0,0,20000,20000"
6146)
6147title (TextAssociate
6148ps "TopLeftStrategy"
6149text (MLText
6150va (VaSet
6151)
6152xt "0,-1100,12900,-100"
6153st "g0: FOR i IN 0 TO n GENERATE"
6154tm "FrameTitleTextMgr"
6155)
6156)
6157seqNum (FrameSequenceNumber
6158ps "TopLeftStrategy"
6159shape (Rectangle
6160va (VaSet
6161vasetType 1
6162fg "65535,65535,65535"
6163)
6164xt "50,50,1250,1450"
6165)
6166num (Text
6167va (VaSet
6168)
6169xt "250,250,1050,1250"
6170st "1"
6171blo "250,1050"
6172tm "FrameSeqNumMgr"
6173)
6174)
6175decls (MlTextGroup
6176ps "BottomRightOffsetStrategy"
6177stg "VerticalLayoutStrategy"
6178textVec [
6179*200 (Text
6180va (VaSet
6181font "Arial,8,1"
6182)
6183xt "14100,20000,22000,21000"
6184st "Frame Declarations"
6185blo "14100,20800"
6186)
6187*201 (MLText
6188va (VaSet
6189)
6190xt "14100,21000,14100,21000"
6191tm "BdFrameDeclTextMgr"
6192)
6193]
6194)
6195)
6196defaultBlockFrame (Frame
6197shape (RectFrame
6198va (VaSet
6199vasetType 1
6200fg "65535,65535,65535"
6201lineColor "26368,26368,26368"
6202lineStyle 1
6203lineWidth 2
6204)
6205xt "0,0,20000,20000"
6206)
6207title (TextAssociate
6208ps "TopLeftStrategy"
6209text (MLText
6210va (VaSet
6211)
6212xt "0,-1100,7700,-100"
6213st "b0: BLOCK (guard)"
6214tm "FrameTitleTextMgr"
6215)
6216)
6217seqNum (FrameSequenceNumber
6218ps "TopLeftStrategy"
6219shape (Rectangle
6220va (VaSet
6221vasetType 1
6222fg "65535,65535,65535"
6223)
6224xt "50,50,1250,1450"
6225)
6226num (Text
6227va (VaSet
6228)
6229xt "250,250,1050,1250"
6230st "1"
6231blo "250,1050"
6232tm "FrameSeqNumMgr"
6233)
6234)
6235decls (MlTextGroup
6236ps "BottomRightOffsetStrategy"
6237stg "VerticalLayoutStrategy"
6238textVec [
6239*202 (Text
6240va (VaSet
6241font "Arial,8,1"
6242)
6243xt "14100,20000,22000,21000"
6244st "Frame Declarations"
6245blo "14100,20800"
6246)
6247*203 (MLText
6248va (VaSet
6249)
6250xt "14100,21000,14100,21000"
6251tm "BdFrameDeclTextMgr"
6252)
6253]
6254)
6255style 3
6256)
6257defaultSaCptPort (CptPort
6258ps "OnEdgeStrategy"
6259shape (Triangle
6260ro 90
6261va (VaSet
6262vasetType 1
6263fg "0,65535,0"
6264)
6265xt "0,0,750,750"
6266)
6267tg (CPTG
6268ps "CptPortTextPlaceStrategy"
6269stg "VerticalLayoutStrategy"
6270f (Text
6271va (VaSet
6272)
6273xt "0,750,1800,1750"
6274st "Port"
6275blo "0,1550"
6276)
6277)
6278thePort (LogicalPort
6279decl (Decl
6280n "Port"
6281t ""
6282o 0
6283)
6284)
6285)
6286defaultSaCptPortBuffer (CptPort
6287ps "OnEdgeStrategy"
6288shape (Diamond
6289va (VaSet
6290vasetType 1
6291fg "65535,65535,65535"
6292)
6293xt "0,0,750,750"
6294)
6295tg (CPTG
6296ps "CptPortTextPlaceStrategy"
6297stg "VerticalLayoutStrategy"
6298f (Text
6299va (VaSet
6300)
6301xt "0,750,1800,1750"
6302st "Port"
6303blo "0,1550"
6304)
6305)
6306thePort (LogicalPort
6307m 3
6308decl (Decl
6309n "Port"
6310t ""
6311o 0
6312)
6313)
6314)
6315defaultDeclText (MLText
6316va (VaSet
6317font "Courier New,8,0"
6318)
6319)
6320archDeclarativeBlock (BdArchDeclBlock
6321uid 1,0
6322stg "BdArchDeclBlockLS"
6323declLabel (Text
6324uid 2,0
6325va (VaSet
6326font "Arial,8,1"
6327)
6328xt "-4000,9600,1400,10600"
6329st "Declarations"
6330blo "-4000,10400"
6331)
6332portLabel (Text
6333uid 3,0
6334va (VaSet
6335font "Arial,8,1"
6336)
6337xt "-4000,10600,-1300,11600"
6338st "Ports:"
6339blo "-4000,11400"
6340)
6341preUserLabel (Text
6342uid 4,0
6343va (VaSet
6344isHidden 1
6345font "Arial,8,1"
6346)
6347xt "-4000,9600,-200,10600"
6348st "Pre User:"
6349blo "-4000,10400"
6350)
6351preUserText (MLText
6352uid 5,0
6353va (VaSet
6354isHidden 1
6355font "Courier New,8,0"
6356)
6357xt "-4000,9600,-4000,9600"
6358tm "BdDeclarativeTextMgr"
6359)
6360diagSignalLabel (Text
6361uid 6,0
6362va (VaSet
6363font "Arial,8,1"
6364)
6365xt "-4000,22000,3100,23000"
6366st "Diagram Signals:"
6367blo "-4000,22800"
6368)
6369postUserLabel (Text
6370uid 7,0
6371va (VaSet
6372isHidden 1
6373font "Arial,8,1"
6374)
6375xt "-4000,9600,700,10600"
6376st "Post User:"
6377blo "-4000,10400"
6378)
6379postUserText (MLText
6380uid 8,0
6381va (VaSet
6382isHidden 1
6383font "Courier New,8,0"
6384)
6385xt "-4000,9600,-4000,9600"
6386tm "BdDeclarativeTextMgr"
6387)
6388showAttributes 1
6389)
6390commonDM (CommonDM
6391ldm (LogicalDM
6392suid 68,0
6393usingSuid 1
6394emptyRow *204 (LEmptyRow
6395)
6396uid 54,0
6397optionalChildren [
6398*205 (RefLabelRowHdr
6399)
6400*206 (TitleRowHdr
6401)
6402*207 (FilterRowHdr
6403)
6404*208 (RefLabelColHdr
6405tm "RefLabelColHdrMgr"
6406)
6407*209 (RowExpandColHdr
6408tm "RowExpandColHdrMgr"
6409)
6410*210 (GroupColHdr
6411tm "GroupColHdrMgr"
6412)
6413*211 (NameColHdr
6414tm "BlockDiagramNameColHdrMgr"
6415)
6416*212 (ModeColHdr
6417tm "BlockDiagramModeColHdrMgr"
6418)
6419*213 (TypeColHdr
6420tm "BlockDiagramTypeColHdrMgr"
6421)
6422*214 (BoundsColHdr
6423tm "BlockDiagramBoundsColHdrMgr"
6424)
6425*215 (InitColHdr
6426tm "BlockDiagramInitColHdrMgr"
6427)
6428*216 (EolColHdr
6429tm "BlockDiagramEolColHdrMgr"
6430)
6431*217 (LeafLogPort
6432port (LogicalPort
6433m 1
6434decl (Decl
6435n "sclk"
6436t "std_logic"
6437o 6
6438suid 1,0
6439)
6440)
6441uid 390,0
6442)
6443*218 (LeafLogPort
6444port (LogicalPort
6445decl (Decl
6446n "clk_50MHz"
6447t "std_logic"
6448preAdd 0
6449posAdd 0
6450o 1
6451suid 2,0
6452)
6453)
6454uid 392,0
6455)
6456*219 (LeafLogPort
6457port (LogicalPort
6458m 1
6459decl (Decl
6460n "dac_cs"
6461t "std_logic"
6462o 5
6463suid 5,0
6464)
6465)
6466uid 398,0
6467)
6468*220 (LeafLogPort
6469port (LogicalPort
6470m 1
6471decl (Decl
6472n "sensor_cs"
6473t "std_logic_vector"
6474b "(3 DOWNTO 0)"
6475o 8
6476suid 6,0
6477)
6478)
6479uid 400,0
6480)
6481*221 (LeafLogPort
6482port (LogicalPort
6483m 4
6484decl (Decl
6485n "data"
6486t "std_logic_vector"
6487b "(15 downto 0)"
6488o 14
6489suid 14,0
6490)
6491)
6492uid 497,0
6493)
6494*222 (LeafLogPort
6495port (LogicalPort
6496decl (Decl
6497n "dac_array"
6498t "dac_array_type"
6499o 3
6500suid 17,0
6501)
6502)
6503uid 499,0
6504)
6505*223 (LeafLogPort
6506port (LogicalPort
6507decl (Decl
6508n "config_start"
6509t "std_logic"
6510o 2
6511suid 27,0
6512)
6513)
6514uid 1255,0
6515)
6516*224 (LeafLogPort
6517port (LogicalPort
6518m 1
6519decl (Decl
6520n "config_ready"
6521t "std_logic"
6522o 4
6523suid 28,0
6524)
6525)
6526uid 1257,0
6527)
6528*225 (LeafLogPort
6529port (LogicalPort
6530m 4
6531decl (Decl
6532n "dac_config_ready"
6533t "std_logic"
6534o 11
6535suid 30,0
6536)
6537)
6538uid 1259,0
6539)
6540*226 (LeafLogPort
6541port (LogicalPort
6542m 4
6543decl (Decl
6544n "dac_config_start"
6545t "std_logic"
6546o 12
6547suid 31,0
6548)
6549)
6550uid 1261,0
6551)
6552*227 (LeafLogPort
6553port (LogicalPort
6554m 4
6555decl (Decl
6556n "dac_id"
6557t "std_logic_vector"
6558b "(2 DOWNTO 0)"
6559o 13
6560suid 32,0
6561)
6562)
6563uid 1358,0
6564)
6565*228 (LeafLogPort
6566port (LogicalPort
6567m 4
6568decl (Decl
6569n "sensor_id"
6570t "std_logic_vector"
6571b "(1 DOWNTO 0)"
6572o 15
6573suid 33,0
6574)
6575)
6576uid 1360,0
6577)
6578*229 (LeafLogPort
6579port (LogicalPort
6580m 4
6581decl (Decl
6582n "sensor_start"
6583t "std_logic"
6584o 16
6585suid 34,0
6586)
6587)
6588uid 1362,0
6589)
6590*230 (LeafLogPort
6591port (LogicalPort
6592m 4
6593decl (Decl
6594n "sensor_valid"
6595t "std_logic"
6596o 17
6597suid 35,0
6598)
6599)
6600uid 1364,0
6601)
6602*231 (LeafLogPort
6603port (LogicalPort
6604m 1
6605decl (Decl
6606n "sensor_array"
6607t "sensor_array_type"
6608o 7
6609suid 37,0
6610)
6611)
6612uid 1608,0
6613)
6614*232 (LeafLogPort
6615port (LogicalPort
6616m 1
6617decl (Decl
6618n "sensor_ready"
6619t "std_logic"
6620o 9
6621suid 38,0
6622)
6623)
6624uid 1610,0
6625)
6626*233 (LeafLogPort
6627port (LogicalPort
6628m 1
6629decl (Decl
6630n "mosi"
6631t "std_logic"
6632o 19
6633suid 46,0
6634i "'0'"
6635)
6636)
6637uid 2369,0
6638)
6639*234 (LeafLogPort
6640port (LogicalPort
6641m 2
6642decl (Decl
6643n "miso"
6644t "std_logic"
6645preAdd 0
6646posAdd 0
6647o 10
6648suid 47,0
6649)
6650)
6651uid 2404,0
6652)
6653*235 (LeafLogPort
6654port (LogicalPort
6655m 4
6656decl (Decl
6657n "T_sensor_start"
6658t "std_logic"
6659o 6
6660suid 52,0
6661)
6662)
6663uid 2748,0
6664)
6665*236 (LeafLogPort
6666port (LogicalPort
6667lang 10
6668m 1
6669decl (Decl
6670n "current_dac_array"
6671t "dac_array_type"
6672o 21
6673suid 55,0
6674i "( others => 0)"
6675)
6676)
6677uid 2840,0
6678)
6679*237 (LeafLogPort
6680port (LogicalPort
6681m 4
6682decl (Decl
6683n "clk_2Mhz"
6684t "std_logic"
6685o 21
6686suid 58,0
6687i "'0'"
6688)
6689)
6690uid 2992,0
6691)
6692*238 (LeafLogPort
6693port (LogicalPort
6694m 4
6695decl (Decl
6696n "sclk_enable_sig"
6697t "std_logic"
6698o 22
6699suid 60,0
6700i "'0'"
6701)
6702)
6703uid 2994,0
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6709t "std_logic"
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6711suid 61,0
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6713)
6714uid 2996,0
6715scheme 0
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6717*240 (LeafLogPort
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6720decl (Decl
6721n "sclk_enable_override"
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6723o 24
6724suid 62,0
6725i "'0'"
6726)
6727)
6728uid 3085,0
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6730*241 (LeafLogPort
6731port (LogicalPort
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6735t "std_logic"
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6738i "'1'"
6739)
6740)
6741uid 3177,0
6742)
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6745m 4
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6747n "measured_temp_data"
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6750o 26
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6812)
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6847uid 1256,0
6848)
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6854)
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6858dimension 20
6859uid 1260,0
6860)
6861*257 (MRCItem
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6864dimension 20
6865uid 1262,0
6866)
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6870dimension 20
6871uid 1359,0
6872)
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6876dimension 20
6877uid 1361,0
6878)
6879*260 (MRCItem
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6881pos 14
6882dimension 20
6883uid 1363,0
6884)
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6887pos 15
6888dimension 20
6889uid 1365,0
6890)
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6894dimension 20
6895uid 1609,0
6896)
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6901uid 1611,0
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6905pos 16
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6908)
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6911pos 17
6912dimension 20
6913uid 2405,0
6914)
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6917pos 18
6918dimension 20
6919uid 2749,0
6920)
6921*267 (MRCItem
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6923pos 19
6924dimension 20
6925uid 2841,0
6926)
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6929pos 20
6930dimension 20
6931uid 2993,0
6932)
6933*269 (MRCItem
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6935pos 21
6936dimension 20
6937uid 2995,0
6938)
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6942dimension 20
6943uid 2997,0
6944)
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6947pos 23
6948dimension 20
6949uid 3086,0
6950)
6951*272 (MRCItem
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6953pos 24
6954dimension 20
6955uid 3178,0
6956)
6957*273 (MRCItem
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6959pos 25
6960dimension 20
6961uid 3264,0
6962)
6963]
6964)
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6967cellColor "0,49152,49152"
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6972uid 73,0
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6982pos 1
6983dimension 50
6984uid 75,0
6985)
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6990uid 76,0
6991)
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6996uid 77,0
6997)
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7003)
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7008uid 79,0
7009)
7010*280 (MRCItem
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7012pos 6
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7014uid 80,0
7015)
7016*281 (MRCItem
7017litem &216
7018pos 7
7019dimension 80
7020uid 81,0
7021)
7022]
7023)
7024fixedCol 4
7025fixedRow 2
7026name "Ports"
7027uid 68,0
7028vaOverrides [
7029]
7030)
7031]
7032)
7033uid 53,0
7034)
7035genericsCommonDM (CommonDM
7036ldm (LogicalDM
7037emptyRow *282 (LEmptyRow
7038)
7039uid 83,0
7040optionalChildren [
7041*283 (RefLabelRowHdr
7042)
7043*284 (TitleRowHdr
7044)
7045*285 (FilterRowHdr
7046)
7047*286 (RefLabelColHdr
7048tm "RefLabelColHdrMgr"
7049)
7050*287 (RowExpandColHdr
7051tm "RowExpandColHdrMgr"
7052)
7053*288 (GroupColHdr
7054tm "GroupColHdrMgr"
7055)
7056*289 (NameColHdr
7057tm "GenericNameColHdrMgr"
7058)
7059*290 (TypeColHdr
7060tm "GenericTypeColHdrMgr"
7061)
7062*291 (InitColHdr
7063tm "GenericValueColHdrMgr"
7064)
7065*292 (PragmaColHdr
7066tm "GenericPragmaColHdrMgr"
7067)
7068*293 (EolColHdr
7069tm "GenericEolColHdrMgr"
7070)
7071]
7072)
7073pdm (PhysicalDM
7074displayShortBounds 1
7075editShortBounds 1
7076uid 95,0
7077optionalChildren [
7078*294 (Sheet
7079sheetRow (SheetRow
7080headerVa (MVa
7081cellColor "49152,49152,49152"
7082fontColor "0,0,0"
7083font "Tahoma,10,0"
7084)
7085cellVa (MVa
7086cellColor "65535,65535,65535"
7087fontColor "0,0,0"
7088font "Tahoma,10,0"
7089)
7090groupVa (MVa
7091cellColor "39936,56832,65280"
7092fontColor "0,0,0"
7093font "Tahoma,10,0"
7094)
7095emptyMRCItem *295 (MRCItem
7096litem &282
7097pos 0
7098dimension 20
7099)
7100uid 97,0
7101optionalChildren [
7102*296 (MRCItem
7103litem &283
7104pos 0
7105dimension 20
7106uid 98,0
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7109litem &284
7110pos 1
7111dimension 23
7112uid 99,0
7113)
7114*298 (MRCItem
7115litem &285
7116pos 2
7117hidden 1
7118dimension 20
7119uid 100,0
7120)
7121]
7122)
7123sheetCol (SheetCol
7124propVa (MVa
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7134pos 0
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7136uid 102,0
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7138*300 (MRCItem
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7142uid 103,0
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7152pos 3
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7154uid 105,0
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7158pos 4
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7160uid 106,0
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7162*304 (MRCItem
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7164pos 5
7165dimension 50
7166uid 107,0
7167)
7168*305 (MRCItem
7169litem &293
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7172uid 108,0
7173)
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7175)
7176fixedCol 3
7177fixedRow 2
7178name "Ports"
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7180vaOverrides [
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7182)
7183]
7184)
7185uid 82,0
7186type 1
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7188activeModelName "BlockDiag"
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