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thePort (LogicalPort decl (Decl n "config_start" t "std_logic" o 2 ) ) ) *41 (CptPort uid 2151,0 ps "OnEdgeStrategy" shape (Triangle uid 2152,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "10250,33625,11000,34375" ) tg (CPTG uid 2153,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2154,0 va (VaSet ) xt "12000,33500,17700,34500" st "config_ready" blo "12000,34300" ) ) thePort (LogicalPort m 1 decl (Decl n "config_ready" t "std_logic" o 3 i "'1'" ) ) ) *42 (CptPort uid 2155,0 ps "OnEdgeStrategy" shape (Triangle uid 2156,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "10250,36625,11000,37375" ) tg (CPTG uid 2157,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2158,0 va (VaSet ) xt "12000,36500,17500,37500" st "sensor_valid" blo "12000,37300" ) ) thePort (LogicalPort m 1 decl (Decl n "sensor_valid" t "std_logic" o 7 i "'0'" ) ) ) *43 (CptPort uid 2159,0 ps "OnEdgeStrategy" shape (Triangle uid 2160,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "10250,35625,11000,36375" ) tg (CPTG uid 2161,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2162,0 va (VaSet ) xt "12000,35500,16200,36500" st "dac_array" blo "12000,36300" ) ) thePort (LogicalPort decl (Decl n "dac_array" t "dac_array_type" o 4 ) ) ) *44 (CptPort uid 2163,0 ps "OnEdgeStrategy" shape (Triangle uid 2164,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "10250,37625,11000,38375" ) tg (CPTG uid 2165,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2166,0 va (VaSet ) xt "12000,37500,17800,38500" st "sensor_array" blo "12000,38300" ) ) thePort (LogicalPort m 1 decl (Decl n "sensor_array" t "sensor_array_type" o 6 ) ) ) *45 (CptPort uid 2167,0 ps "OnEdgeStrategy" shape (Triangle uid 2168,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,34625,28750,35375" ) tg (CPTG uid 2169,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2170,0 va (VaSet ) xt "19600,34500,27000,35500" st "dac_config_start" ju 2 blo "27000,35300" ) ) thePort (LogicalPort m 1 decl (Decl n "dac_config_start" t "std_logic" o 10 i "'0'" ) ) ) *46 (CptPort uid 2171,0 ps "OnEdgeStrategy" shape (Triangle uid 2172,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,40625,28750,41375" ) tg (CPTG uid 2173,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2174,0 va (VaSet ) xt "19500,40500,27000,41500" st "dac_config_ready" ju 2 blo "27000,41300" ) ) thePort (LogicalPort decl (Decl n "dac_config_ready" t "std_logic" o 11 ) ) ) *47 (CptPort uid 2175,0 ps "OnEdgeStrategy" shape (Triangle uid 2176,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,35625,28750,36375" ) tg (CPTG uid 2177,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2178,0 va (VaSet ) xt "19000,35500,27000,36500" st "sensor_read_start" ju 2 blo "27000,36300" ) ) thePort (LogicalPort m 1 decl (Decl n "sensor_read_start" t "std_logic" o 8 i "'0'" ) ) ) *48 (CptPort uid 2179,0 ps "OnEdgeStrategy" shape (Triangle uid 2180,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,41625,28750,42375" ) tg (CPTG uid 2181,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2182,0 va (VaSet ) xt "19300,41500,27000,42500" st "sensor_read_valid" ju 2 blo "27000,42300" ) ) thePort (LogicalPort decl (Decl n "sensor_read_valid" t "std_logic" o 9 ) ) ) *49 (CptPort uid 2183,0 ps "OnEdgeStrategy" shape (Triangle uid 2184,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,31625,28750,32375" ) tg (CPTG uid 2185,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2186,0 va (VaSet ) xt "21200,31500,27000,32500" st "dac_id : (2:0)" ju 2 blo "27000,32300" ) ) thePort (LogicalPort m 1 decl (Decl n "dac_id" t "std_logic_vector" b "(2 downto 0)" o 14 i "(others => '0')" ) ) ) *50 (CptPort uid 2187,0 ps "OnEdgeStrategy" shape (Triangle uid 2188,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,32625,28750,33375" ) tg (CPTG uid 2189,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2190,0 va (VaSet ) xt "20200,32500,27000,33500" st "sensor_id : (1:0)" ju 2 blo "27000,33300" ) ) thePort (LogicalPort m 1 decl (Decl n "sensor_id" t "std_logic_vector" b "(1 downto 0)" o 15 i "(others => '0')" ) ) ) *51 (CptPort uid 2191,0 ps "OnEdgeStrategy" shape (Diamond uid 2192,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,37625,28750,38375" ) tg (CPTG uid 2193,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2194,0 va (VaSet ) xt "21600,37500,27000,38500" st "data : (15:0)" ju 2 blo "27000,38300" ) ) thePort (LogicalPort m 2 decl (Decl n "data" t "std_logic_vector" b "(15 downto 0)" o 16 i "(others => 'Z')" ) ) ) *52 (CptPort uid 2814,0 ps "OnEdgeStrategy" shape (Triangle uid 2815,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "10250,39625,11000,40375" ) tg (CPTG uid 2816,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2817,0 va (VaSet ) xt "12000,39500,20000,40500" st "current_dac_array" blo "12000,40300" ) ) thePort (LogicalPort m 1 decl (Decl n "current_dac_array" t "dac_array_type" o 5 i "( others => 0)" ) ) ) *53 (CptPort uid 3012,0 ps "OnEdgeStrategy" shape (Triangle uid 3013,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,45625,28750,46375" ) tg (CPTG uid 3014,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 3015,0 va (VaSet ) xt "17700,45500,27000,46500" st "sclk_enable_override" ju 2 blo "27000,46300" ) ) thePort (LogicalPort m 1 decl (Decl n "sclk_enable_override" t "std_logic" o 13 i "'0'" ) ) ) *54 (CptPort uid 3167,0 ps "OnEdgeStrategy" shape (Triangle uid 3168,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,42625,28750,43375" ) tg (CPTG uid 3169,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 3170,0 va (VaSet ) xt "19300,42500,27000,43500" st "spi_channel_ready" ju 2 blo "27000,43300" ) ) thePort (LogicalPort decl (Decl n "spi_channel_ready" t "std_logic" o 12 ) ) ) *55 (CptPort uid 3253,0 ps "OnEdgeStrategy" shape (Triangle uid 3254,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28000,43625,28750,44375" ) tg (CPTG uid 3255,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 3256,0 va (VaSet ) xt "14800,43500,27000,44500" st "measured_temp_data : (15:0)" ju 2 blo "27000,44300" ) ) thePort (LogicalPort decl (Decl n "measured_temp_data" t "std_logic_vector" b "(15 downto 0)" o 17 ) ) ) ] shape (Rectangle uid 2196,0 va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "11000,31000,28000,47000" ) oxt "0,0,8000,10000" ttg (MlTextGroup uid 2197,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *56 (Text uid 2198,0 va (VaSet font "Arial,8,1" ) xt "10350,47000,16550,48000" st "FACT_FAD_lib" blo "10350,47800" tm "BdLibraryNameMgr" ) *57 (Text uid 2199,0 va (VaSet font "Arial,8,1" ) xt "10350,48000,16650,49000" st "spi_distributor" blo "10350,48800" tm "CptNameMgr" ) *58 (Text uid 2200,0 va (VaSet font "Arial,8,1" ) xt "10350,49000,17250,50000" st "I_spi_distributor" blo "10350,49800" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation uid 2201,0 ps "EdgeToEdgeStrategy" matrix (Matrix uid 2202,0 text (MLText uid 2203,0 va (VaSet font "Courier New,8,0" ) xt "11000,30200,37000,31000" st "TEMP_MEASUREMENT_BEAT = 5*10**6 ( integer ) " ) header "" ) elements [ (GiElement name "TEMP_MEASUREMENT_BEAT" type "integer" value "5*10**6" ) ] ) viewicon (ZoomableIcon uid 2204,0 sl 0 va (VaSet vasetType 1 fg "49152,49152,49152" ) xt "11250,45250,12750,46750" iconName "VhdlFileViewIcon.png" iconMaskName "VhdlFileViewIcon.msk" ftype 10 ) ordering 1 viewiconposition 0 portVis (PortSigDisplay ) archFileType "UNKNOWN" ) *59 (SaComponent uid 2249,0 optionalChildren [ *60 (CptPort uid 2205,0 ps "OnEdgeStrategy" shape (Triangle uid 2206,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,30625,39000,31375" ) tg (CPTG uid 2207,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2208,0 va (VaSet ) xt "40000,30500,41300,31500" st "clk" blo "40000,31300" ) ) thePort (LogicalPort decl (Decl n "clk" t "std_logic" o 1 ) ) ) *61 (CptPort uid 2213,0 ps "OnEdgeStrategy" shape (Triangle uid 2214,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,31625,39000,32375" ) tg (CPTG uid 2215,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2216,0 va (VaSet ) xt "40000,31500,45800,32500" st "dac_id : (2:0)" blo "40000,32300" ) ) thePort (LogicalPort decl (Decl n "dac_id" t "std_logic_vector" b "(2 DOWNTO 0)" o 6 ) ) ) *62 (CptPort uid 2217,0 ps "OnEdgeStrategy" shape (Triangle uid 2218,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,32625,39000,33375" ) tg (CPTG uid 2219,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2220,0 va (VaSet ) xt "40000,32500,46800,33500" st "sensor_id : (1:0)" blo "40000,33300" ) ) thePort (LogicalPort decl (Decl n "sensor_id" t "std_logic_vector" b "(1 downto 0)" o 7 ) ) ) *63 (CptPort uid 2221,0 ps "OnEdgeStrategy" shape (Diamond uid 2222,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,37625,39000,38375" ) tg (CPTG uid 2223,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2224,0 va (VaSet ) xt "40000,37500,45400,38500" st "data : (15:0)" blo "40000,38300" ) ) thePort (LogicalPort m 2 decl (Decl n "data" t "std_logic_vector" b "(15 DOWNTO 0)" o 8 i "(others => 'Z')" ) ) ) *64 (CptPort uid 2225,0 ps "OnEdgeStrategy" shape (Triangle uid 2226,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "55000,32625,55750,33375" ) tg (CPTG uid 2227,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2228,0 va (VaSet ) xt "51000,32500,54000,33500" st "dac_cs" ju 2 blo "54000,33300" ) ) thePort (LogicalPort m 1 decl (Decl n "dac_cs" t "std_logic" o 4 i "'1'" ) ) ) *65 (CptPort uid 2229,0 ps "OnEdgeStrategy" shape (Triangle uid 2230,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "55000,37625,55750,38375" ) tg (CPTG uid 2231,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2232,0 va (VaSet ) xt "47000,37500,54000,38500" st "sensor_cs : (3:0)" ju 2 blo "54000,38300" ) ) thePort (LogicalPort m 1 decl (Decl n "sensor_cs" t "std_logic_vector" b "(3 DOWNTO 0)" o 5 i "(others => '1')" ) ) ) *66 (CptPort uid 2233,0 ps "OnEdgeStrategy" shape (Triangle uid 2234,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,34625,39000,35375" ) tg (CPTG uid 2235,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2236,0 va (VaSet ) xt "40000,34500,44200,35500" st "dac_start" blo "40000,35300" ) ) thePort (LogicalPort decl (Decl n "dac_start" t "std_logic" o 10 ) ) ) *67 (CptPort uid 2237,0 ps "OnEdgeStrategy" shape (Triangle uid 2238,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,40625,39000,41375" ) tg (CPTG uid 2239,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2240,0 va (VaSet ) xt "40000,40500,44300,41500" st "dac_ready" blo "40000,41300" ) ) thePort (LogicalPort m 1 decl (Decl n "dac_ready" t "std_logic" o 11 i "'0'" ) ) ) *68 (CptPort uid 2241,0 ps "OnEdgeStrategy" shape (Triangle uid 2242,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,35625,39000,36375" ) tg (CPTG uid 2243,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2244,0 va (VaSet ) xt "40000,35500,45800,36500" st "sensor_start" blo "40000,36300" ) ) thePort (LogicalPort decl (Decl n "sensor_start" t "std_logic" o 12 ) ) ) *69 (CptPort uid 2245,0 ps "OnEdgeStrategy" shape (Triangle uid 2246,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,41625,39000,42375" ) tg (CPTG uid 2247,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2248,0 va (VaSet ) xt "40000,41500,45500,42500" st "sensor_valid" blo "40000,42300" ) ) thePort (LogicalPort m 1 decl (Decl n "sensor_valid" t "std_logic" o 13 i "'0'" ) ) ) *70 (CptPort uid 2351,0 ps "OnEdgeStrategy" shape (Triangle uid 2352,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "55000,31625,55750,32375" ) tg (CPTG uid 2353,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2354,0 va (VaSet ) xt "52000,31500,54000,32500" st "mosi" ju 2 blo "54000,32300" ) ) thePort (LogicalPort m 1 decl (Decl n "mosi" t "std_logic" o 3 i "'0'" ) ) ) *71 (CptPort uid 2398,0 ps "OnEdgeStrategy" shape (Diamond uid 2399,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "55000,30625,55750,31375" ) tg (CPTG uid 2400,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2401,0 va (VaSet ) xt "52000,30500,54000,31500" st "miso" ju 2 blo "54000,31300" ) ) thePort (LogicalPort m 2 decl (Decl n "miso" t "std_logic" o 2 i "'Z'" ) ) ) *72 (CptPort uid 3163,0 ps "OnEdgeStrategy" shape (Triangle uid 3164,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,42625,39000,43375" ) tg (CPTG uid 3165,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 3166,0 va (VaSet ) xt "40000,42500,47700,43500" st "spi_channel_ready" blo "40000,43300" ) ) thePort (LogicalPort m 1 decl (Decl n "spi_channel_ready" t "std_logic" o 14 i "'1'" ) ) ) *73 (CptPort uid 3249,0 ps "OnEdgeStrategy" shape (Triangle uid 3250,0 ro 270 va (VaSet vasetType 1 fg "0,65535,0" ) xt "38250,43625,39000,44375" ) tg (CPTG uid 3251,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 3252,0 va (VaSet ) xt "40000,43500,52200,44500" st "measured_temp_data : (15:0)" blo "40000,44300" ) ) thePort (LogicalPort m 1 decl (Decl n "measured_temp_data" t "std_logic_vector" b "(15 DOWNTO 0)" o 9 i "(others => '0')" ) ) ) ] shape (Rectangle uid 2250,0 va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "39000,30000,55000,47000" ) oxt "0,0,8000,10000" ttg (MlTextGroup uid 2251,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *74 (Text uid 2252,0 va (VaSet font "Arial,8,1" ) xt "47900,43000,54100,44000" st "FACT_FAD_lib" blo "47900,43800" tm "BdLibraryNameMgr" ) *75 (Text uid 2253,0 va (VaSet font "Arial,8,1" ) xt "47900,44000,53800,45000" st "spi_controller" blo "47900,44800" tm "CptNameMgr" ) *76 (Text uid 2254,0 va (VaSet font "Arial,8,1" ) xt "47900,45000,54400,46000" st "I_spi_controller" blo "47900,45800" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation uid 2255,0 ps "EdgeToEdgeStrategy" matrix (Matrix uid 2256,0 text (MLText uid 2257,0 va (VaSet font "Courier New,8,0" ) xt "47000,30000,47000,30000" ) header "" ) elements [ ] ) viewicon (ZoomableIcon uid 2258,0 sl 0 va (VaSet vasetType 1 fg "49152,49152,49152" ) xt "39250,45250,40750,46750" iconName "VhdlFileViewIcon.png" iconMaskName "VhdlFileViewIcon.msk" ftype 10 ) ordering 1 viewiconposition 0 portVis (PortSigDisplay ) archFileType "UNKNOWN" ) *77 (Net uid 2355,0 decl (Decl n "mosi" t "std_logic" o 19 suid 46,0 i "'0'" ) declText (MLText uid 2356,0 va (VaSet font "Courier New,8,0" ) xt "-2000,18000,29500,18800" st "mosi : std_logic := '0'" ) ) *78 (PortIoOut uid 2363,0 shape (CompositeShape uid 2364,0 va (VaSet vasetType 1 fg "0,0,32768" ) optionalChildren [ (Pentagon uid 2365,0 sl 0 ro 270 xt "57500,31625,59000,32375" ) (Line uid 2366,0 sl 0 ro 270 xt "57000,32000,57500,32000" pts [ "57000,32000" "57500,32000" ] ) ] ) stc 0 sf 1 tg (WTG uid 2367,0 ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text uid 2368,0 va (VaSet ) xt "60000,31500,62000,32500" st "mosi" blo "60000,32300" tm "WireNameMgr" ) ) ) *79 (Net uid 2402,0 decl (Decl n "miso" t "std_logic" preAdd 0 posAdd 0 o 10 suid 47,0 ) declText (MLText uid 2403,0 va (VaSet font "Courier New,8,0" ) xt "-2000,22000,15500,22800" st "miso : std_logic" ) ) *80 (SaComponent uid 2645,0 optionalChildren [ *81 (CptPort uid 2637,0 ps "OnEdgeStrategy" shape (Triangle uid 2638,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "35250,9625,36000,10375" ) tg (CPTG uid 2639,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2640,0 va (VaSet ) xt "37000,9500,38300,10500" st "clk" blo "37000,10300" ) ) thePort (LogicalPort decl (Decl n "clk" t "std_logic" o 1 ) ) ) *82 (CptPort uid 2641,0 ps "OnEdgeStrategy" shape (Triangle uid 2642,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "44000,9625,44750,10375" ) tg (CPTG uid 2643,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2644,0 va (VaSet ) xt "41300,9500,43000,10500" st "sclk" ju 2 blo "43000,10300" ) ) thePort (LogicalPort m 1 decl (Decl n "sclk" t "std_logic" o 2 i "'0'" ) ) ) ] shape (Rectangle uid 2646,0 va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "36000,9000,44000,12000" ) oxt "0,0,8000,10000" ttg (MlTextGroup uid 2647,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *83 (Text uid 2648,0 va (VaSet font "Arial,8,1" ) xt "36900,12000,43100,13000" st "FACT_FAD_lib" blo "36900,12800" tm "BdLibraryNameMgr" ) *84 (Text uid 2649,0 va (VaSet font "Arial,8,1" ) xt "36900,13000,41700,14000" st "clk_divider" blo "36900,13800" tm "CptNameMgr" ) *85 (Text uid 2650,0 va (VaSet font "Arial,8,1" ) xt "36900,14000,37900,15000" st "I1" blo "36900,14800" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation uid 2651,0 ps "EdgeToEdgeStrategy" matrix (Matrix uid 2652,0 text (MLText uid 2653,0 va (VaSet font "Courier New,8,0" ) xt "36000,8200,52000,9000" st "DIVIDER = 25 ( integer ) " ) header "" ) elements [ (GiElement name "DIVIDER" type "integer" value "25" ) ] ) viewicon (ZoomableIcon uid 2654,0 sl 0 va (VaSet vasetType 1 fg "49152,49152,49152" ) xt "36250,10250,37750,11750" iconName "VhdlFileViewIcon.png" iconMaskName "VhdlFileViewIcon.msk" ftype 10 ) ordering 1 viewiconposition 0 portVis (PortSigDisplay ) archFileType "UNKNOWN" ) *86 (SaComponent uid 2689,0 optionalChildren [ *87 (CptPort uid 2681,0 ps "OnEdgeStrategy" shape (Triangle uid 2682,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "34250,17625,35000,18375" ) tg (CPTG uid 2683,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2684,0 va (VaSet ) xt "36000,17500,37300,18500" st "clk" blo "36000,18300" ) ) thePort (LogicalPort decl (Decl n "clk" t "std_logic" o 1 ) ) ) *88 (CptPort uid 2685,0 ps "OnEdgeStrategy" shape (Triangle uid 2686,0 ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "43000,17625,43750,18375" ) tg (CPTG uid 2687,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2688,0 va (VaSet ) xt "40300,17500,42000,18500" st "sclk" ju 2 blo "42000,18300" ) ) thePort (LogicalPort m 1 decl (Decl n "sclk" t "std_logic" o 2 i "'0'" ) ) ) ] shape (Rectangle uid 2690,0 va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "35000,17000,43000,20000" ) oxt "0,0,8000,10000" ttg (MlTextGroup uid 2691,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *89 (Text uid 2692,0 va (VaSet font "Arial,8,1" ) xt "35900,20000,42100,21000" st "FACT_FAD_lib" blo "35900,20800" tm "BdLibraryNameMgr" ) *90 (Text uid 2693,0 va (VaSet font "Arial,8,1" ) xt "35900,21000,40700,22000" st "clk_divider" blo "35900,21800" tm "CptNameMgr" ) *91 (Text uid 2694,0 va (VaSet font "Arial,8,1" ) xt "35900,22000,47800,23000" st "Measure_Temperature_Timer" blo "35900,22800" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation uid 2695,0 ps "EdgeToEdgeStrategy" matrix (Matrix uid 2696,0 text (MLText uid 2697,0 va (VaSet font "Courier New,8,0" ) xt "35000,16200,51000,17000" st "DIVIDER = 25 ( integer ) " ) header "" ) elements [ (GiElement name "DIVIDER" type "integer" value "25" ) ] ) viewicon (ZoomableIcon uid 2698,0 sl 0 va (VaSet vasetType 1 fg "49152,49152,49152" ) xt "35250,18250,36750,19750" iconName "VhdlFileViewIcon.png" iconMaskName "VhdlFileViewIcon.msk" ftype 10 ) ordering 1 viewiconposition 0 portVis (PortSigDisplay ) archFileType "UNKNOWN" ) *92 (Net uid 2738,0 decl (Decl n "T_sensor_start" t "std_logic" o 6 suid 52,0 ) declText (MLText uid 2739,0 va (VaSet font "Courier New,8,0" ) xt "-2000,23800,19000,24600" st "SIGNAL T_sensor_start : std_logic" ) ) *93 (Net uid 2826,0 lang 10 decl (Decl n "current_dac_array" t "dac_array_type" o 21 suid 55,0 i "( others => 0)" ) declText (MLText uid 2827,0 va (VaSet font "Courier New,8,0" ) xt "-2000,15600,35000,16400" st "current_dac_array : dac_array_type := ( others => 0)" ) ) *94 (PortIoOut uid 2834,0 shape (CompositeShape uid 2835,0 va (VaSet vasetType 1 fg "0,0,32768" ) optionalChildren [ (Pentagon uid 2836,0 sl 0 ro 90 xt "4000,39625,5500,40375" ) (Line uid 2837,0 sl 0 ro 90 xt "5500,40000,6000,40000" pts [ "6000,40000" "5500,40000" ] ) ] ) stc 0 sf 1 tg (WTG uid 2838,0 ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text uid 2839,0 va (VaSet ) xt "-5000,39500,3000,40500" st "current_dac_array" ju 2 blo "3000,40300" tm "WireNameMgr" ) ) ) *95 (MWC uid 2965,0 optionalChildren [ *96 (CptPort uid 2937,0 optionalChildren [ *97 (Line uid 2941,0 layer 5 sl 0 va (VaSet vasetType 3 ) xt "84000,12000,85000,12000" pts [ "85000,12000" "84000,12000" ] ) *98 (Property uid 2942,0 pclass "_MW_GEOM_" pname "fixed" ptn "String" ) ] ps "OnEdgeStrategy" shape (Triangle uid 2938,0 ro 90 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "85000,11625,85750,12375" ) tg (CPTG uid 2939,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 2940,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "86419,11342,88219,12342" st "dout" ju 2 blo "88219,12142" ) ) thePort (LogicalPort m 1 decl (Decl n "dout" t "std_logic" o 6 suid 1,0 ) ) ) *99 (CptPort uid 2943,0 optionalChildren [ *100 (Line uid 2947,0 layer 5 sl 0 va (VaSet vasetType 3 ) xt "79000,11000,80000,11000" pts [ "79000,11000" "80000,11000" ] ) ] ps "OnEdgeStrategy" shape (Triangle uid 2944,0 ro 90 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "78250,10625,79000,11375" ) tg (CPTG uid 2945,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2946,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "75885,10294,77685,11294" st "din0" blo "75885,11094" ) ) thePort (LogicalPort decl (Decl n "din0" t "std_logic" o 21 suid 2,0 i "'0'" ) ) ) *101 (CptPort uid 2948,0 optionalChildren [ *102 (Line uid 2952,0 layer 5 sl 0 va (VaSet vasetType 3 ) xt "79000,13000,80000,13000" pts [ "79000,13000" "80000,13000" ] ) ] ps "OnEdgeStrategy" shape (Triangle uid 2949,0 ro 90 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "78250,12625,79000,13375" ) tg (CPTG uid 2950,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 2951,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "76000,12700,77800,13700" st "din1" blo "76000,13500" ) ) thePort (LogicalPort decl (Decl n "din1" t "std_logic" o 22 suid 3,0 i "'0'" ) ) ) *103 (CommentGraphic uid 2953,0 optionalChildren [ *104 (Property uid 2955,0 pclass "_MW_GEOM_" pname "expand" ptn "String" ) ] shape (PolyLine2D pts [ "80000,14000" "80000,14000" ] uid 2954,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" ) xt "80000,14000,80000,14000" ) oxt "7000,10000,7000,10000" ) *105 (CommentGraphic uid 2956,0 optionalChildren [ *106 (Property uid 2958,0 pclass "_MW_GEOM_" pname "expand" ptn "String" ) ] shape (PolyLine2D pts [ "80000,10000" "80000,10000" ] uid 2957,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" ) xt "80000,10000,80000,10000" ) oxt "7000,6000,7000,6000" ) *107 (Grouping uid 2959,0 optionalChildren [ *108 (CommentGraphic uid 2961,0 shape (PolyLine2D pts [ "82000,14000" "80000,14000" "80000,10000" "82000,10000" ] uid 2962,0 layer 0 sl 0 va (VaSet vasetType 1 fg "0,65535,65535" lineColor "26368,26368,26368" ) xt "80000,10000,82000,14000" ) oxt "7000,6000,9000,10000" ) *109 (CommentGraphic uid 2963,0 shape (Arc2D pts [ "82000,10000" "84000,12000" "82000,14000" ] uid 2964,0 layer 0 sl 0 va (VaSet vasetType 1 fg "0,65535,65535" lineColor "26368,26368,26368" ) xt "82000,10000,84000,14000" ) oxt "9000,6000,11000,10000" ) ] shape (GroupingShape uid 2960,0 sl 0 va (VaSet vasetType 1 fg "65535,65535,65535" lineStyle 2 lineWidth 2 ) xt "80000,10000,84000,14000" ) oxt "7000,6000,11000,10000" ) ] shape (Rectangle uid 2966,0 va (VaSet vasetType 1 transparent 1 fg "65535,65535,65535" lineWidth -1 ) xt "79000,10000,85000,14000" fos 1 ) showPorts 0 oxt "6000,6000,12000,10000" ttg (MlTextGroup uid 2967,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *110 (Text uid 2968,0 va (VaSet isHidden 1 font "arial,8,0" ) xt "80500,12500,85300,13500" st "moduleware" blo "80500,13300" ) *111 (Text uid 2969,0 va (VaSet font "arial,8,0" ) xt "80500,13500,82100,14500" st "and" blo "80500,14300" ) *112 (Text uid 2970,0 va (VaSet font "arial,8,0" ) xt "80500,14500,81500,15500" st "I0" blo "80500,15300" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation uid 2971,0 ps "EdgeToEdgeStrategy" matrix (Matrix uid 2972,0 text (MLText uid 2973,0 va (VaSet font "arial,8,0" ) xt "64000,1000,64000,1000" ) header "" ) elements [ ] ) sed 1 awe 1 portVis (PortSigDisplay sN 0 sTC 0 selT 0 ) prms (Property pclass "params" pname "params" ptn "String" ) de 2 visOptions (mwParamsVisibilityOptions ) ) *113 (Net uid 2980,0 decl (Decl n "clk_2Mhz" t "std_logic" o 21 suid 58,0 i "'0'" ) declText (MLText uid 2981,0 va (VaSet font "Courier New,8,0" ) xt "-2000,24600,33000,25400" st "SIGNAL clk_2Mhz : std_logic := '0'" ) ) *114 (Net uid 2990,0 decl (Decl n "sclk_enable_sig" t "std_logic" o 22 suid 60,0 i "'0'" ) declText (MLText uid 2991,0 va (VaSet font "Courier New,8,0" ) xt "-2000,30200,33000,31000" st "SIGNAL sclk_enable_sig : std_logic := '0'" ) ) *115 (PortIoIn uid 2998,0 shape (CompositeShape uid 2999,0 va (VaSet vasetType 1 fg "0,0,32768" ) optionalChildren [ (Pentagon uid 3000,0 sl 0 ro 270 xt "53000,14625,54500,15375" ) (Line uid 3001,0 sl 0 ro 270 xt "54500,15000,55000,15000" pts [ "54500,15000" "55000,15000" ] ) ] ) stc 0 sf 1 tg (WTG uid 3002,0 ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text uid 3003,0 va (VaSet ) xt "46100,14500,52000,15500" st "sclk_enable_i" ju 2 blo "52000,15300" tm "WireNameMgr" ) ) ) *116 (Net uid 3010,0 decl (Decl n "sclk_enable_i" t "std_logic" o 23 suid 61,0 ) declText (MLText uid 3011,0 va (VaSet font "Courier New,8,0" ) xt "-2000,14000,15500,14800" st "sclk_enable_i : std_logic" ) ) *117 (Net uid 3016,0 decl (Decl n "sclk_enable_override" t "std_logic" o 24 suid 62,0 i "'0'" ) declText (MLText uid 3017,0 va (VaSet font "Courier New,8,0" ) xt "-2000,29400,33000,30200" st "SIGNAL sclk_enable_override : std_logic := '0'" ) ) *118 (MWC uid 3068,0 optionalChildren [ *119 (CptPort uid 3032,0 optionalChildren [ *120 (Line uid 3036,0 layer 5 sl 0 va (VaSet vasetType 3 ) xt "63000,17000,64589,17000" pts [ "63000,17000" "64589,17000" ] ) ] ps "OnEdgeStrategy" shape (Triangle uid 3033,0 ro 90 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "62250,16625,63000,17375" ) tg (CPTG uid 3034,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 3035,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "66750,14700,68550,15700" st "din1" blo "66750,15500" ) ) thePort (LogicalPort decl (Decl n "din1" t "std_logic" o 24 suid 1,0 i "'0'" ) ) ) *121 (CptPort uid 3037,0 optionalChildren [ *122 (Property uid 3041,0 pclass "_MW_GEOM_" pname "fixed" ptn "String" ) *123 (Line uid 3042,0 layer 5 sl 0 va (VaSet vasetType 3 ) xt "68000,16000,69000,16000" pts [ "69000,16000" "68000,16000" ] ) ] ps "OnEdgeStrategy" shape (Triangle uid 3038,0 ro 90 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "69000,15625,69750,16375" ) tg (CPTG uid 3039,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 3040,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "63500,15532,65300,16532" st "dout" ju 2 blo "65300,16332" ) ) thePort (LogicalPort m 1 decl (Decl n "dout" t "std_logic" o 22 suid 2,0 i "'0'" ) ) ) *124 (CptPort uid 3043,0 optionalChildren [ *125 (Line uid 3047,0 layer 5 sl 0 va (VaSet vasetType 3 ) xt "63000,15000,64589,15000" pts [ "63000,15000" "64589,15000" ] ) ] ps "OnEdgeStrategy" shape (Triangle uid 3044,0 ro 90 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "62250,14625,63000,15375" ) tg (CPTG uid 3045,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 3046,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "66635,16294,68435,17294" st "din0" blo "66635,17094" ) ) thePort (LogicalPort decl (Decl n "din0" t "std_logic" o 23 suid 3,0 ) ) ) *126 (CommentGraphic uid 3048,0 shape (Arc2D pts [ "64000,14004" "66263,14521" "68000,16000" ] uid 3049,0 layer 8 sl 0 va (VaSet vasetType 1 fg "0,65535,65535" bg "0,65535,65535" lineColor "26368,26368,26368" ) xt "64000,14003,68000,16000" ) oxt "7000,6003,11000,8000" ) *127 (CommentGraphic uid 3050,0 shape (Arc2D pts [ "68000,16005" "66449,17394" "63996,17998" ] uid 3051,0 layer 0 sl 0 va (VaSet vasetType 1 fg "0,65535,65535" bg "0,65535,65535" lineColor "26368,26368,26368" ) xt "63996,16005,68000,18000" ) oxt "6996,8005,11000,10000" ) *128 (Grouping uid 3052,0 optionalChildren [ *129 (CommentGraphic uid 3054,0 optionalChildren [ *130 (Property uid 3056,0 pclass "_MW_GEOM_" pname "arc" ptn "String" ) ] shape (CustomPolygon pts [ "64000,17998" "64000,14000" "65183,14211" "66952,15156" "68000,16000" "66048,17132" "64000,17998" ] uid 3055,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "0,65535,65535" lineColor "32768,0,32768" fillStyle 1 ) xt "64000,14000,68000,17998" ) oxt "7000,6000,11000,9998" ) *131 (CommentGraphic uid 3057,0 optionalChildren [ *132 (Property uid 3059,0 pclass "_MW_GEOM_" pname "arc" ptn "String" ) ] shape (Arc2D pts [ "64000,14000" "64763,16001" "64000,18000" ] uid 3058,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "0,65535,65535" bg "0,65535,65535" lineColor "26368,26368,26368" fillStyle 1 ) xt "64000,14000,64762,18000" ) oxt "7000,6000,7762,10000" ) ] shape (GroupingShape uid 3053,0 sl 0 va (VaSet vasetType 1 fg "65535,65535,65535" lineStyle 2 lineWidth 2 ) xt "64000,14000,68000,18000" ) oxt "7000,6000,11000,10000" ) *133 (CommentGraphic uid 3060,0 shape (PolyLine2D pts [ "68000,16000" "68000,16000" ] uid 3061,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" ) xt "68000,16000,68000,16000" ) oxt "11000,8000,11000,8000" ) *134 (CommentGraphic uid 3062,0 optionalChildren [ *135 (Property uid 3064,0 pclass "_MW_GEOM_" pname "expand" ptn "String" ) ] shape (PolyLine2D pts [ "64000,14000" "64000,14000" ] uid 3063,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" ) xt "64000,14000,64000,14000" ) oxt "7000,6000,7000,6000" ) *136 (CommentGraphic uid 3065,0 optionalChildren [ *137 (Property uid 3067,0 pclass "_MW_GEOM_" pname "expand" ptn "String" ) ] shape (PolyLine2D pts [ "64000,18000" "64000,18000" ] uid 3066,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" ) xt "64000,18000,64000,18000" ) oxt "7000,10000,7000,10000" ) ] shape (Rectangle uid 3069,0 va (VaSet vasetType 1 transparent 1 fg "65535,65535,65535" lineWidth -1 ) xt "63000,14000,69000,18000" fos 1 ) showPorts 0 oxt "6000,6000,12000,10000" ttg (MlTextGroup uid 3070,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *138 (Text uid 3071,0 va (VaSet isHidden 1 font "arial,8,0" ) xt "64500,16500,69300,17500" st "moduleware" blo "64500,17300" ) *139 (Text uid 3072,0 va (VaSet font "arial,8,0" ) xt "64500,17500,65600,18500" st "or" blo "64500,18300" ) *140 (Text uid 3073,0 va (VaSet font "arial,8,0" ) xt "64500,18500,65500,19500" st "I2" blo "64500,19300" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation uid 3074,0 ps "EdgeToEdgeStrategy" matrix (Matrix uid 3075,0 text (MLText uid 3076,0 va (VaSet font "arial,8,0" ) xt "48000,5000,48000,5000" ) header "" ) elements [ ] ) sed 1 awe 1 portVis (PortSigDisplay sN 0 sTC 0 selT 0 ) prms (Property pclass "params" pname "params" ptn "String" ) de 2 visOptions (mwParamsVisibilityOptions ) ) *141 (Net uid 3171,0 decl (Decl n "spi_channel_ready" t "std_logic" o 25 suid 65,0 i "'1'" ) declText (MLText uid 3172,0 va (VaSet font "Courier New,8,0" ) xt "-2000,33400,33000,34200" st "SIGNAL spi_channel_ready : std_logic := '1'" ) ) *142 (Net uid 3257,0 decl (Decl n "measured_temp_data" t "std_logic_vector" b "(15 DOWNTO 0)" o 26 suid 66,0 i "(others => '0')" ) declText (MLText uid 3258,0 va (VaSet font "Courier New,8,0" ) xt "-2000,28600,39000,29400" st "SIGNAL measured_temp_data : std_logic_vector(15 DOWNTO 0) := (others => '0')" ) ) *143 (PortIoOut uid 3267,0 shape (CompositeShape uid 3268,0 va (VaSet vasetType 1 fg "0,0,32768" ) optionalChildren [ (Pentagon uid 3269,0 sl 0 ro 270 xt "84500,43625,86000,44375" ) (Line uid 3270,0 sl 0 ro 270 xt "84000,44000,84500,44000" pts [ "84000,44000" "84500,44000" ] ) ] ) stc 0 sf 1 tg (WTG uid 3271,0 ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text uid 3272,0 va (VaSet ) xt "87000,43500,92600,44500" st "debug_16bit" blo "87000,44300" tm "WireNameMgr" ) ) ) *144 (MWC uid 3338,0 optionalChildren [ *145 (CptPort uid 3318,0 optionalChildren [ *146 (Line uid 3322,0 layer 5 sl 0 va (VaSet vasetType 3 lineWidth 2 ) xt "41000,54000,41000,54000" pts [ "41000,54000" "41000,54000" ] ) ] ps "OnEdgeStrategy" shape (Triangle uid 3319,0 ro 270 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "41000,53625,41750,54375" ) tg (CPTG uid 3320,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 3321,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "42200,53500,43000,54500" st "s" ju 2 blo "43000,54300" ) s (Text uid 3347,0 sl 0 va (VaSet font "arial,8,0" ) xt "43000,54500,43000,54500" ju 2 blo "43000,54500" ) ) thePort (LogicalPort decl (Decl n "s" t "std_logic_vector" b "(15 DOWNTO 0)" o 26 suid 1,0 i "(others => '0')" ) ) ) *147 (CptPort uid 3323,0 optionalChildren [ *148 (Line uid 3327,0 layer 5 sl 0 va (VaSet vasetType 3 lineWidth 2 ) xt "38000,54000,38000,54000" pts [ "38000,54000" "38000,54000" ] ) ] ps "OnEdgeStrategy" shape (Triangle uid 3324,0 ro 270 va (VaSet vasetType 1 isHidden 1 fg "0,65535,65535" ) xt "37250,53625,38000,54375" ) tg (CPTG uid 3325,0 ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text uid 3326,0 sl 0 va (VaSet isHidden 1 font "arial,8,0" ) xt "36000,53500,36600,54500" st "t" blo "36000,54300" ) s (Text uid 3348,0 sl 0 va (VaSet font "arial,8,0" ) xt "36000,54500,36000,54500" blo "36000,54500" ) ) thePort (LogicalPort m 1 decl (Decl n "t" t "std_logic_vector" b "(15 DOWNTO 0)" o 27 suid 2,0 ) ) ) *149 (CommentGraphic uid 3328,0 shape (PolyLine2D pts [ "38000,54000" "39000,53000" ] uid 3329,0 layer 8 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" lineColor "26368,26368,26368" lineWidth 2 ) xt "38000,53000,39000,54000" ) oxt "6000,6000,7000,7000" ) *150 (CommentGraphic uid 3330,0 shape (PolyLine2D pts [ "38000,54000" "39000,55000" ] uid 3331,0 layer 8 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" lineColor "26368,26368,26368" lineWidth 2 ) xt "38000,54000,39000,55000" ) oxt "6000,7000,7000,8000" ) *151 (CommentGraphic uid 3332,0 shape (PolyLine2D pts [ "38988,54329" "39988,54329" ] uid 3333,0 layer 8 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" lineColor "26368,26368,26368" lineWidth 2 ) xt "38988,54329,39988,54329" ) oxt "6988,7329,7988,7329" ) *152 (CommentGraphic uid 3334,0 shape (PolyLine2D pts [ "40000,54000" "41000,54000" ] uid 3335,0 layer 0 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" ) xt "40000,54000,41000,54000" ) oxt "8000,7000,9000,7000" ) *153 (CommentGraphic uid 3336,0 shape (PolyLine2D pts [ "38976,53730" "39976,53730" ] uid 3337,0 layer 8 sl 0 va (VaSet vasetType 1 transparent 1 fg "49152,49152,49152" lineColor "26368,26368,26368" lineWidth 2 ) xt "38976,53730,39976,53730" ) oxt "6976,6730,7976,6730" ) ] shape (Rectangle uid 3339,0 va (VaSet vasetType 1 transparent 1 fg "0,65535,0" lineColor "65535,65535,65535" lineWidth -1 ) xt "38000,53000,41000,55000" fos 1 ) showPorts 0 oxt "6000,6000,9000,8000" ttg (MlTextGroup uid 3340,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *154 (Text uid 3341,0 va (VaSet isHidden 1 font "arial,8,0" ) xt "38350,54100,43150,55100" st "moduleware" blo "38350,54900" ) *155 (Text uid 3342,0 va (VaSet font "arial,8,0" ) xt "38350,55100,43050,56100" st "assignment" blo "38350,55900" ) *156 (Text uid 3343,0 va (VaSet font "arial,8,0" ) xt "38350,56100,39350,57100" st "I3" blo "38350,56900" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation uid 3344,0 ps "EdgeToEdgeStrategy" matrix (Matrix uid 3345,0 text (MLText uid 3346,0 va (VaSet font "arial,8,0" ) xt "33000,33400,33000,33400" ) header "" ) elements [ ] ) sed 1 awe 1 portVis (PortSigDisplay disp 1 sN 0 sTC 0 selT 0 ) prms (Property pclass "params" pname "params" ptn "String" ) visOptions (mwParamsVisibilityOptions ) ) *157 (Net uid 3390,0 decl (Decl n "debug_16bit" t "std_logic_vector" b "( 15 DOWNTO 0 )" o 27 suid 68,0 ) declText (MLText uid 3391,0 va (VaSet font "Courier New,8,0" ) xt "-2000,17200,27000,18000" st "debug_16bit : std_logic_vector( 15 DOWNTO 0 )" ) ) *158 (Wire uid 214,0 shape (OrthoPolyLine uid 215,0 va (VaSet vasetType 3 ) xt "85000,12000,88000,12000" pts [ "85000,12000" "88000,12000" ] ) start &96 end &21 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 218,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 219,0 va (VaSet ) xt "87000,11000,88700,12000" st "sclk" blo "87000,11800" tm "WireNameMgr" ) ) on &12 ) *159 (Wire uid 222,0 shape (OrthoPolyLine uid 223,0 va (VaSet vasetType 3 ) xt "33000,10000,35250,10000" pts [ "35250,10000" "33000,10000" ] ) start &81 end &14 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 226,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 227,0 va (VaSet isHidden 1 ) xt "35000,9000,39200,10000" st "clk_50MHz" blo "35000,9800" tm "WireNameMgr" ) ) on &13 ) *160 (Wire uid 244,0 shape (OrthoPolyLine uid 245,0 va (VaSet vasetType 3 ) xt "55750,31000,57000,31000" pts [ "55750,31000" "57000,31000" ] ) start &71 end &17 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 248,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 249,0 va (VaSet isHidden 1 ) xt "57000,30000,59000,31000" st "miso" blo "57000,30800" tm "WireNameMgr" ) ) on &79 ) *161 (Wire uid 252,0 shape (OrthoPolyLine uid 253,0 va (VaSet vasetType 3 ) xt "55750,33000,57000,33000" pts [ "55750,33000" "57000,33000" ] ) start &64 end &18 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 256,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 257,0 va (VaSet isHidden 1 ) xt "57000,32000,59800,33000" st "dac_cs" blo "57000,32800" tm "WireNameMgr" ) ) on &15 ) *162 (Wire uid 260,0 shape (OrthoPolyLine uid 261,0 va (VaSet vasetType 3 lineWidth 2 ) xt "55750,38000,57000,38000" pts [ "55750,38000" "57000,38000" ] ) start &65 end &19 sat 32 eat 32 sty 1 stc 0 st 0 sf 1 si 0 tg (WTG uid 264,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 265,0 va (VaSet isHidden 1 ) xt "59000,37000,62900,38000" st "sensor_cs" blo "59000,37800" tm "WireNameMgr" ) ) on &16 ) *163 (Wire uid 451,0 shape (OrthoPolyLine uid 452,0 va (VaSet vasetType 3 lineWidth 2 ) xt "28750,38000,38250,38000" pts [ "38250,38000" "28750,38000" ] ) start &63 end &51 sat 32 eat 32 sty 1 st 0 sf 1 si 0 tg (WTG uid 455,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 456,0 va (VaSet ) xt "31000,37000,35800,38000" st "data : (15:0)" blo "31000,37800" tm "WireNameMgr" ) ) on &22 ) *164 (Wire uid 489,0 shape (OrthoPolyLine uid 490,0 va (VaSet vasetType 3 lineWidth 2 ) xt "6000,36000,10250,36000" pts [ "6000,36000" "10250,36000" ] ) start &23 end &43 sat 32 eat 32 sty 1 stc 0 st 0 sf 1 si 0 tg (WTG uid 493,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 494,0 va (VaSet isHidden 1 ) xt "13000,38000,16700,39000" st "dac_array" blo "13000,38800" tm "WireNameMgr" ) ) on &24 ) *165 (Wire uid 1227,0 shape (OrthoPolyLine uid 1228,0 va (VaSet vasetType 3 ) xt "6000,33000,10250,33000" pts [ "10250,33000" "6000,33000" ] ) start &40 end &20 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 1229,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1230,0 va (VaSet isHidden 1 ) xt "9250,40000,14050,41000" st "config_start" blo "9250,40800" tm "WireNameMgr" ) ) on &26 ) *166 (Wire uid 1233,0 shape (OrthoPolyLine uid 1234,0 va (VaSet vasetType 3 ) xt "6000,34000,10250,34000" pts [ "10250,34000" "6000,34000" ] ) start &41 end &25 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 1235,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1236,0 va (VaSet isHidden 1 ) xt "12250,45000,17350,46000" st "config_ready" blo "12250,45800" tm "WireNameMgr" ) ) on &27 ) *167 (Wire uid 1245,0 shape (OrthoPolyLine uid 1246,0 va (VaSet vasetType 3 ) xt "28750,41000,38250,41000" pts [ "28750,41000" "38250,41000" ] ) start &46 end &67 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 1247,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1248,0 va (VaSet ) xt "30000,40000,36700,41000" st "dac_config_ready" blo "30000,40800" tm "WireNameMgr" ) ) on &28 ) *168 (Wire uid 1251,0 shape (OrthoPolyLine uid 1252,0 va (VaSet vasetType 3 ) xt "28750,35000,38250,35000" pts [ "28750,35000" "38250,35000" ] ) start &45 end &66 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 1253,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1254,0 va (VaSet ) xt "31000,34000,37400,35000" st "dac_config_start" blo "31000,34800" tm "WireNameMgr" ) ) on &29 ) *169 (Wire uid 1328,0 shape (OrthoPolyLine uid 1329,0 va (VaSet vasetType 3 lineWidth 2 ) xt "28750,32000,38250,32000" pts [ "38250,32000" "28750,32000" ] ) start &61 end &49 sat 32 eat 32 sty 1 st 0 sf 1 si 0 tg (WTG uid 1332,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1333,0 va (VaSet ) xt "31000,31000,36200,32000" st "dac_id : (2:0)" blo "31000,31800" tm "WireNameMgr" ) ) on &30 ) *170 (Wire uid 1336,0 shape (OrthoPolyLine uid 1337,0 va (VaSet vasetType 3 lineWidth 2 ) xt "28750,33000,38250,33000" pts [ "38250,33000" "28750,33000" ] ) start &62 end &50 sat 32 eat 32 sty 1 st 0 sf 1 si 0 tg (WTG uid 1340,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1341,0 va (VaSet ) xt "31000,32000,37300,33000" st "sensor_id : (1:0)" blo "31000,32800" tm "WireNameMgr" ) ) on &31 ) *171 (Wire uid 1344,0 shape (OrthoPolyLine uid 1345,0 va (VaSet vasetType 3 ) xt "28750,36000,38250,36000" pts [ "28750,36000" "38250,36000" ] ) start &47 end &68 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 1348,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1349,0 va (VaSet ) xt "31000,35000,36000,36000" st "sensor_start" blo "31000,35800" tm "WireNameMgr" ) ) on &32 ) *172 (Wire uid 1352,0 shape (OrthoPolyLine uid 1353,0 va (VaSet vasetType 3 ) xt "28750,42000,38250,42000" pts [ "38250,42000" "28750,42000" ] ) start &69 end &48 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 1356,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1357,0 va (VaSet ) xt "31000,41000,36000,42000" st "sensor_valid" blo "31000,41800" tm "WireNameMgr" ) ) on &33 ) *173 (Wire uid 1598,0 shape (OrthoPolyLine uid 1599,0 va (VaSet vasetType 3 lineWidth 2 ) xt "6000,38000,10250,38000" pts [ "10250,38000" "6000,38000" ] ) start &44 end &34 sat 32 eat 32 sty 1 stc 0 st 0 sf 1 si 0 tg (WTG uid 1600,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1601,0 va (VaSet isHidden 1 ) xt "5250,41000,10450,42000" st "sensor_array" blo "5250,41800" tm "WireNameMgr" ) ) on &36 ) *174 (Wire uid 1604,0 shape (OrthoPolyLine uid 1605,0 va (VaSet vasetType 3 ) xt "6000,37000,10250,37000" pts [ "10250,37000" "6000,37000" ] ) start &42 end &35 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 1606,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 1607,0 va (VaSet isHidden 1 ) xt "4250,44000,9550,45000" st "sensor_ready" blo "4250,44800" tm "WireNameMgr" ) ) on &37 ) *175 (Wire uid 2002,0 shape (OrthoPolyLine uid 2003,0 va (VaSet vasetType 3 ) xt "34000,31000,38250,31000" pts [ "34000,31000" "38250,31000" ] ) end &60 sat 16 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 2004,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 2005,0 va (VaSet ) xt "35000,30000,36700,31000" st "sclk" blo "35000,30800" tm "WireNameMgr" ) ) on &12 ) *176 (Wire uid 2357,0 shape (OrthoPolyLine uid 2358,0 va (VaSet vasetType 3 ) xt "55750,32000,57000,32000" pts [ "55750,32000" "57000,32000" ] ) start &70 end &78 es 0 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 2361,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 2362,0 va (VaSet isHidden 1 ) xt "57000,38000,59000,39000" st "mosi" blo "57000,38800" tm "WireNameMgr" ) ) on &77 ) *177 (Wire uid 2631,0 shape (OrthoPolyLine uid 2632,0 va (VaSet vasetType 3 ) xt "30000,18000,34250,18000" pts [ "30000,18000" "34250,18000" ] ) end &87 sat 16 eat 32 st 0 sf 1 si 0 tg (WTG uid 2635,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 2636,0 va (VaSet ) xt "32000,17000,33700,18000" st "sclk" blo "32000,17800" tm "WireNameMgr" ) ) on &12 ) *178 (Wire uid 2732,0 shape (OrthoPolyLine uid 2733,0 va (VaSet vasetType 3 ) xt "43750,18000,48000,18000" pts [ "43750,18000" "48000,18000" ] ) start &88 sat 32 eat 16 st 0 sf 1 si 0 tg (WTG uid 2736,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 2737,0 va (VaSet ) xt "45000,17000,50900,18000" st "T_sensor_start" blo "45000,17800" tm "WireNameMgr" ) ) on &92 ) *179 (Wire uid 2828,0 shape (OrthoPolyLine uid 2829,0 va (VaSet vasetType 3 ) xt "6000,40000,10250,40000" pts [ "10250,40000" "6000,40000" ] ) start &52 end &94 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 2832,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 2833,0 va (VaSet isHidden 1 ) xt "7000,39000,13900,40000" st "current_dac_array" blo "7000,39800" tm "WireNameMgr" ) ) on &93 ) *180 (Wire uid 2976,0 shape (OrthoPolyLine uid 2977,0 va (VaSet vasetType 3 ) xt "44750,10000,79000,11000" pts [ "44750,10000" "76000,10000" "76000,11000" "79000,11000" ] ) start &82 end &99 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 2978,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 2979,0 va (VaSet ) xt "46750,9000,50350,10000" st "clk_2Mhz" blo "46750,9800" tm "WireNameMgr" ) ) on &113 ) *181 (Wire uid 3004,0 shape (OrthoPolyLine uid 3005,0 va (VaSet vasetType 3 ) xt "55000,15000,63000,15000" pts [ "55000,15000" "63000,15000" ] ) start &115 end &124 es 0 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 3008,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3009,0 va (VaSet isHidden 1 ) xt "57000,14000,62300,15000" st "sclk_enable_i" blo "57000,14800" tm "WireNameMgr" ) ) on &116 ) *182 (Wire uid 3018,0 shape (OrthoPolyLine uid 3019,0 va (VaSet vasetType 3 ) xt "28750,46000,32000,50000" pts [ "28750,46000" "32000,50000" ] ) start &53 sat 32 eat 16 st 0 sf 1 si 0 tg (WTG uid 3022,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3023,0 va (VaSet ) xt "32000,49000,40200,50000" st "sclk_enable_override" blo "32000,49800" tm "WireNameMgr" ) ) on &117 ) *183 (Wire uid 3024,0 shape (OrthoPolyLine uid 3025,0 va (VaSet vasetType 3 ) xt "54000,17000,63000,17000" pts [ "63000,17000" "54000,17000" ] ) start &119 sat 32 eat 16 st 0 sf 1 si 0 tg (WTG uid 3030,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3031,0 va (VaSet ) xt "54000,16000,62200,17000" st "sclk_enable_override" blo "54000,16800" tm "WireNameMgr" ) ) on &117 ) *184 (Wire uid 3079,0 shape (OrthoPolyLine uid 3080,0 va (VaSet vasetType 3 ) xt "69000,13000,79000,16000" pts [ "69000,16000" "72000,16000" "72000,13000" "79000,13000" ] ) start &121 end &101 sat 32 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 3083,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3084,0 va (VaSet ) xt "72000,12000,78200,13000" st "sclk_enable_sig" blo "72000,12800" tm "WireNameMgr" ) ) on &114 ) *185 (Wire uid 3155,0 shape (OrthoPolyLine uid 3156,0 va (VaSet vasetType 3 ) xt "7000,32000,10250,32000" pts [ "7000,32000" "10250,32000" ] ) end &39 sat 16 eat 32 stc 0 st 0 sf 1 si 0 tg (WTG uid 3161,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3162,0 va (VaSet ) xt "8000,31000,9900,32000" st "sclk" blo "8000,31800" tm "WireNameMgr" ) ) on &12 ) *186 (Wire uid 3173,0 shape (OrthoPolyLine uid 3174,0 va (VaSet vasetType 3 ) xt "28750,43000,38250,43000" pts [ "38250,43000" "28750,43000" ] ) start &72 end &54 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 3175,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3176,0 va (VaSet ) xt "29250,42000,36950,43000" st "spi_channel_ready" blo "29250,42800" tm "WireNameMgr" ) ) on &141 ) *187 (Wire uid 3259,0 optionalChildren [ *188 (BdJunction uid 3353,0 ps "OnConnectorStrategy" shape (Circle uid 3354,0 va (VaSet vasetType 1 ) xt "35600,43600,36400,44400" radius 400 ) ) ] shape (OrthoPolyLine uid 3260,0 va (VaSet vasetType 3 ) xt "28750,44000,38250,44000" pts [ "38250,44000" "28750,44000" ] ) start &73 end &55 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG uid 3261,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3262,0 va (VaSet ) xt "25250,43000,37450,44000" st "measured_temp_data : (15:0)" blo "25250,43800" tm "WireNameMgr" ) ) on &142 ) *189 (Wire uid 3273,0 shape (OrthoPolyLine uid 3274,0 va (VaSet vasetType 3 lineWidth 2 ) xt "34000,44000,84000,58000" pts [ "38000,54000" "34000,54000" "34000,58000" "74000,58000" "74000,44000" "84000,44000" ] ) start &147 end &143 sat 32 eat 32 sty 1 stc 0 st 0 sf 1 si 0 tg (WTG uid 3277,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3278,0 va (VaSet isHidden 1 ) xt "37000,53000,42600,54000" st "debug_16bit" blo "37000,53800" tm "WireNameMgr" ) ) on &157 ) *190 (Wire uid 3349,0 shape (OrthoPolyLine uid 3350,0 va (VaSet vasetType 3 lineWidth 2 ) xt "36000,44000,42000,54000" pts [ "36000,44000" "36000,51000" "42000,51000" "42000,54000" "41000,54000" ] ) start &188 end &145 sat 32 eat 32 sty 1 stc 0 st 0 sf 1 si 0 tg (WTG uid 3351,0 ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text uid 3352,0 va (VaSet ) xt "43000,53000,51900,54000" st "measured_temp_data" blo "43000,53800" tm "WireNameMgr" ) ) on &142 ) ] bg "65535,65535,65535" grid (Grid origin "0,0" isVisible 1 isActive 1 xSpacing 1000 xySpacing 1000 xShown 1 yShown 1 color "26368,26368,26368" ) packageList *191 (PackageList uid 41,0 stg "VerticalLayoutStrategy" textVec [ *192 (Text uid 42,0 va (VaSet font "arial,8,1" ) xt "-4000,1000,1400,2000" st "Package List" blo "-4000,1800" ) *193 (MLText uid 43,0 va (VaSet ) xt "-4000,2000,12100,9000" st "LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_arith.all; USE ieee.std_logic_unsigned.all; LIBRARY FACT_FAD_lib; USE FACT_FAD_lib.fad_definitions.all; USE IEEE.NUMERIC_STD.ALL;" tm "PackageList" ) ] ) compDirBlock (MlTextGroup uid 44,0 stg "VerticalLayoutStrategy" textVec [ *194 (Text uid 45,0 va (VaSet isHidden 1 font "Arial,8,1" ) xt "20000,0,28100,1000" st "Compiler Directives" blo "20000,800" ) *195 (Text uid 46,0 va (VaSet isHidden 1 font "Arial,8,1" ) xt "20000,1000,29600,2000" st "Pre-module directives:" blo "20000,1800" ) *196 (MLText uid 47,0 va (VaSet isHidden 1 ) xt "20000,2000,28200,4000" st "`resetall `timescale 1ns/10ps" tm "BdCompilerDirectivesTextMgr" ) *197 (Text uid 48,0 va (VaSet isHidden 1 font "Arial,8,1" ) xt "20000,4000,30100,5000" st "Post-module directives:" blo "20000,4800" ) *198 (MLText uid 49,0 va (VaSet isHidden 1 ) xt "20000,0,20000,0" tm "BdCompilerDirectivesTextMgr" ) *199 (Text uid 50,0 va (VaSet isHidden 1 font "Arial,8,1" ) xt "20000,5000,29900,6000" st "End-module directives:" blo "20000,5800" ) *200 (MLText uid 51,0 va (VaSet isHidden 1 ) xt "20000,6000,20000,6000" tm "BdCompilerDirectivesTextMgr" ) ] associable 1 ) windowSize "0,22,1681,1050" viewArea "500,12900,94068,69604" cachedDiagramExtent "-5000,0,92900,58000" pageSetupInfo (PageSetupInfo ptrCmd "\\\\printer\\hpk_e25,winspool," fileName "Samba Printer Port" toPrinter 1 numCopies 2 paperWidth 1077 paperHeight 761 windowsPaperWidth 1077 windowsPaperHeight 761 paperType "A4" windowsPaperName "A4" windowsPaperType 9 exportedDirectories [ "$HDS_PROJECT_DIR/HTMLExport" ] exportStdIncludeRefs 1 exportStdPackageRefs 1 ) hasePageBreakOrigin 1 pageBreakOrigin "-5000,0" lastUid 3428,0 defaultCommentText (CommentText shape (Rectangle layer 0 va (VaSet vasetType 1 fg "65280,65280,46080" lineColor "0,0,32768" ) xt "0,0,15000,5000" ) text (MLText va (VaSet fg "0,0,32768" ) xt "200,200,2400,1200" st " Text " tm "CommentText" wrapOption 3 visibleHeight 4600 visibleWidth 14600 ) ) defaultPanel (Panel shape (RectFrame va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "32768,0,0" lineWidth 2 ) xt "0,0,20000,20000" ) title (TextAssociate ps "TopLeftStrategy" text (Text va (VaSet font "Arial,8,1" ) xt "1000,1000,3800,2000" st "Panel0" blo "1000,1800" tm "PanelText" ) ) ) defaultBlk (Blk shape (Rectangle va (VaSet vasetType 1 fg "39936,56832,65280" lineColor "0,0,32768" lineWidth 2 ) xt "0,0,8000,10000" ) ttg (MlTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *201 (Text va (VaSet font "Arial,8,1" ) xt "2200,3500,5800,4500" st "" blo "2200,4300" tm "BdLibraryNameMgr" ) *202 (Text va (VaSet font "Arial,8,1" ) xt "2200,4500,5600,5500" st "" blo "2200,5300" tm "BlkNameMgr" ) *203 (Text va (VaSet font "Arial,8,1" ) xt "2200,5500,3200,6500" st "I0" blo "2200,6300" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation ps "EdgeToEdgeStrategy" matrix (Matrix text (MLText va (VaSet font "Courier New,8,0" ) xt "2200,13500,2200,13500" ) header "" ) elements [ ] ) viewicon (ZoomableIcon sl 0 va (VaSet vasetType 1 fg "49152,49152,49152" ) xt "0,0,1500,1500" iconName "UnknownFile.png" iconMaskName "UnknownFile.msk" ) viewiconposition 0 ) defaultMWComponent (MWC shape (Rectangle va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "0,0,8000,10000" ) ttg (MlTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *204 (Text va (VaSet font "Arial,8,1" ) xt "550,3500,3450,4500" st "Library" blo "550,4300" ) *205 (Text va (VaSet font "Arial,8,1" ) xt "550,4500,7450,5500" st "MWComponent" blo "550,5300" ) *206 (Text va (VaSet font "Arial,8,1" ) xt "550,5500,1550,6500" st "I0" blo "550,6300" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation ps "EdgeToEdgeStrategy" matrix (Matrix text (MLText va (VaSet font "Courier New,8,0" ) xt "-6450,1500,-6450,1500" ) header "" ) elements [ ] ) portVis (PortSigDisplay ) prms (Property pclass "params" pname "params" ptn "String" ) visOptions (mwParamsVisibilityOptions ) ) defaultSaComponent (SaComponent shape (Rectangle va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "0,0,8000,10000" ) ttg (MlTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *207 (Text va (VaSet font "Arial,8,1" ) xt "900,3500,3800,4500" st "Library" blo "900,4300" tm "BdLibraryNameMgr" ) *208 (Text va (VaSet font "Arial,8,1" ) xt "900,4500,7100,5500" st "SaComponent" blo "900,5300" tm "CptNameMgr" ) *209 (Text va (VaSet font "Arial,8,1" ) xt "900,5500,1900,6500" st "I0" blo "900,6300" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation ps "EdgeToEdgeStrategy" matrix (Matrix text (MLText va (VaSet font "Courier New,8,0" ) xt "-6100,1500,-6100,1500" ) header "" ) elements [ ] ) viewicon (ZoomableIcon sl 0 va (VaSet vasetType 1 fg "49152,49152,49152" ) xt "0,0,1500,1500" iconName "UnknownFile.png" iconMaskName "UnknownFile.msk" ) viewiconposition 0 portVis (PortSigDisplay ) archFileType "UNKNOWN" ) defaultVhdlComponent (VhdlComponent shape (Rectangle va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "0,0,8000,10000" ) ttg (MlTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *210 (Text va (VaSet font "Arial,8,1" ) xt "500,3500,3400,4500" st "Library" blo "500,4300" ) *211 (Text va (VaSet font "Arial,8,1" ) xt "500,4500,7500,5500" st "VhdlComponent" blo "500,5300" ) *212 (Text va (VaSet font "Arial,8,1" ) xt "500,5500,1500,6500" st "I0" blo "500,6300" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation ps "EdgeToEdgeStrategy" matrix (Matrix text (MLText va (VaSet font "Courier New,8,0" ) xt "-6500,1500,-6500,1500" ) header "" ) elements [ ] ) portVis (PortSigDisplay ) entityPath "" archName "" archPath "" ) defaultVerilogComponent (VerilogComponent shape (Rectangle va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "-450,0,8450,10000" ) ttg (MlTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *213 (Text va (VaSet font "Arial,8,1" ) xt "50,3500,2950,4500" st "Library" blo "50,4300" ) *214 (Text va (VaSet font "Arial,8,1" ) xt "50,4500,7950,5500" st "VerilogComponent" blo "50,5300" ) *215 (Text va (VaSet font "Arial,8,1" ) xt "50,5500,1050,6500" st "I0" blo "50,6300" tm "InstanceNameMgr" ) ] ) ga (GenericAssociation ps "EdgeToEdgeStrategy" matrix (Matrix text (MLText va (VaSet font "Courier New,8,0" ) xt "-6950,1500,-6950,1500" ) header "" ) elements [ ] ) entityPath "" ) defaultHdlText (HdlText shape (Rectangle va (VaSet vasetType 1 fg "65535,65535,37120" lineColor "0,0,32768" lineWidth 2 ) xt "0,0,8000,10000" ) ttg (MlTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *216 (Text va (VaSet font "Arial,8,1" ) xt "3150,4000,4850,5000" st "eb1" blo "3150,4800" tm "HdlTextNameMgr" ) *217 (Text va (VaSet font "Arial,8,1" ) xt "3150,5000,3950,6000" st "1" blo "3150,5800" tm "HdlTextNumberMgr" ) ] ) viewicon (ZoomableIcon sl 0 va (VaSet vasetType 1 fg "49152,49152,49152" ) xt "0,0,1500,1500" iconName "UnknownFile.png" iconMaskName "UnknownFile.msk" ) viewiconposition 0 ) defaultEmbeddedText (EmbeddedText commentText (CommentText ps "CenterOffsetStrategy" shape (Rectangle va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "0,0,32768" lineWidth 2 ) xt "0,0,18000,5000" ) text (MLText va (VaSet ) xt "200,200,2400,1200" st " Text " tm "HdlTextMgr" wrapOption 3 visibleHeight 4600 visibleWidth 17600 ) ) ) defaultGlobalConnector (GlobalConnector shape (Circle va (VaSet vasetType 1 fg "65535,65535,0" ) xt "-1000,-1000,1000,1000" radius 1000 ) name (Text va (VaSet font "Arial,8,1" ) xt "-500,-500,500,500" st "G" blo "-500,300" ) ) defaultRipper (Ripper ps "OnConnectorStrategy" shape (Line2D pts [ "0,0" "1000,1000" ] va (VaSet vasetType 1 ) xt "0,0,1000,1000" ) ) defaultBdJunction (BdJunction ps "OnConnectorStrategy" shape (Circle va (VaSet vasetType 1 ) xt "-400,-400,400,400" radius 400 ) ) defaultPortIoIn (PortIoIn shape (CompositeShape va (VaSet vasetType 1 fg "0,0,32768" ) optionalChildren [ (Pentagon sl 0 ro 270 xt "-2000,-375,-500,375" ) (Line sl 0 ro 270 xt "-500,0,0,0" pts [ "-500,0" "0,0" ] ) ] ) stc 0 sf 1 tg (WTG ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text va (VaSet ) xt "-1375,-1000,-1375,-1000" ju 2 blo "-1375,-1000" tm "WireNameMgr" ) ) ) defaultPortIoOut (PortIoOut shape (CompositeShape va (VaSet vasetType 1 fg "0,0,32768" ) optionalChildren [ (Pentagon sl 0 ro 270 xt "500,-375,2000,375" ) (Line sl 0 ro 270 xt "0,0,500,0" pts [ "0,0" "500,0" ] ) ] ) stc 0 sf 1 tg (WTG ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text va (VaSet ) xt "625,-1000,625,-1000" blo "625,-1000" tm "WireNameMgr" ) ) ) defaultPortIoInOut (PortIoInOut shape (CompositeShape va (VaSet vasetType 1 fg "0,0,32768" ) optionalChildren [ (Hexagon sl 0 xt "500,-375,2000,375" ) (Line sl 0 xt "0,0,500,0" pts [ "0,0" "500,0" ] ) ] ) stc 0 sf 1 tg (WTG ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text va (VaSet ) xt "0,-375,0,-375" blo "0,-375" tm "WireNameMgr" ) ) ) defaultPortIoBuffer (PortIoBuffer shape (CompositeShape va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "0,0,32768" ) optionalChildren [ (Hexagon sl 0 xt "500,-375,2000,375" ) (Line sl 0 xt "0,0,500,0" pts [ "0,0" "500,0" ] ) ] ) stc 0 sf 1 tg (WTG ps "PortIoTextPlaceStrategy" stg "STSignalDisplayStrategy" f (Text va (VaSet ) xt "0,-375,0,-375" blo "0,-375" tm "WireNameMgr" ) ) ) defaultSignal (Wire shape (OrthoPolyLine va (VaSet vasetType 3 ) pts [ "0,0" "0,0" ] ) ss 0 es 0 sat 32 eat 32 st 0 sf 1 si 0 tg (WTG ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text va (VaSet ) xt "0,0,1900,1000" st "sig0" blo "0,800" tm "WireNameMgr" ) ) ) defaultBus (Wire shape (OrthoPolyLine va (VaSet vasetType 3 lineWidth 2 ) pts [ "0,0" "0,0" ] ) ss 0 es 0 sat 32 eat 32 sty 1 st 0 sf 1 si 0 tg (WTG ps "ConnStartEndStrategy" stg "STSignalDisplayStrategy" f (Text va (VaSet ) xt "0,0,2400,1000" st "dbus0" blo "0,800" tm "WireNameMgr" ) ) ) defaultBundle (Bundle shape (OrthoPolyLine va (VaSet vasetType 3 lineColor "32768,0,0" lineWidth 2 ) pts [ "0,0" "0,0" ] ) ss 0 es 0 sat 32 eat 32 textGroup (BiTextGroup ps "ConnStartEndStrategy" stg "VerticalLayoutStrategy" first (Text va (VaSet ) xt "0,0,3000,1000" st "bundle0" blo "0,800" tm "BundleNameMgr" ) second (MLText va (VaSet ) xt "0,1000,1000,2000" st "()" tm "BundleContentsMgr" ) ) bundleNet &0 ) defaultPortMapFrame (PortMapFrame ps "PortMapFrameStrategy" shape (RectFrame va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "0,0,32768" lineWidth 2 ) xt "0,0,10000,12000" ) portMapText (BiTextGroup ps "BottomRightOffsetStrategy" stg "VerticalLayoutStrategy" first (MLText va (VaSet ) ) second (MLText va (VaSet ) tm "PortMapTextMgr" ) ) ) defaultGenFrame (Frame shape (RectFrame va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "26368,26368,26368" lineStyle 2 lineWidth 2 ) xt "0,0,20000,20000" ) title (TextAssociate ps "TopLeftStrategy" text (MLText va (VaSet ) xt "0,-1100,12900,-100" st "g0: FOR i IN 0 TO n GENERATE" tm "FrameTitleTextMgr" ) ) seqNum (FrameSequenceNumber ps "TopLeftStrategy" shape (Rectangle va (VaSet vasetType 1 fg "65535,65535,65535" ) xt "50,50,1250,1450" ) num (Text va (VaSet ) xt "250,250,1050,1250" st "1" blo "250,1050" tm "FrameSeqNumMgr" ) ) decls (MlTextGroup ps "BottomRightOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *218 (Text va (VaSet font "Arial,8,1" ) xt "14100,20000,22000,21000" st "Frame Declarations" blo "14100,20800" ) *219 (MLText va (VaSet ) xt "14100,21000,14100,21000" tm "BdFrameDeclTextMgr" ) ] ) ) defaultBlockFrame (Frame shape (RectFrame va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "26368,26368,26368" lineStyle 1 lineWidth 2 ) xt "0,0,20000,20000" ) title (TextAssociate ps "TopLeftStrategy" text (MLText va (VaSet ) xt "0,-1100,7700,-100" st "b0: BLOCK (guard)" tm "FrameTitleTextMgr" ) ) seqNum (FrameSequenceNumber ps "TopLeftStrategy" shape (Rectangle va (VaSet vasetType 1 fg "65535,65535,65535" ) xt "50,50,1250,1450" ) num (Text va (VaSet ) xt "250,250,1050,1250" st "1" blo "250,1050" tm "FrameSeqNumMgr" ) ) decls (MlTextGroup ps "BottomRightOffsetStrategy" stg "VerticalLayoutStrategy" textVec [ *220 (Text va (VaSet font "Arial,8,1" ) xt "14100,20000,22000,21000" st "Frame Declarations" blo "14100,20800" ) *221 (MLText va (VaSet ) xt "14100,21000,14100,21000" tm "BdFrameDeclTextMgr" ) ] ) style 3 ) defaultSaCptPort (CptPort ps "OnEdgeStrategy" shape (Triangle ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "0,0,750,750" ) tg (CPTG ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text va (VaSet ) xt "0,750,1800,1750" st "Port" blo "0,1550" ) ) thePort (LogicalPort decl (Decl n "Port" t "" o 0 ) ) ) defaultSaCptPortBuffer (CptPort ps "OnEdgeStrategy" shape (Diamond va (VaSet vasetType 1 fg "65535,65535,65535" ) xt "0,0,750,750" ) tg (CPTG ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text va (VaSet ) xt "0,750,1800,1750" st "Port" blo "0,1550" ) ) thePort (LogicalPort m 3 decl (Decl n "Port" t "" o 0 ) ) ) defaultDeclText (MLText va (VaSet font "Courier New,8,0" ) ) archDeclarativeBlock (BdArchDeclBlock uid 1,0 stg "BdArchDeclBlockLS" declLabel (Text uid 2,0 va (VaSet font "Arial,8,1" ) xt "-4000,9600,1400,10600" st "Declarations" blo "-4000,10400" ) portLabel (Text uid 3,0 va (VaSet font "Arial,8,1" ) xt "-4000,10600,-1300,11600" st "Ports:" blo "-4000,11400" ) preUserLabel (Text uid 4,0 va (VaSet isHidden 1 font "Arial,8,1" ) xt "-4000,9600,-200,10600" st "Pre User:" blo "-4000,10400" ) preUserText (MLText uid 5,0 va (VaSet isHidden 1 font "Courier New,8,0" ) xt "-4000,9600,-4000,9600" tm "BdDeclarativeTextMgr" ) diagSignalLabel (Text uid 6,0 va (VaSet font "Arial,8,1" ) xt "-4000,22800,3100,23800" st "Diagram Signals:" blo "-4000,23600" ) postUserLabel (Text uid 7,0 va (VaSet isHidden 1 font "Arial,8,1" ) xt "-4000,9600,700,10600" st "Post User:" blo "-4000,10400" ) postUserText (MLText uid 8,0 va (VaSet isHidden 1 font "Courier New,8,0" ) xt "-4000,9600,-4000,9600" tm "BdDeclarativeTextMgr" ) showAttributes 1 ) commonDM (CommonDM ldm (LogicalDM suid 68,0 usingSuid 1 emptyRow *222 (LEmptyRow ) uid 54,0 optionalChildren [ *223 (RefLabelRowHdr ) *224 (TitleRowHdr ) *225 (FilterRowHdr ) *226 (RefLabelColHdr tm "RefLabelColHdrMgr" ) *227 (RowExpandColHdr tm "RowExpandColHdrMgr" ) *228 (GroupColHdr tm "GroupColHdrMgr" ) *229 (NameColHdr tm "BlockDiagramNameColHdrMgr" ) *230 (ModeColHdr tm "BlockDiagramModeColHdrMgr" ) *231 (TypeColHdr tm "BlockDiagramTypeColHdrMgr" ) *232 (BoundsColHdr tm "BlockDiagramBoundsColHdrMgr" ) *233 (InitColHdr tm "BlockDiagramInitColHdrMgr" ) *234 (EolColHdr tm "BlockDiagramEolColHdrMgr" ) *235 (LeafLogPort port (LogicalPort m 1 decl (Decl n "sclk" t "std_logic" o 6 suid 1,0 ) ) uid 390,0 ) *236 (LeafLogPort port (LogicalPort decl (Decl n "clk_50MHz" t "std_logic" preAdd 0 posAdd 0 o 1 suid 2,0 ) ) uid 392,0 ) *237 (LeafLogPort port (LogicalPort m 1 decl (Decl n "dac_cs" t "std_logic" o 5 suid 5,0 ) ) uid 398,0 ) *238 (LeafLogPort port (LogicalPort m 1 decl (Decl n "sensor_cs" t "std_logic_vector" b "(3 DOWNTO 0)" o 8 suid 6,0 ) ) uid 400,0 ) *239 (LeafLogPort port (LogicalPort m 4 decl (Decl n "data" t "std_logic_vector" b "(15 downto 0)" o 14 suid 14,0 ) ) uid 497,0 ) *240 (LeafLogPort port (LogicalPort decl (Decl n "dac_array" t "dac_array_type" o 3 suid 17,0 ) ) uid 499,0 ) *241 (LeafLogPort port (LogicalPort decl (Decl n "config_start" t "std_logic" o 2 suid 27,0 ) ) uid 1255,0 ) *242 (LeafLogPort port (LogicalPort m 1 decl (Decl n "config_ready" t "std_logic" o 4 suid 28,0 ) ) uid 1257,0 ) *243 (LeafLogPort port (LogicalPort m 4 decl (Decl n "dac_config_ready" t "std_logic" o 11 suid 30,0 ) ) uid 1259,0 ) *244 (LeafLogPort port (LogicalPort m 4 decl (Decl n "dac_config_start" t "std_logic" o 12 suid 31,0 ) ) uid 1261,0 ) *245 (LeafLogPort port (LogicalPort m 4 decl (Decl n "dac_id" t "std_logic_vector" b "(2 DOWNTO 0)" o 13 suid 32,0 ) ) uid 1358,0 ) *246 (LeafLogPort port (LogicalPort m 4 decl (Decl n "sensor_id" t "std_logic_vector" b "(1 DOWNTO 0)" o 15 suid 33,0 ) ) uid 1360,0 ) *247 (LeafLogPort port (LogicalPort m 4 decl (Decl n "sensor_start" t "std_logic" o 16 suid 34,0 ) ) uid 1362,0 ) *248 (LeafLogPort port (LogicalPort m 4 decl (Decl n "sensor_valid" t "std_logic" o 17 suid 35,0 ) ) uid 1364,0 ) *249 (LeafLogPort port (LogicalPort m 1 decl (Decl n "sensor_array" t "sensor_array_type" o 7 suid 37,0 ) ) uid 1608,0 ) *250 (LeafLogPort port (LogicalPort m 1 decl (Decl n "sensor_ready" t "std_logic" o 9 suid 38,0 ) ) uid 1610,0 ) *251 (LeafLogPort port (LogicalPort m 1 decl (Decl n "mosi" t "std_logic" o 19 suid 46,0 i "'0'" ) ) uid 2369,0 ) *252 (LeafLogPort port (LogicalPort m 2 decl (Decl n "miso" t "std_logic" preAdd 0 posAdd 0 o 10 suid 47,0 ) ) uid 2404,0 ) *253 (LeafLogPort port (LogicalPort m 4 decl (Decl n "T_sensor_start" t "std_logic" o 6 suid 52,0 ) ) uid 2748,0 ) *254 (LeafLogPort port (LogicalPort lang 10 m 1 decl (Decl n "current_dac_array" t "dac_array_type" o 21 suid 55,0 i "( others => 0)" ) ) uid 2840,0 ) *255 (LeafLogPort port (LogicalPort m 4 decl (Decl n "clk_2Mhz" t "std_logic" o 21 suid 58,0 i "'0'" ) ) uid 2992,0 ) *256 (LeafLogPort port (LogicalPort m 4 decl (Decl n "sclk_enable_sig" t "std_logic" o 22 suid 60,0 i "'0'" ) ) uid 2994,0 ) *257 (LeafLogPort port (LogicalPort decl (Decl n "sclk_enable_i" t "std_logic" o 23 suid 61,0 ) ) uid 2996,0 scheme 0 ) *258 (LeafLogPort port (LogicalPort m 4 decl (Decl n "sclk_enable_override" t "std_logic" o 24 suid 62,0 i "'0'" ) ) uid 3085,0 ) *259 (LeafLogPort port (LogicalPort m 4 decl (Decl n "spi_channel_ready" t "std_logic" o 25 suid 65,0 i "'1'" ) ) uid 3177,0 ) *260 (LeafLogPort port (LogicalPort m 4 decl (Decl n "measured_temp_data" t "std_logic_vector" b "(15 DOWNTO 0)" o 26 suid 66,0 i "(others => '0')" ) ) uid 3263,0 ) *261 (LeafLogPort port (LogicalPort m 1 decl (Decl n "debug_16bit" t "std_logic_vector" b "( 15 DOWNTO 0 )" o 27 suid 68,0 ) ) uid 3392,0 ) ] ) pdm (PhysicalDM displayShortBounds 1 editShortBounds 1 uid 67,0 optionalChildren [ *262 (Sheet sheetRow (SheetRow headerVa (MVa cellColor "49152,49152,49152" fontColor "0,0,0" font "Tahoma,10,0" ) cellVa (MVa cellColor "65535,65535,65535" fontColor "0,0,0" font "Tahoma,10,0" ) groupVa (MVa cellColor "39936,56832,65280" fontColor "0,0,0" font "Tahoma,10,0" ) emptyMRCItem *263 (MRCItem litem &222 pos 27 dimension 20 ) uid 69,0 optionalChildren [ *264 (MRCItem litem &223 pos 0 dimension 20 uid 70,0 ) *265 (MRCItem litem &224 pos 1 dimension 23 uid 71,0 ) *266 (MRCItem litem &225 pos 2 hidden 1 dimension 20 uid 72,0 ) *267 (MRCItem litem &235 pos 0 dimension 20 uid 391,0 ) *268 (MRCItem litem &236 pos 1 dimension 20 uid 393,0 ) *269 (MRCItem litem &237 pos 2 dimension 20 uid 399,0 ) *270 (MRCItem litem &238 pos 3 dimension 20 uid 401,0 ) *271 (MRCItem litem &239 pos 9 dimension 20 uid 498,0 ) *272 (MRCItem litem &240 pos 4 dimension 20 uid 500,0 ) *273 (MRCItem litem &241 pos 5 dimension 20 uid 1256,0 ) *274 (MRCItem litem &242 pos 6 dimension 20 uid 1258,0 ) *275 (MRCItem litem &243 pos 10 dimension 20 uid 1260,0 ) *276 (MRCItem litem &244 pos 11 dimension 20 uid 1262,0 ) *277 (MRCItem litem &245 pos 12 dimension 20 uid 1359,0 ) *278 (MRCItem litem &246 pos 13 dimension 20 uid 1361,0 ) *279 (MRCItem litem &247 pos 14 dimension 20 uid 1363,0 ) *280 (MRCItem litem &248 pos 15 dimension 20 uid 1365,0 ) *281 (MRCItem litem &249 pos 7 dimension 20 uid 1609,0 ) *282 (MRCItem litem &250 pos 8 dimension 20 uid 1611,0 ) *283 (MRCItem litem &251 pos 16 dimension 20 uid 2370,0 ) *284 (MRCItem litem &252 pos 17 dimension 20 uid 2405,0 ) *285 (MRCItem litem &253 pos 18 dimension 20 uid 2749,0 ) *286 (MRCItem litem &254 pos 19 dimension 20 uid 2841,0 ) *287 (MRCItem litem &255 pos 20 dimension 20 uid 2993,0 ) *288 (MRCItem litem &256 pos 21 dimension 20 uid 2995,0 ) *289 (MRCItem litem &257 pos 22 dimension 20 uid 2997,0 ) *290 (MRCItem litem &258 pos 23 dimension 20 uid 3086,0 ) *291 (MRCItem litem &259 pos 24 dimension 20 uid 3178,0 ) *292 (MRCItem litem &260 pos 25 dimension 20 uid 3264,0 ) *293 (MRCItem litem &261 pos 26 dimension 20 uid 3393,0 ) ] ) sheetCol (SheetCol propVa (MVa cellColor "0,49152,49152" fontColor "0,0,0" font "Tahoma,10,0" textAngle 90 ) uid 73,0 optionalChildren [ *294 (MRCItem litem &226 pos 0 dimension 20 uid 74,0 ) *295 (MRCItem litem &228 pos 1 dimension 50 uid 75,0 ) *296 (MRCItem litem &229 pos 2 dimension 100 uid 76,0 ) *297 (MRCItem litem &230 pos 3 dimension 50 uid 77,0 ) *298 (MRCItem litem &231 pos 4 dimension 100 uid 78,0 ) *299 (MRCItem litem &232 pos 5 dimension 100 uid 79,0 ) *300 (MRCItem litem &233 pos 6 dimension 50 uid 80,0 ) *301 (MRCItem litem &234 pos 7 dimension 80 uid 81,0 ) ] ) fixedCol 4 fixedRow 2 name "Ports" uid 68,0 vaOverrides [ ] ) ] ) uid 53,0 ) genericsCommonDM (CommonDM ldm (LogicalDM emptyRow *302 (LEmptyRow ) uid 83,0 optionalChildren [ *303 (RefLabelRowHdr ) *304 (TitleRowHdr ) *305 (FilterRowHdr ) *306 (RefLabelColHdr tm "RefLabelColHdrMgr" ) *307 (RowExpandColHdr tm "RowExpandColHdrMgr" ) *308 (GroupColHdr tm "GroupColHdrMgr" ) *309 (NameColHdr tm "GenericNameColHdrMgr" ) *310 (TypeColHdr tm "GenericTypeColHdrMgr" ) *311 (InitColHdr tm "GenericValueColHdrMgr" ) *312 (PragmaColHdr tm "GenericPragmaColHdrMgr" ) *313 (EolColHdr tm "GenericEolColHdrMgr" ) ] ) pdm (PhysicalDM displayShortBounds 1 editShortBounds 1 uid 95,0 optionalChildren [ *314 (Sheet sheetRow (SheetRow headerVa (MVa cellColor "49152,49152,49152" fontColor "0,0,0" font "Tahoma,10,0" ) cellVa (MVa cellColor "65535,65535,65535" fontColor "0,0,0" font "Tahoma,10,0" ) groupVa (MVa cellColor "39936,56832,65280" fontColor "0,0,0" font "Tahoma,10,0" ) emptyMRCItem *315 (MRCItem litem &302 pos 0 dimension 20 ) uid 97,0 optionalChildren [ *316 (MRCItem litem &303 pos 0 dimension 20 uid 98,0 ) *317 (MRCItem litem &304 pos 1 dimension 23 uid 99,0 ) *318 (MRCItem litem &305 pos 2 hidden 1 dimension 20 uid 100,0 ) ] ) sheetCol (SheetCol propVa (MVa cellColor "0,49152,49152" fontColor "0,0,0" font "Tahoma,10,0" textAngle 90 ) uid 101,0 optionalChildren [ *319 (MRCItem litem &306 pos 0 dimension 20 uid 102,0 ) *320 (MRCItem litem &308 pos 1 dimension 50 uid 103,0 ) *321 (MRCItem litem &309 pos 2 dimension 100 uid 104,0 ) *322 (MRCItem litem &310 pos 3 dimension 100 uid 105,0 ) *323 (MRCItem litem &311 pos 4 dimension 50 uid 106,0 ) *324 (MRCItem litem &312 pos 5 dimension 50 uid 107,0 ) *325 (MRCItem litem &313 pos 6 dimension 80 uid 108,0 ) ] ) fixedCol 3 fixedRow 2 name "Ports" uid 96,0 vaOverrides [ ] ) ] ) uid 82,0 type 1 ) activeModelName "BlockDiag" )