source: firmware/FAD/FACT_FAD_lib/hds/spi_interface/struct.bd.bak@ 19875

Last change on this file since 19875 was 11755, checked in by neise, 13 years ago
reinit of this svn repos .... it was all too messy deleted the old folders and restarted with FACT_FAD_lib only. (well and the testbenches)
File size: 97.1 KB
Line 
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1021uid 472,0
1022va (VaSet
1023vasetType 1
1024fg "0,0,32768"
1025)
1026optionalChildren [
1027(Pentagon
1028uid 473,0
1029sl 0
1030ro 270
1031xt "4000,35625,5500,36375"
1032)
1033(Line
1034uid 474,0
1035sl 0
1036ro 270
1037xt "5500,36000,6000,36000"
1038pts [
1039"5500,36000"
1040"6000,36000"
1041]
1042)
1043]
1044)
1045stc 0
1046sf 1
1047tg (WTG
1048uid 475,0
1049ps "PortIoTextPlaceStrategy"
1050stg "STSignalDisplayStrategy"
1051f (Text
1052uid 476,0
1053va (VaSet
1054)
1055xt "-1200,35500,3000,36500"
1056st "dac_array"
1057ju 2
1058blo "3000,36300"
1059tm "WireNameMgr"
1060)
1061)
1062)
1063*24 (Net
1064uid 487,0
1065decl (Decl
1066n "dac_array"
1067t "dac_array_type"
1068o 3
1069suid 17,0
1070)
1071declText (MLText
1072uid 488,0
1073va (VaSet
1074font "Courier New,8,0"
1075)
1076xt "-2000,13200,18000,14000"
1077st "dac_array : dac_array_type"
1078)
1079)
1080*25 (PortIoOut
1081uid 1148,0
1082shape (CompositeShape
1083uid 1149,0
1084va (VaSet
1085vasetType 1
1086fg "0,0,32768"
1087)
1088optionalChildren [
1089(Pentagon
1090uid 1150,0
1091sl 0
1092ro 90
1093xt "4000,33625,5500,34375"
1094)
1095(Line
1096uid 1151,0
1097sl 0
1098ro 90
1099xt "5500,34000,6000,34000"
1100pts [
1101"6000,34000"
1102"5500,34000"
1103]
1104)
1105]
1106)
1107stc 0
1108sf 1
1109tg (WTG
1110uid 1152,0
1111ps "PortIoTextPlaceStrategy"
1112stg "STSignalDisplayStrategy"
1113f (Text
1114uid 1153,0
1115va (VaSet
1116)
1117xt "-2700,33500,3000,34500"
1118st "config_ready"
1119ju 2
1120blo "3000,34300"
1121tm "WireNameMgr"
1122)
1123)
1124)
1125*26 (Net
1126uid 1225,0
1127decl (Decl
1128n "config_start"
1129t "std_logic"
1130o 2
1131suid 27,0
1132)
1133declText (MLText
1134uid 1226,0
1135va (VaSet
1136font "Courier New,8,0"
1137)
1138xt "-2000,12400,15500,13200"
1139st "config_start : std_logic"
1140)
1141)
1142*27 (Net
1143uid 1231,0
1144decl (Decl
1145n "config_ready"
1146t "std_logic"
1147o 4
1148suid 28,0
1149)
1150declText (MLText
1151uid 1232,0
1152va (VaSet
1153font "Courier New,8,0"
1154)
1155xt "-2000,14800,15500,15600"
1156st "config_ready : std_logic"
1157)
1158)
1159*28 (Net
1160uid 1243,0
1161decl (Decl
1162n "dac_config_ready"
1163t "std_logic"
1164o 11
1165suid 30,0
1166)
1167declText (MLText
1168uid 1244,0
1169va (VaSet
1170font "Courier New,8,0"
1171)
1172xt "-2000,25400,19000,26200"
1173st "SIGNAL dac_config_ready : std_logic"
1174)
1175)
1176*29 (Net
1177uid 1249,0
1178decl (Decl
1179n "dac_config_start"
1180t "std_logic"
1181o 12
1182suid 31,0
1183)
1184declText (MLText
1185uid 1250,0
1186va (VaSet
1187font "Courier New,8,0"
1188)
1189xt "-2000,26200,19000,27000"
1190st "SIGNAL dac_config_start : std_logic"
1191)
1192)
1193*30 (Net
1194uid 1326,0
1195decl (Decl
1196n "dac_id"
1197t "std_logic_vector"
1198b "(2 DOWNTO 0)"
1199o 13
1200suid 32,0
1201)
1202declText (MLText
1203uid 1327,0
1204va (VaSet
1205font "Courier New,8,0"
1206)
1207xt "-2000,27000,29000,27800"
1208st "SIGNAL dac_id : std_logic_vector(2 DOWNTO 0)"
1209)
1210)
1211*31 (Net
1212uid 1334,0
1213decl (Decl
1214n "sensor_id"
1215t "std_logic_vector"
1216b "(1 DOWNTO 0)"
1217o 15
1218suid 33,0
1219)
1220declText (MLText
1221uid 1335,0
1222va (VaSet
1223font "Courier New,8,0"
1224)
1225xt "-2000,31000,29000,31800"
1226st "SIGNAL sensor_id : std_logic_vector(1 DOWNTO 0)"
1227)
1228)
1229*32 (Net
1230uid 1342,0
1231decl (Decl
1232n "sensor_start"
1233t "std_logic"
1234o 16
1235suid 34,0
1236)
1237declText (MLText
1238uid 1343,0
1239va (VaSet
1240font "Courier New,8,0"
1241)
1242xt "-2000,31800,19000,32600"
1243st "SIGNAL sensor_start : std_logic"
1244)
1245)
1246*33 (Net
1247uid 1350,0
1248decl (Decl
1249n "sensor_valid"
1250t "std_logic"
1251o 17
1252suid 35,0
1253)
1254declText (MLText
1255uid 1351,0
1256va (VaSet
1257font "Courier New,8,0"
1258)
1259xt "-2000,32600,19000,33400"
1260st "SIGNAL sensor_valid : std_logic"
1261)
1262)
1263*34 (PortIoOut
1264uid 1576,0
1265shape (CompositeShape
1266uid 1577,0
1267va (VaSet
1268vasetType 1
1269fg "0,0,32768"
1270)
1271optionalChildren [
1272(Pentagon
1273uid 1578,0
1274sl 0
1275ro 90
1276xt "4000,37625,5500,38375"
1277)
1278(Line
1279uid 1579,0
1280sl 0
1281ro 90
1282xt "5500,38000,6000,38000"
1283pts [
1284"6000,38000"
1285"5500,38000"
1286]
1287)
1288]
1289)
1290stc 0
1291sf 1
1292tg (WTG
1293uid 1580,0
1294ps "PortIoTextPlaceStrategy"
1295stg "STSignalDisplayStrategy"
1296f (Text
1297uid 1581,0
1298va (VaSet
1299)
1300xt "-2800,37500,3000,38500"
1301st "sensor_array"
1302ju 2
1303blo "3000,38300"
1304tm "WireNameMgr"
1305)
1306)
1307)
1308*35 (PortIoOut
1309uid 1582,0
1310shape (CompositeShape
1311uid 1583,0
1312va (VaSet
1313vasetType 1
1314fg "0,0,32768"
1315)
1316optionalChildren [
1317(Pentagon
1318uid 1584,0
1319sl 0
1320ro 90
1321xt "4000,36625,5500,37375"
1322)
1323(Line
1324uid 1585,0
1325sl 0
1326ro 90
1327xt "5500,37000,6000,37000"
1328pts [
1329"6000,37000"
1330"5500,37000"
1331]
1332)
1333]
1334)
1335stc 0
1336sf 1
1337tg (WTG
1338uid 1586,0
1339ps "PortIoTextPlaceStrategy"
1340stg "STSignalDisplayStrategy"
1341f (Text
1342uid 1587,0
1343va (VaSet
1344)
1345xt "-2900,36500,3000,37500"
1346st "sensor_ready"
1347ju 2
1348blo "3000,37300"
1349tm "WireNameMgr"
1350)
1351)
1352)
1353*36 (Net
1354uid 1596,0
1355decl (Decl
1356n "sensor_array"
1357t "sensor_array_type"
1358o 7
1359suid 37,0
1360)
1361declText (MLText
1362uid 1597,0
1363va (VaSet
1364font "Courier New,8,0"
1365)
1366xt "-2000,19600,20000,20400"
1367st "sensor_array : sensor_array_type"
1368)
1369)
1370*37 (Net
1371uid 1602,0
1372decl (Decl
1373n "sensor_ready"
1374t "std_logic"
1375o 9
1376suid 38,0
1377)
1378declText (MLText
1379uid 1603,0
1380va (VaSet
1381font "Courier New,8,0"
1382)
1383xt "-2000,21200,15500,22000"
1384st "sensor_ready : std_logic"
1385)
1386)
1387*38 (SaComponent
1388uid 2195,0
1389optionalChildren [
1390*39 (CptPort
1391uid 2143,0
1392ps "OnEdgeStrategy"
1393shape (Triangle
1394uid 2144,0
1395ro 90
1396va (VaSet
1397vasetType 1
1398fg "0,65535,0"
1399)
1400xt "10250,31625,11000,32375"
1401)
1402tg (CPTG
1403uid 2145,0
1404ps "CptPortTextPlaceStrategy"
1405stg "VerticalLayoutStrategy"
1406f (Text
1407uid 2146,0
1408va (VaSet
1409)
1410xt "12000,31500,13500,32500"
1411st "clk"
1412blo "12000,32300"
1413)
1414)
1415thePort (LogicalPort
1416decl (Decl
1417n "clk"
1418t "std_logic"
1419o 1
1420)
1421)
1422)
1423*40 (CptPort
1424uid 2147,0
1425ps "OnEdgeStrategy"
1426shape (Triangle
1427uid 2148,0
1428ro 90
1429va (VaSet
1430vasetType 1
1431fg "0,65535,0"
1432)
1433xt "10250,32625,11000,33375"
1434)
1435tg (CPTG
1436uid 2149,0
1437ps "CptPortTextPlaceStrategy"
1438stg "VerticalLayoutStrategy"
1439f (Text
1440uid 2150,0
1441va (VaSet
1442)
1443xt "12000,32500,17600,33500"
1444st "config_start"
1445blo "12000,33300"
1446)
1447)
1448thePort (LogicalPort
1449decl (Decl
1450n "config_start"
1451t "std_logic"
1452o 2
1453)
1454)
1455)
1456*41 (CptPort
1457uid 2151,0
1458ps "OnEdgeStrategy"
1459shape (Triangle
1460uid 2152,0
1461ro 270
1462va (VaSet
1463vasetType 1
1464fg "0,65535,0"
1465)
1466xt "10250,33625,11000,34375"
1467)
1468tg (CPTG
1469uid 2153,0
1470ps "CptPortTextPlaceStrategy"
1471stg "VerticalLayoutStrategy"
1472f (Text
1473uid 2154,0
1474va (VaSet
1475)
1476xt "12000,33500,17700,34500"
1477st "config_ready"
1478blo "12000,34300"
1479)
1480)
1481thePort (LogicalPort
1482m 1
1483decl (Decl
1484n "config_ready"
1485t "std_logic"
1486o 3
1487i "'1'"
1488)
1489)
1490)
1491*42 (CptPort
1492uid 2155,0
1493ps "OnEdgeStrategy"
1494shape (Triangle
1495uid 2156,0
1496ro 270
1497va (VaSet
1498vasetType 1
1499fg "0,65535,0"
1500)
1501xt "10250,36625,11000,37375"
1502)
1503tg (CPTG
1504uid 2157,0
1505ps "CptPortTextPlaceStrategy"
1506stg "VerticalLayoutStrategy"
1507f (Text
1508uid 2158,0
1509va (VaSet
1510)
1511xt "12000,36500,17500,37500"
1512st "sensor_valid"
1513blo "12000,37300"
1514)
1515)
1516thePort (LogicalPort
1517m 1
1518decl (Decl
1519n "sensor_valid"
1520t "std_logic"
1521o 7
1522i "'0'"
1523)
1524)
1525)
1526*43 (CptPort
1527uid 2159,0
1528ps "OnEdgeStrategy"
1529shape (Triangle
1530uid 2160,0
1531ro 90
1532va (VaSet
1533vasetType 1
1534fg "0,65535,0"
1535)
1536xt "10250,35625,11000,36375"
1537)
1538tg (CPTG
1539uid 2161,0
1540ps "CptPortTextPlaceStrategy"
1541stg "VerticalLayoutStrategy"
1542f (Text
1543uid 2162,0
1544va (VaSet
1545)
1546xt "12000,35500,16200,36500"
1547st "dac_array"
1548blo "12000,36300"
1549)
1550)
1551thePort (LogicalPort
1552decl (Decl
1553n "dac_array"
1554t "dac_array_type"
1555o 4
1556)
1557)
1558)
1559*44 (CptPort
1560uid 2163,0
1561ps "OnEdgeStrategy"
1562shape (Triangle
1563uid 2164,0
1564ro 270
1565va (VaSet
1566vasetType 1
1567fg "0,65535,0"
1568)
1569xt "10250,37625,11000,38375"
1570)
1571tg (CPTG
1572uid 2165,0
1573ps "CptPortTextPlaceStrategy"
1574stg "VerticalLayoutStrategy"
1575f (Text
1576uid 2166,0
1577va (VaSet
1578)
1579xt "12000,37500,17800,38500"
1580st "sensor_array"
1581blo "12000,38300"
1582)
1583)
1584thePort (LogicalPort
1585m 1
1586decl (Decl
1587n "sensor_array"
1588t "sensor_array_type"
1589o 6
1590)
1591)
1592)
1593*45 (CptPort
1594uid 2167,0
1595ps "OnEdgeStrategy"
1596shape (Triangle
1597uid 2168,0
1598ro 90
1599va (VaSet
1600vasetType 1
1601fg "0,65535,0"
1602)
1603xt "28000,34625,28750,35375"
1604)
1605tg (CPTG
1606uid 2169,0
1607ps "CptPortTextPlaceStrategy"
1608stg "RightVerticalLayoutStrategy"
1609f (Text
1610uid 2170,0
1611va (VaSet
1612)
1613xt "19600,34500,27000,35500"
1614st "dac_config_start"
1615ju 2
1616blo "27000,35300"
1617)
1618)
1619thePort (LogicalPort
1620m 1
1621decl (Decl
1622n "dac_config_start"
1623t "std_logic"
1624o 10
1625i "'0'"
1626)
1627)
1628)
1629*46 (CptPort
1630uid 2171,0
1631ps "OnEdgeStrategy"
1632shape (Triangle
1633uid 2172,0
1634ro 270
1635va (VaSet
1636vasetType 1
1637fg "0,65535,0"
1638)
1639xt "28000,40625,28750,41375"
1640)
1641tg (CPTG
1642uid 2173,0
1643ps "CptPortTextPlaceStrategy"
1644stg "RightVerticalLayoutStrategy"
1645f (Text
1646uid 2174,0
1647va (VaSet
1648)
1649xt "19500,40500,27000,41500"
1650st "dac_config_ready"
1651ju 2
1652blo "27000,41300"
1653)
1654)
1655thePort (LogicalPort
1656decl (Decl
1657n "dac_config_ready"
1658t "std_logic"
1659o 11
1660)
1661)
1662)
1663*47 (CptPort
1664uid 2175,0
1665ps "OnEdgeStrategy"
1666shape (Triangle
1667uid 2176,0
1668ro 90
1669va (VaSet
1670vasetType 1
1671fg "0,65535,0"
1672)
1673xt "28000,35625,28750,36375"
1674)
1675tg (CPTG
1676uid 2177,0
1677ps "CptPortTextPlaceStrategy"
1678stg "RightVerticalLayoutStrategy"
1679f (Text
1680uid 2178,0
1681va (VaSet
1682)
1683xt "19000,35500,27000,36500"
1684st "sensor_read_start"
1685ju 2
1686blo "27000,36300"
1687)
1688)
1689thePort (LogicalPort
1690m 1
1691decl (Decl
1692n "sensor_read_start"
1693t "std_logic"
1694o 8
1695i "'0'"
1696)
1697)
1698)
1699*48 (CptPort
1700uid 2179,0
1701ps "OnEdgeStrategy"
1702shape (Triangle
1703uid 2180,0
1704ro 270
1705va (VaSet
1706vasetType 1
1707fg "0,65535,0"
1708)
1709xt "28000,41625,28750,42375"
1710)
1711tg (CPTG
1712uid 2181,0
1713ps "CptPortTextPlaceStrategy"
1714stg "RightVerticalLayoutStrategy"
1715f (Text
1716uid 2182,0
1717va (VaSet
1718)
1719xt "19300,41500,27000,42500"
1720st "sensor_read_valid"
1721ju 2
1722blo "27000,42300"
1723)
1724)
1725thePort (LogicalPort
1726decl (Decl
1727n "sensor_read_valid"
1728t "std_logic"
1729o 9
1730)
1731)
1732)
1733*49 (CptPort
1734uid 2183,0
1735ps "OnEdgeStrategy"
1736shape (Triangle
1737uid 2184,0
1738ro 90
1739va (VaSet
1740vasetType 1
1741fg "0,65535,0"
1742)
1743xt "28000,31625,28750,32375"
1744)
1745tg (CPTG
1746uid 2185,0
1747ps "CptPortTextPlaceStrategy"
1748stg "RightVerticalLayoutStrategy"
1749f (Text
1750uid 2186,0
1751va (VaSet
1752)
1753xt "21200,31500,27000,32500"
1754st "dac_id : (2:0)"
1755ju 2
1756blo "27000,32300"
1757)
1758)
1759thePort (LogicalPort
1760m 1
1761decl (Decl
1762n "dac_id"
1763t "std_logic_vector"
1764b "(2 downto 0)"
1765o 14
1766i "(others => '0')"
1767)
1768)
1769)
1770*50 (CptPort
1771uid 2187,0
1772ps "OnEdgeStrategy"
1773shape (Triangle
1774uid 2188,0
1775ro 90
1776va (VaSet
1777vasetType 1
1778fg "0,65535,0"
1779)
1780xt "28000,32625,28750,33375"
1781)
1782tg (CPTG
1783uid 2189,0
1784ps "CptPortTextPlaceStrategy"
1785stg "RightVerticalLayoutStrategy"
1786f (Text
1787uid 2190,0
1788va (VaSet
1789)
1790xt "20200,32500,27000,33500"
1791st "sensor_id : (1:0)"
1792ju 2
1793blo "27000,33300"
1794)
1795)
1796thePort (LogicalPort
1797m 1
1798decl (Decl
1799n "sensor_id"
1800t "std_logic_vector"
1801b "(1 downto 0)"
1802o 15
1803i "(others => '0')"
1804)
1805)
1806)
1807*51 (CptPort
1808uid 2191,0
1809ps "OnEdgeStrategy"
1810shape (Diamond
1811uid 2192,0
1812ro 90
1813va (VaSet
1814vasetType 1
1815fg "0,65535,0"
1816)
1817xt "28000,37625,28750,38375"
1818)
1819tg (CPTG
1820uid 2193,0
1821ps "CptPortTextPlaceStrategy"
1822stg "RightVerticalLayoutStrategy"
1823f (Text
1824uid 2194,0
1825va (VaSet
1826)
1827xt "21600,37500,27000,38500"
1828st "data : (15:0)"
1829ju 2
1830blo "27000,38300"
1831)
1832)
1833thePort (LogicalPort
1834m 2
1835decl (Decl
1836n "data"
1837t "std_logic_vector"
1838b "(15 downto 0)"
1839o 16
1840i "(others => 'Z')"
1841)
1842)
1843)
1844*52 (CptPort
1845uid 2814,0
1846ps "OnEdgeStrategy"
1847shape (Triangle
1848uid 2815,0
1849ro 270
1850va (VaSet
1851vasetType 1
1852fg "0,65535,0"
1853)
1854xt "10250,39625,11000,40375"
1855)
1856tg (CPTG
1857uid 2816,0
1858ps "CptPortTextPlaceStrategy"
1859stg "VerticalLayoutStrategy"
1860f (Text
1861uid 2817,0
1862va (VaSet
1863)
1864xt "12000,39500,20000,40500"
1865st "current_dac_array"
1866blo "12000,40300"
1867)
1868)
1869thePort (LogicalPort
1870m 1
1871decl (Decl
1872n "current_dac_array"
1873t "dac_array_type"
1874o 5
1875i "( others => 0)"
1876)
1877)
1878)
1879*53 (CptPort
1880uid 3012,0
1881ps "OnEdgeStrategy"
1882shape (Triangle
1883uid 3013,0
1884ro 90
1885va (VaSet
1886vasetType 1
1887fg "0,65535,0"
1888)
1889xt "28000,45625,28750,46375"
1890)
1891tg (CPTG
1892uid 3014,0
1893ps "CptPortTextPlaceStrategy"
1894stg "RightVerticalLayoutStrategy"
1895f (Text
1896uid 3015,0
1897va (VaSet
1898)
1899xt "17700,45500,27000,46500"
1900st "sclk_enable_override"
1901ju 2
1902blo "27000,46300"
1903)
1904)
1905thePort (LogicalPort
1906m 1
1907decl (Decl
1908n "sclk_enable_override"
1909t "std_logic"
1910o 13
1911i "'0'"
1912)
1913)
1914)
1915*54 (CptPort
1916uid 3167,0
1917ps "OnEdgeStrategy"
1918shape (Triangle
1919uid 3168,0
1920ro 270
1921va (VaSet
1922vasetType 1
1923fg "0,65535,0"
1924)
1925xt "28000,42625,28750,43375"
1926)
1927tg (CPTG
1928uid 3169,0
1929ps "CptPortTextPlaceStrategy"
1930stg "RightVerticalLayoutStrategy"
1931f (Text
1932uid 3170,0
1933va (VaSet
1934)
1935xt "19300,42500,27000,43500"
1936st "spi_channel_ready"
1937ju 2
1938blo "27000,43300"
1939)
1940)
1941thePort (LogicalPort
1942decl (Decl
1943n "spi_channel_ready"
1944t "std_logic"
1945o 12
1946)
1947)
1948)
1949*55 (CptPort
1950uid 3253,0
1951ps "OnEdgeStrategy"
1952shape (Triangle
1953uid 3254,0
1954ro 270
1955va (VaSet
1956vasetType 1
1957fg "0,65535,0"
1958)
1959xt "28000,43625,28750,44375"
1960)
1961tg (CPTG
1962uid 3255,0
1963ps "CptPortTextPlaceStrategy"
1964stg "RightVerticalLayoutStrategy"
1965f (Text
1966uid 3256,0
1967va (VaSet
1968)
1969xt "14800,43500,27000,44500"
1970st "measured_temp_data : (15:0)"
1971ju 2
1972blo "27000,44300"
1973)
1974)
1975thePort (LogicalPort
1976decl (Decl
1977n "measured_temp_data"
1978t "std_logic_vector"
1979b "(15 downto 0)"
1980o 17
1981)
1982)
1983)
1984]
1985shape (Rectangle
1986uid 2196,0
1987va (VaSet
1988vasetType 1
1989fg "0,65535,0"
1990lineColor "0,32896,0"
1991lineWidth 2
1992)
1993xt "11000,31000,28000,47000"
1994)
1995oxt "0,0,8000,10000"
1996ttg (MlTextGroup
1997uid 2197,0
1998ps "CenterOffsetStrategy"
1999stg "VerticalLayoutStrategy"
2000textVec [
2001*56 (Text
2002uid 2198,0
2003va (VaSet
2004font "Arial,8,1"
2005)
2006xt "10350,47000,16550,48000"
2007st "FACT_FAD_lib"
2008blo "10350,47800"
2009tm "BdLibraryNameMgr"
2010)
2011*57 (Text
2012uid 2199,0
2013va (VaSet
2014font "Arial,8,1"
2015)
2016xt "10350,48000,16650,49000"
2017st "spi_distributor"
2018blo "10350,48800"
2019tm "CptNameMgr"
2020)
2021*58 (Text
2022uid 2200,0
2023va (VaSet
2024font "Arial,8,1"
2025)
2026xt "10350,49000,17250,50000"
2027st "I_spi_distributor"
2028blo "10350,49800"
2029tm "InstanceNameMgr"
2030)
2031]
2032)
2033ga (GenericAssociation
2034uid 2201,0
2035ps "EdgeToEdgeStrategy"
2036matrix (Matrix
2037uid 2202,0
2038text (MLText
2039uid 2203,0
2040va (VaSet
2041font "Courier New,8,0"
2042)
2043xt "11000,30200,37000,31000"
2044st "TEMP_MEASUREMENT_BEAT = 5*10**6 ( integer ) "
2045)
2046header ""
2047)
2048elements [
2049(GiElement
2050name "TEMP_MEASUREMENT_BEAT"
2051type "integer"
2052value "5*10**6"
2053)
2054]
2055)
2056viewicon (ZoomableIcon
2057uid 2204,0
2058sl 0
2059va (VaSet
2060vasetType 1
2061fg "49152,49152,49152"
2062)
2063xt "11250,45250,12750,46750"
2064iconName "VhdlFileViewIcon.png"
2065iconMaskName "VhdlFileViewIcon.msk"
2066ftype 10
2067)
2068ordering 1
2069viewiconposition 0
2070portVis (PortSigDisplay
2071)
2072archFileType "UNKNOWN"
2073)
2074*59 (SaComponent
2075uid 2249,0
2076optionalChildren [
2077*60 (CptPort
2078uid 2205,0
2079ps "OnEdgeStrategy"
2080shape (Triangle
2081uid 2206,0
2082ro 90
2083va (VaSet
2084vasetType 1
2085fg "0,65535,0"
2086)
2087xt "38250,30625,39000,31375"
2088)
2089tg (CPTG
2090uid 2207,0
2091ps "CptPortTextPlaceStrategy"
2092stg "VerticalLayoutStrategy"
2093f (Text
2094uid 2208,0
2095va (VaSet
2096)
2097xt "40000,30500,41300,31500"
2098st "clk"
2099blo "40000,31300"
2100)
2101)
2102thePort (LogicalPort
2103decl (Decl
2104n "clk"
2105t "std_logic"
2106o 1
2107)
2108)
2109)
2110*61 (CptPort
2111uid 2213,0
2112ps "OnEdgeStrategy"
2113shape (Triangle
2114uid 2214,0
2115ro 90
2116va (VaSet
2117vasetType 1
2118fg "0,65535,0"
2119)
2120xt "38250,31625,39000,32375"
2121)
2122tg (CPTG
2123uid 2215,0
2124ps "CptPortTextPlaceStrategy"
2125stg "VerticalLayoutStrategy"
2126f (Text
2127uid 2216,0
2128va (VaSet
2129)
2130xt "40000,31500,45800,32500"
2131st "dac_id : (2:0)"
2132blo "40000,32300"
2133)
2134)
2135thePort (LogicalPort
2136decl (Decl
2137n "dac_id"
2138t "std_logic_vector"
2139b "(2 DOWNTO 0)"
2140o 6
2141)
2142)
2143)
2144*62 (CptPort
2145uid 2217,0
2146ps "OnEdgeStrategy"
2147shape (Triangle
2148uid 2218,0
2149ro 90
2150va (VaSet
2151vasetType 1
2152fg "0,65535,0"
2153)
2154xt "38250,32625,39000,33375"
2155)
2156tg (CPTG
2157uid 2219,0
2158ps "CptPortTextPlaceStrategy"
2159stg "VerticalLayoutStrategy"
2160f (Text
2161uid 2220,0
2162va (VaSet
2163)
2164xt "40000,32500,46800,33500"
2165st "sensor_id : (1:0)"
2166blo "40000,33300"
2167)
2168)
2169thePort (LogicalPort
2170decl (Decl
2171n "sensor_id"
2172t "std_logic_vector"
2173b "(1 downto 0)"
2174o 7
2175)
2176)
2177)
2178*63 (CptPort
2179uid 2221,0
2180ps "OnEdgeStrategy"
2181shape (Diamond
2182uid 2222,0
2183ro 270
2184va (VaSet
2185vasetType 1
2186fg "0,65535,0"
2187)
2188xt "38250,37625,39000,38375"
2189)
2190tg (CPTG
2191uid 2223,0
2192ps "CptPortTextPlaceStrategy"
2193stg "VerticalLayoutStrategy"
2194f (Text
2195uid 2224,0
2196va (VaSet
2197)
2198xt "40000,37500,45400,38500"
2199st "data : (15:0)"
2200blo "40000,38300"
2201)
2202)
2203thePort (LogicalPort
2204m 2
2205decl (Decl
2206n "data"
2207t "std_logic_vector"
2208b "(15 DOWNTO 0)"
2209o 8
2210i "(others => 'Z')"
2211)
2212)
2213)
2214*64 (CptPort
2215uid 2225,0
2216ps "OnEdgeStrategy"
2217shape (Triangle
2218uid 2226,0
2219ro 90
2220va (VaSet
2221vasetType 1
2222fg "0,65535,0"
2223)
2224xt "55000,32625,55750,33375"
2225)
2226tg (CPTG
2227uid 2227,0
2228ps "CptPortTextPlaceStrategy"
2229stg "RightVerticalLayoutStrategy"
2230f (Text
2231uid 2228,0
2232va (VaSet
2233)
2234xt "51000,32500,54000,33500"
2235st "dac_cs"
2236ju 2
2237blo "54000,33300"
2238)
2239)
2240thePort (LogicalPort
2241m 1
2242decl (Decl
2243n "dac_cs"
2244t "std_logic"
2245o 4
2246i "'1'"
2247)
2248)
2249)
2250*65 (CptPort
2251uid 2229,0
2252ps "OnEdgeStrategy"
2253shape (Triangle
2254uid 2230,0
2255ro 90
2256va (VaSet
2257vasetType 1
2258fg "0,65535,0"
2259)
2260xt "55000,37625,55750,38375"
2261)
2262tg (CPTG
2263uid 2231,0
2264ps "CptPortTextPlaceStrategy"
2265stg "RightVerticalLayoutStrategy"
2266f (Text
2267uid 2232,0
2268va (VaSet
2269)
2270xt "47000,37500,54000,38500"
2271st "sensor_cs : (3:0)"
2272ju 2
2273blo "54000,38300"
2274)
2275)
2276thePort (LogicalPort
2277m 1
2278decl (Decl
2279n "sensor_cs"
2280t "std_logic_vector"
2281b "(3 DOWNTO 0)"
2282o 5
2283i "(others => '1')"
2284)
2285)
2286)
2287*66 (CptPort
2288uid 2233,0
2289ps "OnEdgeStrategy"
2290shape (Triangle
2291uid 2234,0
2292ro 90
2293va (VaSet
2294vasetType 1
2295fg "0,65535,0"
2296)
2297xt "38250,34625,39000,35375"
2298)
2299tg (CPTG
2300uid 2235,0
2301ps "CptPortTextPlaceStrategy"
2302stg "VerticalLayoutStrategy"
2303f (Text
2304uid 2236,0
2305va (VaSet
2306)
2307xt "40000,34500,44200,35500"
2308st "dac_start"
2309blo "40000,35300"
2310)
2311)
2312thePort (LogicalPort
2313decl (Decl
2314n "dac_start"
2315t "std_logic"
2316o 10
2317)
2318)
2319)
2320*67 (CptPort
2321uid 2237,0
2322ps "OnEdgeStrategy"
2323shape (Triangle
2324uid 2238,0
2325ro 270
2326va (VaSet
2327vasetType 1
2328fg "0,65535,0"
2329)
2330xt "38250,40625,39000,41375"
2331)
2332tg (CPTG
2333uid 2239,0
2334ps "CptPortTextPlaceStrategy"
2335stg "VerticalLayoutStrategy"
2336f (Text
2337uid 2240,0
2338va (VaSet
2339)
2340xt "40000,40500,44300,41500"
2341st "dac_ready"
2342blo "40000,41300"
2343)
2344)
2345thePort (LogicalPort
2346m 1
2347decl (Decl
2348n "dac_ready"
2349t "std_logic"
2350o 11
2351i "'0'"
2352)
2353)
2354)
2355*68 (CptPort
2356uid 2241,0
2357ps "OnEdgeStrategy"
2358shape (Triangle
2359uid 2242,0
2360ro 90
2361va (VaSet
2362vasetType 1
2363fg "0,65535,0"
2364)
2365xt "38250,35625,39000,36375"
2366)
2367tg (CPTG
2368uid 2243,0
2369ps "CptPortTextPlaceStrategy"
2370stg "VerticalLayoutStrategy"
2371f (Text
2372uid 2244,0
2373va (VaSet
2374)
2375xt "40000,35500,45800,36500"
2376st "sensor_start"
2377blo "40000,36300"
2378)
2379)
2380thePort (LogicalPort
2381decl (Decl
2382n "sensor_start"
2383t "std_logic"
2384o 12
2385)
2386)
2387)
2388*69 (CptPort
2389uid 2245,0
2390ps "OnEdgeStrategy"
2391shape (Triangle
2392uid 2246,0
2393ro 270
2394va (VaSet
2395vasetType 1
2396fg "0,65535,0"
2397)
2398xt "38250,41625,39000,42375"
2399)
2400tg (CPTG
2401uid 2247,0
2402ps "CptPortTextPlaceStrategy"
2403stg "VerticalLayoutStrategy"
2404f (Text
2405uid 2248,0
2406va (VaSet
2407)
2408xt "40000,41500,45500,42500"
2409st "sensor_valid"
2410blo "40000,42300"
2411)
2412)
2413thePort (LogicalPort
2414m 1
2415decl (Decl
2416n "sensor_valid"
2417t "std_logic"
2418o 13
2419i "'0'"
2420)
2421)
2422)
2423*70 (CptPort
2424uid 2351,0
2425ps "OnEdgeStrategy"
2426shape (Triangle
2427uid 2352,0
2428ro 90
2429va (VaSet
2430vasetType 1
2431fg "0,65535,0"
2432)
2433xt "55000,31625,55750,32375"
2434)
2435tg (CPTG
2436uid 2353,0
2437ps "CptPortTextPlaceStrategy"
2438stg "RightVerticalLayoutStrategy"
2439f (Text
2440uid 2354,0
2441va (VaSet
2442)
2443xt "52000,31500,54000,32500"
2444st "mosi"
2445ju 2
2446blo "54000,32300"
2447)
2448)
2449thePort (LogicalPort
2450m 1
2451decl (Decl
2452n "mosi"
2453t "std_logic"
2454o 3
2455i "'0'"
2456)
2457)
2458)
2459*71 (CptPort
2460uid 2398,0
2461ps "OnEdgeStrategy"
2462shape (Diamond
2463uid 2399,0
2464ro 90
2465va (VaSet
2466vasetType 1
2467fg "0,65535,0"
2468)
2469xt "55000,30625,55750,31375"
2470)
2471tg (CPTG
2472uid 2400,0
2473ps "CptPortTextPlaceStrategy"
2474stg "RightVerticalLayoutStrategy"
2475f (Text
2476uid 2401,0
2477va (VaSet
2478)
2479xt "52000,30500,54000,31500"
2480st "miso"
2481ju 2
2482blo "54000,31300"
2483)
2484)
2485thePort (LogicalPort
2486m 2
2487decl (Decl
2488n "miso"
2489t "std_logic"
2490o 2
2491i "'Z'"
2492)
2493)
2494)
2495*72 (CptPort
2496uid 3163,0
2497ps "OnEdgeStrategy"
2498shape (Triangle
2499uid 3164,0
2500ro 270
2501va (VaSet
2502vasetType 1
2503fg "0,65535,0"
2504)
2505xt "38250,42625,39000,43375"
2506)
2507tg (CPTG
2508uid 3165,0
2509ps "CptPortTextPlaceStrategy"
2510stg "VerticalLayoutStrategy"
2511f (Text
2512uid 3166,0
2513va (VaSet
2514)
2515xt "40000,42500,47700,43500"
2516st "spi_channel_ready"
2517blo "40000,43300"
2518)
2519)
2520thePort (LogicalPort
2521m 1
2522decl (Decl
2523n "spi_channel_ready"
2524t "std_logic"
2525o 14
2526i "'1'"
2527)
2528)
2529)
2530*73 (CptPort
2531uid 3249,0
2532ps "OnEdgeStrategy"
2533shape (Triangle
2534uid 3250,0
2535ro 270
2536va (VaSet
2537vasetType 1
2538fg "0,65535,0"
2539)
2540xt "38250,43625,39000,44375"
2541)
2542tg (CPTG
2543uid 3251,0
2544ps "CptPortTextPlaceStrategy"
2545stg "VerticalLayoutStrategy"
2546f (Text
2547uid 3252,0
2548va (VaSet
2549)
2550xt "40000,43500,52200,44500"
2551st "measured_temp_data : (15:0)"
2552blo "40000,44300"
2553)
2554)
2555thePort (LogicalPort
2556m 1
2557decl (Decl
2558n "measured_temp_data"
2559t "std_logic_vector"
2560b "(15 DOWNTO 0)"
2561o 9
2562i "(others => '0')"
2563)
2564)
2565)
2566]
2567shape (Rectangle
2568uid 2250,0
2569va (VaSet
2570vasetType 1
2571fg "0,65535,0"
2572lineColor "0,32896,0"
2573lineWidth 2
2574)
2575xt "39000,30000,55000,47000"
2576)
2577oxt "0,0,8000,10000"
2578ttg (MlTextGroup
2579uid 2251,0
2580ps "CenterOffsetStrategy"
2581stg "VerticalLayoutStrategy"
2582textVec [
2583*74 (Text
2584uid 2252,0
2585va (VaSet
2586font "Arial,8,1"
2587)
2588xt "47900,43000,54100,44000"
2589st "FACT_FAD_lib"
2590blo "47900,43800"
2591tm "BdLibraryNameMgr"
2592)
2593*75 (Text
2594uid 2253,0
2595va (VaSet
2596font "Arial,8,1"
2597)
2598xt "47900,44000,53800,45000"
2599st "spi_controller"
2600blo "47900,44800"
2601tm "CptNameMgr"
2602)
2603*76 (Text
2604uid 2254,0
2605va (VaSet
2606font "Arial,8,1"
2607)
2608xt "47900,45000,54400,46000"
2609st "I_spi_controller"
2610blo "47900,45800"
2611tm "InstanceNameMgr"
2612)
2613]
2614)
2615ga (GenericAssociation
2616uid 2255,0
2617ps "EdgeToEdgeStrategy"
2618matrix (Matrix
2619uid 2256,0
2620text (MLText
2621uid 2257,0
2622va (VaSet
2623font "Courier New,8,0"
2624)
2625xt "47000,30000,47000,30000"
2626)
2627header ""
2628)
2629elements [
2630]
2631)
2632viewicon (ZoomableIcon
2633uid 2258,0
2634sl 0
2635va (VaSet
2636vasetType 1
2637fg "49152,49152,49152"
2638)
2639xt "39250,45250,40750,46750"
2640iconName "VhdlFileViewIcon.png"
2641iconMaskName "VhdlFileViewIcon.msk"
2642ftype 10
2643)
2644ordering 1
2645viewiconposition 0
2646portVis (PortSigDisplay
2647)
2648archFileType "UNKNOWN"
2649)
2650*77 (Net
2651uid 2355,0
2652decl (Decl
2653n "mosi"
2654t "std_logic"
2655o 19
2656suid 46,0
2657i "'0'"
2658)
2659declText (MLText
2660uid 2356,0
2661va (VaSet
2662font "Courier New,8,0"
2663)
2664xt "-2000,18000,29500,18800"
2665st "mosi : std_logic := '0'"
2666)
2667)
2668*78 (PortIoOut
2669uid 2363,0
2670shape (CompositeShape
2671uid 2364,0
2672va (VaSet
2673vasetType 1
2674fg "0,0,32768"
2675)
2676optionalChildren [
2677(Pentagon
2678uid 2365,0
2679sl 0
2680ro 270
2681xt "57500,31625,59000,32375"
2682)
2683(Line
2684uid 2366,0
2685sl 0
2686ro 270
2687xt "57000,32000,57500,32000"
2688pts [
2689"57000,32000"
2690"57500,32000"
2691]
2692)
2693]
2694)
2695stc 0
2696sf 1
2697tg (WTG
2698uid 2367,0
2699ps "PortIoTextPlaceStrategy"
2700stg "STSignalDisplayStrategy"
2701f (Text
2702uid 2368,0
2703va (VaSet
2704)
2705xt "60000,31500,62000,32500"
2706st "mosi"
2707blo "60000,32300"
2708tm "WireNameMgr"
2709)
2710)
2711)
2712*79 (Net
2713uid 2402,0
2714decl (Decl
2715n "miso"
2716t "std_logic"
2717preAdd 0
2718posAdd 0
2719o 10
2720suid 47,0
2721)
2722declText (MLText
2723uid 2403,0
2724va (VaSet
2725font "Courier New,8,0"
2726)
2727xt "-2000,22000,15500,22800"
2728st "miso : std_logic"
2729)
2730)
2731*80 (SaComponent
2732uid 2645,0
2733optionalChildren [
2734*81 (CptPort
2735uid 2637,0
2736ps "OnEdgeStrategy"
2737shape (Triangle
2738uid 2638,0
2739ro 90
2740va (VaSet
2741vasetType 1
2742fg "0,65535,0"
2743)
2744xt "35250,9625,36000,10375"
2745)
2746tg (CPTG
2747uid 2639,0
2748ps "CptPortTextPlaceStrategy"
2749stg "VerticalLayoutStrategy"
2750f (Text
2751uid 2640,0
2752va (VaSet
2753)
2754xt "37000,9500,38300,10500"
2755st "clk"
2756blo "37000,10300"
2757)
2758)
2759thePort (LogicalPort
2760decl (Decl
2761n "clk"
2762t "std_logic"
2763o 1
2764)
2765)
2766)
2767*82 (CptPort
2768uid 2641,0
2769ps "OnEdgeStrategy"
2770shape (Triangle
2771uid 2642,0
2772ro 90
2773va (VaSet
2774vasetType 1
2775fg "0,65535,0"
2776)
2777xt "44000,9625,44750,10375"
2778)
2779tg (CPTG
2780uid 2643,0
2781ps "CptPortTextPlaceStrategy"
2782stg "RightVerticalLayoutStrategy"
2783f (Text
2784uid 2644,0
2785va (VaSet
2786)
2787xt "41300,9500,43000,10500"
2788st "sclk"
2789ju 2
2790blo "43000,10300"
2791)
2792)
2793thePort (LogicalPort
2794m 1
2795decl (Decl
2796n "sclk"
2797t "std_logic"
2798o 2
2799i "'0'"
2800)
2801)
2802)
2803]
2804shape (Rectangle
2805uid 2646,0
2806va (VaSet
2807vasetType 1
2808fg "0,65535,0"
2809lineColor "0,32896,0"
2810lineWidth 2
2811)
2812xt "36000,9000,44000,12000"
2813)
2814oxt "0,0,8000,10000"
2815ttg (MlTextGroup
2816uid 2647,0
2817ps "CenterOffsetStrategy"
2818stg "VerticalLayoutStrategy"
2819textVec [
2820*83 (Text
2821uid 2648,0
2822va (VaSet
2823font "Arial,8,1"
2824)
2825xt "36900,12000,43100,13000"
2826st "FACT_FAD_lib"
2827blo "36900,12800"
2828tm "BdLibraryNameMgr"
2829)
2830*84 (Text
2831uid 2649,0
2832va (VaSet
2833font "Arial,8,1"
2834)
2835xt "36900,13000,41700,14000"
2836st "clk_divider"
2837blo "36900,13800"
2838tm "CptNameMgr"
2839)
2840*85 (Text
2841uid 2650,0
2842va (VaSet
2843font "Arial,8,1"
2844)
2845xt "36900,14000,37900,15000"
2846st "I1"
2847blo "36900,14800"
2848tm "InstanceNameMgr"
2849)
2850]
2851)
2852ga (GenericAssociation
2853uid 2651,0
2854ps "EdgeToEdgeStrategy"
2855matrix (Matrix
2856uid 2652,0
2857text (MLText
2858uid 2653,0
2859va (VaSet
2860font "Courier New,8,0"
2861)
2862xt "36000,8200,52000,9000"
2863st "DIVIDER = 25 ( integer ) "
2864)
2865header ""
2866)
2867elements [
2868(GiElement
2869name "DIVIDER"
2870type "integer"
2871value "25"
2872)
2873]
2874)
2875viewicon (ZoomableIcon
2876uid 2654,0
2877sl 0
2878va (VaSet
2879vasetType 1
2880fg "49152,49152,49152"
2881)
2882xt "36250,10250,37750,11750"
2883iconName "VhdlFileViewIcon.png"
2884iconMaskName "VhdlFileViewIcon.msk"
2885ftype 10
2886)
2887ordering 1
2888viewiconposition 0
2889portVis (PortSigDisplay
2890)
2891archFileType "UNKNOWN"
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2893*86 (SaComponent
2894uid 2689,0
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2897uid 2681,0
2898ps "OnEdgeStrategy"
2899shape (Triangle
2900uid 2682,0
2901ro 90
2902va (VaSet
2903vasetType 1
2904fg "0,65535,0"
2905)
2906xt "34250,17625,35000,18375"
2907)
2908tg (CPTG
2909uid 2683,0
2910ps "CptPortTextPlaceStrategy"
2911stg "VerticalLayoutStrategy"
2912f (Text
2913uid 2684,0
2914va (VaSet
2915)
2916xt "36000,17500,37300,18500"
2917st "clk"
2918blo "36000,18300"
2919)
2920)
2921thePort (LogicalPort
2922decl (Decl
2923n "clk"
2924t "std_logic"
2925o 1
2926)
2927)
2928)
2929*88 (CptPort
2930uid 2685,0
2931ps "OnEdgeStrategy"
2932shape (Triangle
2933uid 2686,0
2934ro 90
2935va (VaSet
2936vasetType 1
2937fg "0,65535,0"
2938)
2939xt "43000,17625,43750,18375"
2940)
2941tg (CPTG
2942uid 2687,0
2943ps "CptPortTextPlaceStrategy"
2944stg "RightVerticalLayoutStrategy"
2945f (Text
2946uid 2688,0
2947va (VaSet
2948)
2949xt "40300,17500,42000,18500"
2950st "sclk"
2951ju 2
2952blo "42000,18300"
2953)
2954)
2955thePort (LogicalPort
2956m 1
2957decl (Decl
2958n "sclk"
2959t "std_logic"
2960o 2
2961i "'0'"
2962)
2963)
2964)
2965]
2966shape (Rectangle
2967uid 2690,0
2968va (VaSet
2969vasetType 1
2970fg "0,65535,0"
2971lineColor "0,32896,0"
2972lineWidth 2
2973)
2974xt "35000,17000,43000,20000"
2975)
2976oxt "0,0,8000,10000"
2977ttg (MlTextGroup
2978uid 2691,0
2979ps "CenterOffsetStrategy"
2980stg "VerticalLayoutStrategy"
2981textVec [
2982*89 (Text
2983uid 2692,0
2984va (VaSet
2985font "Arial,8,1"
2986)
2987xt "35900,20000,42100,21000"
2988st "FACT_FAD_lib"
2989blo "35900,20800"
2990tm "BdLibraryNameMgr"
2991)
2992*90 (Text
2993uid 2693,0
2994va (VaSet
2995font "Arial,8,1"
2996)
2997xt "35900,21000,40700,22000"
2998st "clk_divider"
2999blo "35900,21800"
3000tm "CptNameMgr"
3001)
3002*91 (Text
3003uid 2694,0
3004va (VaSet
3005font "Arial,8,1"
3006)
3007xt "35900,22000,47800,23000"
3008st "Measure_Temperature_Timer"
3009blo "35900,22800"
3010tm "InstanceNameMgr"
3011)
3012]
3013)
3014ga (GenericAssociation
3015uid 2695,0
3016ps "EdgeToEdgeStrategy"
3017matrix (Matrix
3018uid 2696,0
3019text (MLText
3020uid 2697,0
3021va (VaSet
3022font "Courier New,8,0"
3023)
3024xt "35000,16200,51000,17000"
3025st "DIVIDER = 25 ( integer ) "
3026)
3027header ""
3028)
3029elements [
3030(GiElement
3031name "DIVIDER"
3032type "integer"
3033value "25"
3034)
3035]
3036)
3037viewicon (ZoomableIcon
3038uid 2698,0
3039sl 0
3040va (VaSet
3041vasetType 1
3042fg "49152,49152,49152"
3043)
3044xt "35250,18250,36750,19750"
3045iconName "VhdlFileViewIcon.png"
3046iconMaskName "VhdlFileViewIcon.msk"
3047ftype 10
3048)
3049ordering 1
3050viewiconposition 0
3051portVis (PortSigDisplay
3052)
3053archFileType "UNKNOWN"
3054)
3055*92 (Net
3056uid 2738,0
3057decl (Decl
3058n "T_sensor_start"
3059t "std_logic"
3060o 6
3061suid 52,0
3062)
3063declText (MLText
3064uid 2739,0
3065va (VaSet
3066font "Courier New,8,0"
3067)
3068xt "-2000,23800,19000,24600"
3069st "SIGNAL T_sensor_start : std_logic"
3070)
3071)
3072*93 (Net
3073uid 2826,0
3074lang 10
3075decl (Decl
3076n "current_dac_array"
3077t "dac_array_type"
3078o 21
3079suid 55,0
3080i "( others => 0)"
3081)
3082declText (MLText
3083uid 2827,0
3084va (VaSet
3085font "Courier New,8,0"
3086)
3087xt "-2000,15600,35000,16400"
3088st "current_dac_array : dac_array_type := ( others => 0)"
3089)
3090)
3091*94 (PortIoOut
3092uid 2834,0
3093shape (CompositeShape
3094uid 2835,0
3095va (VaSet
3096vasetType 1
3097fg "0,0,32768"
3098)
3099optionalChildren [
3100(Pentagon
3101uid 2836,0
3102sl 0
3103ro 90
3104xt "4000,39625,5500,40375"
3105)
3106(Line
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3108sl 0
3109ro 90
3110xt "5500,40000,6000,40000"
3111pts [
3112"6000,40000"
3113"5500,40000"
3114]
3115)
3116]
3117)
3118stc 0
3119sf 1
3120tg (WTG
3121uid 2838,0
3122ps "PortIoTextPlaceStrategy"
3123stg "STSignalDisplayStrategy"
3124f (Text
3125uid 2839,0
3126va (VaSet
3127)
3128xt "-5000,39500,3000,40500"
3129st "current_dac_array"
3130ju 2
3131blo "3000,40300"
3132tm "WireNameMgr"
3133)
3134)
3135)
3136*95 (MWC
3137uid 2965,0
3138optionalChildren [
3139*96 (CptPort
3140uid 2937,0
3141optionalChildren [
3142*97 (Line
3143uid 2941,0
3144layer 5
3145sl 0
3146va (VaSet
3147vasetType 3
3148)
3149xt "84000,12000,85000,12000"
3150pts [
3151"85000,12000"
3152"84000,12000"
3153]
3154)
3155*98 (Property
3156uid 2942,0
3157pclass "_MW_GEOM_"
3158pname "fixed"
3159ptn "String"
3160)
3161]
3162ps "OnEdgeStrategy"
3163shape (Triangle
3164uid 2938,0
3165ro 90
3166va (VaSet
3167vasetType 1
3168isHidden 1
3169fg "0,65535,65535"
3170)
3171xt "85000,11625,85750,12375"
3172)
3173tg (CPTG
3174uid 2939,0
3175ps "CptPortTextPlaceStrategy"
3176stg "RightVerticalLayoutStrategy"
3177f (Text
3178uid 2940,0
3179sl 0
3180va (VaSet
3181isHidden 1
3182font "arial,8,0"
3183)
3184xt "86419,11342,88219,12342"
3185st "dout"
3186ju 2
3187blo "88219,12142"
3188)
3189)
3190thePort (LogicalPort
3191m 1
3192decl (Decl
3193n "dout"
3194t "std_logic"
3195o 6
3196suid 1,0
3197)
3198)
3199)
3200*99 (CptPort
3201uid 2943,0
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3204uid 2947,0
3205layer 5
3206sl 0
3207va (VaSet
3208vasetType 3
3209)
3210xt "79000,11000,80000,11000"
3211pts [
3212"79000,11000"
3213"80000,11000"
3214]
3215)
3216]
3217ps "OnEdgeStrategy"
3218shape (Triangle
3219uid 2944,0
3220ro 90
3221va (VaSet
3222vasetType 1
3223isHidden 1
3224fg "0,65535,65535"
3225)
3226xt "78250,10625,79000,11375"
3227)
3228tg (CPTG
3229uid 2945,0
3230ps "CptPortTextPlaceStrategy"
3231stg "VerticalLayoutStrategy"
3232f (Text
3233uid 2946,0
3234sl 0
3235va (VaSet
3236isHidden 1
3237font "arial,8,0"
3238)
3239xt "75885,10294,77685,11294"
3240st "din0"
3241blo "75885,11094"
3242)
3243)
3244thePort (LogicalPort
3245decl (Decl
3246n "din0"
3247t "std_logic"
3248o 21
3249suid 2,0
3250i "'0'"
3251)
3252)
3253)
3254*101 (CptPort
3255uid 2948,0
3256optionalChildren [
3257*102 (Line
3258uid 2952,0
3259layer 5
3260sl 0
3261va (VaSet
3262vasetType 3
3263)
3264xt "79000,13000,80000,13000"
3265pts [
3266"79000,13000"
3267"80000,13000"
3268]
3269)
3270]
3271ps "OnEdgeStrategy"
3272shape (Triangle
3273uid 2949,0
3274ro 90
3275va (VaSet
3276vasetType 1
3277isHidden 1
3278fg "0,65535,65535"
3279)
3280xt "78250,12625,79000,13375"
3281)
3282tg (CPTG
3283uid 2950,0
3284ps "CptPortTextPlaceStrategy"
3285stg "VerticalLayoutStrategy"
3286f (Text
3287uid 2951,0
3288sl 0
3289va (VaSet
3290isHidden 1
3291font "arial,8,0"
3292)
3293xt "76000,12700,77800,13700"
3294st "din1"
3295blo "76000,13500"
3296)
3297)
3298thePort (LogicalPort
3299decl (Decl
3300n "din1"
3301t "std_logic"
3302o 22
3303suid 3,0
3304i "'0'"
3305)
3306)
3307)
3308*103 (CommentGraphic
3309uid 2953,0
3310optionalChildren [
3311*104 (Property
3312uid 2955,0
3313pclass "_MW_GEOM_"
3314pname "expand"
3315ptn "String"
3316)
3317]
3318shape (PolyLine2D
3319pts [
3320"80000,14000"
3321"80000,14000"
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3323uid 2954,0
3324layer 0
3325sl 0
3326va (VaSet
3327vasetType 1
3328transparent 1
3329fg "49152,49152,49152"
3330)
3331xt "80000,14000,80000,14000"
3332)
3333oxt "7000,10000,7000,10000"
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3335*105 (CommentGraphic
3336uid 2956,0
3337optionalChildren [
3338*106 (Property
3339uid 2958,0
3340pclass "_MW_GEOM_"
3341pname "expand"
3342ptn "String"
3343)
3344]
3345shape (PolyLine2D
3346pts [
3347"80000,10000"
3348"80000,10000"
3349]
3350uid 2957,0
3351layer 0
3352sl 0
3353va (VaSet
3354vasetType 1
3355transparent 1
3356fg "49152,49152,49152"
3357)
3358xt "80000,10000,80000,10000"
3359)
3360oxt "7000,6000,7000,6000"
3361)
3362*107 (Grouping
3363uid 2959,0
3364optionalChildren [
3365*108 (CommentGraphic
3366uid 2961,0
3367shape (PolyLine2D
3368pts [
3369"82000,14000"
3370"80000,14000"
3371"80000,10000"
3372"82000,10000"
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3374uid 2962,0
3375layer 0
3376sl 0
3377va (VaSet
3378vasetType 1
3379fg "0,65535,65535"
3380lineColor "26368,26368,26368"
3381)
3382xt "80000,10000,82000,14000"
3383)
3384oxt "7000,6000,9000,10000"
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3387uid 2963,0
3388shape (Arc2D
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3390"82000,10000"
3391"84000,12000"
3392"82000,14000"
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3394uid 2964,0
3395layer 0
3396sl 0
3397va (VaSet
3398vasetType 1
3399fg "0,65535,65535"
3400lineColor "26368,26368,26368"
3401)
3402xt "82000,10000,84000,14000"
3403)
3404oxt "9000,6000,11000,10000"
3405)
3406]
3407shape (GroupingShape
3408uid 2960,0
3409sl 0
3410va (VaSet
3411vasetType 1
3412fg "65535,65535,65535"
3413lineStyle 2
3414lineWidth 2
3415)
3416xt "80000,10000,84000,14000"
3417)
3418oxt "7000,6000,11000,10000"
3419)
3420]
3421shape (Rectangle
3422uid 2966,0
3423va (VaSet
3424vasetType 1
3425transparent 1
3426fg "65535,65535,65535"
3427lineWidth -1
3428)
3429xt "79000,10000,85000,14000"
3430fos 1
3431)
3432showPorts 0
3433oxt "6000,6000,12000,10000"
3434ttg (MlTextGroup
3435uid 2967,0
3436ps "CenterOffsetStrategy"
3437stg "VerticalLayoutStrategy"
3438textVec [
3439*110 (Text
3440uid 2968,0
3441va (VaSet
3442isHidden 1
3443font "arial,8,0"
3444)
3445xt "80500,12500,85300,13500"
3446st "moduleware"
3447blo "80500,13300"
3448)
3449*111 (Text
3450uid 2969,0
3451va (VaSet
3452font "arial,8,0"
3453)
3454xt "80500,13500,82100,14500"
3455st "and"
3456blo "80500,14300"
3457)
3458*112 (Text
3459uid 2970,0
3460va (VaSet
3461font "arial,8,0"
3462)
3463xt "80500,14500,81500,15500"
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3465blo "80500,15300"
3466tm "InstanceNameMgr"
3467)
3468]
3469)
3470ga (GenericAssociation
3471uid 2971,0
3472ps "EdgeToEdgeStrategy"
3473matrix (Matrix
3474uid 2972,0
3475text (MLText
3476uid 2973,0
3477va (VaSet
3478font "arial,8,0"
3479)
3480xt "64000,1000,64000,1000"
3481)
3482header ""
3483)
3484elements [
3485]
3486)
3487sed 1
3488awe 1
3489portVis (PortSigDisplay
3490sN 0
3491sTC 0
3492selT 0
3493)
3494prms (Property
3495pclass "params"
3496pname "params"
3497ptn "String"
3498)
3499de 2
3500visOptions (mwParamsVisibilityOptions
3501)
3502)
3503*113 (Net
3504uid 2980,0
3505decl (Decl
3506n "clk_2Mhz"
3507t "std_logic"
3508o 21
3509suid 58,0
3510i "'0'"
3511)
3512declText (MLText
3513uid 2981,0
3514va (VaSet
3515font "Courier New,8,0"
3516)
3517xt "-2000,24600,33000,25400"
3518st "SIGNAL clk_2Mhz : std_logic := '0'"
3519)
3520)
3521*114 (Net
3522uid 2990,0
3523decl (Decl
3524n "sclk_enable_sig"
3525t "std_logic"
3526o 22
3527suid 60,0
3528i "'0'"
3529)
3530declText (MLText
3531uid 2991,0
3532va (VaSet
3533font "Courier New,8,0"
3534)
3535xt "-2000,30200,33000,31000"
3536st "SIGNAL sclk_enable_sig : std_logic := '0'"
3537)
3538)
3539*115 (PortIoIn
3540uid 2998,0
3541shape (CompositeShape
3542uid 2999,0
3543va (VaSet
3544vasetType 1
3545fg "0,0,32768"
3546)
3547optionalChildren [
3548(Pentagon
3549uid 3000,0
3550sl 0
3551ro 270
3552xt "53000,14625,54500,15375"
3553)
3554(Line
3555uid 3001,0
3556sl 0
3557ro 270
3558xt "54500,15000,55000,15000"
3559pts [
3560"54500,15000"
3561"55000,15000"
3562]
3563)
3564]
3565)
3566stc 0
3567sf 1
3568tg (WTG
3569uid 3002,0
3570ps "PortIoTextPlaceStrategy"
3571stg "STSignalDisplayStrategy"
3572f (Text
3573uid 3003,0
3574va (VaSet
3575)
3576xt "46100,14500,52000,15500"
3577st "sclk_enable_i"
3578ju 2
3579blo "52000,15300"
3580tm "WireNameMgr"
3581)
3582)
3583)
3584*116 (Net
3585uid 3010,0
3586decl (Decl
3587n "sclk_enable_i"
3588t "std_logic"
3589o 23
3590suid 61,0
3591)
3592declText (MLText
3593uid 3011,0
3594va (VaSet
3595font "Courier New,8,0"
3596)
3597xt "-2000,14000,15500,14800"
3598st "sclk_enable_i : std_logic"
3599)
3600)
3601*117 (Net
3602uid 3016,0
3603decl (Decl
3604n "sclk_enable_override"
3605t "std_logic"
3606o 24
3607suid 62,0
3608i "'0'"
3609)
3610declText (MLText
3611uid 3017,0
3612va (VaSet
3613font "Courier New,8,0"
3614)
3615xt "-2000,29400,33000,30200"
3616st "SIGNAL sclk_enable_override : std_logic := '0'"
3617)
3618)
3619*118 (MWC
3620uid 3068,0
3621optionalChildren [
3622*119 (CptPort
3623uid 3032,0
3624optionalChildren [
3625*120 (Line
3626uid 3036,0
3627layer 5
3628sl 0
3629va (VaSet
3630vasetType 3
3631)
3632xt "63000,17000,64589,17000"
3633pts [
3634"63000,17000"
3635"64589,17000"
3636]
3637)
3638]
3639ps "OnEdgeStrategy"
3640shape (Triangle
3641uid 3033,0
3642ro 90
3643va (VaSet
3644vasetType 1
3645isHidden 1
3646fg "0,65535,65535"
3647)
3648xt "62250,16625,63000,17375"
3649)
3650tg (CPTG
3651uid 3034,0
3652ps "CptPortTextPlaceStrategy"
3653stg "VerticalLayoutStrategy"
3654f (Text
3655uid 3035,0
3656sl 0
3657va (VaSet
3658isHidden 1
3659font "arial,8,0"
3660)
3661xt "66750,14700,68550,15700"
3662st "din1"
3663blo "66750,15500"
3664)
3665)
3666thePort (LogicalPort
3667decl (Decl
3668n "din1"
3669t "std_logic"
3670o 24
3671suid 1,0
3672i "'0'"
3673)
3674)
3675)
3676*121 (CptPort
3677uid 3037,0
3678optionalChildren [
3679*122 (Property
3680uid 3041,0
3681pclass "_MW_GEOM_"
3682pname "fixed"
3683ptn "String"
3684)
3685*123 (Line
3686uid 3042,0
3687layer 5
3688sl 0
3689va (VaSet
3690vasetType 3
3691)
3692xt "68000,16000,69000,16000"
3693pts [
3694"69000,16000"
3695"68000,16000"
3696]
3697)
3698]
3699ps "OnEdgeStrategy"
3700shape (Triangle
3701uid 3038,0
3702ro 90
3703va (VaSet
3704vasetType 1
3705isHidden 1
3706fg "0,65535,65535"
3707)
3708xt "69000,15625,69750,16375"
3709)
3710tg (CPTG
3711uid 3039,0
3712ps "CptPortTextPlaceStrategy"
3713stg "RightVerticalLayoutStrategy"
3714f (Text
3715uid 3040,0
3716sl 0
3717va (VaSet
3718isHidden 1
3719font "arial,8,0"
3720)
3721xt "63500,15532,65300,16532"
3722st "dout"
3723ju 2
3724blo "65300,16332"
3725)
3726)
3727thePort (LogicalPort
3728m 1
3729decl (Decl
3730n "dout"
3731t "std_logic"
3732o 22
3733suid 2,0
3734i "'0'"
3735)
3736)
3737)
3738*124 (CptPort
3739uid 3043,0
3740optionalChildren [
3741*125 (Line
3742uid 3047,0
3743layer 5
3744sl 0
3745va (VaSet
3746vasetType 3
3747)
3748xt "63000,15000,64589,15000"
3749pts [
3750"63000,15000"
3751"64589,15000"
3752]
3753)
3754]
3755ps "OnEdgeStrategy"
3756shape (Triangle
3757uid 3044,0
3758ro 90
3759va (VaSet
3760vasetType 1
3761isHidden 1
3762fg "0,65535,65535"
3763)
3764xt "62250,14625,63000,15375"
3765)
3766tg (CPTG
3767uid 3045,0
3768ps "CptPortTextPlaceStrategy"
3769stg "VerticalLayoutStrategy"
3770f (Text
3771uid 3046,0
3772sl 0
3773va (VaSet
3774isHidden 1
3775font "arial,8,0"
3776)
3777xt "66635,16294,68435,17294"
3778st "din0"
3779blo "66635,17094"
3780)
3781)
3782thePort (LogicalPort
3783decl (Decl
3784n "din0"
3785t "std_logic"
3786o 23
3787suid 3,0
3788)
3789)
3790)
3791*126 (CommentGraphic
3792uid 3048,0
3793shape (Arc2D
3794pts [
3795"64000,14004"
3796"66263,14521"
3797"68000,16000"
3798]
3799uid 3049,0
3800layer 8
3801sl 0
3802va (VaSet
3803vasetType 1
3804fg "0,65535,65535"
3805bg "0,65535,65535"
3806lineColor "26368,26368,26368"
3807)
3808xt "64000,14003,68000,16000"
3809)
3810oxt "7000,6003,11000,8000"
3811)
3812*127 (CommentGraphic
3813uid 3050,0
3814shape (Arc2D
3815pts [
3816"68000,16005"
3817"66449,17394"
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4760)
4761*165 (Wire
4762uid 1227,0
4763shape (OrthoPolyLine
4764uid 1228,0
4765va (VaSet
4766vasetType 3
4767)
4768xt "6000,33000,10250,33000"
4769pts [
4770"10250,33000"
4771"6000,33000"
4772]
4773)
4774start &40
4775end &20
4776sat 32
4777eat 32
4778stc 0
4779st 0
4780sf 1
4781si 0
4782tg (WTG
4783uid 1229,0
4784ps "ConnStartEndStrategy"
4785stg "STSignalDisplayStrategy"
4786f (Text
4787uid 1230,0
4788va (VaSet
4789isHidden 1
4790)
4791xt "9250,40000,14050,41000"
4792st "config_start"
4793blo "9250,40800"
4794tm "WireNameMgr"
4795)
4796)
4797on &26
4798)
4799*166 (Wire
4800uid 1233,0
4801shape (OrthoPolyLine
4802uid 1234,0
4803va (VaSet
4804vasetType 3
4805)
4806xt "6000,34000,10250,34000"
4807pts [
4808"10250,34000"
4809"6000,34000"
4810]
4811)
4812start &41
4813end &25
4814sat 32
4815eat 32
4816stc 0
4817st 0
4818sf 1
4819si 0
4820tg (WTG
4821uid 1235,0
4822ps "ConnStartEndStrategy"
4823stg "STSignalDisplayStrategy"
4824f (Text
4825uid 1236,0
4826va (VaSet
4827isHidden 1
4828)
4829xt "12250,45000,17350,46000"
4830st "config_ready"
4831blo "12250,45800"
4832tm "WireNameMgr"
4833)
4834)
4835on &27
4836)
4837*167 (Wire
4838uid 1245,0
4839shape (OrthoPolyLine
4840uid 1246,0
4841va (VaSet
4842vasetType 3
4843)
4844xt "28750,41000,38250,41000"
4845pts [
4846"28750,41000"
4847"38250,41000"
4848]
4849)
4850start &46
4851end &67
4852sat 32
4853eat 32
4854st 0
4855sf 1
4856si 0
4857tg (WTG
4858uid 1247,0
4859ps "ConnStartEndStrategy"
4860stg "STSignalDisplayStrategy"
4861f (Text
4862uid 1248,0
4863va (VaSet
4864)
4865xt "30000,40000,36700,41000"
4866st "dac_config_ready"
4867blo "30000,40800"
4868tm "WireNameMgr"
4869)
4870)
4871on &28
4872)
4873*168 (Wire
4874uid 1251,0
4875shape (OrthoPolyLine
4876uid 1252,0
4877va (VaSet
4878vasetType 3
4879)
4880xt "28750,35000,38250,35000"
4881pts [
4882"28750,35000"
4883"38250,35000"
4884]
4885)
4886start &45
4887end &66
4888sat 32
4889eat 32
4890st 0
4891sf 1
4892si 0
4893tg (WTG
4894uid 1253,0
4895ps "ConnStartEndStrategy"
4896stg "STSignalDisplayStrategy"
4897f (Text
4898uid 1254,0
4899va (VaSet
4900)
4901xt "31000,34000,37400,35000"
4902st "dac_config_start"
4903blo "31000,34800"
4904tm "WireNameMgr"
4905)
4906)
4907on &29
4908)
4909*169 (Wire
4910uid 1328,0
4911shape (OrthoPolyLine
4912uid 1329,0
4913va (VaSet
4914vasetType 3
4915lineWidth 2
4916)
4917xt "28750,32000,38250,32000"
4918pts [
4919"38250,32000"
4920"28750,32000"
4921]
4922)
4923start &61
4924end &49
4925sat 32
4926eat 32
4927sty 1
4928st 0
4929sf 1
4930si 0
4931tg (WTG
4932uid 1332,0
4933ps "ConnStartEndStrategy"
4934stg "STSignalDisplayStrategy"
4935f (Text
4936uid 1333,0
4937va (VaSet
4938)
4939xt "31000,31000,36200,32000"
4940st "dac_id : (2:0)"
4941blo "31000,31800"
4942tm "WireNameMgr"
4943)
4944)
4945on &30
4946)
4947*170 (Wire
4948uid 1336,0
4949shape (OrthoPolyLine
4950uid 1337,0
4951va (VaSet
4952vasetType 3
4953lineWidth 2
4954)
4955xt "28750,33000,38250,33000"
4956pts [
4957"38250,33000"
4958"28750,33000"
4959]
4960)
4961start &62
4962end &50
4963sat 32
4964eat 32
4965sty 1
4966st 0
4967sf 1
4968si 0
4969tg (WTG
4970uid 1340,0
4971ps "ConnStartEndStrategy"
4972stg "STSignalDisplayStrategy"
4973f (Text
4974uid 1341,0
4975va (VaSet
4976)
4977xt "31000,32000,37300,33000"
4978st "sensor_id : (1:0)"
4979blo "31000,32800"
4980tm "WireNameMgr"
4981)
4982)
4983on &31
4984)
4985*171 (Wire
4986uid 1344,0
4987shape (OrthoPolyLine
4988uid 1345,0
4989va (VaSet
4990vasetType 3
4991)
4992xt "28750,36000,38250,36000"
4993pts [
4994"28750,36000"
4995"38250,36000"
4996]
4997)
4998start &47
4999end &68
5000sat 32
5001eat 32
5002st 0
5003sf 1
5004si 0
5005tg (WTG
5006uid 1348,0
5007ps "ConnStartEndStrategy"
5008stg "STSignalDisplayStrategy"
5009f (Text
5010uid 1349,0
5011va (VaSet
5012)
5013xt "31000,35000,36000,36000"
5014st "sensor_start"
5015blo "31000,35800"
5016tm "WireNameMgr"
5017)
5018)
5019on &32
5020)
5021*172 (Wire
5022uid 1352,0
5023shape (OrthoPolyLine
5024uid 1353,0
5025va (VaSet
5026vasetType 3
5027)
5028xt "28750,42000,38250,42000"
5029pts [
5030"38250,42000"
5031"28750,42000"
5032]
5033)
5034start &69
5035end &48
5036sat 32
5037eat 32
5038st 0
5039sf 1
5040si 0
5041tg (WTG
5042uid 1356,0
5043ps "ConnStartEndStrategy"
5044stg "STSignalDisplayStrategy"
5045f (Text
5046uid 1357,0
5047va (VaSet
5048)
5049xt "31000,41000,36000,42000"
5050st "sensor_valid"
5051blo "31000,41800"
5052tm "WireNameMgr"
5053)
5054)
5055on &33
5056)
5057*173 (Wire
5058uid 1598,0
5059shape (OrthoPolyLine
5060uid 1599,0
5061va (VaSet
5062vasetType 3
5063lineWidth 2
5064)
5065xt "6000,38000,10250,38000"
5066pts [
5067"10250,38000"
5068"6000,38000"
5069]
5070)
5071start &44
5072end &34
5073sat 32
5074eat 32
5075sty 1
5076stc 0
5077st 0
5078sf 1
5079si 0
5080tg (WTG
5081uid 1600,0
5082ps "ConnStartEndStrategy"
5083stg "STSignalDisplayStrategy"
5084f (Text
5085uid 1601,0
5086va (VaSet
5087isHidden 1
5088)
5089xt "5250,41000,10450,42000"
5090st "sensor_array"
5091blo "5250,41800"
5092tm "WireNameMgr"
5093)
5094)
5095on &36
5096)
5097*174 (Wire
5098uid 1604,0
5099shape (OrthoPolyLine
5100uid 1605,0
5101va (VaSet
5102vasetType 3
5103)
5104xt "6000,37000,10250,37000"
5105pts [
5106"10250,37000"
5107"6000,37000"
5108]
5109)
5110start &42
5111end &35
5112sat 32
5113eat 32
5114stc 0
5115st 0
5116sf 1
5117si 0
5118tg (WTG
5119uid 1606,0
5120ps "ConnStartEndStrategy"
5121stg "STSignalDisplayStrategy"
5122f (Text
5123uid 1607,0
5124va (VaSet
5125isHidden 1
5126)
5127xt "4250,44000,9550,45000"
5128st "sensor_ready"
5129blo "4250,44800"
5130tm "WireNameMgr"
5131)
5132)
5133on &37
5134)
5135*175 (Wire
5136uid 2002,0
5137shape (OrthoPolyLine
5138uid 2003,0
5139va (VaSet
5140vasetType 3
5141)
5142xt "34000,31000,38250,31000"
5143pts [
5144"34000,31000"
5145"38250,31000"
5146]
5147)
5148end &60
5149sat 16
5150eat 32
5151stc 0
5152st 0
5153sf 1
5154si 0
5155tg (WTG
5156uid 2004,0
5157ps "ConnStartEndStrategy"
5158stg "STSignalDisplayStrategy"
5159f (Text
5160uid 2005,0
5161va (VaSet
5162)
5163xt "35000,30000,36700,31000"
5164st "sclk"
5165blo "35000,30800"
5166tm "WireNameMgr"
5167)
5168)
5169on &12
5170)
5171*176 (Wire
5172uid 2357,0
5173shape (OrthoPolyLine
5174uid 2358,0
5175va (VaSet
5176vasetType 3
5177)
5178xt "55750,32000,57000,32000"
5179pts [
5180"55750,32000"
5181"57000,32000"
5182]
5183)
5184start &70
5185end &78
5186es 0
5187sat 32
5188eat 32
5189stc 0
5190st 0
5191sf 1
5192si 0
5193tg (WTG
5194uid 2361,0
5195ps "ConnStartEndStrategy"
5196stg "STSignalDisplayStrategy"
5197f (Text
5198uid 2362,0
5199va (VaSet
5200isHidden 1
5201)
5202xt "57000,38000,59000,39000"
5203st "mosi"
5204blo "57000,38800"
5205tm "WireNameMgr"
5206)
5207)
5208on &77
5209)
5210*177 (Wire
5211uid 2631,0
5212shape (OrthoPolyLine
5213uid 2632,0
5214va (VaSet
5215vasetType 3
5216)
5217xt "30000,18000,34250,18000"
5218pts [
5219"30000,18000"
5220"34250,18000"
5221]
5222)
5223end &87
5224sat 16
5225eat 32
5226st 0
5227sf 1
5228si 0
5229tg (WTG
5230uid 2635,0
5231ps "ConnStartEndStrategy"
5232stg "STSignalDisplayStrategy"
5233f (Text
5234uid 2636,0
5235va (VaSet
5236)
5237xt "32000,17000,33700,18000"
5238st "sclk"
5239blo "32000,17800"
5240tm "WireNameMgr"
5241)
5242)
5243on &12
5244)
5245*178 (Wire
5246uid 2732,0
5247shape (OrthoPolyLine
5248uid 2733,0
5249va (VaSet
5250vasetType 3
5251)
5252xt "43750,18000,48000,18000"
5253pts [
5254"43750,18000"
5255"48000,18000"
5256]
5257)
5258start &88
5259sat 32
5260eat 16
5261st 0
5262sf 1
5263si 0
5264tg (WTG
5265uid 2736,0
5266ps "ConnStartEndStrategy"
5267stg "STSignalDisplayStrategy"
5268f (Text
5269uid 2737,0
5270va (VaSet
5271)
5272xt "45000,17000,50900,18000"
5273st "T_sensor_start"
5274blo "45000,17800"
5275tm "WireNameMgr"
5276)
5277)
5278on &92
5279)
5280*179 (Wire
5281uid 2828,0
5282shape (OrthoPolyLine
5283uid 2829,0
5284va (VaSet
5285vasetType 3
5286)
5287xt "6000,40000,10250,40000"
5288pts [
5289"10250,40000"
5290"6000,40000"
5291]
5292)
5293start &52
5294end &94
5295sat 32
5296eat 32
5297stc 0
5298st 0
5299sf 1
5300si 0
5301tg (WTG
5302uid 2832,0
5303ps "ConnStartEndStrategy"
5304stg "STSignalDisplayStrategy"
5305f (Text
5306uid 2833,0
5307va (VaSet
5308isHidden 1
5309)
5310xt "7000,39000,13900,40000"
5311st "current_dac_array"
5312blo "7000,39800"
5313tm "WireNameMgr"
5314)
5315)
5316on &93
5317)
5318*180 (Wire
5319uid 2976,0
5320shape (OrthoPolyLine
5321uid 2977,0
5322va (VaSet
5323vasetType 3
5324)
5325xt "44750,10000,79000,11000"
5326pts [
5327"44750,10000"
5328"76000,10000"
5329"76000,11000"
5330"79000,11000"
5331]
5332)
5333start &82
5334end &99
5335sat 32
5336eat 32
5337st 0
5338sf 1
5339si 0
5340tg (WTG
5341uid 2978,0
5342ps "ConnStartEndStrategy"
5343stg "STSignalDisplayStrategy"
5344f (Text
5345uid 2979,0
5346va (VaSet
5347)
5348xt "46750,9000,50350,10000"
5349st "clk_2Mhz"
5350blo "46750,9800"
5351tm "WireNameMgr"
5352)
5353)
5354on &113
5355)
5356*181 (Wire
5357uid 3004,0
5358shape (OrthoPolyLine
5359uid 3005,0
5360va (VaSet
5361vasetType 3
5362)
5363xt "55000,15000,63000,15000"
5364pts [
5365"55000,15000"
5366"63000,15000"
5367]
5368)
5369start &115
5370end &124
5371es 0
5372sat 32
5373eat 32
5374st 0
5375sf 1
5376si 0
5377tg (WTG
5378uid 3008,0
5379ps "ConnStartEndStrategy"
5380stg "STSignalDisplayStrategy"
5381f (Text
5382uid 3009,0
5383va (VaSet
5384isHidden 1
5385)
5386xt "57000,14000,62300,15000"
5387st "sclk_enable_i"
5388blo "57000,14800"
5389tm "WireNameMgr"
5390)
5391)
5392on &116
5393)
5394*182 (Wire
5395uid 3018,0
5396shape (OrthoPolyLine
5397uid 3019,0
5398va (VaSet
5399vasetType 3
5400)
5401xt "28750,46000,32000,50000"
5402pts [
5403"28750,46000"
5404"32000,50000"
5405]
5406)
5407start &53
5408sat 32
5409eat 16
5410st 0
5411sf 1
5412si 0
5413tg (WTG
5414uid 3022,0
5415ps "ConnStartEndStrategy"
5416stg "STSignalDisplayStrategy"
5417f (Text
5418uid 3023,0
5419va (VaSet
5420)
5421xt "32000,49000,40200,50000"
5422st "sclk_enable_override"
5423blo "32000,49800"
5424tm "WireNameMgr"
5425)
5426)
5427on &117
5428)
5429*183 (Wire
5430uid 3024,0
5431shape (OrthoPolyLine
5432uid 3025,0
5433va (VaSet
5434vasetType 3
5435)
5436xt "54000,17000,63000,17000"
5437pts [
5438"63000,17000"
5439"54000,17000"
5440]
5441)
5442start &119
5443sat 32
5444eat 16
5445st 0
5446sf 1
5447si 0
5448tg (WTG
5449uid 3030,0
5450ps "ConnStartEndStrategy"
5451stg "STSignalDisplayStrategy"
5452f (Text
5453uid 3031,0
5454va (VaSet
5455)
5456xt "54000,16000,62200,17000"
5457st "sclk_enable_override"
5458blo "54000,16800"
5459tm "WireNameMgr"
5460)
5461)
5462on &117
5463)
5464*184 (Wire
5465uid 3079,0
5466shape (OrthoPolyLine
5467uid 3080,0
5468va (VaSet
5469vasetType 3
5470)
5471xt "69000,13000,79000,16000"
5472pts [
5473"69000,16000"
5474"72000,16000"
5475"72000,13000"
5476"79000,13000"
5477]
5478)
5479start &121
5480end &101
5481sat 32
5482eat 32
5483stc 0
5484st 0
5485sf 1
5486si 0
5487tg (WTG
5488uid 3083,0
5489ps "ConnStartEndStrategy"
5490stg "STSignalDisplayStrategy"
5491f (Text
5492uid 3084,0
5493va (VaSet
5494)
5495xt "72000,12000,78200,13000"
5496st "sclk_enable_sig"
5497blo "72000,12800"
5498tm "WireNameMgr"
5499)
5500)
5501on &114
5502)
5503*185 (Wire
5504uid 3155,0
5505shape (OrthoPolyLine
5506uid 3156,0
5507va (VaSet
5508vasetType 3
5509)
5510xt "7000,32000,10250,32000"
5511pts [
5512"7000,32000"
5513"10250,32000"
5514]
5515)
5516end &39
5517sat 16
5518eat 32
5519stc 0
5520st 0
5521sf 1
5522si 0
5523tg (WTG
5524uid 3161,0
5525ps "ConnStartEndStrategy"
5526stg "STSignalDisplayStrategy"
5527f (Text
5528uid 3162,0
5529va (VaSet
5530)
5531xt "8000,31000,9900,32000"
5532st "sclk"
5533blo "8000,31800"
5534tm "WireNameMgr"
5535)
5536)
5537on &12
5538)
5539*186 (Wire
5540uid 3173,0
5541shape (OrthoPolyLine
5542uid 3174,0
5543va (VaSet
5544vasetType 3
5545)
5546xt "28750,43000,38250,43000"
5547pts [
5548"38250,43000"
5549"28750,43000"
5550]
5551)
5552start &72
5553end &54
5554sat 32
5555eat 32
5556st 0
5557sf 1
5558si 0
5559tg (WTG
5560uid 3175,0
5561ps "ConnStartEndStrategy"
5562stg "STSignalDisplayStrategy"
5563f (Text
5564uid 3176,0
5565va (VaSet
5566)
5567xt "29250,42000,36950,43000"
5568st "spi_channel_ready"
5569blo "29250,42800"
5570tm "WireNameMgr"
5571)
5572)
5573on &141
5574)
5575*187 (Wire
5576uid 3259,0
5577optionalChildren [
5578*188 (BdJunction
5579uid 3353,0
5580ps "OnConnectorStrategy"
5581shape (Circle
5582uid 3354,0
5583va (VaSet
5584vasetType 1
5585)
5586xt "35600,43600,36400,44400"
5587radius 400
5588)
5589)
5590]
5591shape (OrthoPolyLine
5592uid 3260,0
5593va (VaSet
5594vasetType 3
5595)
5596xt "28750,44000,38250,44000"
5597pts [
5598"38250,44000"
5599"28750,44000"
5600]
5601)
5602start &73
5603end &55
5604sat 32
5605eat 32
5606st 0
5607sf 1
5608si 0
5609tg (WTG
5610uid 3261,0
5611ps "ConnStartEndStrategy"
5612stg "STSignalDisplayStrategy"
5613f (Text
5614uid 3262,0
5615va (VaSet
5616)
5617xt "25250,43000,37450,44000"
5618st "measured_temp_data : (15:0)"
5619blo "25250,43800"
5620tm "WireNameMgr"
5621)
5622)
5623on &142
5624)
5625*189 (Wire
5626uid 3273,0
5627shape (OrthoPolyLine
5628uid 3274,0
5629va (VaSet
5630vasetType 3
5631lineWidth 2
5632)
5633xt "34000,44000,84000,58000"
5634pts [
5635"38000,54000"
5636"34000,54000"
5637"34000,58000"
5638"74000,58000"
5639"74000,44000"
5640"84000,44000"
5641]
5642)
5643start &147
5644end &143
5645sat 32
5646eat 32
5647sty 1
5648stc 0
5649st 0
5650sf 1
5651si 0
5652tg (WTG
5653uid 3277,0
5654ps "ConnStartEndStrategy"
5655stg "STSignalDisplayStrategy"
5656f (Text
5657uid 3278,0
5658va (VaSet
5659isHidden 1
5660)
5661xt "37000,53000,42600,54000"
5662st "debug_16bit"
5663blo "37000,53800"
5664tm "WireNameMgr"
5665)
5666)
5667on &157
5668)
5669*190 (Wire
5670uid 3349,0
5671shape (OrthoPolyLine
5672uid 3350,0
5673va (VaSet
5674vasetType 3
5675lineWidth 2
5676)
5677xt "36000,44000,42000,54000"
5678pts [
5679"36000,44000"
5680"36000,51000"
5681"42000,51000"
5682"42000,54000"
5683"41000,54000"
5684]
5685)
5686start &188
5687end &145
5688sat 32
5689eat 32
5690sty 1
5691stc 0
5692st 0
5693sf 1
5694si 0
5695tg (WTG
5696uid 3351,0
5697ps "ConnStartEndStrategy"
5698stg "STSignalDisplayStrategy"
5699f (Text
5700uid 3352,0
5701va (VaSet
5702)
5703xt "43000,53000,51900,54000"
5704st "measured_temp_data"
5705blo "43000,53800"
5706tm "WireNameMgr"
5707)
5708)
5709on &142
5710)
5711]
5712bg "65535,65535,65535"
5713grid (Grid
5714origin "0,0"
5715isVisible 1
5716isActive 1
5717xSpacing 1000
5718xySpacing 1000
5719xShown 1
5720yShown 1
5721color "26368,26368,26368"
5722)
5723packageList *191 (PackageList
5724uid 41,0
5725stg "VerticalLayoutStrategy"
5726textVec [
5727*192 (Text
5728uid 42,0
5729va (VaSet
5730font "arial,8,1"
5731)
5732xt "-4000,1000,1400,2000"
5733st "Package List"
5734blo "-4000,1800"
5735)
5736*193 (MLText
5737uid 43,0
5738va (VaSet
5739)
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6674title (TextAssociate
6675ps "TopLeftStrategy"
6676text (MLText
6677va (VaSet
6678)
6679xt "0,-1100,7700,-100"
6680st "b0: BLOCK (guard)"
6681tm "FrameTitleTextMgr"
6682)
6683)
6684seqNum (FrameSequenceNumber
6685ps "TopLeftStrategy"
6686shape (Rectangle
6687va (VaSet
6688vasetType 1
6689fg "65535,65535,65535"
6690)
6691xt "50,50,1250,1450"
6692)
6693num (Text
6694va (VaSet
6695)
6696xt "250,250,1050,1250"
6697st "1"
6698blo "250,1050"
6699tm "FrameSeqNumMgr"
6700)
6701)
6702decls (MlTextGroup
6703ps "BottomRightOffsetStrategy"
6704stg "VerticalLayoutStrategy"
6705textVec [
6706*220 (Text
6707va (VaSet
6708font "Arial,8,1"
6709)
6710xt "14100,20000,22000,21000"
6711st "Frame Declarations"
6712blo "14100,20800"
6713)
6714*221 (MLText
6715va (VaSet
6716)
6717xt "14100,21000,14100,21000"
6718tm "BdFrameDeclTextMgr"
6719)
6720]
6721)
6722style 3
6723)
6724defaultSaCptPort (CptPort
6725ps "OnEdgeStrategy"
6726shape (Triangle
6727ro 90
6728va (VaSet
6729vasetType 1
6730fg "0,65535,0"
6731)
6732xt "0,0,750,750"
6733)
6734tg (CPTG
6735ps "CptPortTextPlaceStrategy"
6736stg "VerticalLayoutStrategy"
6737f (Text
6738va (VaSet
6739)
6740xt "0,750,1800,1750"
6741st "Port"
6742blo "0,1550"
6743)
6744)
6745thePort (LogicalPort
6746decl (Decl
6747n "Port"
6748t ""
6749o 0
6750)
6751)
6752)
6753defaultSaCptPortBuffer (CptPort
6754ps "OnEdgeStrategy"
6755shape (Diamond
6756va (VaSet
6757vasetType 1
6758fg "65535,65535,65535"
6759)
6760xt "0,0,750,750"
6761)
6762tg (CPTG
6763ps "CptPortTextPlaceStrategy"
6764stg "VerticalLayoutStrategy"
6765f (Text
6766va (VaSet
6767)
6768xt "0,750,1800,1750"
6769st "Port"
6770blo "0,1550"
6771)
6772)
6773thePort (LogicalPort
6774m 3
6775decl (Decl
6776n "Port"
6777t ""
6778o 0
6779)
6780)
6781)
6782defaultDeclText (MLText
6783va (VaSet
6784font "Courier New,8,0"
6785)
6786)
6787archDeclarativeBlock (BdArchDeclBlock
6788uid 1,0
6789stg "BdArchDeclBlockLS"
6790declLabel (Text
6791uid 2,0
6792va (VaSet
6793font "Arial,8,1"
6794)
6795xt "-4000,9600,1400,10600"
6796st "Declarations"
6797blo "-4000,10400"
6798)
6799portLabel (Text
6800uid 3,0
6801va (VaSet
6802font "Arial,8,1"
6803)
6804xt "-4000,10600,-1300,11600"
6805st "Ports:"
6806blo "-4000,11400"
6807)
6808preUserLabel (Text
6809uid 4,0
6810va (VaSet
6811isHidden 1
6812font "Arial,8,1"
6813)
6814xt "-4000,9600,-200,10600"
6815st "Pre User:"
6816blo "-4000,10400"
6817)
6818preUserText (MLText
6819uid 5,0
6820va (VaSet
6821isHidden 1
6822font "Courier New,8,0"
6823)
6824xt "-4000,9600,-4000,9600"
6825tm "BdDeclarativeTextMgr"
6826)
6827diagSignalLabel (Text
6828uid 6,0
6829va (VaSet
6830font "Arial,8,1"
6831)
6832xt "-4000,22800,3100,23800"
6833st "Diagram Signals:"
6834blo "-4000,23600"
6835)
6836postUserLabel (Text
6837uid 7,0
6838va (VaSet
6839isHidden 1
6840font "Arial,8,1"
6841)
6842xt "-4000,9600,700,10600"
6843st "Post User:"
6844blo "-4000,10400"
6845)
6846postUserText (MLText
6847uid 8,0
6848va (VaSet
6849isHidden 1
6850font "Courier New,8,0"
6851)
6852xt "-4000,9600,-4000,9600"
6853tm "BdDeclarativeTextMgr"
6854)
6855showAttributes 1
6856)
6857commonDM (CommonDM
6858ldm (LogicalDM
6859suid 68,0
6860usingSuid 1
6861emptyRow *222 (LEmptyRow
6862)
6863uid 54,0
6864optionalChildren [
6865*223 (RefLabelRowHdr
6866)
6867*224 (TitleRowHdr
6868)
6869*225 (FilterRowHdr
6870)
6871*226 (RefLabelColHdr
6872tm "RefLabelColHdrMgr"
6873)
6874*227 (RowExpandColHdr
6875tm "RowExpandColHdrMgr"
6876)
6877*228 (GroupColHdr
6878tm "GroupColHdrMgr"
6879)
6880*229 (NameColHdr
6881tm "BlockDiagramNameColHdrMgr"
6882)
6883*230 (ModeColHdr
6884tm "BlockDiagramModeColHdrMgr"
6885)
6886*231 (TypeColHdr
6887tm "BlockDiagramTypeColHdrMgr"
6888)
6889*232 (BoundsColHdr
6890tm "BlockDiagramBoundsColHdrMgr"
6891)
6892*233 (InitColHdr
6893tm "BlockDiagramInitColHdrMgr"
6894)
6895*234 (EolColHdr
6896tm "BlockDiagramEolColHdrMgr"
6897)
6898*235 (LeafLogPort
6899port (LogicalPort
6900m 1
6901decl (Decl
6902n "sclk"
6903t "std_logic"
6904o 6
6905suid 1,0
6906)
6907)
6908uid 390,0
6909)
6910*236 (LeafLogPort
6911port (LogicalPort
6912decl (Decl
6913n "clk_50MHz"
6914t "std_logic"
6915preAdd 0
6916posAdd 0
6917o 1
6918suid 2,0
6919)
6920)
6921uid 392,0
6922)
6923*237 (LeafLogPort
6924port (LogicalPort
6925m 1
6926decl (Decl
6927n "dac_cs"
6928t "std_logic"
6929o 5
6930suid 5,0
6931)
6932)
6933uid 398,0
6934)
6935*238 (LeafLogPort
6936port (LogicalPort
6937m 1
6938decl (Decl
6939n "sensor_cs"
6940t "std_logic_vector"
6941b "(3 DOWNTO 0)"
6942o 8
6943suid 6,0
6944)
6945)
6946uid 400,0
6947)
6948*239 (LeafLogPort
6949port (LogicalPort
6950m 4
6951decl (Decl
6952n "data"
6953t "std_logic_vector"
6954b "(15 downto 0)"
6955o 14
6956suid 14,0
6957)
6958)
6959uid 497,0
6960)
6961*240 (LeafLogPort
6962port (LogicalPort
6963decl (Decl
6964n "dac_array"
6965t "dac_array_type"
6966o 3
6967suid 17,0
6968)
6969)
6970uid 499,0
6971)
6972*241 (LeafLogPort
6973port (LogicalPort
6974decl (Decl
6975n "config_start"
6976t "std_logic"
6977o 2
6978suid 27,0
6979)
6980)
6981uid 1255,0
6982)
6983*242 (LeafLogPort
6984port (LogicalPort
6985m 1
6986decl (Decl
6987n "config_ready"
6988t "std_logic"
6989o 4
6990suid 28,0
6991)
6992)
6993uid 1257,0
6994)
6995*243 (LeafLogPort
6996port (LogicalPort
6997m 4
6998decl (Decl
6999n "dac_config_ready"
7000t "std_logic"
7001o 11
7002suid 30,0
7003)
7004)
7005uid 1259,0
7006)
7007*244 (LeafLogPort
7008port (LogicalPort
7009m 4
7010decl (Decl
7011n "dac_config_start"
7012t "std_logic"
7013o 12
7014suid 31,0
7015)
7016)
7017uid 1261,0
7018)
7019*245 (LeafLogPort
7020port (LogicalPort
7021m 4
7022decl (Decl
7023n "dac_id"
7024t "std_logic_vector"
7025b "(2 DOWNTO 0)"
7026o 13
7027suid 32,0
7028)
7029)
7030uid 1358,0
7031)
7032*246 (LeafLogPort
7033port (LogicalPort
7034m 4
7035decl (Decl
7036n "sensor_id"
7037t "std_logic_vector"
7038b "(1 DOWNTO 0)"
7039o 15
7040suid 33,0
7041)
7042)
7043uid 1360,0
7044)
7045*247 (LeafLogPort
7046port (LogicalPort
7047m 4
7048decl (Decl
7049n "sensor_start"
7050t "std_logic"
7051o 16
7052suid 34,0
7053)
7054)
7055uid 1362,0
7056)
7057*248 (LeafLogPort
7058port (LogicalPort
7059m 4
7060decl (Decl
7061n "sensor_valid"
7062t "std_logic"
7063o 17
7064suid 35,0
7065)
7066)
7067uid 1364,0
7068)
7069*249 (LeafLogPort
7070port (LogicalPort
7071m 1
7072decl (Decl
7073n "sensor_array"
7074t "sensor_array_type"
7075o 7
7076suid 37,0
7077)
7078)
7079uid 1608,0
7080)
7081*250 (LeafLogPort
7082port (LogicalPort
7083m 1
7084decl (Decl
7085n "sensor_ready"
7086t "std_logic"
7087o 9
7088suid 38,0
7089)
7090)
7091uid 1610,0
7092)
7093*251 (LeafLogPort
7094port (LogicalPort
7095m 1
7096decl (Decl
7097n "mosi"
7098t "std_logic"
7099o 19
7100suid 46,0
7101i "'0'"
7102)
7103)
7104uid 2369,0
7105)
7106*252 (LeafLogPort
7107port (LogicalPort
7108m 2
7109decl (Decl
7110n "miso"
7111t "std_logic"
7112preAdd 0
7113posAdd 0
7114o 10
7115suid 47,0
7116)
7117)
7118uid 2404,0
7119)
7120*253 (LeafLogPort
7121port (LogicalPort
7122m 4
7123decl (Decl
7124n "T_sensor_start"
7125t "std_logic"
7126o 6
7127suid 52,0
7128)
7129)
7130uid 2748,0
7131)
7132*254 (LeafLogPort
7133port (LogicalPort
7134lang 10
7135m 1
7136decl (Decl
7137n "current_dac_array"
7138t "dac_array_type"
7139o 21
7140suid 55,0
7141i "( others => 0)"
7142)
7143)
7144uid 2840,0
7145)
7146*255 (LeafLogPort
7147port (LogicalPort
7148m 4
7149decl (Decl
7150n "clk_2Mhz"
7151t "std_logic"
7152o 21
7153suid 58,0
7154i "'0'"
7155)
7156)
7157uid 2992,0
7158)
7159*256 (LeafLogPort
7160port (LogicalPort
7161m 4
7162decl (Decl
7163n "sclk_enable_sig"
7164t "std_logic"
7165o 22
7166suid 60,0
7167i "'0'"
7168)
7169)
7170uid 2994,0
7171)
7172*257 (LeafLogPort
7173port (LogicalPort
7174decl (Decl
7175n "sclk_enable_i"
7176t "std_logic"
7177o 23
7178suid 61,0
7179)
7180)
7181uid 2996,0
7182scheme 0
7183)
7184*258 (LeafLogPort
7185port (LogicalPort
7186m 4
7187decl (Decl
7188n "sclk_enable_override"
7189t "std_logic"
7190o 24
7191suid 62,0
7192i "'0'"
7193)
7194)
7195uid 3085,0
7196)
7197*259 (LeafLogPort
7198port (LogicalPort
7199m 4
7200decl (Decl
7201n "spi_channel_ready"
7202t "std_logic"
7203o 25
7204suid 65,0
7205i "'1'"
7206)
7207)
7208uid 3177,0
7209)
7210*260 (LeafLogPort
7211port (LogicalPort
7212m 4
7213decl (Decl
7214n "measured_temp_data"
7215t "std_logic_vector"
7216b "(15 DOWNTO 0)"
7217o 26
7218suid 66,0
7219i "(others => '0')"
7220)
7221)
7222uid 3263,0
7223)
7224*261 (LeafLogPort
7225port (LogicalPort
7226m 1
7227decl (Decl
7228n "debug_16bit"
7229t "std_logic_vector"
7230b "( 15 DOWNTO 0 )"
7231o 27
7232suid 68,0
7233)
7234)
7235uid 3392,0
7236)
7237]
7238)
7239pdm (PhysicalDM
7240displayShortBounds 1
7241editShortBounds 1
7242uid 67,0
7243optionalChildren [
7244*262 (Sheet
7245sheetRow (SheetRow
7246headerVa (MVa
7247cellColor "49152,49152,49152"
7248fontColor "0,0,0"
7249font "Tahoma,10,0"
7250)
7251cellVa (MVa
7252cellColor "65535,65535,65535"
7253fontColor "0,0,0"
7254font "Tahoma,10,0"
7255)
7256groupVa (MVa
7257cellColor "39936,56832,65280"
7258fontColor "0,0,0"
7259font "Tahoma,10,0"
7260)
7261emptyMRCItem *263 (MRCItem
7262litem &222
7263pos 27
7264dimension 20
7265)
7266uid 69,0
7267optionalChildren [
7268*264 (MRCItem
7269litem &223
7270pos 0
7271dimension 20
7272uid 70,0
7273)
7274*265 (MRCItem
7275litem &224
7276pos 1
7277dimension 23
7278uid 71,0
7279)
7280*266 (MRCItem
7281litem &225
7282pos 2
7283hidden 1
7284dimension 20
7285uid 72,0
7286)
7287*267 (MRCItem
7288litem &235
7289pos 0
7290dimension 20
7291uid 391,0
7292)
7293*268 (MRCItem
7294litem &236
7295pos 1
7296dimension 20
7297uid 393,0
7298)
7299*269 (MRCItem
7300litem &237
7301pos 2
7302dimension 20
7303uid 399,0
7304)
7305*270 (MRCItem
7306litem &238
7307pos 3
7308dimension 20
7309uid 401,0
7310)
7311*271 (MRCItem
7312litem &239
7313pos 9
7314dimension 20
7315uid 498,0
7316)
7317*272 (MRCItem
7318litem &240
7319pos 4
7320dimension 20
7321uid 500,0
7322)
7323*273 (MRCItem
7324litem &241
7325pos 5
7326dimension 20
7327uid 1256,0
7328)
7329*274 (MRCItem
7330litem &242
7331pos 6
7332dimension 20
7333uid 1258,0
7334)
7335*275 (MRCItem
7336litem &243
7337pos 10
7338dimension 20
7339uid 1260,0
7340)
7341*276 (MRCItem
7342litem &244
7343pos 11
7344dimension 20
7345uid 1262,0
7346)
7347*277 (MRCItem
7348litem &245
7349pos 12
7350dimension 20
7351uid 1359,0
7352)
7353*278 (MRCItem
7354litem &246
7355pos 13
7356dimension 20
7357uid 1361,0
7358)
7359*279 (MRCItem
7360litem &247
7361pos 14
7362dimension 20
7363uid 1363,0
7364)
7365*280 (MRCItem
7366litem &248
7367pos 15
7368dimension 20
7369uid 1365,0
7370)
7371*281 (MRCItem
7372litem &249
7373pos 7
7374dimension 20
7375uid 1609,0
7376)
7377*282 (MRCItem
7378litem &250
7379pos 8
7380dimension 20
7381uid 1611,0
7382)
7383*283 (MRCItem
7384litem &251
7385pos 16
7386dimension 20
7387uid 2370,0
7388)
7389*284 (MRCItem
7390litem &252
7391pos 17
7392dimension 20
7393uid 2405,0
7394)
7395*285 (MRCItem
7396litem &253
7397pos 18
7398dimension 20
7399uid 2749,0
7400)
7401*286 (MRCItem
7402litem &254
7403pos 19
7404dimension 20
7405uid 2841,0
7406)
7407*287 (MRCItem
7408litem &255
7409pos 20
7410dimension 20
7411uid 2993,0
7412)
7413*288 (MRCItem
7414litem &256
7415pos 21
7416dimension 20
7417uid 2995,0
7418)
7419*289 (MRCItem
7420litem &257
7421pos 22
7422dimension 20
7423uid 2997,0
7424)
7425*290 (MRCItem
7426litem &258
7427pos 23
7428dimension 20
7429uid 3086,0
7430)
7431*291 (MRCItem
7432litem &259
7433pos 24
7434dimension 20
7435uid 3178,0
7436)
7437*292 (MRCItem
7438litem &260
7439pos 25
7440dimension 20
7441uid 3264,0
7442)
7443*293 (MRCItem
7444litem &261
7445pos 26
7446dimension 20
7447uid 3393,0
7448)
7449]
7450)
7451sheetCol (SheetCol
7452propVa (MVa
7453cellColor "0,49152,49152"
7454fontColor "0,0,0"
7455font "Tahoma,10,0"
7456textAngle 90
7457)
7458uid 73,0
7459optionalChildren [
7460*294 (MRCItem
7461litem &226
7462pos 0
7463dimension 20
7464uid 74,0
7465)
7466*295 (MRCItem
7467litem &228
7468pos 1
7469dimension 50
7470uid 75,0
7471)
7472*296 (MRCItem
7473litem &229
7474pos 2
7475dimension 100
7476uid 76,0
7477)
7478*297 (MRCItem
7479litem &230
7480pos 3
7481dimension 50
7482uid 77,0
7483)
7484*298 (MRCItem
7485litem &231
7486pos 4
7487dimension 100
7488uid 78,0
7489)
7490*299 (MRCItem
7491litem &232
7492pos 5
7493dimension 100
7494uid 79,0
7495)
7496*300 (MRCItem
7497litem &233
7498pos 6
7499dimension 50
7500uid 80,0
7501)
7502*301 (MRCItem
7503litem &234
7504pos 7
7505dimension 80
7506uid 81,0
7507)
7508]
7509)
7510fixedCol 4
7511fixedRow 2
7512name "Ports"
7513uid 68,0
7514vaOverrides [
7515]
7516)
7517]
7518)
7519uid 53,0
7520)
7521genericsCommonDM (CommonDM
7522ldm (LogicalDM
7523emptyRow *302 (LEmptyRow
7524)
7525uid 83,0
7526optionalChildren [
7527*303 (RefLabelRowHdr
7528)
7529*304 (TitleRowHdr
7530)
7531*305 (FilterRowHdr
7532)
7533*306 (RefLabelColHdr
7534tm "RefLabelColHdrMgr"
7535)
7536*307 (RowExpandColHdr
7537tm "RowExpandColHdrMgr"
7538)
7539*308 (GroupColHdr
7540tm "GroupColHdrMgr"
7541)
7542*309 (NameColHdr
7543tm "GenericNameColHdrMgr"
7544)
7545*310 (TypeColHdr
7546tm "GenericTypeColHdrMgr"
7547)
7548*311 (InitColHdr
7549tm "GenericValueColHdrMgr"
7550)
7551*312 (PragmaColHdr
7552tm "GenericPragmaColHdrMgr"
7553)
7554*313 (EolColHdr
7555tm "GenericEolColHdrMgr"
7556)
7557]
7558)
7559pdm (PhysicalDM
7560displayShortBounds 1
7561editShortBounds 1
7562uid 95,0
7563optionalChildren [
7564*314 (Sheet
7565sheetRow (SheetRow
7566headerVa (MVa
7567cellColor "49152,49152,49152"
7568fontColor "0,0,0"
7569font "Tahoma,10,0"
7570)
7571cellVa (MVa
7572cellColor "65535,65535,65535"
7573fontColor "0,0,0"
7574font "Tahoma,10,0"
7575)
7576groupVa (MVa
7577cellColor "39936,56832,65280"
7578fontColor "0,0,0"
7579font "Tahoma,10,0"
7580)
7581emptyMRCItem *315 (MRCItem
7582litem &302
7583pos 0
7584dimension 20
7585)
7586uid 97,0
7587optionalChildren [
7588*316 (MRCItem
7589litem &303
7590pos 0
7591dimension 20
7592uid 98,0
7593)
7594*317 (MRCItem
7595litem &304
7596pos 1
7597dimension 23
7598uid 99,0
7599)
7600*318 (MRCItem
7601litem &305
7602pos 2
7603hidden 1
7604dimension 20
7605uid 100,0
7606)
7607]
7608)
7609sheetCol (SheetCol
7610propVa (MVa
7611cellColor "0,49152,49152"
7612fontColor "0,0,0"
7613font "Tahoma,10,0"
7614textAngle 90
7615)
7616uid 101,0
7617optionalChildren [
7618*319 (MRCItem
7619litem &306
7620pos 0
7621dimension 20
7622uid 102,0
7623)
7624*320 (MRCItem
7625litem &308
7626pos 1
7627dimension 50
7628uid 103,0
7629)
7630*321 (MRCItem
7631litem &309
7632pos 2
7633dimension 100
7634uid 104,0
7635)
7636*322 (MRCItem
7637litem &310
7638pos 3
7639dimension 100
7640uid 105,0
7641)
7642*323 (MRCItem
7643litem &311
7644pos 4
7645dimension 50
7646uid 106,0
7647)
7648*324 (MRCItem
7649litem &312
7650pos 5
7651dimension 50
7652uid 107,0
7653)
7654*325 (MRCItem
7655litem &313
7656pos 6
7657dimension 80
7658uid 108,0
7659)
7660]
7661)
7662fixedCol 3
7663fixedRow 2
7664name "Ports"
7665uid 96,0
7666vaOverrides [
7667]
7668)
7669]
7670)
7671uid 82,0
7672type 1
7673)
7674activeModelName "BlockDiag"
7675)
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