source: firmware/FSC/src/ad7719_adc.h@ 18558

Last change on this file since 18558 was 17633, checked in by dneise, 11 years ago
a lot of whitespace changes and removed unneeded includes
File size: 3.1 KB
Line 
1#ifndef __AD7719_ADC_H
2#define __AD7719_ADC_H
3//-----------------------------------------------------------------------------
4
5#include "application.h"
6//#include "num_conversion.h"
7//-----------------------------------------------------------------------------
8// SPI INTERFACE of AD7719
9// SCLK:
10// SCLK HIGH & LOW cycle min 100ns --> 5MHz maximum SCLK frequency
11// FSC runs at 8MHz CPU clock ... so 4MHz SPI clock is the theoretocal maximum anyway.
12// SCLK should idle high --> mode 3
13//
14// CS falling edge & SCLK falling edge, may be at the same time ...
15//
16
17// There is a delay in all communications between AD7719 and ATmega.
18// I guess this is not needed at all.
19// This switch is able to get them in again
20#define AD7719_COM_DELAY_NEEDED
21
22// Bit Definitions
23#define ADC_RDY PD6
24#define ADC_RST PD7
25#define AD7719_IS_READY() (!(PIND & (1<<PD6))) // TRUE if PD6=0 AD_RDY is inverted logic.
26
27// Port Definitions
28#define ADC_PRT PORTD
29#define ADC_DDR DDRD
30#define ADC_PIN PIND
31
32
33// ON CHIP REGISTER ADDRESSES
34#define STATUS_RD 0x40
35
36#define MODE_WR 0x01
37#define MODE_RD 0x41
38
39#define AD0CON_WR 0x02
40#define AD0CON_RD 0x42
41
42#define AD1CON_WR 0x03
43#define AD1CON_RD 0x43
44
45#define FILTER_WR 0x04
46#define FILTER_RD 0x44
47
48#define AD0DAT_RD 0x45
49#define AD1DAT_RD 0x46
50
51#define IOCON_WR 0x07
52#define IOCON_RD 0x47
53
54#define AD0OFS_WR 0x08
55#define AD0OFS_RD 0x48
56
57#define AD1OFS_WR 0x09
58#define AD1OFS_RD 0x49
59
60#define AD0GAIN_WR 0x0A
61#define AD0GAIN_RD 0x4A
62
63#define AD1GAIN_WR 0x0B
64#define AD1GAIN_RD 0x4B
65
66#define ID_RD 0x4F
67
68// REGISTER INIT VALUES
69
70 //Init Configure and Initialize AD7719
71 //http://designtools.analog.com/dt/adc/codegen/ad7719.html
72
73#define IOCON_INIT_HIGH 0x03 //0000.0011 // I-sources I1 and I2 are switched on, thats all
74#define IOCON_INIT_LOWBYTE 0x00
75
76#define FILTER_INIT 0x52 //0x52 euro use 50Hz = -171dB and 60Hz = -58dB Rejectjon Updaterate = 4Hz
77 // 0x52=82 decimal. f_ADC=16.6Hz; t_ADC=60ms; t_settle = 120ms
78
79#define AD1CON_INIT 0x31 //0011.0001
80 // AD1EN is set --> AUX ADc is used for Temp measurement.
81 // ACH = 011 --> Tempsensor
82 // U/#B = 0 --> bipolar, but i'm not entirely sure if this is correct.
83 // ARN = 1 --> input range is REFIN2 , but when tempsensor is chosen, internal ref is used ...
84
85#define AD0CON_INIT 0x8E // 1000.1110
86 // AD0EN is set --> main ADC is swtiched on
87 // WL is cleared --> 24bit
88 // CH = 00 --> AIN1 , AIN2 used
89 // U/#B = 1 --> unipolar
90 // RN=110 --> input range = +-1.28V --> whatever this means in ratiometric measurements.
91
92
93#define MODE_IDLE 0x01
94#define MODE_SINGLE 0x02
95#define MODE_CONT 0x03
96#define MODE_INTERNAL_ZERO_CAL 0x04 // not tested
97#define MODE_INTERNAL_FULL_CAL 0x05 // not tested
98
99// since the ADC is chopped, one should wait 3 conversions
100// after the muxer was switched, until the reading is okay.
101#define READINGS_UNTIL_AD7719_SETTLED 3
102
103void ad7719_init(void);
104void startconv(U08 continuous);
105void stopconv(void);
106U32 read_adc(void);
107//-----------------------------------------------------------------------------
108#endif
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