source: firmware/FTM/FTM_central_control.vhd@ 10366

Last change on this file since 10366 was 10366, checked in by weitzel, 10 years ago
FTM trigger manager from MCSE added; DCM arrangement changed; changes in FTM ethernet module
File size: 9.7 KB
Line 
1----------------------------------------------------------------------------------
2-- Company: ETH Zurich, Institute for Particle Physics
3-- Engineer: Q. Weitzel
4--
5-- Create Date: 15:56:13 02/28/2011
6-- Design Name:
7-- Module Name: FTM_central_control - Behavioral
8-- Project Name:
9-- Target Devices:
10-- Tool versions:
11-- Description: Central FSM for FTM firmware
12--
13-- Dependencies:
14--
15-- Revision:
16-- Revision 0.01 - File Created
17-- Additional Comments:
18--
19----------------------------------------------------------------------------------
20library IEEE;
21use IEEE.STD_LOGIC_1164.ALL;
22use IEEE.STD_LOGIC_ARITH.ALL;
23use IEEE.STD_LOGIC_UNSIGNED.ALL;
24
25library ftm_definitions;
26USE ftm_definitions.ftm_array_types.all;
27USE ftm_definitions.ftm_constants.all;
28
29---- Uncomment the following library declaration if instantiating
30---- any Xilinx primitives in this code.
31--library UNISIM;
32--use UNISIM.VComponents.all;
33
34entity FTM_central_control is
35 port(
36 clk : IN std_logic;
37 clk_ready : in std_logic;
38 clk_scaler : IN std_logic;
39 new_config : IN std_logic;
40 config_started : OUT std_logic := '0';
41 config_started_ack : IN std_logic;
42 config_start_eth : OUT std_logic := '0';
43 config_started_eth : IN std_logic;
44 config_ready_eth : IN std_logic;
45 config_start_ftu : OUT std_logic := '0';
46 config_started_ftu : IN std_logic ;
47 config_ready_ftu : IN std_logic ;
48 ping_ftu_start : IN std_logic;
49 ping_ftu_started : OUT std_logic := '0';
50 ping_ftu_ready : OUT std_logic := '0';
51 ping_ftu_start_ftu : OUT std_logic := '0';
52 ping_ftu_started_ftu : IN std_logic;
53 ping_ftu_ready_ftu : IN std_logic;
54 rates_ftu : OUT std_logic := '0';
55 rates_started_ftu : IN std_logic;
56 rates_ready_ftu : IN std_logic;
57 prescaling_FTU01 : IN std_logic_vector(7 downto 0);
58 dd_send : OUT std_logic := '0';
59 dd_send_ack : IN std_logic;
60 dd_send_ready : IN std_logic;
61 config_start_cc : out std_logic := '0';
62 config_started_cc : in std_logic;
63 config_ready_cc : in std_logic;
64 config_trigger : out std_logic := '0';
65 config_trigger_done : in std_logic
66 );
67end FTM_central_control;
68
69architecture Behavioral of FTM_central_control is
70
71 signal reset_scaler_sig : std_logic := '0';
72 signal reset_period_sig : std_logic := '0';
73 signal scaler_counts_sig : integer := 0;
74 signal scaler_period_sig : integer range 0 to 128 * (LOW_FREQUENCY / SCALER_FREQ_DIVIDER) := 128 * (LOW_FREQUENCY / SCALER_FREQ_DIVIDER);
75 signal period_finished_sig : std_logic := '0';
76 signal wait_cnt_sig : integer range 0 to 10 := 0;
77 signal new_period_sr_sig : std_logic_vector(1 downto 0) := (others => '0');
78 signal new_period_sig : std_logic := '0';
79 signal new_period_ack_sig : std_logic := '0';
80 signal prescaling_FTU01_sig : std_logic_vector(7 downto 0) := "00100111";
81
82 type state_central_proc_type is (CP_INIT,
83 CP_CONFIG_START, CP_CONFIG, CP_CONFIG_01,
84 CP_CONFIG_CC, CP_CONFIG_CC_01,
85 CP_CONFIG_FTU, CP_CONFIG_FTU_01,
86 CP_CONFIG_SCALER, CP_CONFIG_SCALER_01,
87 CP_CONFIG_TRIGGER, CP_CONFIG_TRIGGER_01,
88 CP_IDLE, CP_PING, CP_READ_RATES, CP_READ_RATES_01,
89 CP_SEND_START, CP_SEND_END);
90 signal state_central_proc : state_central_proc_type := CP_INIT;
91
92begin
93
94 central_proc : process (clk, prescaling_FTU01)
95 begin
96 if rising_edge (clk) then
97 case state_central_proc is
98
99 when CP_INIT =>
100 if (clk_ready = '1') then
101 state_central_proc <= CP_CONFIG;
102 end if;
103
104 when CP_CONFIG_START =>
105 if (config_started_ack = '1') then
106 config_started <= '0';
107 state_central_proc <= CP_CONFIG;
108 end if;
109
110 when CP_CONFIG =>
111 config_start_eth <= '1';
112 if (config_started_eth = '1') then
113 config_start_eth <= '0';
114 state_central_proc <= CP_CONFIG_01;
115 end if;
116
117 when CP_CONFIG_01 =>
118 if (config_ready_eth = '1') then
119 state_central_proc <= CP_CONFIG_CC;
120 --state_central_proc <= CP_CONFIG_SCALER;
121 --state_central_proc <= CP_IDLE;
122 end if;
123
124 when CP_CONFIG_CC =>
125 config_start_cc <= '1';
126 if (config_started_cc = '1') then
127 config_start_cc <= '0';
128 state_central_proc <= CP_CONFIG_CC_01;
129 end if;
130
131 when CP_CONFIG_CC_01 =>
132 if (config_ready_cc = '1') then
133 state_central_proc <= CP_CONFIG_FTU;
134 end if;
135
136 when CP_CONFIG_FTU =>
137 config_start_ftu <= '1';
138 if (config_started_ftu = '1') then
139 config_start_ftu <= '0';
140 state_central_proc <= CP_CONFIG_FTU_01;
141 end if;
142
143 when CP_CONFIG_FTU_01 =>
144 if (config_ready_ftu = '1') then
145 state_central_proc <= CP_CONFIG_SCALER;
146 end if;
147
148 when CP_CONFIG_SCALER =>
149 prescaling_FTU01_sig <= prescaling_FTU01;
150 --reset_period_sig <= '1';
151 state_central_proc <= CP_CONFIG_SCALER_01;
152
153 when CP_CONFIG_SCALER_01 =>
154 --reset_period_sig <= '0';
155 if wait_cnt_sig < 5 then
156 wait_cnt_sig <= wait_cnt_sig + 1;
157 reset_scaler_sig <= '1';
158 state_central_proc <= CP_CONFIG_SCALER_01;
159 else
160 wait_cnt_sig <= 0;
161 reset_scaler_sig <= '0';
162 state_central_proc <= CP_CONFIG_TRIGGER;
163 end if;
164
165 when CP_CONFIG_TRIGGER =>
166 --config trigger_manager block
167 config_trigger <= '1';
168 state_central_proc <= CP_CONFIG_TRIGGER_01;
169
170 when CP_CONFIG_TRIGGER_01 =>
171 config_trigger <= '0';
172 if (config_trigger_done = '1') then
173 state_central_proc <= CP_IDLE;
174 end if;
175
176 when CP_IDLE =>
177 if (new_config = '1') then
178 config_started <= '1';
179 state_central_proc <= CP_CONFIG_START;
180 elsif (ping_ftu_start = '1') then
181 ping_ftu_start_ftu <= '1';
182 if (ping_ftu_started_ftu = '1') then
183 ping_ftu_start_ftu <= '0';
184 ping_ftu_started <= '1';
185 ping_ftu_ready <= '0';
186 state_central_proc <= CP_PING;
187 end if;
188 --elsif (scaler_counts_sig = scaler_period_sig) then
189 elsif (new_period_sig = '1') then
190 new_period_ack_sig <= '1';
191 rates_ftu <= '1';
192 state_central_proc <= CP_READ_RATES;
193 end if;
194
195 when CP_PING =>
196 if (ping_ftu_ready_ftu = '1') then
197 if (ping_ftu_start = '0') then
198 ping_ftu_started <= '0';
199 ping_ftu_ready <= '1';
200 state_central_proc <= CP_IDLE;
201 end if;
202 end if;
203
204 when CP_READ_RATES =>
205 new_period_ack_sig <= '0';
206 if (rates_started_ftu = '1') then
207 rates_ftu <= '0';
208 state_central_proc <= CP_READ_RATES_01;
209 end if;
210
211 when CP_READ_RATES_01 =>
212 if (rates_ready_ftu = '1') then
213 state_central_proc <= CP_SEND_START;
214 end if;
215
216 when CP_SEND_START =>
217 dd_send <= '1';
218 if (dd_send_ack = '1') then
219 dd_send <= '0';
220 state_central_proc <= CP_SEND_END;
221 end if;
222
223 when CP_SEND_END =>
224 if (dd_send_ready = '1') then
225 state_central_proc <= CP_IDLE;
226 end if;
227
228 end case;
229 end if;
230 end process central_proc;
231
232 scaler_process: process(reset_scaler_sig, clk_scaler)
233 begin
234 if (reset_scaler_sig = '1') then
235 scaler_counts_sig <= 0;
236 period_finished_sig <= '0';
237 elsif rising_edge(clk_scaler) then
238 if (scaler_counts_sig < scaler_period_sig) then
239 scaler_counts_sig <= scaler_counts_sig + 1;
240 period_finished_sig <= '0';
241 else
242 period_finished_sig <= '1';
243 scaler_counts_sig <= 0;
244 end if;
245 end if;
246 end process scaler_process;
247
248-- process(reset_period_sig)
249-- begin
250-- if rising_edge(reset_period_sig) then
251-- if ((conv_integer(unsigned(prescaling_FTU01))) mod 2 = 0) then
252-- scaler_period_sig <= ((((conv_integer(unsigned(prescaling_FTU01)) / 2)) * (LOW_FREQUENCY / SCALER_FREQ_DIVIDER)) + (LOW_FREQUENCY / (2 * SCALER_FREQ_DIVIDER)));
253-- else
254-- scaler_period_sig <= (((conv_integer(unsigned(prescaling_FTU01)) - 1) / 2) + 1) * (LOW_FREQUENCY / SCALER_FREQ_DIVIDER);
255-- end if;
256-- end if;
257-- end process;
258
259 process(prescaling_FTU01_sig)
260 begin
261 if ((conv_integer(unsigned(prescaling_FTU01_sig))) mod 2 = 0) then
262 scaler_period_sig <= ((((conv_integer(unsigned(prescaling_FTU01_sig)) / 2)) * (LOW_FREQUENCY / SCALER_FREQ_DIVIDER)) + (LOW_FREQUENCY / (2 * SCALER_FREQ_DIVIDER)));
263 else
264 scaler_period_sig <= (((conv_integer(unsigned(prescaling_FTU01_sig)) - 1) / 2) + 1) * (LOW_FREQUENCY / SCALER_FREQ_DIVIDER);
265 end if;
266 end process;
267
268 detect_period_finished: process(clk)
269 begin
270 if rising_edge(clk) then
271 new_period_sr_sig <= new_period_sr_sig(new_period_sr_sig'left - 1 downto 0) & period_finished_sig;
272 if(new_period_ack_sig = '1') then
273 new_period_sig <= '0';
274 else
275 if (new_period_sr_sig(1 downto 0) = "01") then
276 new_period_sig <= '1';
277 end if;
278 end if;
279 end if;
280 end process detect_period_finished;
281
282end Behavioral;
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