Last change
on this file since 10855 was 10855, checked in by vogler, 13 years ago |
Lightpulser Basic version with 50MHz clock only added
|
File size:
1.8 KB
|
Line | |
---|
1 | -- ----------------------------------------------------------------------------
|
---|
2 | -------------------------------------------------------------------------------
|
---|
3 | -- FTM Light pulser interface: FM__pulse generator for feedback
|
---|
4 | -------------------------------------------------------------------------------
|
---|
5 | --
|
---|
6 | --
|
---|
7 | -- Created: May 13 2011
|
---|
8 | -- by Patrick Vogler
|
---|
9 | --
|
---|
10 | -- modified: May 26 2011
|
---|
11 | -- by Patrick Vogler
|
---|
12 | -- "Lightpulser Basic Version"
|
---|
13 |
|
---|
14 | LIBRARY ieee;
|
---|
15 | USE ieee.std_logic_1164.all;
|
---|
16 | USE ieee.std_logic_arith.all;
|
---|
17 | USE ieee.std_logic_unsigned.all;
|
---|
18 |
|
---|
19 |
|
---|
20 | library ftm_definitions;
|
---|
21 | USE ftm_definitions.ftm_constants.all;
|
---|
22 |
|
---|
23 |
|
---|
24 | ENTITY FM_pulse_generator_Basic IS
|
---|
25 | GENERIC(
|
---|
26 | pulse_length : integer := FLD_PULSE_LENGTH -- 48ns
|
---|
27 | );
|
---|
28 | PORT(
|
---|
29 | clk : in std_logic;
|
---|
30 | pulse_freq : in std_logic_vector (5 downto 0);
|
---|
31 | FM_out : out std_logic := '0'
|
---|
32 | );
|
---|
33 | END FM_pulse_generator_Basic;
|
---|
34 |
|
---|
35 | ARCHITECTURE beha OF FM_pulse_generator_Basic IS
|
---|
36 |
|
---|
37 | BEGIN
|
---|
38 |
|
---|
39 | clk_div: process (clk)
|
---|
40 | variable Z : integer range - FLD_MIN_FREQ_DIV_BASIC to FLD_FD_MAX_RANGE_BASIC;
|
---|
41 | variable Y : integer range 0 to FLD_PULSE_LENGTH_BASIC;
|
---|
42 | variable X : integer range 0 to FLD_FD_MULT_BASIC ;
|
---|
43 |
|
---|
44 | begin
|
---|
45 |
|
---|
46 | if rising_edge(clk) then
|
---|
47 | if (X < FLD_FD_MULT_BASIC) then
|
---|
48 | X := X+1;
|
---|
49 | else
|
---|
50 | X := 0;
|
---|
51 | if (Z < pulse_freq) then
|
---|
52 | Z := Z + 1;
|
---|
53 | else
|
---|
54 | Z := - FLD_MIN_FREQ_DIV;
|
---|
55 | Y := 0;
|
---|
56 | end if;
|
---|
57 | end if;
|
---|
58 |
|
---|
59 | if (Y < FLD_PULSE_LENGTH_BASIC) then
|
---|
60 | Y := Y + 1;
|
---|
61 | FM_out <= '1';
|
---|
62 | else
|
---|
63 | FM_out <= '0';
|
---|
64 | end if;
|
---|
65 |
|
---|
66 | end if;
|
---|
67 | end process clk_div;
|
---|
68 |
|
---|
69 | END ARCHITECTURE beha;
|
---|
Note:
See
TracBrowser
for help on using the repository browser.