source: firmware/FTM/ethernet/header_modul_beha.vhd@ 10366

Last change on this file since 10366 was 10366, checked in by weitzel, 10 years ago
FTM trigger manager from MCSE added; DCM arrangement changed; changes in FTM ethernet module
  • Property svn:executable set to *
File size: 2.7 KB
Line 
1--
2-- VHDL Architecture FACT_FTM_lib.header_modul.beha
3--
4-- Created:
5-- by - kai.UNKNOWN (E5PCXX)
6-- at - 10:30:24 03.03.2011
7--
8-- using Mentor Graphics HDL Designer(TM) 2009.1 (Build 12)
9--
10LIBRARY ieee;
11USE ieee.std_logic_1164.all;
12USE ieee.std_logic_arith.all;
13USE IEEE.STD_LOGIC_UNSIGNED.all;
14--LIBRARY FACT_FTM_lib;
15--USE FACT_FTM_lib.ftm_array_types.all;
16--USE FACT_FTM_lib.ftm_constants.all;
17library ftm_definitions;
18USE ftm_definitions.ftm_array_types.all;
19USE ftm_definitions.ftm_constants.all;
20
21ENTITY header_modul IS
22PORT(
23 clk : IN std_logic;
24 get_header : IN std_logic;
25 get_header_started : OUT std_logic := '0';
26 get_header_ready : OUT std_logic := '0';
27 trigger_counter_read : OUT std_logic := '0';
28 trigger_counter_valid : IN std_logic;
29 trigger_counter : IN std_logic_vector (31 DOWNTO 0) := (others => '0');
30 header_board_id : OUT std_logic_vector (63 DOWNTO 0) := (others => '0');
31 header_firmware_id : OUT std_logic_vector (15 DOWNTO 0) := (others => '0');
32 header_trigger_counter : OUT std_logic_vector (31 DOWNTO 0) := (others => '0');
33 header_timestamp_counter : OUT std_logic_vector (47 DOWNTO 0) := (others => '0')
34 );
35END ENTITY header_modul;
36
37--
38ARCHITECTURE beha OF header_modul IS
39
40 type state_header_proc_type is (HP_INIT, HP_CONFIG, HP_IDLE, HP_START, HP_TRG_CNT, HP_END);
41
42 signal state_header_proc : state_header_proc_type := HP_INIT;
43
44BEGIN
45 header_proc : process (clk)
46 begin
47 if rising_edge (clk) then
48 case state_header_proc is
49
50 when HP_INIT =>
51 state_header_proc <= HP_CONFIG;
52
53 when HP_CONFIG =>
54 state_header_proc <= HP_IDLE;
55
56 when HP_IDLE =>
57 if (get_header = '1') then
58 get_header_started <= '1';
59 get_header_ready <= '0';
60 state_header_proc <= HP_START;
61 end if;
62
63 when HP_START =>
64 header_board_id <= to_stdlogicvector (DNA_FOR_SIM);
65 header_firmware_id <= X"00" & FIRMWARE_ID;
66 header_timestamp_counter <= X"333322221111";
67
68 trigger_counter_read <= '1';
69 state_header_proc <= HP_TRG_CNT;
70
71 when HP_TRG_CNT =>
72 trigger_counter_read <= '0';
73 if (trigger_counter_valid = '1') then
74 header_trigger_counter <= trigger_counter;
75 state_header_proc <= HP_END;
76 end if;
77
78 when HP_END =>
79 if (get_header <= '0') then
80 get_header_started <= '0';
81 get_header_ready <= '1';
82 state_header_proc <= HP_IDLE;
83 end if;
84
85 end case;
86 end if;
87 end process header_proc;
88
89END ARCHITECTURE beha;
90
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