source: firmware/MSR/src/application.c@ 13680

//-----------------------------------------------------------------------------

#include "application.h"
#include <avr/wdt.h> 


//-----------------------------------------------------------------------------

volatile U08 app_reset_source;
//-----------------------------------------------------------------------------

void app_init(void)
{
  app_reset_source = MCUSR; // Save last reset source
  MCUSR = 0x00; // Clear reset source for next reset cycle


        // Dangerous here: I still do not know much about the watchdog.
        // This code is still from Udo Juerss. 

  // The watchdog timer is disabled by default ("startup.asm")
        #ifdef USE_WATCHDOG
         WDTCSR = WDTOE | (1 << WDE); // Enable watchdog reset (~16ms)
        #endif

        // define PORTS
        // USART
        DDRD &= ~(1<<PD0);                              // PD0 = RXD is input
        DDRD |= 1<<PD1;                                         // PD1 = TXD is output
        

        // SPARE OUT/-INPUTS
        // I set (nearly) all spare pins as inputs, so they are high-Z ... that's safe I guess.
        DDRA &= ~(1<<PA5);
        DDRA &= ~(1<<PA6);
        DDRA &= ~(1<<PC4);
        DDRA &= ~(1<<PC5);
        DDRA &= ~(1<<PC6);
        DDRA &= ~(1<<PC7);
        // But this pin, is the heartbeat pin... 
        DDRA |= (1<<PA4);
        
        
        // the pull ups should be off by default :-)

        // ATmega internal ADC input 
        DDRA &= ~(1<<PA7);

        // MUXER ADDRESS OUTs
        DDRA |= 0x0F; // SA-pins -> output
        DDRC |= 0x0F; // SB-pins -> output

        // SPI
        // set all CS's: output

        DDRB |= (1 << SPI_E_CS);
        DDRB |= (1 << SPI_AD_CS);

        // set all Chips selects HIGH
        PORTB |= (1 << SPI_E_CS);
        PORTB |= (1 << SPI_AD_CS);
        
        

        // set MOSI and SCK: output & // set MISO: input
        SPI_DDR |= (1 << SPI_MOSI);
        SPI_DDR |= (1 << SPI_SCLK);
        SPI_DDR &= ~(1 << SPI_MISO);

        // set MOSI, SCK: HIGH. MISO leave alone.
        SPI_PRT |= (1 << SPI_MOSI);
        SPI_PRT |= (1 << SPI_SCLK);
        //SPI_PRT |= (1 << SPI_MISO);

        // ADC 
        DDRD &= ~(1<<PD2);                                      // PD2 is AD_READY input
        DDRB |= 1<<PB1;                                                 // PB1 is AD_RESET output

        // ACCELEROMETER
        DDRB &= ~(1<<PB0);                                      // PB0 is ACC_READY input (existiert nichtmehr, umgelegt)

        //MAX6662   <--- not assembled 
        // DDRB &= ~(1<<PB0);                   // PB0 is over temperature alert input
        // DDRB &= ~(1<<PB1);                           // PB1 is general temperature altert input
}



//-----------------------------------------------------------------------------

void app_set_watchdog_prescaler(tWDT_PRESCALE wdt_prescale) // Set watchdog prescale
{
  U08 sreg_backup = SREG; // Copy status register to variable
  U08 wdtcsr_value = WDE + wdt_prescale; // Set new prescale value to variable

  cli(); // Disable interrups
  wdt_reset(); // Reset watchdog

  WDTCR |= (1 << WDTOE) | (1 << WDE); // Unlock register access, 4 cycles to store new value
  WDTCR = wdtcsr_value; // Set new watchdog prescaler
  SREG = sreg_backup; // Restore status register
}