1 | //-----------------------------------------------------------------------------
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2 |
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3 | #include "application.h"
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4 | #include <avr/wdt.h>
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5 |
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6 |
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7 | //-----------------------------------------------------------------------------
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8 |
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9 | volatile U08 app_reset_source;
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10 | //-----------------------------------------------------------------------------
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11 |
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12 | void app_init(void)
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13 | {
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14 | app_reset_source = MCUSR; // Save last reset source
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15 | MCUSR = 0x00; // Clear reset source for next reset cycle
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16 |
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17 |
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18 | // Dangerous here: I still do not know much about the watchdog.
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19 | // This code is still from Udo Juerss.
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20 |
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21 | // The watchdog timer is disabled by default ("startup.asm")
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22 | #ifdef USE_WATCHDOG
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23 | WDTCSR = WDTOE | (1 << WDE); // Enable watchdog reset (~16ms)
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24 | #endif
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25 |
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26 | // define PORTS
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27 | // USART
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28 | DDRD &= ~(1<<PD0); // PD0 = RXD is input
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29 | DDRD |= 1<<PD1; // PD1 = TXD is output
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30 |
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31 |
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32 | // SPARE OUT/-INPUTS
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33 | // I set (nearly) all spare pins as inputs, so they are high-Z ... that's safe I guess.
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34 | DDRA &= ~(1<<PA5);
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35 | DDRA &= ~(1<<PA6);
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36 | DDRA &= ~(1<<PC4);
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37 | DDRA &= ~(1<<PC5);
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38 | DDRA &= ~(1<<PC6);
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39 | DDRA &= ~(1<<PC7);
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40 | // But this pin, is the heartbeat pin...
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41 | DDRA |= (1<<PA4);
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42 |
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43 |
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44 | // the pull ups should be off by default :-)
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45 |
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46 | // ATmega internal ADC input
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47 | DDRA &= ~(1<<PA7);
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48 |
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49 | // MUXER ADDRESS OUTs
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50 | DDRA |= 0x0F; // SA-pins -> output
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51 | DDRC |= 0x0F; // SB-pins -> output
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52 |
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53 | // SPI
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54 | // set all CS's: output
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55 |
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56 | DDRB |= (1 << SPI_E_CS);
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57 | DDRB |= (1 << SPI_AD_CS);
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58 |
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59 | // set all Chips selects HIGH
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60 | PORTB |= (1 << SPI_E_CS);
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61 | PORTB |= (1 << SPI_AD_CS);
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62 |
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63 |
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64 |
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65 | // set MOSI and SCK: output & // set MISO: input
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66 | SPI_DDR |= (1 << SPI_MOSI);
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67 | SPI_DDR |= (1 << SPI_SCLK);
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68 | SPI_DDR &= ~(1 << SPI_MISO);
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69 |
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70 | // set MOSI, SCK: HIGH. MISO leave alone.
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71 | SPI_PRT |= (1 << SPI_MOSI);
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72 | SPI_PRT |= (1 << SPI_SCLK);
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73 | //SPI_PRT |= (1 << SPI_MISO);
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74 |
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75 | // ADC
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76 | DDRD &= ~(1<<PD2); // PD2 is AD_READY input
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77 | DDRB |= 1<<PB1; // PB1 is AD_RESET output
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78 |
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79 | // ACCELEROMETER
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80 | DDRB &= ~(1<<PB0); // PB0 is ACC_READY input (existiert nichtmehr, umgelegt)
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81 |
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82 | //MAX6662 <--- not assembled
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83 | // DDRB &= ~(1<<PB0); // PB0 is over temperature alert input
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84 | // DDRB &= ~(1<<PB1); // PB1 is general temperature altert input
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85 | }
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86 |
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87 |
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88 |
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89 | //-----------------------------------------------------------------------------
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90 |
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91 | void app_set_watchdog_prescaler(tWDT_PRESCALE wdt_prescale) // Set watchdog prescale
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92 | {
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93 | U08 sreg_backup = SREG; // Copy status register to variable
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94 | U08 wdtcsr_value = WDE + wdt_prescale; // Set new prescale value to variable
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95 |
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96 | cli(); // Disable interrups
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97 | wdt_reset(); // Reset watchdog
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98 |
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99 | WDTCR |= (1 << WDTOE) | (1 << WDE); // Unlock register access, 4 cycles to store new value
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100 | WDTCR = wdtcsr_value; // Set new watchdog prescaler
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101 | SREG = sreg_backup; // Restore status register
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102 | }
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