source: trunk/FACT++/src/HeadersFAD.h@ 10825

Last change on this file since 10825 was 10817, checked in by tbretz, 14 years ago
Moved commands here; added some more member functions.
File size: 12.0 KB
Line 
1#ifndef FACT_HeadersFAD
2#define FACT_HeadersFAD
3
4#include <ostream>
5
6// For debugging
7#include <iostream>
8
9#include "ByteOrder.h"
10
11// ====================================================================
12
13namespace FAD
14{
15 enum Enable
16 {
17 kCmdDrsEnable = 0x0600, // CMD_DENABLE/CMD_DISABLE
18 kCmdDwrite = 0x0800, // CMD_DWRITE_RUN/CMD_DWRITE_STOP
19 kCmdSclk = 0x1000, // CMD_SCLK_ON/OFF
20 kCmdSrclk = 0x1500, // CMD_SRCLK_ON/OFF
21 kCmdTriggerLine = 0x1800, // CMD_TRIGGERS_ON/CMD_TRIGGERS_OFF
22 //kCmdContTrigger = 0x1f00,
23 kCmdContTriggerOff = 0x2000,
24 kCmdRun = 0x2200, // CMD_Start/Stop
25 kCmdResetTriggerId = 0x2A00, //
26 kCmdSocket = 0x3000, // CMD_mode_command/CMD_mode_all_sockets
27 kCmdSingleTrigger = 0xA000, // CMD_Trigger
28 kCmdContTriggerOn = 0xB000,
29 };
30
31 enum Commands
32 {
33 kCmdWrite = 0x0500, // write to Config-RAM
34 kCmdWriteRoi = kCmdWrite|0x00, // Baseaddress ROI-Values
35 kCmdWriteDac = kCmdWrite|0x24, // Baseaddress DAC-Values
36
37 kCmdWriteRate = kCmdWrite|0x2c, // Continous trigger rate
38 kCmdWriteRunNumber = kCmdWrite|0x2d, //
39
40 /*
41 kCmdRead = 0x0a00, // read from Config-RAM
42 kCmdReadRoi = kCmdRead|0x00, // Baseaddress ROI-Values
43 kCmdReadDac = kCmdRead|0x24, // Baseaddress DAC-Values
44 */
45
46 kCmdPhaseIncrease = 0x1200, // CMD_PS_DIRINC
47 kCmdPhaseDecrease = 0x1300, // CMD_PS_DIRDEC
48 kCmdPhaseApply = 0x1400, // CMD_PS_DO
49 kCmdPhaseReset = 0x1700, // CMD_PS_RESET
50 };
51
52 enum States
53 {
54 // State Machine states
55 kDisconnected = 1,
56 kConnecting,
57 kConnected
58 };
59
60 enum
61 {
62 kMaxBins = 1024,
63 kNumTemp = 4,
64 kNumDac = 8,
65 kNumChips = 4,
66 kNumChannelsPerChip = 9,
67 kNumChannels = kNumChips*kNumChannelsPerChip,
68 };
69
70 enum
71 {
72 kMaxRegAddr = 0xff, // Highest address in config-ram
73 kMaxRegValue = 0xffff,
74 kMaxDacAddr = kNumDac-1,
75 kMaxDacValue = 0xffff,
76 kMaxRoiAddr = kNumChannels-1,
77 kMaxRoiValue = kMaxBins,
78 };
79
80 enum
81 {
82 kDelimiterStart = 0xfb01,
83 kDelimiterEnd = 0x04fe,
84 };
85
86 // --------------------------------------------------------
87
88 struct EventHeader
89 {
90 enum Bits
91 {
92 kDenable = 1<<11,
93 kDwrite = 1<<10,
94 kRefClkTooHigh = 1<< 9,
95 kRefClkTooLow = 1<< 8,
96 kDcmLocked = 1<< 7,
97 kDcmReady = 1<< 6,
98 kSpiSclk = 1<< 5,
99 };
100
101 // Einmalig: (new header changes entry in array --> send only if array changed)
102 // ----------------------------------
103 // Event builder stores an array with all available values.
104 // Disconnected boards are removed (replaced by def values)
105 // Any received header information is immediately put in the array.
106 // The array is transmitted whenever it changes.
107 // This will usually happen only very rarely when a new connection
108 // is opened.
109 //
110 // Array[40] of BoardId
111 // Array[40] of Version
112 // Array[40] of DNA
113
114 // Slow changes: (new header changes entry in array --> send only if arra changed)
115 // -------------------------------------------
116 // Event builder stores an array with all available values.
117 // Disconnected boards can be kept in the arrays.
118 // Any received header information is immediately put in the array.
119 // The array is transmitted whenever it changes.
120 //
121 // Connection status (disconnected, connecting, connected) / Array[40]
122 // Consistency of PLLLCK / Array[ 40] of PLLLCK
123 // Consistency of Trigger type / Array[ 40] of trigger type
124 // Consistency of ROI / Array[1440] of ROI
125 // Consistency of RefClock / Array[ 40] of ref clock
126 // Consistency of DAC values / Array[ 400] of DAC values
127 // Consistency of run number / Array[ 40] of Run numbers
128
129 // Fast changes (new header changes value --> send only if something changed)
130 // -------------------
131 // Event builder stores an internal array of all boards and
132 // transmits the min/max values determined from the array
133 // only if they have changed. Disconnected boards are not considered.
134 //
135 // Maximum/minimum Event counter of all boards in memory + board id
136 // Maximum/minimum time stamp of all boards in memory + board id
137 // Maximum/minimum temp of all boards in memory + board id
138
139 // Unknown:
140 // ------------------
141 // Trigger Id ?
142 // TriggerGeneratorPrescaler ?
143 // Number of Triggers to generate ?
144
145
146 // ------------------------------------------------------------
147
148 uint16_t fStartDelimiter; // 0x04FE
149 uint16_t fPackageLength;
150 uint16_t fVersion;
151 uint16_t fStatus;
152 //
153 uint16_t fTriggerCrc;
154 uint16_t fTriggerType;
155 uint32_t fTriggerId;
156 //
157 uint32_t fEventCounter;
158 uint32_t fFreqRefClock;
159 //
160 uint16_t fBoardId;
161 uint16_t fAdcClockPhaseShift;
162 uint16_t fNumTriggersToGenerate;
163 uint16_t fTriggerGeneratorPrescaler;
164 //
165 uint64_t fDNA; // Xilinx DNA
166 //
167 uint32_t fTimeStamp;
168 uint32_t fRunNumber;
169 //
170 int16_t fTempDrs[kNumTemp]; // In units of 1/16 deg(?)
171 //
172 uint16_t fDac[kNumDac];
173 //
174
175 EventHeader() { init(*this); }
176
177 void operator=(const std::vector<uint16_t> &vec)
178 {
179 ntohcpy(vec, *this);
180
181 Reverse(((uint16_t*)fEventCounter));
182 Reverse(((uint16_t*)fEventCounter)+1);
183
184 Reverse(&fEventCounter);
185
186 Reverse(((uint16_t*)fFreqRefClock));
187 Reverse(((uint16_t*)fFreqRefClock)+1);
188
189 Reverse(&fFreqRefClock);
190
191 Reverse(((uint16_t*)&fTimeStamp));
192 Reverse(((uint16_t*)&fTimeStamp)+1);
193
194 Reverse(&fTimeStamp);
195
196 Reverse(((uint16_t*)&fRunNumber));
197 Reverse(((uint16_t*)&fRunNumber)+1);
198
199 Reverse(&fRunNumber);
200 Reverse(&fDNA);
201 }
202
203 std::vector<uint16_t> HtoN() const
204 {
205 EventHeader h(*this);
206
207 Reverse(((uint16_t*)h.fEventCounter));
208 Reverse(((uint16_t*)h.fEventCounter)+1);
209
210 Reverse(&h.fEventCounter);
211
212 Reverse(((uint16_t*)h.fFreqRefClock));
213 Reverse(((uint16_t*)h.fFreqRefClock)+1);
214
215 Reverse(&h.fFreqRefClock);
216
217 Reverse(((uint16_t*)&h.fTimeStamp));
218 Reverse(((uint16_t*)&h.fTimeStamp)+1);
219
220 Reverse(&h.fTimeStamp);
221
222 Reverse(((uint16_t*)&h.fRunNumber));
223 Reverse(((uint16_t*)&h.fRunNumber)+1);
224
225 Reverse(&h.fRunNumber);
226 Reverse(&h.fDNA);
227
228 return htoncpy(h);
229 }
230
231 float GetTemp(int i) const
232 {
233 return (((fTempDrs[i]&0x8000)
234 ?
235 ((fTempDrs[i]&0x007fff)^0xffffffff)
236 : (fTempDrs[i]&0x007fff))>>3)/16.; }
237
238 uint8_t PLLLCK() const { return fStatus>>12; }
239
240 bool HasDenable() const { return fStatus&kDenable; }
241 bool HasDwrite() const { return fStatus&kDwrite; }
242 bool IsRefClockTooHigh() const { return fStatus&kRefClkTooHigh; }
243 bool IsRefClockTooLow() const { return fStatus&kRefClkTooLow; }
244 bool IsDcmLocked() const { return fStatus&kDcmLocked; }
245 bool IsDcmReady() const { return fStatus&kDcmReady; }
246 bool HasSpiSclk() const { return fStatus&kSpiSclk; }
247
248 uint16_t Crate() const { return fBoardId>>8; }
249 uint16_t Board() const { return fBoardId&0xff; }
250
251 void Enable(Bits pos, bool enable=true)
252 {
253 if (enable)
254 fStatus |= pos;
255 else
256 fStatus &= ~pos;
257 }
258
259 void clear() { reset(*this); }
260 void print(std::ostream &out) const;
261
262 } __attribute__((__packed__));
263
264 struct ChannelHeader
265 {
266 uint16_t fId;
267 uint16_t fStartCell;
268 uint16_t fRegionOfInterest;
269 uint16_t fDummy;
270 // uint16_t fData[];
271
272 ChannelHeader() { init(*this); }
273
274 void operator=(const std::vector<uint16_t> &vec)
275 {
276 ntohcpy(vec, *this);
277 }
278
279 std::vector<uint16_t> HtoN() const
280 {
281 ChannelHeader h(*this);
282 return htoncpy(h);
283 }
284
285 void clear() { reset(*this); }
286 void print(std::ostream &out) const;
287
288 uint16_t Chip() const { return fId>>4; }
289 uint16_t Channel() const { return fId&0xf; }
290
291 } __attribute__((__packed__));
292
293 // Package ends with:
294 // 0x4242
295 // 0x04fe
296/*
297 struct DimPassport
298 {
299 uint32_t fTimeStamp;
300
301 uint16_t fVersion;
302 uint16_t fBoardId;
303 uint64_t fDNA; // Xilinx DNA
304
305 DimPassport(const EventHeader &h) :
306 fTimeStamp(h.fTimeStamp),
307 fVersion(h.fVersion),
308 fBoardId(h.fBoardId),
309 fDNA(h.fDNA)
310 {
311 }
312
313 } __attribute__((__packed__));
314
315 struct DimSetup
316 {
317 uint32_t fTimeStamp;
318
319 uint32_t fFreqRefClock;
320 uint16_t fStatus;
321 uint16_t fAdcClockPhaseShift;
322 uint16_t fNumTriggersToGenerate;
323 uint16_t fTriggerGeneratorPrescaler;
324 uint16_t fDac[kNumDac];
325
326 DimSetup(const EventHeader &h) :
327 fTimeStamp(h.fTimeStamp),
328 fFreqRefClock(h.fFreqRefClock),
329 fStatus(h.fStatus),
330 fAdcClockPhaseShift(h.fAdcClockPhaseShift),
331 fNumTriggersToGenerate(h.fNumTriggersToGenerate),
332 fTriggerGeneratorPrescaler(h.fTriggerGeneratorPrescaler)
333 {
334 memcpy(fDac, h.fDac, sizeof(fDac));
335 }
336
337 uint8_t PLLLCK() const { return fStatus>>12; }
338
339 bool HasDenable() const { return fStatus&EventHeader::kDenable; }
340 bool HasDwrite() const { return fStatus&EventHeader::kDwrite; }
341 bool IsRefClockTooHigh() const { return fStatus&EventHeader::kRefClkTooHigh; }
342 bool IsRefClockTooLow() const { return fStatus&EventHeader::kRefClkTooLow; }
343 bool IsDcmLocked() const { return fStatus&EventHeader::kDcmLocked; }
344 bool IsDcmReady() const { return fStatus&EventHeader::kDcmReady; }
345 bool HasSpiSclk() const { return fStatus&EventHeader::kSpiSclk; }
346
347 } __attribute__((__packed__));
348
349 struct DimTemperatures
350 {
351 uint32_t fTimeStamp;
352
353 float fTempDrs[kNumTemp];
354
355 DimTemperatures(const EventHeader &h) :
356 fTimeStamp(h.fTimeStamp)
357 {
358 for (int i=0; i<kNumTemp; i++)
359 fTempDrs[i] = h.GetTemp(i);
360 }
361
362 } __attribute__((__packed__));;
363
364 struct DimEventHeader
365 {
366 uint32_t fTimeStamp;
367
368 uint32_t fRunNumber;
369 uint32_t fEventCounter;
370 uint16_t fTriggerCrc;
371 uint16_t fTriggerType;
372 uint32_t fTriggerId;
373
374 DimEventHeader(const EventHeader &h) :
375 fTimeStamp(h.fTimeStamp),
376 fRunNumber(h.fRunNumber),
377 fEventCounter(h.fEventCounter),
378 fTriggerCrc(h.fTriggerCrc),
379 fTriggerType(h.fTriggerType),
380 fTriggerId(h.fTriggerId)
381 {
382 }
383
384 } __attribute__((__packed__));
385*/
386 // --------------------------------------------------------------------
387
388 inline std::ostream &operator<<(std::ostream &out, const EventHeader &h)
389 {
390 h.print(out);
391 return out;
392 }
393
394 inline std::ostream &operator<<(std::ostream &out, const ChannelHeader &h)
395 {
396 h.print(out);
397 return out;
398 }
399};
400
401#endif
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