1 | #ifndef FACT_HeadersFAD
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2 | #define FACT_HeadersFAD
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3 |
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4 | #ifdef __cplusplus
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5 | #include <ostream>
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6 |
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7 | // For debugging
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8 | #include <iostream>
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9 |
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10 | #include "ByteOrder.h"
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11 |
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12 | // ====================================================================
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13 |
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14 | namespace FAD
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15 | {
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16 | #endif
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17 | enum Enable
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18 | {
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19 | kCmdDrsEnable = 0x0600, // CMD_DENABLE/CMD_DISABLE
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20 | kCmdDwrite = 0x0800, // CMD_DWRITE_RUN/CMD_DWRITE_STOP
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21 | kCmdSclk = 0x1000, // CMD_SCLK_ON/OFF
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22 | kCmdSrclk = 0x1500, // CMD_SRCLK_ON/OFF
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23 | kCmdTriggerLine = 0x1800, // CMD_TRIGGERS_ON/CMD_TRIGGERS_OFF
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24 | //kCmdContTrigger = 0x1f00,
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25 | kCmdContTriggerOff = 0x2000,
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26 | kCmdRun = 0x2200, // CMD_Start/Stop
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27 | kCmdResetTriggerId = 0x2A00, //
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28 | kCmdSocket = 0x3000, // CMD_mode_command/CMD_mode_all_sockets
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29 | kCmdSingleTrigger = 0xA000, // CMD_Trigger
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30 | kCmdContTriggerOn = 0xB000,
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31 | };
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32 |
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33 | enum Commands
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34 | {
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35 | kCmdWriteExecute = 0x0400, // Configure FAD with the current config ram
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36 |
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37 | kCmdWrite = 0x0500, // write to Config-RAM
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38 | kCmdWriteRoi = kCmdWrite|0x00, // Baseaddress ROI-Values
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39 | kCmdWriteDac = kCmdWrite|0x24, // Baseaddress DAC-Values
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40 |
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41 | kCmdWriteRate = kCmdWrite|0x2c, // Continous trigger rate
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42 | kCmdWriteRunNumberMSW = kCmdWrite|0x2d, // Run Number most significant word
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43 | kCmdWriteRunNumberLSW = kCmdWrite|0x2e, // Run Number least significant word
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44 |
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45 | /*
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46 | kCmdRead = 0x0a00, // read from Config-RAM
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47 | kCmdReadRoi = kCmdRead|0x00, // Baseaddress ROI-Values
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48 | kCmdReadDac = kCmdRead|0x24, // Baseaddress DAC-Values
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49 | */
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50 |
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51 | kCmdPhaseIncrease = 0x1200, // CMD_PS_DIRINC
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52 | kCmdPhaseDecrease = 0x1300, // CMD_PS_DIRDEC
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53 | kCmdPhaseApply = 0x1400, // CMD_PS_DO
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54 | kCmdPhaseReset = 0x1700, // CMD_PS_RESET
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55 | };
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56 |
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57 | enum States
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58 | {
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59 | // State Machine states
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60 | kOffline = 1,
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61 | kDisconnected,
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62 | kConnecting,
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63 | kConnected
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64 | };
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65 |
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66 | enum
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67 | {
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68 | kMaxBins = 1024,
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69 | kNumTemp = 4,
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70 | kNumDac = 8,
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71 | kNumChips = 4,
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72 | kNumChannelsPerChip = 9,
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73 | kNumChannels = kNumChips*kNumChannelsPerChip,
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74 | };
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75 |
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76 | enum
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77 | {
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78 | kMaxRegAddr = 0xff, // Highest address in config-ram
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79 | kMaxRegValue = 0xffff,
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80 | kMaxDacAddr = kNumDac-1,
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81 | kMaxDacValue = 0xffff,
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82 | kMaxRoiAddr = kNumChannels-1,
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83 | kMaxRoiValue = kMaxBins,
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84 | kMaxRunNumber = 0xffffffff,
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85 | };
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86 |
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87 | enum
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88 | {
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89 | kDelimiterStart = 0xfb01,
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90 | kDelimiterEnd = 0x04fe,
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91 | };
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92 |
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93 | // --------------------------------------------------------
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94 |
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95 | struct EventHeader
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96 | {
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97 | #ifdef __cplusplus
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98 | enum Bits
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99 | {
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100 | kDenable = 1<<11,
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101 | kDwrite = 1<<10,
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102 | kRefClkTooHigh = 1<< 9,
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103 | kRefClkTooLow = 1<< 8,
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104 | kDcmLocked = 1<< 7,
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105 | kDcmReady = 1<< 6,
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106 | kSpiSclk = 1<< 5,
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107 | };
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108 | #endif
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109 | // Einmalig: (new header changes entry in array --> send only if array changed)
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110 | // ----------------------------------
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111 | // Event builder stores an array with all available values.
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112 | // Disconnected boards are removed (replaced by def values)
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113 | // Any received header information is immediately put in the array.
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114 | // The array is transmitted whenever it changes.
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115 | // This will usually happen only very rarely when a new connection
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116 | // is opened.
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117 | //
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118 | // Array[40] of BoardId
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119 | // Array[40] of Version
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120 | // Array[40] of DNA
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121 |
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122 | // Slow changes: (new header changes entry in array --> send only if arra changed)
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123 | // -------------------------------------------
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124 | // Event builder stores an array with all available values.
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125 | // Disconnected boards can be kept in the arrays.
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126 | // Any received header information is immediately put in the array.
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127 | // The array is transmitted whenever it changes.
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128 | //
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129 | // Connection status (disconnected, connecting, connected) / Array[40]
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130 | // Consistency of PLLLCK / Array[ 40] of PLLLCK
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131 | // Consistency of Trigger type / Array[ 40] of trigger type
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132 | // Consistency of ROI / Array[1440] of ROI
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133 | // Consistency of RefClock / Array[ 40] of ref clock
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134 | // Consistency of DAC values / Array[ 400] of DAC values
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135 | // Consistency of run number / Array[ 40] of Run numbers
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136 |
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137 | // Fast changes (new header changes value --> send only if something changed)
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138 | // -------------------
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139 | // Event builder stores an internal array of all boards and
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140 | // transmits the min/max values determined from the array
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141 | // only if they have changed. Disconnected boards are not considered.
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142 | //
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143 | // Maximum/minimum Event counter of all boards in memory + board id
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144 | // Maximum/minimum time stamp of all boards in memory + board id
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145 | // Maximum/minimum temp of all boards in memory + board id
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146 |
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147 | // Unknown:
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148 | // ------------------
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149 | // Trigger Id ?
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150 | // TriggerGeneratorPrescaler ?
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151 | // Number of Triggers to generate ?
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152 |
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153 |
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154 | // ------------------------------------------------------------
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155 |
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156 | uint16_t fStartDelimiter; // 0x04FE
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157 | uint16_t fPackageLength;
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158 | uint16_t fVersion;
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159 | uint16_t fStatus;
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160 | //
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161 | uint16_t fTriggerCrc; // Receiver timeout / CRC ; 1 byte each
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162 | uint16_t fTriggerType;
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163 | uint32_t fTriggerId;
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164 | //
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165 | uint32_t fEventCounter;
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166 | uint32_t fFreqRefClock;
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167 | //
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168 | uint16_t fBoardId;
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169 | uint16_t fAdcClockPhaseShift;
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170 | uint16_t fNumTriggersToGenerate;
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171 | uint16_t fTriggerGeneratorPrescaler;
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172 | //
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173 | uint64_t fDNA; // Xilinx DNA
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174 | //
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175 | uint32_t fTimeStamp;
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176 | uint32_t fRunNumber;
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177 | //
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178 | int16_t fTempDrs[kNumTemp]; // In units of 1/16 deg(?)
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179 | //
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180 | uint16_t fDac[kNumDac];
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181 | //
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182 | #ifdef __cplusplus
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183 | EventHeader() { init(*this); }
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184 | EventHeader(const std::vector<uint16_t> &vec) { *this = vec; }
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185 |
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186 | void operator=(const std::vector<uint16_t> &vec)
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187 | {
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188 | ntohcpy(vec, *this);
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189 |
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190 | Reverse(((uint16_t*)fEventCounter));
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191 | Reverse(((uint16_t*)fEventCounter)+1);
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192 |
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193 | Reverse(&fEventCounter);
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194 |
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195 | Reverse(((uint16_t*)fFreqRefClock));
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196 | Reverse(((uint16_t*)fFreqRefClock)+1);
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197 |
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198 | Reverse(&fFreqRefClock);
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199 |
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200 | Reverse(((uint16_t*)&fTimeStamp));
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201 | Reverse(((uint16_t*)&fTimeStamp)+1);
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202 |
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203 | Reverse(&fTimeStamp);
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204 |
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205 | Reverse(((uint16_t*)&fRunNumber));
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206 | Reverse(((uint16_t*)&fRunNumber)+1);
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207 |
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208 | Reverse(&fRunNumber);
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209 | Reverse(&fDNA);
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210 | }
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211 |
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212 | std::vector<uint16_t> HtoN() const
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213 | {
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214 | EventHeader h(*this);
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215 |
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216 | Reverse(((uint16_t*)h.fEventCounter));
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217 | Reverse(((uint16_t*)h.fEventCounter)+1);
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218 |
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219 | Reverse(&h.fEventCounter);
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220 |
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221 | Reverse(((uint16_t*)h.fFreqRefClock));
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222 | Reverse(((uint16_t*)h.fFreqRefClock)+1);
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223 |
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224 | Reverse(&h.fFreqRefClock);
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225 |
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226 | Reverse(((uint16_t*)&h.fTimeStamp));
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227 | Reverse(((uint16_t*)&h.fTimeStamp)+1);
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228 |
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229 | Reverse(&h.fTimeStamp);
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230 |
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231 | Reverse(((uint16_t*)&h.fRunNumber));
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232 | Reverse(((uint16_t*)&h.fRunNumber)+1);
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233 |
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234 | Reverse(&h.fRunNumber);
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235 | Reverse(&h.fDNA);
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236 |
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237 | return htoncpy(h);
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238 | }
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239 |
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240 | float GetTemp(int i) const
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241 | {
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242 | return (((fTempDrs[i]&0x8000)
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243 | ?
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244 | ((fTempDrs[i]&0x007fff)^0xffffffff)
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245 | : (fTempDrs[i]&0x007fff))>>3)/16.; }
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246 |
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247 | uint8_t PLLLCK() const { return fStatus>>12; }
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248 |
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249 | bool HasDenable() const { return fStatus&kDenable; }
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250 | bool HasDwrite() const { return fStatus&kDwrite; }
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251 | bool IsRefClockTooHigh() const { return fStatus&kRefClkTooHigh; }
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252 | bool IsRefClockTooLow() const { return fStatus&kRefClkTooLow; }
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253 | bool IsDcmLocked() const { return fStatus&kDcmLocked; }
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254 | bool IsDcmReady() const { return fStatus&kDcmReady; }
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255 | bool HasSpiSclk() const { return fStatus&kSpiSclk; }
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256 |
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257 | uint16_t Crate() const { return fBoardId>>8; }
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258 | uint16_t Board() const { return fBoardId&0xff; }
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259 |
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260 | void Enable(Bits pos, bool enable=true)
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261 | {
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262 | if (enable)
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263 | fStatus |= pos;
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264 | else
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265 | fStatus &= ~pos;
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266 | }
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267 |
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268 | void clear() { reset(*this); }
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269 | void print(std::ostream &out) const;
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270 | #endif
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271 |
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272 | } __attribute__((__packed__));
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273 |
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274 | struct ChannelHeader
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275 | {
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276 | uint16_t fId;
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277 | uint16_t fStartCell;
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278 | uint16_t fRegionOfInterest;
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279 | uint16_t fDummy;
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280 | // uint16_t fData[];
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281 |
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282 | #ifdef __cplusplus
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283 | ChannelHeader() { init(*this); }
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284 |
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285 | void operator=(const std::vector<uint16_t> &vec)
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286 | {
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287 | ntohcpy(vec, *this);
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288 | }
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289 |
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290 | std::vector<uint16_t> HtoN() const
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291 | {
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292 | ChannelHeader h(*this);
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293 | return htoncpy(h);
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294 | }
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295 |
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296 | void clear() { reset(*this); }
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297 | void print(std::ostream &out) const;
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298 |
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299 | uint16_t Chip() const { return fId>>4; }
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300 | uint16_t Channel() const { return fId&0xf; }
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301 | #endif
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302 | } __attribute__((__packed__));
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303 |
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304 | // Package ends with:
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305 | // 0x4242
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306 | // 0x04fe
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307 | /*
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308 | struct DimPassport
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309 | {
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310 | uint32_t fTimeStamp;
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311 |
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312 | uint16_t fVersion;
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313 | uint16_t fBoardId;
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314 | uint64_t fDNA; // Xilinx DNA
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315 |
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316 | DimPassport(const EventHeader &h) :
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317 | fTimeStamp(h.fTimeStamp),
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318 | fVersion(h.fVersion),
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319 | fBoardId(h.fBoardId),
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320 | fDNA(h.fDNA)
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321 | {
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322 | }
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323 |
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324 | } __attribute__((__packed__));
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325 |
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326 | struct DimSetup
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327 | {
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328 | uint32_t fTimeStamp;
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329 |
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330 | uint32_t fFreqRefClock;
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331 | uint16_t fStatus;
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332 | uint16_t fAdcClockPhaseShift;
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333 | uint16_t fNumTriggersToGenerate;
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334 | uint16_t fTriggerGeneratorPrescaler;
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335 | uint16_t fDac[kNumDac];
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336 |
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337 | DimSetup(const EventHeader &h) :
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338 | fTimeStamp(h.fTimeStamp),
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339 | fFreqRefClock(h.fFreqRefClock),
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340 | fStatus(h.fStatus),
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341 | fAdcClockPhaseShift(h.fAdcClockPhaseShift),
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342 | fNumTriggersToGenerate(h.fNumTriggersToGenerate),
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343 | fTriggerGeneratorPrescaler(h.fTriggerGeneratorPrescaler)
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344 | {
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345 | memcpy(fDac, h.fDac, sizeof(fDac));
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346 | }
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347 |
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348 | uint8_t PLLLCK() const { return fStatus>>12; }
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349 |
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350 | bool HasDenable() const { return fStatus&EventHeader::kDenable; }
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351 | bool HasDwrite() const { return fStatus&EventHeader::kDwrite; }
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352 | bool IsRefClockTooHigh() const { return fStatus&EventHeader::kRefClkTooHigh; }
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353 | bool IsRefClockTooLow() const { return fStatus&EventHeader::kRefClkTooLow; }
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354 | bool IsDcmLocked() const { return fStatus&EventHeader::kDcmLocked; }
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355 | bool IsDcmReady() const { return fStatus&EventHeader::kDcmReady; }
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356 | bool HasSpiSclk() const { return fStatus&EventHeader::kSpiSclk; }
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357 |
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358 | } __attribute__((__packed__));
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359 |
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360 | struct DimTemperatures
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361 | {
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362 | uint32_t fTimeStamp;
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363 |
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364 | float fTempDrs[kNumTemp];
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365 |
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366 | DimTemperatures(const EventHeader &h) :
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367 | fTimeStamp(h.fTimeStamp)
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368 | {
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369 | for (int i=0; i<kNumTemp; i++)
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370 | fTempDrs[i] = h.GetTemp(i);
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371 | }
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372 |
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373 | } __attribute__((__packed__));;
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374 |
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375 | struct DimEventHeader
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376 | {
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377 | uint32_t fTimeStamp;
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378 |
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379 | uint32_t fRunNumber;
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380 | uint32_t fEventCounter;
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381 | uint16_t fTriggerCrc;
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382 | uint16_t fTriggerType;
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383 | uint32_t fTriggerId;
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384 |
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385 | DimEventHeader(const EventHeader &h) :
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386 | fTimeStamp(h.fTimeStamp),
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387 | fRunNumber(h.fRunNumber),
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388 | fEventCounter(h.fEventCounter),
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389 | fTriggerCrc(h.fTriggerCrc),
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390 | fTriggerType(h.fTriggerType),
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391 | fTriggerId(h.fTriggerId)
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392 | {
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393 | }
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394 |
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395 | } __attribute__((__packed__));
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396 | */
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397 | // --------------------------------------------------------------------
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398 | #ifdef __cplusplus
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399 | inline std::ostream &operator<<(std::ostream &out, const EventHeader &h)
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400 | {
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401 | h.print(out);
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402 | return out;
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403 | }
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404 |
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405 | inline std::ostream &operator<<(std::ostream &out, const ChannelHeader &h)
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406 | {
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407 | h.print(out);
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408 | return out;
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409 | }
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410 | #endif
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411 |
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412 | #ifdef __cplusplus
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413 | };
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414 | #endif
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415 |
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416 | #endif
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