source: trunk/FACT++/src/HeadersFAD.h@ 11893

Last change on this file since 11893 was 11890, checked in by tbretz, 13 years ago
Added how to decode the trigger type.
File size: 13.3 KB
Line 
1#ifndef FACT_HeadersFAD
2#define FACT_HeadersFAD
3
4#ifdef __cplusplus
5#include <ostream>
6
7// For debugging
8#include <iostream>
9
10#include "ByteOrder.h"
11
12// ====================================================================
13
14namespace FAD
15{
16#endif
17 enum Enable
18 {
19 kCmdDrsEnable = 0x0600, // CMD_DENABLE/CMD_DISABLE
20 kCmdDwrite = 0x0800, // CMD_DWRITE_RUN/CMD_DWRITE_STOP
21 kCmdSclk = 0x1000, // CMD_SCLK_ON/OFF
22 kCmdSrclk = 0x1500, // CMD_SRCLK_ON/OFF
23 kCmdTriggerLine = 0x1800, // CMD_TRIGGERS_ON/CMD_TRIGGERS_OFF
24 kCmdContTrigger = 0x1f00,
25 kCmdRun = 0x2200, // CMD_Start/Stop
26 kCmdBusyOff = 0x2400, //
27 kCmdBusyOn = 0x3200, //
28 kCmdResetEventCounter = 0x2A00, //
29 kCmdSocket = 0x3000, // CMD_mode_command/CMD_mode_all_sockets
30 kCmdSingleTrigger = 0xA000, // CMD_Trigger
31 };
32
33 enum Commands
34 {
35 kCmdWriteExecute = 0x0400, // Configure FAD with the current config ram
36
37 kCmdWrite = 0x0500, // write to Config-RAM
38 kCmdWriteRoi = kCmdWrite|0x00, // Baseaddress ROI-Values
39 kCmdWriteDac = kCmdWrite|0x24, // Baseaddress DAC-Values
40
41 kCmdWriteRate = kCmdWrite|0x2c, // Continous trigger rate
42 kCmdWriteRunNumberMSW = kCmdWrite|0x2d, // Run Number most significant word
43 kCmdWriteRunNumberLSW = kCmdWrite|0x2e, // Run Number least significant word
44
45 /*
46 kCmdRead = 0x0a00, // read from Config-RAM
47 kCmdReadRoi = kCmdRead|0x00, // Baseaddress ROI-Values
48 kCmdReadDac = kCmdRead|0x24, // Baseaddress DAC-Values
49 */
50
51 kCmdPhaseIncrease = 0x1200, // CMD_PS_DIRINC
52 kCmdPhaseDecrease = 0x1300, // CMD_PS_DIRDEC
53 kCmdPhaseApply = 0x1400, // CMD_PS_DO
54 kCmdPhaseReset = 0x1700, // CMD_PS_RESET
55 };
56
57 enum States
58 {
59 // State Machine states
60 kOffline = 1,
61 kDisconnected,
62 kConnecting,
63 kConnected,
64 kConfiguring1,
65 kConfiguring2,
66 kConfigured
67 };
68
69 enum
70 {
71 kMaxBins = 1024,
72 kNumTemp = 4,
73 kNumDac = 8,
74 kNumChips = 4,
75 kNumChannelsPerChip = 9,
76 kNumChannels = kNumChips*kNumChannelsPerChip,
77 };
78
79 enum
80 {
81 kMaxRegAddr = 0xff, // Highest address in config-ram
82 kMaxRegValue = 0xffff,
83 kMaxDacAddr = kNumDac-1,
84 kMaxDacValue = 0xffff,
85 kMaxRoiAddr = kNumChannels-1,
86 kMaxRoiValue = kMaxBins,
87 kMaxRunNumber = 0xffffffff,
88 };
89
90 enum
91 {
92 kDelimiterStart = 0xfb01,
93 kDelimiterEnd = 0x04fe,
94 };
95
96 // --------------------------------------------------------
97
98 struct EventHeader
99 {
100#ifdef __cplusplus
101 enum Bits
102 {
103 kDenable = 1<<11,
104 kDwrite = 1<<10,
105 //kRefClkTooHigh = 1<< 9,
106 kRefClkTooLow = 1<< 8,
107 kDcmLocked = 1<< 7,
108 kDcmReady = 1<< 6,
109 kSpiSclk = 1<< 5,
110 kBusyOff = 1<< 4, // Busy continously off
111 kTriggerLine = 1<< 3, // Trigger line enabled
112 kContTrigger = 1<< 2, // Cont trigger enabled
113 kSock17 = 1<< 1, // Socket 1-7 for data transfer
114 kBusyOn = 1<< 0, // Busy continously on
115 };
116
117 enum TriggerType
118 {
119 kLPext = 0x001,
120 kLPint = 0x002,
121 kPedestal = 0x004,
122 kLPset = 0x078,
123 kTIM = 0x080,
124 kExt1 = 0x100,
125 kExt2 = 0x200,
126 kAll = kLPext|kLPint|kTIM|kPedestal|kExt1|kExt2
127 };
128#endif
129 // Einmalig: (new header changes entry in array --> send only if array changed)
130 // ----------------------------------
131 // Event builder stores an array with all available values.
132 // Disconnected boards are removed (replaced by def values)
133 // Any received header information is immediately put in the array.
134 // The array is transmitted whenever it changes.
135 // This will usually happen only very rarely when a new connection
136 // is opened.
137 //
138 // Array[40] of BoardId
139 // Array[40] of Version
140 // Array[40] of DNA
141
142 // Slow changes: (new header changes entry in array --> send only if arra changed)
143 // -------------------------------------------
144 // Event builder stores an array with all available values.
145 // Disconnected boards can be kept in the arrays.
146 // Any received header information is immediately put in the array.
147 // The array is transmitted whenever it changes.
148 //
149 // Connection status (disconnected, connecting, connected) / Array[40]
150 // Consistency of PLLLCK / Array[ 40] of PLLLCK
151 // Consistency of Trigger type / Array[ 40] of trigger type
152 // Consistency of ROI / Array[1440] of ROI
153 // Consistency of RefClock / Array[ 40] of ref clock
154 // Consistency of DAC values / Array[ 400] of DAC values
155 // Consistency of run number / Array[ 40] of Run numbers
156
157 // Fast changes (new header changes value --> send only if something changed)
158 // -------------------
159 // Event builder stores an internal array of all boards and
160 // transmits the min/max values determined from the array
161 // only if they have changed. Disconnected boards are not considered.
162 //
163 // Maximum/minimum Event counter of all boards in memory + board id
164 // Maximum/minimum time stamp of all boards in memory + board id
165 // Maximum/minimum temp of all boards in memory + board id
166
167 // Unknown:
168 // ------------------
169 // Trigger Id ?
170 // TriggerGeneratorPrescaler ?
171 // Number of Triggers to generate ?
172
173
174 // ------------------------------------------------------------
175
176 uint16_t fStartDelimiter; // 0x04FE
177 uint16_t fPackageLength;
178 uint16_t fVersion;
179 uint16_t fStatus;
180 //
181 uint16_t fTriggerCrc; // Receiver timeout / CRC ; 1 byte each
182 uint16_t fTriggerType;
183 uint32_t fTriggerCounter;
184 //
185 uint32_t fEventCounter;
186 uint32_t fFreqRefClock;
187 //
188 uint16_t fBoardId;
189 uint16_t fAdcClockPhaseShift;
190 uint16_t fNumTriggersToGenerate;
191 uint16_t fTriggerGeneratorPrescaler;
192 //
193 uint64_t fDNA; // Xilinx DNA
194 //
195 uint32_t fTimeStamp;
196 uint32_t fRunNumber;
197 //
198 int16_t fTempDrs[kNumTemp]; // In units of 1/16 deg(?)
199 //
200 uint16_t fDac[kNumDac];
201 //
202#ifdef __cplusplus
203 EventHeader() { init(*this); }
204 EventHeader(const uint16_t *ptr)
205 {
206 *this = std::vector<uint16_t>(ptr, ptr+sizeof(EventHeader)/2);
207 }
208
209 void operator=(const std::vector<uint16_t> &vec)
210 {
211 ntohcpy(vec, *this);
212
213 Reverse(((uint16_t*)fEventCounter));
214 Reverse(((uint16_t*)fEventCounter)+1);
215
216 Reverse(&fEventCounter);
217
218 Reverse(((uint16_t*)fTriggerCounter));
219 Reverse(((uint16_t*)fTriggerCounter)+1);
220
221 Reverse(&fTriggerCounter);
222
223 Reverse(((uint16_t*)fFreqRefClock));
224 Reverse(((uint16_t*)fFreqRefClock)+1);
225
226 Reverse(&fFreqRefClock);
227
228 Reverse(((uint16_t*)&fTimeStamp));
229 Reverse(((uint16_t*)&fTimeStamp)+1);
230
231 Reverse(&fTimeStamp);
232
233 Reverse(((uint16_t*)&fRunNumber));
234 Reverse(((uint16_t*)&fRunNumber)+1);
235
236 Reverse(&fRunNumber);
237 Reverse(&fDNA);
238
239 /*
240 for (int i=0; i<kNumTemp; i++)
241 {
242 fTempDrs[i] =
243 (fTempDrs[i]&0x8000) ?
244 ((fTempDrs[i]&0x007fff)^0xffffffff) :
245 (fTempDrs[i]&0x007fff);
246 fTempDrs[i]>>=3;
247 }*/
248
249 }
250
251 std::vector<uint16_t> HtoN() const
252 {
253 EventHeader h(*this);
254
255 Reverse(((uint16_t*)h.fEventCounter));
256 Reverse(((uint16_t*)h.fEventCounter)+1);
257
258 Reverse(&h.fEventCounter);
259
260 Reverse(((uint16_t*)h.fFreqRefClock));
261 Reverse(((uint16_t*)h.fFreqRefClock)+1);
262
263 Reverse(&h.fFreqRefClock);
264
265 Reverse(((uint16_t*)&h.fTimeStamp));
266 Reverse(((uint16_t*)&h.fTimeStamp)+1);
267
268 Reverse(&h.fTimeStamp);
269
270 Reverse(((uint16_t*)&h.fRunNumber));
271 Reverse(((uint16_t*)&h.fRunNumber)+1);
272
273 Reverse(&h.fRunNumber);
274 Reverse(&h.fDNA);
275
276 /*
277 for (int i=0; i<kNumTemp; i++)
278 {
279 h.fTempDrs[i] <<= 3;
280 h.fTempDrs[i] = ((h.fTempDrs[i]&0x800000) ?
281 (((h.fTempDrs[i]^0xffffffff)&0x007fff)|0x8000) :
282 (h.fTempDrs[i]&0x007fff));
283 }*/
284
285 return htoncpy(h);
286 }
287
288 bool operator==(const EventHeader &h) const
289 {
290 return
291 fStatus == h.fStatus &&
292 fRunNumber == h.fRunNumber &&
293 fEventCounter == h.fEventCounter &&
294 fAdcClockPhaseShift == h.fAdcClockPhaseShift &&
295 fTriggerGeneratorPrescaler == h.fTriggerGeneratorPrescaler &&
296 memcmp(fDac, h.fDac, sizeof(fDac))==0;
297 }
298 bool operator!=(const EventHeader &h) const { return !operator==(h); }
299
300 float GetTemp(int i) const { return fTempDrs[i]/16.; }
301
302 /*
303 float GetTemp(int i) const
304 {
305 return (((fTempDrs[i]&0x8000) ?
306 ((fTempDrs[i]&0x007fff)^0xffffffff)
307 : (fTempDrs[i]&0x007fff))>>3)/16.; }*/
308
309 uint8_t PLLLCK() const { return fStatus>>12; }
310
311 bool HasDenable() const { return fStatus&kDenable; }
312 bool HasDwrite() const { return fStatus&kDwrite; }
313// bool IsRefClockTooHigh() const { return fStatus&kRefClkTooHigh; }
314 bool IsRefClockTooLow() const { return fStatus&kRefClkTooLow; }
315 bool IsDcmLocked() const { return fStatus&kDcmLocked; }
316 bool IsDcmReady() const { return fStatus&kDcmReady; }
317 bool HasSpiSclk() const { return fStatus&kSpiSclk; }
318 bool HasBusyOn() const { return fStatus&kBusyOn; }
319 bool HasBusyOff() const { return fStatus&kBusyOff; }
320 bool HasTriggerEnabled() const { return fStatus&kTriggerLine; }
321 bool HasContTriggerEnabled() const { return fStatus&kContTrigger; }
322 bool IsInSock17Mode() const { return fStatus&kSock17; }
323
324 int GetTriggerLogic() const { return fTriggerType>>10; }
325 bool HasTriggerExt1() const { return fTriggerType&kExt1; }
326 bool HasTriggerExt2() const { return fTriggerType&kExt2; }
327 bool HasTIMsource() const { return fTriggerType&kTIM; }
328 bool HasTriggerLPext() const { return fTriggerType&kLPext; }
329 bool HasTriggerLPint() const { return fTriggerType&kLPint; }
330 bool IsTriggerPhys() const { return !(fTriggerType&kAll); }
331 int GetTriggerLPset() const { return (fTriggerType&kLPset)>>3; }
332
333 uint16_t Crate() const { return fBoardId>>8; }
334 uint16_t Board() const { return fBoardId&0xff; }
335
336 uint16_t Id() const { return Crate()*10+Board(); }
337
338 void Enable(Bits pos, bool enable=true)
339 {
340 if (enable)
341 fStatus |= pos;
342 else
343 fStatus &= ~pos;
344 }
345
346 void clear() { reset(*this); }
347 void print(std::ostream &out) const;
348#endif
349
350 } __attribute__((__packed__));
351
352 struct ChannelHeader
353 {
354 uint16_t fId;
355 uint16_t fStartCell;
356 uint16_t fRegionOfInterest;
357 uint16_t fDummy;
358 // uint16_t fData[];
359
360#ifdef __cplusplus
361 ChannelHeader() { init(*this); }
362
363 void operator=(const std::vector<uint16_t> &vec)
364 {
365 ntohcpy(vec, *this);
366 }
367
368 std::vector<uint16_t> HtoN() const
369 {
370 ChannelHeader h(*this);
371 return htoncpy(h);
372 }
373
374 void clear() { reset(*this); }
375 void print(std::ostream &out) const;
376
377 uint16_t Chip() const { return fId>>4; }
378 uint16_t Channel() const { return fId&0xf; }
379#endif
380 } __attribute__((__packed__));
381
382 // Package ends with:
383 // 0x4242
384 // 0x04fe
385
386 struct Configuration
387 {
388 bool fDwrite;
389 bool fDenable;
390 bool fContinousTrigger;
391 uint16_t fTriggerRate;
392 uint16_t fRoi[FAD::kNumChannelsPerChip];
393 uint16_t fDac[FAD::kNumDac];
394
395#ifdef __cplusplus
396 Configuration() { init(*this); }
397#endif
398 };
399
400 // --------------------------------------------------------------------
401#ifdef __cplusplus
402 inline std::ostream &operator<<(std::ostream &out, const EventHeader &h)
403 {
404 h.print(out);
405 return out;
406 }
407
408 inline std::ostream &operator<<(std::ostream &out, const ChannelHeader &h)
409 {
410 h.print(out);
411 return out;
412 }
413#endif
414
415#ifdef __cplusplus
416};
417#endif
418
419#endif
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