source: trunk/FACT++/src/HeadersFAD.h@ 12410

Last change on this file since 12410 was 12330, checked in by tbretz, 13 years ago
Added state kWritingData.
File size: 13.4 KB
Line 
1#ifndef FACT_HeadersFAD
2#define FACT_HeadersFAD
3
4#ifdef __cplusplus
5#include <ostream>
6
7// For debugging
8#include <iostream>
9
10#include "ByteOrder.h"
11
12// ====================================================================
13
14namespace FAD
15{
16#endif
17 enum Enable
18 {
19 kCmdDrsEnable = 0x0600, // CMD_DENABLE/CMD_DISABLE
20 kCmdDwrite = 0x0800, // CMD_DWRITE_RUN/CMD_DWRITE_STOP
21 kCmdSclk = 0x1000, // CMD_SCLK_ON/OFF
22 kCmdSrclk = 0x1500, // CMD_SRCLK_ON/OFF
23 kCmdTriggerLine = 0x1800, // CMD_TRIGGERS_ON/CMD_TRIGGERS_OFF
24 kCmdContTrigger = 0x1f00,
25 kCmdRun = 0x2200, // CMD_Start/Stop
26 kCmdBusyOff = 0x2400, //
27 kCmdBusyOn = 0x3200, //
28 kCmdResetEventCounter = 0x2A00, //
29 kCmdSocket = 0x3000, // CMD_mode_command/CMD_mode_all_sockets
30 kCmdSingleTrigger = 0xA000, // CMD_Trigger
31 };
32
33 enum Commands
34 {
35 kCmdWriteExecute = 0x0400, // Configure FAD with the current config ram
36
37 kCmdWrite = 0x0500, // write to Config-RAM
38 kCmdWriteRoi = kCmdWrite|0x00, // Baseaddress ROI-Values
39 kCmdWriteDac = kCmdWrite|0x24, // Baseaddress DAC-Values
40
41 kCmdWriteRate = kCmdWrite|0x2c, // Continous trigger rate
42 kCmdWriteRunNumberMSW = kCmdWrite|0x2d, // Run Number most significant word
43 kCmdWriteRunNumberLSW = kCmdWrite|0x2e, // Run Number least significant word
44
45 /*
46 kCmdRead = 0x0a00, // read from Config-RAM
47 kCmdReadRoi = kCmdRead|0x00, // Baseaddress ROI-Values
48 kCmdReadDac = kCmdRead|0x24, // Baseaddress DAC-Values
49 */
50
51 kCmdPhaseIncrease = 0x1200, // CMD_PS_DIRINC
52 kCmdPhaseDecrease = 0x1300, // CMD_PS_DIRDEC
53 kCmdPhaseApply = 0x1400, // CMD_PS_DO
54 kCmdPhaseReset = 0x1700, // CMD_PS_RESET
55 };
56
57 enum States
58 {
59 // State Machine states
60 kOffline = 1, // StateMachineImp::kSM_UserMode
61 kDisconnected,
62 kConnecting,
63 kConnected,
64 kConfiguring1,
65 kConfiguring2,
66 kConfigured,
67 kWritingData
68 };
69
70 enum
71 {
72 kMaxBins = 1024,
73 kNumTemp = 4,
74 kNumDac = 8,
75 kNumChips = 4,
76 kNumChannelsPerChip = 9,
77 kNumChannels = kNumChips*kNumChannelsPerChip,
78 };
79
80 enum
81 {
82 kMaxRegAddr = 0xff, // Highest address in config-ram
83 kMaxRegValue = 0xffff,
84 kMaxDacAddr = kNumDac-1,
85 kMaxDacValue = 0xffff,
86 kMaxRoiAddr = kNumChannels-1,
87 kMaxRoiValue = kMaxBins,
88 kMaxRunNumber = 0xffffffff,
89 };
90
91 enum
92 {
93 kDelimiterStart = 0xfb01,
94 kDelimiterEnd = 0x04fe,
95 };
96
97 // --------------------------------------------------------
98
99 struct EventHeader
100 {
101#ifdef __cplusplus
102 enum Bits
103 {
104 kDenable = 1<<11,
105 kDwrite = 1<<10,
106 //kRefClkTooHigh = 1<< 9,
107 kRefClkTooLow = 1<< 8,
108 kDcmLocked = 1<< 7,
109 kDcmReady = 1<< 6,
110 kSpiSclk = 1<< 5,
111 kBusyOff = 1<< 4, // Busy continously off
112 kTriggerLine = 1<< 3, // Trigger line enabled
113 kContTrigger = 1<< 2, // Cont trigger enabled
114 kSock17 = 1<< 1, // Socket 1-7 for data transfer
115 kBusyOn = 1<< 0, // Busy continously on
116 };
117
118 enum TriggerType
119 {
120 kLPext = 0x0100,
121 kLPint = 0x0200,
122 kPedestal = 0x0400,
123 kLPset = 0x7800,
124 kTIM = 0x8000,
125
126 kExt1 = 0x0001,
127 kExt2 = 0x0002,
128 kAll = kLPext|kLPint|kTIM|kPedestal|kExt1|kExt2
129 };
130#endif
131 // Einmalig: (new header changes entry in array --> send only if array changed)
132 // ----------------------------------
133 // Event builder stores an array with all available values.
134 // Disconnected boards are removed (replaced by def values)
135 // Any received header information is immediately put in the array.
136 // The array is transmitted whenever it changes.
137 // This will usually happen only very rarely when a new connection
138 // is opened.
139 //
140 // Array[40] of BoardId
141 // Array[40] of Version
142 // Array[40] of DNA
143
144 // Slow changes: (new header changes entry in array --> send only if arra changed)
145 // -------------------------------------------
146 // Event builder stores an array with all available values.
147 // Disconnected boards can be kept in the arrays.
148 // Any received header information is immediately put in the array.
149 // The array is transmitted whenever it changes.
150 //
151 // Connection status (disconnected, connecting, connected) / Array[40]
152 // Consistency of PLLLCK / Array[ 40] of PLLLCK
153 // Consistency of Trigger type / Array[ 40] of trigger type
154 // Consistency of ROI / Array[1440] of ROI
155 // Consistency of RefClock / Array[ 40] of ref clock
156 // Consistency of DAC values / Array[ 400] of DAC values
157 // Consistency of run number / Array[ 40] of Run numbers
158
159 // Fast changes (new header changes value --> send only if something changed)
160 // -------------------
161 // Event builder stores an internal array of all boards and
162 // transmits the min/max values determined from the array
163 // only if they have changed. Disconnected boards are not considered.
164 //
165 // Maximum/minimum Event counter of all boards in memory + board id
166 // Maximum/minimum time stamp of all boards in memory + board id
167 // Maximum/minimum temp of all boards in memory + board id
168
169 // Unknown:
170 // ------------------
171 // Trigger Id ?
172 // TriggerGeneratorPrescaler ?
173 // Number of Triggers to generate ?
174
175
176 // ------------------------------------------------------------
177
178 uint16_t fStartDelimiter; // 0x04FE
179 uint16_t fPackageLength;
180 uint16_t fVersion;
181 uint16_t fStatus;
182 //
183 uint16_t fTriggerCrc; // Receiver timeout / CRC ; 1 byte each
184 uint16_t fTriggerType;
185 uint32_t fTriggerCounter;
186 //
187 uint32_t fEventCounter;
188 uint32_t fFreqRefClock;
189 //
190 uint16_t fBoardId;
191 uint16_t fAdcClockPhaseShift;
192 uint16_t fNumTriggersToGenerate;
193 uint16_t fTriggerGeneratorPrescaler;
194 //
195 uint64_t fDNA; // Xilinx DNA
196 //
197 uint32_t fTimeStamp;
198 uint32_t fRunNumber;
199 //
200 int16_t fTempDrs[kNumTemp]; // In units of 1/16 deg(?)
201 //
202 uint16_t fDac[kNumDac];
203 //
204#ifdef __cplusplus
205 EventHeader() { init(*this); }
206 EventHeader(const uint16_t *ptr)
207 {
208 *this = std::vector<uint16_t>(ptr, ptr+sizeof(EventHeader)/2);
209 }
210
211 void operator=(const std::vector<uint16_t> &vec)
212 {
213 ntohcpy(vec, *this);
214
215 Reverse(((uint16_t*)fEventCounter));
216 Reverse(((uint16_t*)fEventCounter)+1);
217
218 Reverse(&fEventCounter);
219
220 Reverse(((uint16_t*)fTriggerCounter));
221 Reverse(((uint16_t*)fTriggerCounter)+1);
222
223 Reverse(&fTriggerCounter);
224
225 Reverse(((uint16_t*)fFreqRefClock));
226 Reverse(((uint16_t*)fFreqRefClock)+1);
227
228 Reverse(&fFreqRefClock);
229
230 Reverse(((uint16_t*)&fTimeStamp));
231 Reverse(((uint16_t*)&fTimeStamp)+1);
232
233 Reverse(&fTimeStamp);
234
235 Reverse(((uint16_t*)&fRunNumber));
236 Reverse(((uint16_t*)&fRunNumber)+1);
237
238 Reverse(&fRunNumber);
239 Reverse(&fDNA);
240
241 /*
242 for (int i=0; i<kNumTemp; i++)
243 {
244 fTempDrs[i] =
245 (fTempDrs[i]&0x8000) ?
246 ((fTempDrs[i]&0x007fff)^0xffffffff) :
247 (fTempDrs[i]&0x007fff);
248 fTempDrs[i]>>=3;
249 }*/
250
251 }
252
253 std::vector<uint16_t> HtoN() const
254 {
255 EventHeader h(*this);
256
257 Reverse(((uint16_t*)h.fEventCounter));
258 Reverse(((uint16_t*)h.fEventCounter)+1);
259
260 Reverse(&h.fEventCounter);
261
262 Reverse(((uint16_t*)h.fFreqRefClock));
263 Reverse(((uint16_t*)h.fFreqRefClock)+1);
264
265 Reverse(&h.fFreqRefClock);
266
267 Reverse(((uint16_t*)&h.fTimeStamp));
268 Reverse(((uint16_t*)&h.fTimeStamp)+1);
269
270 Reverse(&h.fTimeStamp);
271
272 Reverse(((uint16_t*)&h.fRunNumber));
273 Reverse(((uint16_t*)&h.fRunNumber)+1);
274
275 Reverse(&h.fRunNumber);
276 Reverse(&h.fDNA);
277
278 /*
279 for (int i=0; i<kNumTemp; i++)
280 {
281 h.fTempDrs[i] <<= 3;
282 h.fTempDrs[i] = ((h.fTempDrs[i]&0x800000) ?
283 (((h.fTempDrs[i]^0xffffffff)&0x007fff)|0x8000) :
284 (h.fTempDrs[i]&0x007fff));
285 }*/
286
287 return htoncpy(h);
288 }
289
290 bool operator==(const EventHeader &h) const
291 {
292 return
293 fStatus == h.fStatus &&
294 fRunNumber == h.fRunNumber &&
295 fEventCounter == h.fEventCounter &&
296 fAdcClockPhaseShift == h.fAdcClockPhaseShift &&
297 fTriggerGeneratorPrescaler == h.fTriggerGeneratorPrescaler &&
298 memcmp(fDac, h.fDac, sizeof(fDac))==0;
299 }
300 bool operator!=(const EventHeader &h) const { return !operator==(h); }
301
302 float GetTemp(int i) const { return fTempDrs[i]/16.; }
303
304 /*
305 float GetTemp(int i) const
306 {
307 return (((fTempDrs[i]&0x8000) ?
308 ((fTempDrs[i]&0x007fff)^0xffffffff)
309 : (fTempDrs[i]&0x007fff))>>3)/16.; }*/
310
311 uint8_t PLLLCK() const { return fStatus>>12; }
312
313 bool HasDenable() const { return fStatus&kDenable; }
314 bool HasDwrite() const { return fStatus&kDwrite; }
315// bool IsRefClockTooHigh() const { return fStatus&kRefClkTooHigh; }
316 bool IsRefClockTooLow() const { return fStatus&kRefClkTooLow; }
317 bool IsDcmLocked() const { return fStatus&kDcmLocked; }
318 bool IsDcmReady() const { return fStatus&kDcmReady; }
319 bool HasSpiSclk() const { return fStatus&kSpiSclk; }
320 bool HasBusyOn() const { return fStatus&kBusyOn; }
321 bool HasBusyOff() const { return fStatus&kBusyOff; }
322 bool HasTriggerEnabled() const { return fStatus&kTriggerLine; }
323 bool HasContTriggerEnabled() const { return fStatus&kContTrigger; }
324 bool IsInSock17Mode() const { return fStatus&kSock17; }
325
326 int GetTriggerLogic() const { return (fTriggerType>>2)&0x3f; }
327 bool HasTriggerExt1() const { return fTriggerType&kExt1; }
328 bool HasTriggerExt2() const { return fTriggerType&kExt2; }
329 bool HasTIMsource() const { return fTriggerType&kTIM; }
330 bool HasTriggerLPext() const { return fTriggerType&kLPext; }
331 bool HasTriggerLPint() const { return fTriggerType&kLPint; }
332 bool HasTriggerPed() const { return fTriggerType&kPedestal; }
333 bool IsTriggerPhys() const { return !(fTriggerType&kAll); }
334 int GetTriggerLPset() const { return (fTriggerType&kLPset)>>11; }
335
336 uint16_t Crate() const { return fBoardId>>8; }
337 uint16_t Board() const { return fBoardId&0xff; }
338
339 uint16_t Id() const { return Crate()*10+Board(); }
340
341 void Enable(Bits pos, bool enable=true)
342 {
343 if (enable)
344 fStatus |= pos;
345 else
346 fStatus &= ~pos;
347 }
348
349 void clear() { reset(*this); }
350 void print(std::ostream &out) const;
351#endif
352
353 } __attribute__((__packed__));
354
355 struct ChannelHeader
356 {
357 uint16_t fId;
358 uint16_t fStartCell;
359 uint16_t fRegionOfInterest;
360 uint16_t fDummy;
361 // uint16_t fData[];
362
363#ifdef __cplusplus
364 ChannelHeader() { init(*this); }
365
366 void operator=(const std::vector<uint16_t> &vec)
367 {
368 ntohcpy(vec, *this);
369 }
370
371 std::vector<uint16_t> HtoN() const
372 {
373 ChannelHeader h(*this);
374 return htoncpy(h);
375 }
376
377 void clear() { reset(*this); }
378 void print(std::ostream &out) const;
379
380 uint16_t Chip() const { return fId>>4; }
381 uint16_t Channel() const { return fId&0xf; }
382#endif
383 } __attribute__((__packed__));
384
385 // Package ends with:
386 // 0x4242
387 // 0x04fe
388
389 struct Configuration
390 {
391 bool fDwrite;
392 bool fDenable;
393 bool fContinousTrigger;
394 uint16_t fTriggerRate;
395 uint16_t fRoi[FAD::kNumChannelsPerChip];
396 uint16_t fDac[FAD::kNumDac];
397
398#ifdef __cplusplus
399 Configuration() { init(*this); }
400#endif
401 };
402
403 // --------------------------------------------------------------------
404#ifdef __cplusplus
405 inline std::ostream &operator<<(std::ostream &out, const EventHeader &h)
406 {
407 h.print(out);
408 return out;
409 }
410
411 inline std::ostream &operator<<(std::ostream &out, const ChannelHeader &h)
412 {
413 h.print(out);
414 return out;
415 }
416#endif
417
418#ifdef __cplusplus
419};
420#endif
421
422#endif
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