source: trunk/FACT++/src/HeadersFTM.h@ 11979

Last change on this file since 11979 was 11794, checked in by tbretz, 14 years ago
Fixed the division by fPrescaling when calculating the rates.
File size: 26.0 KB
Line 
1#ifndef FACT_HeadersFTM
2#define FACT_HeadersFTM
3
4#include <ostream>
5
6// For debugging
7#include <iostream>
8
9#include "ByteOrder.h"
10
11// ====================================================================
12
13
14namespace FTM
15{
16 enum States
17 {
18 kFtmUndefined = 0,
19
20 // FTM internal states
21 kFtmIdle = 1, ///< Trigger output disabled, configuration possible
22 kFtmConfig = 2, ///< FTM and FTUs are being reconfigured
23 kFtmRunning = 3, ///< Trigger output enabled, configuration ignored
24 kFtmCalib = 4,
25
26 kFtmStates = 0x0ff,
27 kFtmLocked = 0x100,
28
29 };
30
31 // idle: not locked: 0x2711
32 // running: not locked: 0x2713
33
34 enum StateMachine
35 {
36 kDisconnected = 1, //ConnectionFTM::kDisconnected,
37 kConnected ,//= ConnectionFTM::kConnected,
38 kIdle ,//= ConnectionFTM::kIdle,
39 kTakingData ,//= ConnectionFTM::kTakingData,
40 kConfiguring1,
41 kConfiguring2,
42 kConfigured,
43
44 kConfigError1 = 0x101,
45 kConfigError2 = 0x102,
46
47 kCmdTest
48 };
49
50 /// Command codes for FTM communication
51 enum Commands
52 {
53 // First word
54 kCmdRead = 0x0001, ///< Request data
55 kCmdWrite = 0x0002, ///< Send data
56 kCmdStartRun = 0x0004, ///< Enable the trigger output
57 kCmdStopRun = 0x0008, ///< Disable the trigger output
58 kCmdPing = 0x0010, ///< Ping all FTUs (get FTU list)
59 kCmdCrateReset = 0x0020, ///< Reboot (no power cycle) all FTUs and FADs of one crate
60 kCmdDisableReports = 0x0040, ///< Disable transmission of rate-reports (dynamic data)
61 kCmdConfigFTU = 0x0080, ///< Configure single FTU board
62 kCmdToggleLed = 0xc000,
63
64 // second word for read and write
65 kCmdStaticData = 0x0001, ///< Specifies that static (configuration) data is read/written
66 kCmdDynamicData = 0x0002, ///< Specifies that dynamic data is read/written
67 kCmdRegister = 0x0004, ///< Specifies that a register is read/written
68
69 // second word for StartRun
70 kStartRun = 0x0001, ///< ...until kCmdStopRun
71 kTakeNevents = 0x0002, ///< ...fixed number of events
72
73 // second word for kCmdCrateReset
74 kResetCrate0 = 0x0001,
75 kResetCrate1 = 0x0002,
76 kResetCrate2 = 0x0004,
77 kResetCrate3 = 0x0008,
78 };
79
80
81 /// Types sent in the header of the following data
82 enum Types
83 {
84 kHeader = 0, ///< Local extension to identify a header in fCounter
85 kStaticData = 1, ///< Static (configuration) data
86 kDynamicData = 2, ///< Dynamic data (rates)
87 kFtuList = 3, ///< FTU list (answer of ping)
88 kErrorList = 4, ///< Error list (error when FTU communication failed)
89 kRegister = 5, ///< A requested register value
90 };
91
92 // --------------------------------------------------------------------
93
94 enum Delimiter
95 {
96 kDelimiterStart = 0xfb01, ///< Start delimiter send before each header
97 kDelimiterEnd = 0x04fe ///< End delimiter send after each data block
98 };
99
100 struct Header
101 {
102 uint16_t fDelimiter; ///< Start delimiter
103 uint16_t fType; ///< Type of the data to be received after the header
104 uint16_t fDataSize; ///< Size in words to be received after the header (incl end delim.)
105 uint16_t fState; ///< State of the FTM central state machine
106 uint64_t fBoardId; ///< FPGA device DNA (unique chip id)
107 uint16_t fFirmwareId; ///< Version number
108 uint32_t fTriggerCounter; ///< FTM internal counter of all trigger decision independant of trigger-line enable/disable (reset: start/stop run)
109 uint64_t fTimeStamp; ///< Internal counter (micro-seconds, reset: start/stop run)
110
111 Header() { init(*this); }
112
113 std::vector<uint16_t> HtoN() const
114 {
115 Header h(*this);
116
117 Reverse(&h.fBoardId);
118 Reverse(&h.fTriggerCounter);
119 Reverse(&h.fTimeStamp);
120
121 return htoncpy(h);
122 }
123 void operator=(const std::vector<uint16_t> &vec)
124 {
125 ntohcpy(vec, *this);
126
127 Reverse(&fBoardId);
128 Reverse(&fTriggerCounter);
129 Reverse(&fTimeStamp);
130 }
131
132 void clear() { reset(*this); }
133 void print(std::ostream &out) const;
134
135 } __attribute__((__packed__));
136
137 struct DimPassport
138 {
139 uint64_t fBoardId;
140 uint16_t fFirmwareId;
141
142 DimPassport(const Header &h) :
143 fBoardId(h.fBoardId),
144 fFirmwareId(h.fFirmwareId)
145 {
146 }
147 } __attribute__((__packed__));
148
149 /*
150 struct DimTriggerCounter
151 {
152 uint64_t fTimeStamp;
153 uint32_t fTriggerCounter;
154
155 DimTriggerCounter(const Header &h) :
156 fTimeStamp(h.fTimeStamp),
157 fTriggerCounter(h.fTriggerCounter)
158 {
159 }
160 } __attribute__((__packed__));
161 */
162
163 struct StaticDataBoard
164 {
165 uint16_t fEnable[4]; /// enable of 4x9 pixels coded as 4x9bits
166 uint16_t fDAC[5]; /// 0-3 (A-D) Threshold of patches, 4 (H) Threshold for N out of 4 (12 bit each)
167 uint16_t fPrescaling; /// Internal readout time of FTUs for trigger counter
168
169 StaticDataBoard() { init(*this); }
170
171 void print(std::ostream &out) const;
172
173 } __attribute__((__packed__));
174
175 struct StaticData
176 {
177 enum Limits
178 {
179 kMaxMultiplicity = 40, ///< Minimum required trigger multiplicity
180 kMaxWindow = 0xf, ///< (4ns * x + 8ns) At least N (multiplicity) rising edges (trigger signal) within this window
181 kMaxDeadTime = 0xffff, ///< (4ns * x + 8ns)
182 kMaxDelayTimeMarker = 0x3ff, ///< (4ns * x + 8ns)
183 kMaxDelayTrigger = 0x3ff, ///< (4ns * x + 8ns)
184 kMaxTriggerInterval = 0x3ff, ///<
185 kMaxIntensity = 0x7f,
186 kMaxSequence = 0x1f,
187 kMaxDAC = 0xfff,
188 kMaxAddr = 0xfff,
189 kMaxPatchIdx = 159,
190 kMaxPixelIdx = 1439,
191 kMaskSettings = 0xf,
192 kMaskLEDs = 0xf,
193 };
194
195 enum GeneralSettings
196 {
197 kTrigger = 0x80, ///< Physics trigger decision (PhysicTrigger)
198 kPedestal = 0x40, ///< Pedestal trigger (artifical)
199 kLPint = 0x20, ///< Enable artificial trigger after light pulse (LP2)
200 kLPext = 0x10, ///< Enable trigger decision after light pulse (CalibrationTrigger, LP1)
201 kExt2 = 0x08, ///< External trigger signal 2
202 kExt1 = 0x04, ///< External trigger signal 1
203 kVeto = 0x02, ///< Veto trigger decision / artifical triggers
204 kClockConditioner = 0x01, ///< Select clock conditioner frequency (1) / time marker (0) as output
205 };
206
207 enum LightPulserEnable
208 {
209 kGroup1 = 0x40,
210 kGroup2 = 0x80,
211 };
212
213 uint16_t fGeneralSettings; /// Enable for different trigger types / select for TIM/ClockConditioner output (only 8 bit used)
214 uint16_t fStatusLEDs; /// only 8 bit used
215 uint16_t fTriggerInterval; /// [ms] Interval between two artificial triggers (no matter which type) minimum 1ms, 10 bit
216 uint16_t fTriggerSequence; /// Ratio between trigger types send as artificial trigger (in this order) 3x5bit
217 uint8_t fIntensityLPext; /// Intensity of LEDs (0-127)
218 uint8_t fEnableLPext; /// Enable for LED group 1/2 (LightPulserEnable)
219 uint8_t fIntensityLPint; /// Intensity of LEDs (0-127)
220 uint8_t fEnableLPint; /// Enable for LED group 1/2 (LightPulserEnable)
221 uint32_t fDummy0;
222 uint16_t fMultiplicityPhysics; /// Required trigger multiplicity for physcis triggers (0-40)
223 uint16_t fMultiplicityCalib; /// Required trigger multiplicity calibration (LPext) triggers (0-40)
224 uint16_t fDelayTrigger; /// (4ns * x + 8ns) FTM internal programmable delay between trigger decision and output
225 uint16_t fDelayTimeMarker; /// (4ns * x + 8ns) FTM internal programmable delay between trigger descision and time marker output
226 uint16_t fDeadTime; /// (4ns * x + 8ns) FTM internal programmable dead time after trigger decision
227 uint32_t fClockConditioner[8]; /// R0, R1, R8, R9, R11, R13, R14, R15
228 uint16_t fWindowPhysics; /// (4ns * x + 8ns) At least N (multiplicity) rising edges (trigger signal) within this window
229 uint16_t fWindowCalib; /// (4ns * x + 8ns) At least N (multiplicity) rising edges (trigger signal) within this window
230 uint16_t fDummy1;
231
232 StaticDataBoard fBoard[4][10]; // 4 crates * 10 boards (Crate0/FTU0 == readout time of FTUs)
233
234 uint16_t fActiveFTU[4]; // 4 crates * 10 bits (FTU enable)
235
236 StaticData() { init(*this); }
237 StaticData(const std::vector<uint16_t> &vec)
238 {
239 ntohcpy(vec, *this);
240
241 for (int i=0; i<8; i++)
242 Reverse(fClockConditioner+i);
243 }
244
245 std::vector<uint16_t> HtoN() const
246 {
247 StaticData d(*this);
248 for (int i=0; i<8; i++)
249 Reverse(d.fClockConditioner+i);
250
251 return htoncpy(d);
252 }
253
254 bool operator==(const StaticData &d) const
255 {
256 return memcmp(this, &d, sizeof(StaticData))==0;
257 }
258
259 void clear() { reset(*this); }
260 void print(std::ostream &out) const;
261
262 StaticDataBoard &operator[](int i) { return fBoard[i/10][i%10]; }
263 const StaticDataBoard &operator[](int i) const { return fBoard[i/10][i%10]; }
264
265 void EnableFTU(int i) { fActiveFTU[i/10] |= (1<<(i%10)); }
266 void DisableFTU(int i) { fActiveFTU[i/10] &= ~(1<<(i%10)); }
267
268 void EnableAllFTU() { for (int i=0; i<4; i++) fActiveFTU[i] = 0x3ff; }
269 void DisableAllFTU() { for (int i=0; i<4; i++) fActiveFTU[i] = 0; }
270
271 void EnableLPint(LightPulserEnable group, bool enable)
272 {
273 if (enable)
274 fEnableLPint |= group;
275 else
276 fEnableLPint &= ~group;
277 }
278
279 void EnableLPext(LightPulserEnable group, bool enable)
280 {
281 if (enable)
282 fEnableLPext |= group;
283 else
284 fEnableLPext &= ~group;
285 }
286
287 void ToggleFTU(int i) { fActiveFTU[i/10] ^= (1<<(i%10)); }
288
289 void Enable(GeneralSettings type, bool enable)
290 {
291 if (enable)
292 fGeneralSettings |= uint16_t(type);
293 else
294 fGeneralSettings &= ~uint16_t(type);
295 }
296
297 bool IsEnabled(GeneralSettings type) const { return fGeneralSettings&uint16_t(type); }
298
299 uint16_t *EnablePixel(int idx, bool enable)
300 {
301 const int pixel = idx%9;
302 const int patch = (idx/9)%4;
303 const int board = (idx/9)/4;
304
305 uint16_t &pix = fBoard[board/10][board%10].fEnable[patch];
306
307 if (enable)
308 pix |= (1<<pixel);
309 else
310 pix &= ~(1<<pixel);
311
312 return &pix;
313 }
314
315 void EnableAllPixel()
316 {
317 for (int c=0; c<4; c++)
318 for (int b=0; b<10; b++)
319 for (int p=0; p<4; p++)
320 fBoard[c][b].fEnable[p] = 0x1ff;
321 }
322
323 bool Enabled(uint16_t idx) const
324 {
325 const int pixel = idx%9;
326 const int patch = (idx/9)%4;
327 const int board = (idx/9)/4;
328
329 return (fBoard[board/10][board%10].fEnable[patch]>>pixel)&1;
330 }
331
332 uint8_t GetSequencePed() const { return (fTriggerSequence>>10)&0x1f; }
333 uint8_t GetSequenceLPint() const { return (fTriggerSequence>> 5)&0x1f; }
334 uint8_t GetSequenceLPext() const { return (fTriggerSequence) &0x1f; }
335
336 void SetSequence(uint8_t ped, uint8_t lpint, uint8_t lpext)
337 {
338 fTriggerSequence = ((ped&0x1f)<<10)|((lpint&0x1f)<<5)|(lpext&0x1f);
339
340 Enable(kPedestal, ped >0);
341 Enable(kLPext, lpext>0);
342 Enable(kLPint, lpint>0);
343 }
344
345 void SetClockRegister(const uint64_t reg[])
346 {
347 for (int i=0; i<8; i++)
348 fClockConditioner[i] = reg[i];
349 }
350
351 void SetPrescaling(uint16_t val)
352 {
353 for (int c=0; c<4; c++)
354 for (int b=0; b<10; b++)
355 fBoard[c][b].fPrescaling = val;
356 }
357
358 } __attribute__((__packed__));
359
360 // DimStructures must be a multiple of two... I don't know why
361 struct DimStaticData
362 {
363 uint64_t fTimeStamp;
364 //8
365 uint16_t fGeneralSettings; // only 8 bit used
366 uint16_t fStatusLEDs; // only 8 bit used
367 uint64_t fActiveFTU; // 40 bits in row
368 //20
369 uint16_t fTriggerInterval; // only 10 bit used
370 //22
371 uint16_t fTriggerSeqLPint; // only 5bits used
372 uint16_t fTriggerSeqLPext; // only 5bits used
373 uint16_t fTriggerSeqPed; // only 5bits used
374 // 28
375 uint8_t fEnableLPint; /// Enable for LED group 1/2 (LightPulserEnable)
376 uint8_t fEnableLPext; /// Enable for LED group 1/2 (LightPulserEnable)
377 uint8_t fIntensityLPint; /// Intensity of LEDs (0-127)
378 uint8_t fIntensityLPext; /// Intensity of LEDs (0-127)
379 //32
380 uint16_t fMultiplicityPhysics; // 0-40
381 uint16_t fMultiplicityCalib; // 0-40
382 //36
383 uint16_t fWindowPhysics;
384 uint16_t fWindowCalib;
385 //40
386 uint16_t fDelayTrigger;
387 uint16_t fDelayTimeMarker;
388 uint32_t fDeadTime;
389 //48
390 uint32_t fClockConditioner[8];
391 //64
392 uint16_t fEnable[90]; // 160*9bit = 180byte
393 uint16_t fThreshold[160];
394 uint16_t fMultiplicity[40]; // N out of 4
395 uint16_t fPrescaling[40];
396 // 640+64 = 704
397
398 bool HasTrigger() const { return fGeneralSettings & StaticData::kTrigger; }
399 bool HasPedestal() const { return fGeneralSettings & StaticData::kPedestal; }
400 bool HasLPext() const { return fGeneralSettings & StaticData::kLPext; }
401 bool HasLPint() const { return fGeneralSettings & StaticData::kLPint; }
402 bool HasExt2() const { return fGeneralSettings & StaticData::kExt2; }
403 bool HasExt1() const { return fGeneralSettings & StaticData::kExt1; }
404 bool HasVeto() const { return fGeneralSettings & StaticData::kVeto; }
405 bool HasClockConditioner() const { return fGeneralSettings & StaticData::kClockConditioner; }
406
407 bool HasLPextG1() const { return fEnableLPext&StaticData::kGroup1; }
408 bool HasLPextG2() const { return fEnableLPext&StaticData::kGroup2; }
409 bool HasLPintG1() const { return fEnableLPint&StaticData::kGroup1; }
410 bool HasLPintG2() const { return fEnableLPint&StaticData::kGroup2; }
411
412 bool IsActive(int i) const { return fActiveFTU&(uint64_t(1)<<i); }
413 bool IsEnabled(int i) const { return fEnable[i/16]&(1<<(i%16)); }
414
415 DimStaticData() { memset(this, 0, sizeof(DimStaticData)); }
416
417 DimStaticData(const Header &h, const StaticData &d) :
418 fTimeStamp(h.fTimeStamp),
419 fGeneralSettings(d.fGeneralSettings),
420 fStatusLEDs(d.fStatusLEDs),
421 fActiveFTU( uint64_t(d.fActiveFTU[0]) |
422 (uint64_t(d.fActiveFTU[1])<<10) |
423 (uint64_t(d.fActiveFTU[2])<<20) |
424 (uint64_t(d.fActiveFTU[3])<<30)),
425 fTriggerInterval(d.fTriggerInterval),
426 fTriggerSeqLPint((d.fTriggerSequence>>5)&0x1f),
427 fTriggerSeqLPext((d.fTriggerSequence)&0x1f),
428 fTriggerSeqPed((d.fTriggerSequence>>10)&0x1f),
429 fEnableLPint(d.fEnableLPint),
430 fEnableLPext(d.fEnableLPext),
431 fIntensityLPint(d.fIntensityLPint),
432 fIntensityLPext(d.fIntensityLPext),
433 fMultiplicityPhysics(d.fMultiplicityPhysics),
434 fMultiplicityCalib(d.fMultiplicityCalib),
435 fWindowPhysics(d.fWindowPhysics*4+8),
436 fWindowCalib(d.fWindowCalib*4+8),
437 fDelayTrigger(d.fDelayTrigger*4+8),
438 fDelayTimeMarker(d.fDelayTimeMarker*4+8),
439 fDeadTime(uint32_t(d.fDeadTime)*4+8)
440 {
441 memcpy(fClockConditioner, d.fClockConditioner, sizeof(uint32_t)*8);
442
443 uint16_t src[160];
444 for (int i=0; i<40; i++)
445 {
446 for (int j=0; j<4; j++)
447 {
448 src[i*4+j] = d[i].fEnable[j];
449 fThreshold[i*4+j] = d[i].fDAC[j];
450 }
451
452 fMultiplicity[i] = d[i].fDAC[4];
453 fPrescaling[i] = d[i].fPrescaling+1;
454 }
455 bitcpy(fEnable, 90, src, 160, 9);
456 }
457
458 } __attribute__((__packed__));
459
460
461 struct DynamicDataBoard
462 {
463 uint32_t fRatePatch[4]; // Patch 0,1,2,3
464 uint32_t fRateTotal; // Sum
465
466 uint16_t fOverflow; // Patches: bits 0-3, total 4
467 uint16_t fCrcError;
468
469 void print(std::ostream &out) const;
470
471 void reverse()
472 {
473 for (int i=0; i<4; i++)
474 Reverse(fRatePatch+i);
475
476 Reverse(&fRateTotal);
477 }
478
479 uint32_t &operator[](int i) { return fRatePatch[i]; }
480
481 } __attribute__((__packed__));
482
483
484 struct DynamicData
485 {
486 uint64_t fOnTimeCounter;
487 uint16_t fTempSensor[4]; // U45, U46, U48, U49
488
489 DynamicDataBoard fBoard[4][10]; // 4 crates * 10 boards
490
491 DynamicData() { init(*this); }
492
493 std::vector<uint16_t> HtoN() const
494 {
495 DynamicData d(*this);
496
497 Reverse(&d.fOnTimeCounter);
498
499 for (int c=0; c<4; c++)
500 for (int b=0; b<10; b++)
501 d.fBoard[c][b].reverse();
502
503 return htoncpy(d);
504 }
505
506 void operator=(const std::vector<uint16_t> &vec)
507 {
508 ntohcpy(vec, *this);
509
510 Reverse(&fOnTimeCounter);
511
512 for (int c=0; c<4; c++)
513 for (int b=0; b<10; b++)
514 fBoard[c][b].reverse();
515 }
516
517 void clear() { reset(*this); }
518 void print(std::ostream &out) const;
519
520 DynamicDataBoard &operator[](int i) { return fBoard[i/10][i%10]; }
521 const DynamicDataBoard &operator[](int i) const { return fBoard[i/10][i%10]; }
522
523 } __attribute__((__packed__));
524
525
526 struct DimDynamicData
527 {
528 uint64_t fTimeStamp;
529
530 uint64_t fOnTimeCounter;
531 float fTempSensor[4];
532
533 uint32_t fRatePatch[160];
534
535 uint32_t fRateBoard[40];
536 uint16_t fRateOverflow[40];
537
538 uint16_t fPrescaling[40];
539
540 uint16_t fCrcError[40];
541
542 uint16_t fState;
543
544 DimDynamicData(const Header &h, const DynamicData &d, const StaticData &s) :
545 fTimeStamp(h.fTimeStamp),
546 fOnTimeCounter(d.fOnTimeCounter),
547 fState(h.fState)
548 {
549 for (int i=0; i<4; i++)
550 fTempSensor[i] = d.fTempSensor[i];
551
552 for (int i=0; i<40; i++)
553 {
554 fRateBoard[i] = d[i].fRateTotal;
555 fRateOverflow[i] = d[i].fOverflow;
556 fCrcError[i] = d[i].fCrcError;
557 for (int j=0; j<4; j++)
558 fRatePatch[i*4+j] = d[i].fRatePatch[j];
559
560 fPrescaling[i] = s[i].fPrescaling;
561 }
562 }
563
564 } __attribute__((__packed__));
565
566 struct DimTriggerRates
567 {
568 uint64_t fTimeStamp;
569 uint64_t fOnTimeCounter;
570 uint32_t fTriggerCounter;
571 float fTriggerRate;
572 float fBoardRate[40];
573 float fPatchRate[160];
574
575 DimTriggerRates(const Header &h, const DynamicData &d, const StaticData &s, float rate) :
576 fTimeStamp(h.fTimeStamp), fOnTimeCounter(d.fOnTimeCounter),
577 fTriggerCounter(h.fTriggerCounter), fTriggerRate(rate)
578 {
579 for (int i=0; i<40; i++)
580 {
581 if ((d[i].fOverflow>>4)&1)
582 fBoardRate[i] = float(UINT32_MAX+1)*2/(s[i].fPrescaling+1);
583 else
584 fBoardRate[i] = float(d[i].fRateTotal)*2/(s[i].fPrescaling+1);
585
586 // FIXME: Include fCrcError in calculation
587 //fRateOverflow[i] = d[i].fOverflow;
588 for (int j=0; j<4; j++)
589 if ((d[i].fOverflow>>j)&1)
590 fPatchRate[i*4+j] = float(UINT32_MAX+1)*2/(s[i].fPrescaling+1);
591 else
592 fPatchRate[i*4+j] = float(d[i].fRatePatch[j])*2/(s[i].fPrescaling+1);
593 }
594 }
595
596 } __attribute__((__packed__));
597
598
599 struct FtuResponse
600 {
601 uint16_t fPingAddr; // Number of Pings and addr (pings= see error)
602 uint64_t fDNA;
603 uint16_t fErrorCounter; //
604
605 void reverse() { Reverse(&fDNA); }
606
607 void print(std::ostream &out) const;
608
609 } __attribute__((__packed__));
610
611 struct FtuList
612 {
613 uint16_t fNumBoards; /// Total number of boards responded
614 uint16_t fNumBoardsCrate[4]; /// Num of board responded in crate 0-3
615 uint16_t fActiveFTU[4]; /// List of active FTU boards in crate 0-3
616
617 FtuResponse fFTU[4][10];
618
619 FtuList() { init(*this); }
620
621 std::vector<uint16_t> HtoN() const
622 {
623 FtuList d(*this);
624
625 for (int c=0; c<4; c++)
626 for (int b=0; b<10; b++)
627 d.fFTU[c][b].reverse();
628
629 return htoncpy(d);
630 }
631
632 void operator=(const std::vector<uint16_t> &vec)
633 {
634 ntohcpy(vec, *this);
635
636 for (int c=0; c<4; c++)
637 for (int b=0; b<10; b++)
638 fFTU[c][b].reverse();
639 }
640
641 void clear() { reset(*this); }
642 void print(std::ostream &out) const;
643
644 FtuResponse &operator[](int i) { return fFTU[i/10][i%10]; }
645 const FtuResponse &operator[](int i) const { return fFTU[i/10][i%10]; }
646
647 } __attribute__((__packed__));
648
649 struct DimFtuList
650 {
651 uint64_t fTimeStamp;
652 uint64_t fActiveFTU;
653
654 uint16_t fNumBoards; /// Number of boards answered in total
655 uint8_t fNumBoardsCrate[4]; /// Number of boards answered per crate
656
657 uint64_t fDNA[40]; /// DNA of FTU board
658 uint8_t fAddr[40]; /// Address of FTU board
659 uint8_t fPing[40]; /// Number of pings until response (same as in Error)
660
661 DimFtuList(const Header &h, const FtuList &d) :
662 fTimeStamp(h.fTimeStamp),
663 fActiveFTU( uint64_t(d.fActiveFTU[0]) |
664 (uint64_t(d.fActiveFTU[1])<<10) |
665 (uint64_t(d.fActiveFTU[2])<<20) |
666 (uint64_t(d.fActiveFTU[3])<<30)),
667 fNumBoards(d.fNumBoards)
668 {
669 for (int i=0; i<4; i++)
670 fNumBoardsCrate[i] = d.fNumBoardsCrate[i];
671
672 for (int i=0; i<40; i++)
673 {
674 fDNA[i] = d[i].fDNA;
675 fAddr[i] = d[i].fPingAddr&0x3f;
676 fPing[i] = (d[i].fPingAddr>>8)&0x3;
677 }
678 }
679
680 bool IsActive(int i) const { return fActiveFTU&(uint64_t(1)<<i); }
681
682 } __attribute__((__packed__));
683
684
685 struct Error
686 {
687 uint16_t fNumCalls; // 0=error, >1 needed repetition but successfull
688
689 uint16_t fDelimiter;
690 uint16_t fDestAddress;
691 uint16_t fSrcAddress;
692 uint16_t fFirmwareId;
693 uint16_t fCommand;
694 uint16_t fData[21];
695 uint16_t fCrcErrorCounter;
696 uint16_t fCrcCheckSum;
697
698 Error() { init(*this); }
699
700 std::vector<uint16_t> HtoN() const
701 {
702 return htoncpy(*this);
703 }
704
705 void operator=(const std::vector<uint16_t> &vec) { ntohcpy(vec, *this); }
706
707 void clear() { reset(*this); }
708
709 uint16_t &operator[](int idx) { return fData[idx]; }
710 const uint16_t &operator[](int idx) const { return fData[idx]; }
711
712 void print(std::ostream &out) const;
713
714 } __attribute__((__packed__));
715
716 struct DimError
717 {
718 uint64_t fTimeStamp;
719 Error fError;
720
721 DimError(const Header &h, const Error &e) :
722 fTimeStamp(h.fTimeStamp),
723 fError(e)
724 {
725 fError.fDestAddress = (e.fDestAddress&0x3)*10 + ((e.fDestAddress>>2)&0xf);
726 fError.fSrcAddress = (e.fSrcAddress &0x3)*10 + ((e.fSrcAddress >>2)&0xf);
727 }
728
729 } __attribute__((__packed__));
730
731 /*
732 struct Command
733 {
734 uint16_t fStartDelimiter;
735 uint16_t fCommand;
736 uint16_t fParam[3];
737
738 Command() { init(*this); }
739
740 void HtoN() { hton(*this); }
741 void NtoH() { ntoh(*this); }
742
743 void operator=(const std::vector<uint16_t> &vec) { ntohcpy(vec, *this); }
744
745 void clear() { reset(*this); }
746
747
748 } __attribute__((__packed__));
749 */
750
751 // --------------------------------------------------------------------
752
753 inline std::ostream &operator<<(std::ostream &out, const FtuResponse &h)
754 {
755 h.print(out);
756 return out;
757 }
758
759 inline std::ostream &operator<<(std::ostream &out, const Header &h)
760 {
761 h.print(out);
762 return out;
763 }
764
765
766 inline std::ostream &operator<<(std::ostream &out, const FtuList &h)
767 {
768 h.print(out);
769 return out;
770 }
771
772 inline std::ostream &operator<<(std::ostream &out, const DynamicDataBoard &h)
773 {
774 h.print(out);
775 return out;
776 }
777
778 inline std::ostream &operator<<(std::ostream &out, const DynamicData &h)
779 {
780 h.print(out);
781 return out;
782 }
783
784 inline std::ostream &operator<<(std::ostream &out, const StaticDataBoard &h)
785 {
786 h.print(out);
787 return out;
788 }
789
790 inline std::ostream &operator<<(std::ostream &out, const StaticData &h)
791 {
792 h.print(out);
793 return out;
794 }
795
796 inline std::ostream &operator<<(std::ostream &out, const Error &h)
797 {
798 h.print(out);
799 return out;
800 }
801};
802
803#endif
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