Index: firmware/FTU/rs485/FTU_rs485_control.vhd =================================================================== --- firmware/FTU/rs485/FTU_rs485_control.vhd (revision 9939) +++ firmware/FTU/rs485/FTU_rs485_control.vhd (revision 10009) @@ -42,4 +42,5 @@ enables_ready : IN std_logic; -- enable_array_rs485_in is ok for sending prescaling_ready : IN std_logic; -- prescaling byte is ok for sending + ping_pong_ready : IN std_logic; -- ping pong successful rate_array_rs485 : IN rate_array_type; overflow_array_rs485_in : IN STD_LOGIC_VECTOR(7 downto 0); @@ -47,4 +48,5 @@ enable_array_rs485_in : IN enable_array_type; prescaling_rs485_in : IN STD_LOGIC_VECTOR(7 downto 0); + dna : IN STD_LOGIC_VECTOR(63 downto 0); rx_en : OUT std_logic; tx_d : OUT std_logic; @@ -57,4 +59,5 @@ read_enables : OUT std_logic := '0'; -- FTM wants to read enable pattern read_prescaling : OUT std_logic := '0'; -- FTM wants to read prescaling value + ping_pong : OUT std_logic := '0'; -- ping pong command from FTM dac_array_rs485_out : OUT dac_array_type; enable_array_rs485_out : OUT enable_array_type; @@ -83,4 +86,5 @@ signal int_read_enables_sig : std_logic; -- initialized in FTU_rs485_interpreter signal int_read_prescaling_sig : std_logic; -- initialized in FTU_rs485_interpreter + signal int_ping_pong_sig : std_logic; -- initialized in FTU_rs485_interpreter signal txcnt : integer range 0 to (RS485_BLOCK_WIDTH / 8) := 0; -- count 16 1-byte frames @@ -110,4 +114,5 @@ int_read_enables : OUT std_logic; int_read_prescaling : OUT std_logic; + int_ping_pong : OUT std_logic; dac_array_rs485_out : OUT dac_array_type; enable_array_rs485_out : OUT enable_array_type; @@ -136,7 +141,7 @@ type FTU_rs485_control_StateType is (RECEIVE, READ_RATES_WAIT, READ_DAC_WAIT, READ_ENABLE_WAIT, READ_PRESCALING_WAIT, - SET_DAC_WAIT, SET_ENABLE_WAIT, SET_PRESCALING_WAIT, + SET_DAC_WAIT, SET_ENABLE_WAIT, SET_PRESCALING_WAIT, PING_PONG_WAIT, READ_RATES_TRANSMIT, READ_DAC_TRANSMIT, READ_ENABLE_TRANSMIT, READ_PRESCALING_TRANSMIT, - SET_DAC_TRANSMIT, SET_ENABLE_TRANSMIT, SET_PRESCALING_TRANSMIT); + SET_DAC_TRANSMIT, SET_ENABLE_TRANSMIT, SET_PRESCALING_TRANSMIT, PING_PONG_TRANSMIT); signal FTU_rs485_control_State : FTU_rs485_control_StateType; @@ -166,4 +171,5 @@ int_read_enables => int_read_enables_sig, int_read_prescaling => int_read_prescaling_sig, + int_ping_pong => int_ping_pong_sig, dac_array_rs485_out => dac_array_rs485_out, enable_array_rs485_out => enable_array_rs485_out, @@ -205,4 +211,5 @@ read_enables <= '0'; read_prescaling <= '0'; + ping_pong <= '0'; FTU_rs485_control_State <= SET_DAC_WAIT; elsif (int_new_DACs_sig = '0' and int_new_enables_sig = '1') then @@ -214,4 +221,5 @@ read_enables <= '0'; read_prescaling <= '0'; + ping_pong <= '0'; FTU_rs485_control_State <= SET_ENABLE_WAIT; elsif (int_new_DACs_sig = '0' and int_new_enables_sig = '0' and int_new_prescaling_sig = '1') then @@ -223,4 +231,5 @@ read_enables <= '0'; read_prescaling <= '0'; + ping_pong <= '0'; FTU_rs485_control_State <= SET_PRESCALING_WAIT; elsif (int_new_DACs_sig = '0' and int_new_enables_sig = '0' and int_new_prescaling_sig = '0' and @@ -233,4 +242,5 @@ read_enables <= '0'; read_prescaling <= '0'; + ping_pong <= '0'; FTU_rs485_control_State <= READ_RATES_WAIT; elsif (int_new_DACs_sig = '0' and int_new_enables_sig = '0' and int_new_prescaling_sig = '0' and @@ -243,4 +253,5 @@ read_enables <= '0'; read_prescaling <= '0'; + ping_pong <= '0'; FTU_rs485_control_State <= READ_DAC_WAIT; elsif (int_new_DACs_sig = '0' and int_new_enables_sig = '0' and int_new_prescaling_sig = '0' and @@ -253,4 +264,5 @@ read_enables <= '1'; read_prescaling <= '0'; + ping_pong <= '0'; FTU_rs485_control_State <= READ_ENABLE_WAIT; elsif (int_new_DACs_sig = '0' and int_new_enables_sig = '0' and int_new_prescaling_sig = '0' and @@ -263,6 +275,9 @@ read_enables <= '0'; read_prescaling <= '1'; + ping_pong <= '0'; FTU_rs485_control_State <= READ_PRESCALING_WAIT; - else + elsif (int_new_DACs_sig = '0' and int_new_enables_sig = '0' and int_new_prescaling_sig = '0' and + int_read_rates_sig = '0' and int_read_DACs_sig = '0' and int_read_enables_sig = '0' and int_read_prescaling_sig = '0' and + int_ping_pong_sig = '1') then new_DACs <= '0'; new_enables <= '0'; @@ -272,4 +287,15 @@ read_enables <= '0'; read_prescaling <= '0'; + ping_pong <= '1'; + FTU_rs485_control_State <= PING_PONG_WAIT; + else + new_DACs <= '0'; + new_enables <= '0'; + new_prescaling <= '0'; + read_rates <= '0'; + read_DACs <= '0'; + read_enables <= '0'; + read_prescaling <= '0'; + ping_pong <= '0'; FTU_rs485_control_State <= RECEIVE; end if; @@ -338,4 +364,13 @@ end if; + when PING_PONG_WAIT => -- wait until FTU control says "done" and then answer to FTM + if (ping_pong_ready = '1') then + ping_pong <= '0'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + else + ping_pong <= '1'; + FTU_rs485_control_State <= PING_PONG_WAIT; + end if; + when SET_DAC_TRANSMIT => if tx_busy_sig = '0' then @@ -869,4 +904,85 @@ FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT; end if; + + when PING_PONG_TRANSMIT => + if tx_busy_sig = '0' then + if txcnt = 0 then -- start delimiter + txcnt <= txcnt + 1; + tx_data_sig <= RS485_START_DELIM; + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 1 then -- FTM address + txcnt <= txcnt + 1; + tx_data_sig <= FTM_ADDRESS; + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 2 then -- board address + txcnt <= txcnt + 1; + tx_data_sig <= "00" & brd_add; + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 3 then -- mirrored command + txcnt <= txcnt + 1; + tx_data_sig <= "00000101"; + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 4 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(7 downto 0); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 5 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(15 downto 8); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 6 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(23 downto 16); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 7 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(31 downto 24); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 8 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(39 downto 32); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 9 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(47 downto 40); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 10 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(55 downto 48); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 11 then -- data: device DNA + txcnt <= txcnt + 1; + tx_data_sig <= dna(63 downto 56); + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt < 15 then -- data: not used + txcnt <= txcnt + 1; + tx_data_sig <= "00000000"; + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + elsif txcnt = 15 then -- check sum + txcnt <= txcnt + 1; + tx_data_sig <= "00000000"; -- NOT YET IMPLEMENTED!!! + tx_start_sig <= '1'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + else -- transmission finished + txcnt <= 0; + FTU_rs485_control_State <= RECEIVE; + end if; + else + tx_start_sig <= '0'; + FTU_rs485_control_State <= PING_PONG_TRANSMIT; + end if; end case; Index: firmware/FTU/rs485/FTU_rs485_interpreter.vhd =================================================================== --- firmware/FTU/rs485/FTU_rs485_interpreter.vhd (revision 9939) +++ firmware/FTU/rs485/FTU_rs485_interpreter.vhd (revision 10009) @@ -46,4 +46,5 @@ int_read_enables : OUT std_logic := '0'; int_read_prescaling : OUT std_logic := '0'; + int_ping_pong : OUT std_logic := '0'; dac_array_rs485_out : OUT dac_array_type; enable_array_rs485_out : OUT enable_array_type; @@ -79,4 +80,5 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; + int_ping_pong <= '0'; if (block_valid_sr(3 downto 2) = "01") then -- rising edge of valid signal FTU_rs485_interpreter_State <= CHECK_HEADER; @@ -93,4 +95,5 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; + int_ping_pong <= '0'; if (data_block(7 downto 0) = RS485_START_DELIM) and (data_block(15 downto 8) = ("00" & brd_add)) and @@ -102,5 +105,5 @@ when DECODE => -- decode instruction - if(data_block(31 downto 24) = "00000000") then + if(data_block(31 downto 24) = "00000000") then -- set DACs int_new_DACs <= '1'; int_new_enables <= '0'; @@ -110,4 +113,5 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; + int_ping_pong <= '0'; dac_array_rs485_out_sig <= (conv_integer(unsigned(data_block(43 downto 32))), conv_integer(unsigned(data_block(59 downto 48))), @@ -120,5 +124,5 @@ ); FTU_rs485_interpreter_State <= WAIT_FOR_DATA; - elsif (data_block(31 downto 24) = "00000001") then + elsif (data_block(31 downto 24) = "00000001") then -- read DACs int_new_DACs <= '0'; int_new_enables <= '0'; @@ -128,6 +132,7 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; - FTU_rs485_interpreter_State <= WAIT_FOR_DATA; - elsif (data_block(31 downto 24) = "00000010") then + int_ping_pong <= '0'; + FTU_rs485_interpreter_State <= WAIT_FOR_DATA; + elsif (data_block(31 downto 24) = "00000010") then -- read rates int_new_DACs <= '0'; int_new_enables <= '0'; @@ -137,6 +142,7 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; - FTU_rs485_interpreter_State <= WAIT_FOR_DATA; - elsif (data_block(31 downto 24) = "00000011") then + int_ping_pong <= '0'; + FTU_rs485_interpreter_State <= WAIT_FOR_DATA; + elsif (data_block(31 downto 24) = "00000011") then -- set enables int_new_DACs <= '0'; int_new_enables <= '1'; @@ -146,4 +152,5 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; + int_ping_pong <= '0'; enable_array_rs485_out_sig <= (data_block(47 downto 32), data_block(63 downto 48), @@ -152,5 +159,5 @@ ); FTU_rs485_interpreter_State <= WAIT_FOR_DATA; - elsif (data_block(31 downto 24) = "00000100") then + elsif (data_block(31 downto 24) = "00000100") then -- read enables int_new_DACs <= '0'; int_new_enables <= '0'; @@ -160,6 +167,7 @@ int_read_enables <= '1'; int_read_prescaling <= '0'; - FTU_rs485_interpreter_State <= WAIT_FOR_DATA; - elsif (data_block(31 downto 24) = "00000110") then + int_ping_pong <= '0'; + FTU_rs485_interpreter_State <= WAIT_FOR_DATA; + elsif (data_block(31 downto 24) = "00000110") then -- set counter mode int_new_DACs <= '0'; int_new_enables <= '0'; @@ -169,7 +177,8 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; + int_ping_pong <= '0'; prescaling_rs485_out_sig <= data_block(39 downto 32); FTU_rs485_interpreter_State <= WAIT_FOR_DATA; - elsif (data_block(31 downto 24) = "00000111") then + elsif (data_block(31 downto 24) = "00000111") then -- read counter mode int_new_DACs <= '0'; int_new_enables <= '0'; @@ -179,4 +188,15 @@ int_read_enables <= '0'; int_read_prescaling <= '1'; + int_ping_pong <= '0'; + FTU_rs485_interpreter_State <= WAIT_FOR_DATA; + elsif (data_block(31 downto 24) = "00000101") then -- ping pong + int_new_DACs <= '0'; + int_new_enables <= '0'; + int_new_prescaling <= '0'; + int_read_rates <= '0'; + int_read_DACs <= '0'; + int_read_enables <= '0'; + int_read_prescaling <= '0'; + int_ping_pong <= '1'; FTU_rs485_interpreter_State <= WAIT_FOR_DATA; else @@ -188,4 +208,5 @@ int_read_enables <= '0'; int_read_prescaling <= '0'; + int_ping_pong <= '0'; FTU_rs485_interpreter_State <= WAIT_FOR_DATA; end if;