Index: firmware/FTU/rs485/FTU_rs485_control.vhd
===================================================================
--- firmware/FTU/rs485/FTU_rs485_control.vhd	(revision 10009)
+++ firmware/FTU/rs485/FTU_rs485_control.vhd	(revision 10037)
@@ -74,5 +74,5 @@
   signal rx_valid_sig : std_logic;  -- initialized in FTU_rs485_interface
   signal rx_data_sig  : std_logic_vector (7 DOWNTO 0);  -- initialized in FTU_rs485_interface
-  signal rx_busy_sig  : std_logic;  -- initialized in FTU_rs485_interface
+  --signal rx_busy_sig  : std_logic;  -- initialized in FTU_rs485_interface
 
   signal block_valid_sig : std_logic;  -- initialized in FTU_rs485_receiver
@@ -88,5 +88,5 @@
   signal int_ping_pong_sig       : std_logic;  -- initialized in FTU_rs485_interpreter
 
-  signal txcnt : integer range 0 to (RS485_BLOCK_WIDTH / 8) := 0;  -- count 16 1-byte frames 
+  signal txcnt : integer range 0 to (RS485_BLOCK_WIDTH / 8) := 0;  -- count 28 1-byte frames 
   
   component FTU_rs485_receiver
@@ -131,5 +131,5 @@
       -- FPGA
       rx_data  : OUT std_logic_vector (7 DOWNTO 0);
-      rx_busy  : OUT std_logic  := '0';
+      --rx_busy  : OUT std_logic  := '0';
       rx_valid : OUT std_logic  := '0';
       tx_data  : IN  std_logic_vector (7 DOWNTO 0);
@@ -187,5 +187,5 @@
       -- FPGA
       rx_data  => rx_data_sig,
-      rx_busy  => rx_busy_sig,
+      --rx_busy  => rx_busy_sig,
       rx_valid => rx_valid_sig,
       tx_data  => tx_data_sig,
@@ -390,65 +390,75 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= SET_DAC_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 4 then        -- data: DAC A low
+            elsif txcnt = 5 then        -- data: DAC A low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(0),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 5 then        -- data: DAC A high
+            elsif txcnt = 6 then        -- data: DAC A high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(0),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 6 then        -- data: DAC B low
+            elsif txcnt = 7 then        -- data: DAC B low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(1),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 7 then        -- data: DAC B high
+            elsif txcnt = 8 then        -- data: DAC B high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(1),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 8 then        -- data: DAC C low
+            elsif txcnt = 9 then        -- data: DAC C low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(2),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 9 then        -- data: DAC C high
+            elsif txcnt = 10 then        -- data: DAC C high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(2),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 10 then        -- data: DAC D low
+            elsif txcnt = 11 then        -- data: DAC D low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(3),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 11 then        -- data: DAC D high
+            elsif txcnt = 12 then        -- data: DAC D high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(3),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 12 then        -- data: DAC E low
+            elsif txcnt = 13 then        -- data: DAC E low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(7),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 13 then        -- data: DAC E high
+            elsif txcnt = 14 then        -- data: DAC E high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(7),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt < 15 then        -- data: not used
+            elsif txcnt < ((RS485_BLOCK_WIDTH / 8) - 2) then        -- data: not used
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_DAC_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
@@ -481,55 +491,65 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000011";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 4 then        -- data: enable pattern A7-0
+            elsif txcnt = 5 then        -- data: enable pattern A7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(0)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 5 then        -- data: enable pattern A8
+            elsif txcnt = 6 then        -- data: enable pattern A8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(0)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 6 then        -- data: enable pattern B7-0
+            elsif txcnt = 7 then        -- data: enable pattern B7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(1)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 7 then        -- data: enable pattern B8
+            elsif txcnt = 8 then        -- data: enable pattern B8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(1)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 8 then        -- data: enable pattern C7-0
+            elsif txcnt = 9 then        -- data: enable pattern C7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(2)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 9 then        -- data: enable pattern C8
+            elsif txcnt = 10 then        -- data: enable pattern C8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(2)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 10 then        -- data: enable pattern D7-0
+            elsif txcnt = 11 then        -- data: enable pattern D7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(3)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 11 then        -- data: enable pattern D8
+            elsif txcnt = 12 then        -- data: enable pattern D8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(3)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt < 15 then        -- data: not used
+            elsif txcnt < ((RS485_BLOCK_WIDTH / 8) - 2) then        -- data: not used
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= SET_ENABLE_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
@@ -562,20 +582,30 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_PRESCALING_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= SET_PRESCALING_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000110";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_PRESCALING_TRANSMIT;
-            elsif txcnt = 4 then        -- data: prescaling
+            elsif txcnt = 5 then        -- data: prescaling
               txcnt <= txcnt + 1;
               tx_data_sig <= prescaling_rs485_in;
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_PRESCALING_TRANSMIT;
-            elsif txcnt < 15 then        -- data: not used
+            elsif txcnt < ((RS485_BLOCK_WIDTH / 8) - 2) then        -- data: not used
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= SET_PRESCALING_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= SET_PRESCALING_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
@@ -608,65 +638,125 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000010";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 4 then        -- data: counter A low
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(0),16)(7 downto 0);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 5 then        -- data: counter A high
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(0),16)(15 downto 8);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 6 then        -- data: counter B low
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(1),16)(7 downto 0);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 7 then        -- data: counter B high
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(1),16)(15 downto 8);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 8 then        -- data: counter C low
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(2),16)(7 downto 0);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 9 then        -- data: counter C high
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(2),16)(15 downto 8);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 10 then        -- data: counter D low
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(3),16)(7 downto 0);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 11 then        -- data: counter D high
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(3),16)(15 downto 8);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 12 then        -- data: trigger counter low
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(4),16)(7 downto 0);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 13 then        -- data: trigger counter high
-              txcnt <= txcnt + 1;
-              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(4),16)(15 downto 8);
-              tx_start_sig <= '1';
-              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 14 then        -- data: overflow register
+            elsif txcnt = 5 then        -- data: counter A 7...0
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(0),32)(7 downto 0);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 6 then        -- data: counter A 15...8
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(0),32)(15 downto 8);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 7 then        -- data: counter A 23...16
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(0),32)(23 downto 16);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 8 then        -- data: counter A 31...24
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(0),32)(31 downto 24);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 9 then        -- data: counter B 7...0
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(1),32)(7 downto 0);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 10 then        -- data: counter B 15...8
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(1),32)(15 downto 8);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 11 then        -- data: counter B 23...16
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(1),32)(23 downto 16);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 12 then        -- data: counter B 31...24
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(1),32)(31 downto 24);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 13 then        -- data: counter C 7...0
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(2),32)(7 downto 0);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 14 then        -- data: counter C 15...8
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(2),32)(15 downto 8);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 15 then        -- data: counter C 23...16
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(2),32)(23 downto 16);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 16 then        -- data: counter C 31...24
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(2),32)(31 downto 24);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 17 then        -- data: counter D 7...0
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(3),32)(7 downto 0);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 18 then        -- data: counter D 15...8
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(3),32)(15 downto 8);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 19 then        -- data: counter D 23...16
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(3),32)(23 downto 16);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 20 then        -- data: counter D 31...24
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(3),32)(31 downto 24);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 21 then        -- data: trigger counter 7...0
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(4),32)(7 downto 0);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 22 then        -- data: trigger counter 15...8
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(4),32)(15 downto 8);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 23 then        -- data: trigger counter 23...16
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(4),32)(23 downto 16);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 24 then        -- data: trigger counter 31...24
+              txcnt <= txcnt + 1;
+              tx_data_sig <= conv_std_logic_vector(rate_array_rs485(4),32)(31 downto 24);
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = 25 then        -- data: overflow register
               txcnt <= txcnt + 1;
               tx_data_sig <= overflow_array_rs485_in;
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_RATES_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_RATES_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
@@ -699,65 +789,75 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_DAC_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000001";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 4 then        -- data: DAC A low
+            elsif txcnt = 5 then        -- data: DAC A low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(0),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 5 then        -- data: DAC A high
+            elsif txcnt = 6 then        -- data: DAC A high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(0),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 6 then        -- data: DAC B low
+            elsif txcnt = 7 then        -- data: DAC B low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(1),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 7 then        -- data: DAC B high
+            elsif txcnt = 8 then        -- data: DAC B high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(1),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 8 then        -- data: DAC C low
+            elsif txcnt = 9 then        -- data: DAC C low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(2),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 9 then        -- data: DAC C high
+            elsif txcnt = 10 then        -- data: DAC C high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(2),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 10 then        -- data: DAC D low
+            elsif txcnt = 11 then        -- data: DAC D low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(3),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 11 then        -- data: DAC D high
+            elsif txcnt = 12 then        -- data: DAC D high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(3),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 12 then        -- data: DAC E low
+            elsif txcnt = 13 then        -- data: DAC E low
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(7),16)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 13 then        -- data: DAC E high
+            elsif txcnt = 14 then        -- data: DAC E high
               txcnt <= txcnt + 1;
               tx_data_sig <= conv_std_logic_vector(dac_array_rs485_in(7),16)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt < 15 then        -- data: not used
+            elsif txcnt < ((RS485_BLOCK_WIDTH / 8) - 2) then        -- data: not used
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_DAC_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_DAC_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
@@ -790,55 +890,65 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000100";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 4 then        -- data: enable pattern A7-0
+            elsif txcnt = 5 then        -- data: enable pattern A7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(0)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 5 then        -- data: enable pattern A8
+            elsif txcnt = 6 then        -- data: enable pattern A8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(0)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 6 then        -- data: enable pattern B7-0
+            elsif txcnt = 7 then        -- data: enable pattern B7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(1)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 7 then        -- data: enable pattern B8
+            elsif txcnt = 8 then        -- data: enable pattern B8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(1)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 8 then        -- data: enable pattern C7-0
+            elsif txcnt = 9 then        -- data: enable pattern C7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(2)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 9 then        -- data: enable pattern C8
+            elsif txcnt = 10 then        -- data: enable pattern C8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(2)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 10 then        -- data: enable pattern D7-0
+            elsif txcnt = 11 then        -- data: enable pattern D7-0
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(3)(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 11 then        -- data: enable pattern D8
+            elsif txcnt = 12 then        -- data: enable pattern D8
               txcnt <= txcnt + 1;
               tx_data_sig <= enable_array_rs485_in(3)(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt < 15 then        -- data: not used
+            elsif txcnt < ((RS485_BLOCK_WIDTH / 8) - 2) then        -- data: not used
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_ENABLE_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
@@ -871,25 +981,35 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000111";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT;
-            elsif txcnt = 4 then        -- data: prescaling
+            elsif txcnt = 5 then        -- data: prescaling
               txcnt <= txcnt + 1;
               tx_data_sig <= prescaling_rs485_in;
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT;
-            elsif txcnt = 5 then        -- data: overflow register
+            elsif txcnt = 6 then        -- data: overflow register
               txcnt <= txcnt + 1;
               tx_data_sig <= overflow_array_rs485_in;
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT;
-            elsif txcnt < 15 then        -- data: not used
+            elsif txcnt < ((RS485_BLOCK_WIDTH / 8) - 2) then        -- data: not used
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= READ_PRESCALING_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
@@ -922,55 +1042,65 @@
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 3 then        -- mirrored command
+            elsif txcnt = 3 then        -- firmware ID
+              txcnt <= txcnt + 1;
+              tx_data_sig <= FIRMWARE_ID;
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= PING_PONG_TRANSMIT;
+            elsif txcnt = 4 then        -- mirrored command
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000101";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 4 then        -- data: device DNA
+            elsif txcnt = 5 then        -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(7 downto 0);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 5 then        -- data: device DNA
+            elsif txcnt = 6 then        -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(15 downto 8);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 6 then        -- data: device DNA
+            elsif txcnt = 7 then        -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(23 downto 16);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 7 then        -- data: device DNA
+            elsif txcnt = 8 then        -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(31 downto 24);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 8 then        -- data: device DNA
+            elsif txcnt = 9 then        -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(39 downto 32);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 9 then        -- data: device DNA
+            elsif txcnt = 10 then        -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(47 downto 40);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 10 then       -- data: device DNA
+            elsif txcnt = 11 then       -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(55 downto 48);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 11 then       -- data: device DNA
+            elsif txcnt = 12 then       -- data: device DNA
               txcnt <= txcnt + 1;
               tx_data_sig <= dna(63 downto 56);
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt < 15 then        -- data: not used
+            elsif txcnt < ((RS485_BLOCK_WIDTH / 8) - 2) then        -- data: not used
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";
               tx_start_sig <= '1';
               FTU_rs485_control_State <= PING_PONG_TRANSMIT;
-            elsif txcnt = 15 then        -- check sum
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 2) then        -- CRC error counter
+              txcnt <= txcnt + 1;
+              tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
+              tx_start_sig <= '1';
+              FTU_rs485_control_State <= PING_PONG_TRANSMIT;
+            elsif txcnt = ((RS485_BLOCK_WIDTH / 8) - 1) then        -- check sum
               txcnt <= txcnt + 1;
               tx_data_sig <= "00000000";  -- NOT YET IMPLEMENTED!!!
Index: firmware/FTU/rs485/FTU_rs485_interface.vhd
===================================================================
--- firmware/FTU/rs485/FTU_rs485_interface.vhd	(revision 10009)
+++ firmware/FTU/rs485/FTU_rs485_interface.vhd	(revision 10037)
@@ -34,5 +34,5 @@
     -- FPGA
     rx_data  : OUT    std_logic_vector (7 DOWNTO 0);
-    rx_busy  : OUT    std_logic  := '0';
+    --rx_busy  : OUT    std_logic  := '0';
     rx_valid : OUT    std_logic  := '0';
     tx_data  : IN     std_logic_vector (7 DOWNTO 0);
@@ -122,5 +122,5 @@
   rx_en <= flow_ctrl;
   rx_data <= rx_sr;
-  rx_busy <= '1' when (rx_bitcnt < 11) else '0';
+  --rx_busy <= '1' when (rx_bitcnt < 11) else '0';
 
 END ARCHITECTURE beha;
Index: firmware/FTU/rs485/FTU_rs485_interpreter.vhd
===================================================================
--- firmware/FTU/rs485/FTU_rs485_interpreter.vhd	(revision 10009)
+++ firmware/FTU/rs485/FTU_rs485_interpreter.vhd	(revision 10037)
@@ -105,5 +105,5 @@
 
         when DECODE => -- decode instruction
-          if(data_block(31 downto 24) = "00000000") then -- set DACs
+          if(data_block(39 downto 32) = "00000000") then -- set DACs
             int_new_DACs        <= '1';
             int_new_enables     <= '0';
@@ -114,15 +114,15 @@
             int_read_prescaling <= '0';
             int_ping_pong       <= '0';
-            dac_array_rs485_out_sig <= (conv_integer(unsigned(data_block(43 downto 32))),
-                                        conv_integer(unsigned(data_block(59 downto 48))),
-                                        conv_integer(unsigned(data_block(75 downto 64))),
-                                        conv_integer(unsigned(data_block(91 downto 80))),
+            dac_array_rs485_out_sig <= (conv_integer(unsigned(data_block(51 downto 40))),
+                                        conv_integer(unsigned(data_block(67 downto 56))),
+                                        conv_integer(unsigned(data_block(83 downto 72))),
+                                        conv_integer(unsigned(data_block(99 downto 88))),
                                         DEFAULT_DAC(4),
                                         DEFAULT_DAC(5),
                                         DEFAULT_DAC(6),
-                                        conv_integer(unsigned(data_block(107 downto 96)))
+                                        conv_integer(unsigned(data_block(115 downto 104)))
                                         );
             FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
-          elsif (data_block(31 downto 24) = "00000001") then -- read DACs
+          elsif (data_block(39 downto 32) = "00000001") then -- read DACs
             int_new_DACs        <= '0';
             int_new_enables     <= '0';
@@ -134,5 +134,5 @@
             int_ping_pong       <= '0';
             FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
-          elsif (data_block(31 downto 24) = "00000010") then -- read rates
+          elsif (data_block(39 downto 32) = "00000010") then -- read rates
             int_new_DACs        <= '0';
             int_new_enables     <= '0';
@@ -144,5 +144,5 @@
             int_ping_pong       <= '0';
             FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
-          elsif (data_block(31 downto 24) = "00000011") then -- set enables
+          elsif (data_block(39 downto 32) = "00000011") then -- set enables
             int_new_DACs        <= '0';
             int_new_enables     <= '1';
@@ -153,11 +153,11 @@
             int_read_prescaling <= '0';
             int_ping_pong       <= '0';
-            enable_array_rs485_out_sig <= (data_block(47 downto 32),
-                                           data_block(63 downto 48),
-                                           data_block(79 downto 64),
-                                           data_block(95 downto 80)
+            enable_array_rs485_out_sig <= (data_block(55 downto 40),
+                                           data_block(71 downto 56),
+                                           data_block(87 downto 72),
+                                           data_block(103 downto 88)
                                            );
             FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
-          elsif (data_block(31 downto 24) = "00000100") then -- read enables
+          elsif (data_block(39 downto 32) = "00000100") then -- read enables
             int_new_DACs        <= '0';
             int_new_enables     <= '0';
@@ -169,5 +169,5 @@
             int_ping_pong       <= '0';
             FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
-          elsif (data_block(31 downto 24) = "00000110") then -- set counter mode
+          elsif (data_block(39 downto 32) = "00000110") then -- set counter mode
             int_new_DACs        <= '0';
             int_new_enables     <= '0';
@@ -178,7 +178,7 @@
             int_read_prescaling <= '0';
             int_ping_pong       <= '0';
-            prescaling_rs485_out_sig <= data_block(39 downto 32);
-            FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
-          elsif (data_block(31 downto 24) = "00000111") then -- read counter mode
+            prescaling_rs485_out_sig <= data_block(47 downto 40);
+            FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
+          elsif (data_block(39 downto 32) = "00000111") then -- read counter mode
             int_new_DACs        <= '0';
             int_new_enables     <= '0';
@@ -190,5 +190,5 @@
             int_ping_pong       <= '0';
             FTU_rs485_interpreter_State <= WAIT_FOR_DATA;
-          elsif (data_block(31 downto 24) = "00000101") then -- ping pong
+          elsif (data_block(39 downto 32) = "00000101") then -- ping pong
             int_new_DACs        <= '0';
             int_new_enables     <= '0';
