Index: /firmware/FTM/ftm_definitions.vhd
===================================================================
--- /firmware/FTM/ftm_definitions.vhd	(revision 10150)
+++ /firmware/FTM/ftm_definitions.vhd	(revision 10151)
@@ -26,6 +26,13 @@
 -- use IEEE.NUMERIC_STD.ALL;
 
--- package ftm_array_types is  
--- end ftm_array_types;
+package ftm_array_types is
+
+  -- data arrays for a single FTU
+  type FTU_enable_array_type is array (0 to 3) of std_logic_vector(15 downto 0);
+  type FTU_dac_array_type    is array (0 to 4) of std_logic_vector(15 downto 0);
+  type FTU_rate_array_type   is array (0 to 4) of std_logic_vector(31 downto 0);
+  type active_FTU_array_type is array (0 to 3) of std_logic_vector(15 downto 0);
+  
+end ftm_array_types;
 
 
@@ -38,4 +45,9 @@
 package ftm_constants is
 
+  constant NO_OF_CRATES         : integer :=  4;
+  constant NO_OF_FTUS_PER_CRATE : integer := 10;
+  constant NO_OF_FTU_ENABLE_REG : integer :=  4;
+  constant NO_OF_FTU_DAC_REG    : integer :=  5;
+  
   --internal FPGA clock frequencies
   constant INT_CLK_FREQUENCY_1 : integer :=  50000000;  --  50MHz
@@ -59,3 +71,8 @@
   constant DNA_FOR_SIM : bit_vector := X"01710000E0000501";
 
+  --RAM address offsets and widths
+  constant STATIC_RAM_ACT_FTU_OFFSET : integer := 16#1B0#;
+  constant STATIC_RAM_CFG_FTU_OFFSET : integer := 16#020#;
+  constant STATIC_RAM_ADDR_WIDTH     : integer := 12;
+  
 end ftm_constants;