Index: /firmware/FTM/ftm_definitions.vhd
===================================================================
--- /firmware/FTM/ftm_definitions.vhd	(revision 10156)
+++ /firmware/FTM/ftm_definitions.vhd	(revision 10157)
@@ -33,4 +33,5 @@
   type FTU_rate_array_type   is array (0 to 4) of std_logic_vector(31 downto 0);
   type active_FTU_array_type is array (0 to 3) of std_logic_vector(15 downto 0);
+  type FTU_answer_array_type is array (0 to 3) of integer range 0 to 10;
   
 end ftm_array_types;
@@ -49,4 +50,5 @@
   constant NO_OF_FTU_ENABLE_REG : integer :=  4;
   constant NO_OF_FTU_DAC_REG    : integer :=  5;
+  constant NO_OF_FTU_LIST_REG   : integer :=  6;
   
   --internal FPGA clock frequencies
@@ -60,6 +62,7 @@
   --communication with FTUs
   constant FTU_RS485_BAUD_RATE   : integer := 250000;  -- bits / sec in our case
-  constant FTU_RS485_TIMEOUT     : integer := (INT_CLK_FREQUENCY_1 * 5) / 1000;  -- 5ms @ 50MHz (250000 clk periods)
-  constant FTU_RS485_BLOCK_WIDTH : integer := 224;     -- 28 byte protocol
+  constant FTU_RS485_TIMEOUT     : integer := (INT_CLK_FREQUENCY_1 * 2) / 1000;  -- 2ms @ 50MHz (100000 clk periods)
+  constant FTU_RS485_NO_OF_RETRY : integer range 0 to 2 := 2;  -- in case of timeout, !!! HAS TO BE < 3 !!!
+  constant FTU_RS485_BLOCK_WIDTH : integer := 224;  -- 28 byte protocol
   constant FTU_RS485_START_DELIM : std_logic_vector(7 downto 0) := "01000000";  -- start delimiter "@"
   
@@ -75,4 +78,6 @@
   constant STATIC_RAM_CFG_FTU_OFFSET : integer := 16#020#;
   constant STATIC_RAM_ADDR_WIDTH     : integer := 12;
+  constant FTU_LIST_RAM_OFFSET       : integer := 16#009#;
+  constant FTU_LIST_RAM_ADDR_WIDTH   : integer := 12;
   
 end ftm_constants;