Changeset 10667 for firmware/FSC/src

Timestamp:

05/11/11 18:33:23 (14 years ago)

Author:

neise

Message:

 

Location:

firmware/FSC/src

Files:

• FSC_neu.c (added)
• FSC_old.c (added)
• FSC_test.c (added)
• FSC_test_electrical_connection.c (added)
• application.c (modified) (4 diffs)
• application.h (modified) (3 diffs)
• output.c (modified) (1 diff)
• output.h (modified) (1 diff)
• parser.c (modified) (2 diffs)
• parser.h (modified) (1 diff)
• spare_outs.c (added)
• spare_outs.h (added)
• spi_master.c (modified) (1 diff)
• usart.c (modified) (5 diffs)
• usart.h (modified) (2 diffs)
• w5100_spi_interface.c (modified) (18 diffs)
• w5100_spi_interface.h (modified) (4 diffs)

firmware/FSC/src/application.c

@@ -2 +2 @@
 
 #include "application.h"
+#include "usart.h"
 #include <avr/wdt.h> 
 
@@ -10 +11 @@
 //-----------------------------------------------------------------------------
 
-void app_init(void)
-{
+void app_init(void) {
   app_reset_source = MCUSR; // Save last reset source
   MCUSR = 0x00; // Clear reset source for next reset cycle
@@ -34 +34 @@
         DDRA &= ~(1<<PA7);                              // set In1_spare as input
         DDRC &= ~(1<<PC7);                              // set In2_spare as input
-        PORTA |= (1<<PA7);                              // swtich on pullup on In1_spare
-        PORTC |= (1<<PC7);                              // swtich on pullup on In2_spare
+        //PORTA |= (1<<PA7);                            // swtich on pullup on In1_spare
+        //PORTC |= (1<<PC7);                            // swtich on pullup on In2_spare
 
         // ATmega internal ADC input 
@@ -91 +91 @@
   SREG = sreg_backup; // Restore status register
 }
+
+void set_ad7719_enable_register() {
+
+        usart_write_str((pU08)"\n set enable bits of AD7719 Port ");
+        if ((usart_received_chars>=5) && 
+        (usart_rx_buffer[2] >= 'A' && usart_rx_buffer[2] <= 'H'))
+        {
+        usart_write_char(usart_rx_buffer[2]);
+        usart_write_str((pU08)" to ");
+        usart_write_U08_hex(usart_rx_buffer[4]);
+        usart_write_char('\n');
+                ad7719_enables[usart_rx_buffer[2]-'A']=usart_rx_buffer[4];
+                ad7719_channels_ready[usart_rx_buffer[2]-'A']=0x00;
+        }
+        else if  ((usart_received_chars=3) && 
+        (usart_rx_buffer[1] >= 'A' && usart_rx_buffer[1] <= 'H'))
+        {
+                usart_write_char(usart_rx_buffer[1]);
+                if (usart_rx_buffer[2]!='0') {
+                        usart_write_str((pU08)" to 0xFF\n");
+                        ad7719_enables[usart_rx_buffer[1]-'A']=0xFF;
+                } else
+                {
+                        usart_write_str((pU08)" to 0x00\n");
+                        ad7719_enables[usart_rx_buffer[1]-'A']=0x00;
+                }
+                ad7719_channels_ready[usart_rx_buffer[1]-'A']=0x00;     
+        }
+        else
+        {
+                usart_write_str((pU08)"\n something wrong\n");
+                usart_write_str((pU08)"usart_rx_buffer_index: ");
+                usart_write_U08(usart_received_chars, 3);
+                usart_write_str((pU08)"\n usart_rx_buffer[2]: ");
+                usart_write_char(usart_rx_buffer[2]);
+                usart_write_str((pU08)"\n usart_rx_buffer[4]: ");
+                usart_write_U08_hex(usart_rx_buffer[4]);
+                usart_write_char('\n');
+        }
+}
+
+void set_adc_enable_register() {
+        // TODO
+        usart_write_str((pU08)"setting of ATmega internal ADC enable registers is not supported. yet.\n");
+}
+
+U08     increase_adc (U08 channel){
+U08 effective_channel;
+        for ( U08 increase = 1 ; increase <= V_CHANNELS + I_CHANNELS + H_CHANNELS; increase++)
+        {
+                effective_channel = (channel + increase) % (V_CHANNELS + I_CHANNELS + H_CHANNELS);
+                if (adc_enables[effective_channel/8] & (1<<effective_channel%8))
+                        return effective_channel;
+        }
+        return channel;
+} // end if increase_adc;
+
+U08     increase_ad7719 (U08 channel){
+U08 effective_channel;
+        for ( U08 increase = 1 ; increase <= TEMP_CHANNELS; increase++)
+        {
+                effective_channel = (channel + increase) % (TEMP_CHANNELS);
+                if (ad7719_enables[effective_channel/8] & (1<<effective_channel%8))
+                        return effective_channel;
+        }
+        return channel;
+} // end if increase_adc;
+
+void check_if_measured_all() {
+        adc_measured_all = true;
+        for ( U08 i=0; i<V_BITMAP + I_BITMAP + H_BITMAP; ++i ) {
+                if ((adc_enables[i] ^ adc_channels_ready[i]) != 0x00) {
+                        adc_measured_all = false;
+                        break;
+                }
+        }
+        ad7719_measured_all = true;
+        for ( U08 i=0; i<CHANNEL_BITMAP; ++i ) {
+                if ((ad7719_enables[i] ^ ad7719_channels_ready[i]) != 0x00) {
+                        ad7719_measured_all = false;
+                        break;
+                }
+        }
+
+
+}

firmware/FSC/src/application.h

@@ -6 +6 @@
 //-----------------------------------------------------------------------------
 
-#define USART_RX_BUFFER_SIZE 32 // Receive buffer size
-#define USART_TX_BUFFER_SIZE 5 // Receive buffer size. MUST not be larger 255
 
-#define USART_BAUDRATE 9600 // USART baudrate original
-#define USART_USE_TX // Transmitter used?
-#define USART_USE_RX // Receiver used?
-//#define USART_USE_RX_IRQ // RX interrupt used?
-#define USART_USE_UPPERCASE // Convert received chars to uppercase?
 //-----------------------------------------------------------------------------
 
@@ -31 +24 @@
 #define SPI_A_CS PD5            
 
+//#ifdef ____WENNICHSWIRKLICHWILL
+#ifndef ___MAIN_WORKFLOW_GLOBAL_VARS
+#define ___MAIN_WORKFLOW_GLOBAL_VARS
+        #define TEMP_CHANNELS 64
+        #define CHANNEL_BITMAP 8
+        #define AD7719_READINGS_UNTIL_SETTLED 3 // bei3:480ms
+        
+        #define V_CHANNELS 40
+        #define I_CHANNELS 40
+        #define H_CHANNELS 4
+        #define V_BITMAP 5
+        #define I_BITMAP 5
+        #define H_BITMAP 1
+        #define ADC_READINGS_UNTIL_SETTLED 1
+#endif
+
+// MAIN WORKFLOW GLOBAL VARIABLES
+
+        extern bool heartbeat_enable;
+
+
+        
+// TIMER global variable
+        extern volatile U32 local_ms;
+
+// AD7719 global variables
+        extern U32 ad7719_values[TEMP_CHANNELS];
+        extern U08 ad7719_enables[CHANNEL_BITMAP];
+        extern U08 ad7719_channels_ready[CHANNEL_BITMAP];
+        extern U08 ad7719_readings_since_last_muxing;
+        extern U08 ad7719_current_channel;
+        extern U32 ad7719_current_reading;
+        extern bool ad7719_measured_all;
+// ATMEGA ADC global variables
+        extern U08 adc_values[V_CHANNELS + I_CHANNELS + H_CHANNELS]; // stores measured voltage in steps of 16mV
+        extern U08 adc_enables[V_BITMAP + I_BITMAP + H_BITMAP];
+        extern U08 adc_channels_ready[V_BITMAP + I_BITMAP + H_BITMAP];
+        extern U08 adc_readings_since_last_muxing;
+        extern U08 adc_current_channel;
+        extern U08 adc_current_reading;
+        extern bool adc_measured_all;
+
+        extern bool once_told_you;
+        extern bool debug_mode;
 
 
@@ -40 +77 @@
 void app_init(void); // Initialize application
 void app_set_watchdog_prescaler(tWDT_PRESCALE wdt_prescale); // Set watchdog prescale
+
+//methods in main ... declared here ... don't ask why ... 
+// definition of some functions:
+// these function are implemented in this file, this is not doog coding style.
+// sooner or later, they will be moved into more apropriate files.
+void set_adc_enable_register();
+void set_ad7719_enable_register();
+U08     increase_adc (U08 channel);
+U08     increase_ad7719 (U08 channel);
+void check_what_measurement_was_finished() ;
+void check_if_measured_all() ;
+// end of function definition:
+//-----------------------------------------------------------------------------
+
+
+
 //-----------------------------------------------------------------------------
 

firmware/FSC/src/output.c

@@ -1 +1 @@
 #include "output.h"
 #include "usart.h"
+#include "application.h"
 
 void print_status() {

firmware/FSC/src/output.h

@@ -9 +9 @@
 void print_ad7719_nicely();
 void print_adc_nicely();
-
+void print_status() ;
 
 #endif

firmware/FSC/src/parser.c

@@ -1 +1 @@
 #include "parser.h"
 #include "output.h"
+#include "application.h"
+#include "usart.h"
 // this method parses the data, 
 // which came in via USART
@@ -72 +74 @@
                 usart_rx_buffer[i] = 0;
 }
+
+void parse_non_human_readable_input() {
+
+
+}
+
+// this guy checks, if an incoming byte is:
+// to be stored, because it belongs to a command
+// to be discarded, because something went wrong, and the bytemade no sense...
+// the end of a commmand, and so the 'real parser' may do his work.
+
+void incoming_byte_parser() {
+        static bool receiving_command = false;
+        U08 current_byte = UDR;
+        
+        if (!receiving_command) { 
+                switch (current_byte) {
+                        case 0x01:
+                                receiving_command = true;
+                                break;
+                }
+        }
+        
+        if (receiving_command)
+        {
+                usart_rx_buffer[usart_received_chars] = usart_last_char;
+                usart_received_chars++;
+        }
+        
+        
+}

firmware/FSC/src/parser.h

@@ -4 +4 @@
 void parse_ascii(); 
 
+
+// all allowed non readable commands are listed here
+#define SET_ENABLES 0x01 // sets all enables -- needs 8 + 11 bytes of data
+#define SW_TO_HUMAN 0xFF // SWITCH_TO_HUMAN_READABLE_INTERFACE
+
 #endif

firmware/FSC/src/spi_master.c

@@ -56 +56 @@
 
   spi_dord = 0;                                 // Data Order MSB first dord = 0  --> good for all devices
-  spi_cpol = 1; spi_cpha = 1;                                   // SPI mode=3                   --> good for all devices
+  spi_cpol = 0; spi_cpha = 0;                                   // SPI mode=0 good for ethernet.
   spi_setup();                                  // Setup SPI bits and clock speed
 

firmware/FSC/src/usart.c

@@ -2 +2 @@
 
 #include "usart.h"
+#include "num_conversion.h"
 #include <avr/interrupt.h>
 //-----------------------------------------------------------------------------
+#ifdef USART_USE_TX_IRQ
+
+#endif
 
 #ifdef USART_USE_RX_IRQ
@@ -13 +17 @@
   static U08 usart_receive_char;
   static BOOL usart_receive_suspended = false;
-  volatile BOOL ISR_toggle_out = false;
 #endif
 //-----------------------------------------------------------------------------
@@ -172 +175 @@
 ISR(SIG_USART_RECV)
 {
-  if (ISR_toggle_out) PORTB ^= (1<<PB3); // toggle Out2_spare when starting ISR
-
-  usart_receive_char = UDR;
+        usart_receive_char = UDR;
 
   if (usart_rx_ready) // Exit if ready flag is still set 
@@ -230 +231 @@
   {
     usart_rx_buffer[usart_rx_buffer_index++] = usart_receive_char;
-    usart_writeln_str(usart_rx_buffer);
+    //usart_writeln_str(usart_rx_buffer);
   }
 
@@ -241 +242 @@
 }  
 #endif 
-/*
-#define uart_maxstrlen 64
- 
-volatile U8 uart_str_complete=0;
-volatile U8 uart_str_count=0;
-volatile U8 uart_string[uart_maxstrlen+1]="";
-
-ISR(USART_RXC_vect)
-{
-    unsigned char buffer = 64;
-    // Daten aus dem Puffer lesen
-    buffer = UDR;
-        UDR = buffer;
-        if ( uart_str_complete==0 ){    // wenn uart_string gerade in Verwendung, neues Zeichen verwerfen
-                // Daten werden erst in string geschrieben, wenn nicht String-Ende/max Zeichenlänge erreicht ist/string gerade verarbeitet wird
-                if (buffer!='\n' && buffer!='\r' && uart_str_count<uart_maxstrlen-1){
-                        uart_string[uart_str_count]=buffer;
-                        uart_str_count++;
-                } else {
-                        uart_string[uart_str_count]='\0';
-                        uart_str_count=0;
-                        uart_str_complete=1;
-                }
+
+
+#ifdef USART_USE_TX_IRQ
+
+ISR(TRALA_vect)
+{
+
+        // if it is necessary to write something via USART ... then send
+        // if not ... disable this interrupt.
+        if (usart_write_start_index < usart_write_stop_index) // some bytes in the usart_tx_buffer should be send away.
+        {
+                UDR = usart_tx_buffer[usart_write_start_index%USART_TX_BUFFER_SIZE];
         }
-}
-
-*/
+        else
+        {
+                // disable this interrupt source
+                UCSRB &= ~(1<<UDRIE);
+        }
+}  
+#endif 

firmware/FSC/src/usart.h

@@ -6 +6 @@
 #include "application.h"
 #include "num_conversion.h"
+
+//-----------------------------------------------------------------------------
+#define USART_RX_BUFFER_SIZE 32 // Receive buffer size
+#define USART_TX_BUFFER_SIZE 5 // Receive buffer size. MUST not be larger 255
+
+#define USART_BAUDRATE 9600 // USART baudrate original
+#define USART_USE_TX // Transmitter used?
+#define USART_USE_RX // Receiver used?
+#define USART_USE_RX_IRQ // RX interrupt used?
+//#define USART_USE_UPPERCASE // Convert received chars to uppercase?
 //-----------------------------------------------------------------------------
 
@@ -20 +30 @@
                                 ((U32)br * 16) - 1))
 //-----------------------------------------------------------------------------
-/*
-extern U08 usart_rx_buffer[];
-extern volatile BOOL usart_rx_ready;
-extern volatile BOOL ISR_toggle_out;
-extern U08 usart_received_chars;
-*/
+
+// USART global variables
+        extern U08 usart_rx_buffer[USART_RX_BUFFER_SIZE];
+        extern U08 usart_tx_buffer[USART_TX_BUFFER_SIZE];
+        extern U08 usart_received_chars;
+
+        extern U08 usart_tx_buffer_index;
+        extern U08 usart_last_char;                                     // last received char
+
+// USART FLAGS
+        extern bool usart_tx_buffer_overflow;   // true if usart_tx_buffer was full.
+
+
+
 extern bool usart_tx_buffer_overflow;
 extern U08 usart_tx_buffer_index;
 extern U08 usart_tx_buffer[USART_TX_BUFFER_SIZE];
-extern U08 usart_received_chars;
+
+#ifdef USART_USE_RX_IRQ
+  extern U08 usart_rx_buffer[];
+  //U08 *usart_rx_buffer_ptr = &usart_rx_buffer[0];
+  extern U08 usart_received_chars;
+  extern volatile BOOL usart_rx_ready;
+#endif
+
 //-----------------------------------------------------------------------------
 

firmware/FSC/src/w5100_spi_interface.c

@@ -3 +3 @@
 #include "w5100_spi_interface.h"       
 #include "spi_master.h"    
+#include "usart.h"
 volatile BOOL sock0_connection_established = false;
 volatile U08 eth_read_buffer[ETH_READ_BUFFER_SIZE];
@@ -34 +35 @@
 U08 w5100_init (void) 
 {
-U08 sock0_status;
+U08 sock0_status = 0x00;
 
         // set FSCs MAC Address to value defined in w5100_spi_interface.h
@@ -70 +71 @@
         w5100_write ( S0_PORT0, 0x13 );         // Port 5000 -> 0x1388 
         w5100_write ( S0_PORT1, 0x88 ); 
+        usart_write_str((pU08)"Issuing Socket open command. NOW\n");
         w5100_write ( S0_CR, CR_OPEN );         // issue Socket open command
-        sock0_status = w5100_read(S0_SR); // request socket 0 status
-        if ( sock0_status != SR_SOCK_INIT)
-        {
-                return sock0_status;
-        }
-
+        while (sock0_status != SR_SOCK_INIT) {
+                sock0_status = w5100_read(S0_SR); // request socket 0 status
+                usart_write_str((pU08)"Socket 0 status is:");
+                usart_write_U08_hex(sock0_status);
+                usart_write_char('\n');
+        }
+
+        usart_write_str((pU08)"Issuing Socket LISTEN command. NOW\n");
         w5100_write ( S0_CR, CR_LISTEN );               // issue Socket listen command
-        sock0_status = w5100_read(S0_SR); // request socket 0 status
-        if ( sock0_status != SR_SOCK_LISTEN)
-        {
-                return sock0_status;
-        }
-
+        
+        while (sock0_status != SR_SOCK_LISTEN) {
+                sock0_status = w5100_read(S0_SR); // request socket 0 status
+                usart_write_str((pU08)"Socket 0 status is:");
+                usart_write_U08_hex(sock0_status);
+                usart_write_char('\n');
+        }
         return sock0_status;
 }
@@ -113 +118 @@
 {
 U16 freesize;
-freesize=w5100_read(S0_TX_FSR1);
+freesize=w5100_read(S0_TX_FSR0);
 freesize = freesize << 8;
-freesize += w5100_read(S0_TX_FSR0);
+freesize += w5100_read(S0_TX_FSR1);
 return freesize;
 }
@@ -123 +128 @@
 {
 U16 readpointer;
-readpointer=w5100_read(S0_TX_RD1);
+readpointer=w5100_read(S0_TX_RD0);
 readpointer = readpointer << 8;
-readpointer += w5100_read(S0_TX_RD0);
+readpointer += w5100_read(S0_TX_RD1);
 return readpointer;
 }
@@ -133 +138 @@
 {
 U16 writepointer;
-writepointer=w5100_read(S0_TX_WR1);
+writepointer=w5100_read(S0_TX_WR0);
 writepointer = writepointer << 8;
-writepointer += w5100_read(S0_TX_WR0);
+writepointer += w5100_read(S0_TX_WR1);
 return writepointer;
 }
@@ -143 +148 @@
 {
 U16 received_size;
-received_size=w5100_read(S0_RX_RSR1);
+received_size=w5100_read(S0_RX_RSR0);
 received_size = received_size << 8;
-received_size += w5100_read(S0_RX_RSR0);
+received_size += w5100_read(S0_RX_RSR1);   // S0_RX_RSR1 is the least significant byte ... 
 return received_size;
 }
@@ -153 +158 @@
 {
 U16 readpointer;
-readpointer=w5100_read(S0_RX_RD1);
+readpointer=w5100_read(S0_RX_RD0);
 readpointer = readpointer << 8;
-readpointer += w5100_read(S0_RX_RD0);
+readpointer += w5100_read(S0_RX_RD1);
 return readpointer;
 }
@@ -164 +169 @@
 {
 U08 high_byte = (value>>8);
-U08 low_byte = (value<<8)>>8;
-w5100_write(S0_TX_WR1, high_byte);
-w5100_write(S0_TX_WR0, low_byte);
+U08 low_byte = value&0x00FF;
+w5100_write(S0_TX_WR0, high_byte);
+w5100_write(S0_TX_WR1, low_byte);
 }
 
@@ -173 +178 @@
 {
 U08 high_byte = (value>>8);
-U08 low_byte = (value<<8)>>8;
-w5100_write(S0_TX_RD1, high_byte);
-w5100_write(S0_TX_RD0, low_byte);
+U08 low_byte = value&0x00FF;
+
+w5100_write(S0_RX_RD0, high_byte);
+w5100_write(S0_RX_RD1, low_byte);
 }
 
@@ -200 +206 @@
         U16 offset = last_RX_read_pointer & S0_RX_MASK;
         U16 start_address =  S0_RX_BASE + offset;
+        
+        usart_write_str("last_read_pointer:");
+        usart_write_U16_hex(last_RX_read_pointer);
+        usart_write_str("\noffset:");
+        usart_write_U16_hex(offset);
+        usart_write_str("\nstart_address:");
+        usart_write_U16_hex(start_address);
+        usart_write_char('\n');
 
         if ((offset + NumBytes) > (S0_RX_MASK + 1) )  // if data is turned over in RX-mem
@@ -224 +238 @@
         // inform W5100 about how much data was read out.
         set_S0_RX_RD(last_RX_read_pointer + NumBytes);
+        w5100_write ( S0_CR, CR_RECV );
+        
+        usart_write_U16_hex(get_S0_TX_FSR()); usart_write_char('\t'); usart_write_char('|');
+        usart_write_U16_hex(get_S0_TX_RD()); usart_write_char('\t'); usart_write_char('|');
+        usart_write_U16_hex(get_S0_TX_WR()); usart_write_char('\t'); usart_write_char('|');
+        usart_write_U16_hex(get_S0_RX_RSR()); usart_write_char('\t'); usart_write_char('|');
+        usart_write_U16_hex(get_S0_RX_RD()); usart_write_char('\t'); usart_write_char('|');
 
         // if user wishes, W5100 may inform peer about receiption.
@@ -233 +254 @@
         if (send_ACK)
         {
-                w5100_write ( S0_CR, CR_RECV );
+                //w5100_write ( S0_CR, CR_RECV );
         }
 
@@ -240 +261 @@
 
 // returns number of words, transmitted into TX - buffer.
-U08 w5100_set_TX(U08 NumBytes)
-{
+U08 w5100_set_TX(U08 NumBytes) {
         U16 freesize = get_S0_TX_FSR();
         if (freesize == 0)
         {
                 return 0;
-        }
-        if (freesize < NumBytes)
-        {
-                NumBytes = freesize;
         }
         
@@ -258 +274 @@
 
         U16 upper_size, lower_size;
-        if (NumBytes > ETH_READ_BUFFER_SIZE)
-        {
-                NumBytes = ETH_READ_BUFFER_SIZE;
+        if (NumBytes > ETH_WRITE_BUFFER_SIZE)
+        {
+                NumBytes = ETH_WRITE_BUFFER_SIZE;
         }
         if (freesize == 0)
@@ -272 +288 @@
 
         // now calculate the offset address
-        // calculated according to W5100 datasheet page: 43
+        // calculated according to W5100 datasheet page: 44
 
         if ((offset + NumBytes) > (S0_RX_MASK + 1) )  // if data is turned over in RX-mem
@@ -280 +296 @@
                 for (U08 i = 0; i < upper_size; ++i)
                 {
-                        eth_read_buffer[i] = w5100_read(start_address + i);
+                        w5100_write(start_address + i, eth_write_buffer[i]);
                 }
                 for (U08 i = 0; i < lower_size; ++i)
                 {
-                        eth_read_buffer[upper_size + i] = w5100_read(S0_RX_BASE + i);
+                        w5100_write(S0_RX_BASE + i, eth_write_buffer[upper_size+i]);
                 }
         }
@@ -291 +307 @@
                 for (U08 i = 0; i < NumBytes; ++i)
                 {
-                        eth_read_buffer[i] = w5100_read(start_address + i);
+                        w5100_write(start_address + i, eth_write_buffer[i]);
                 }
         }
 
         // inform W5100 about how much data was read out.
-        set_S0_RX_RD(last_TX_write_pointer + NumBytes);
-
-
+        set_S0_TX_WR(last_TX_write_pointer + NumBytes);
+        
+        // tell it to send now the data away
+        w5100_write( S0_CR, CR_SEND);
+        
         return NumBytes;
 }
+

firmware/FSC/src/w5100_spi_interface.h

@@ -69 +69 @@
 #define S0_IR           0x0402          // socket 0 interrupt           -- see bit description below
 #define S0_SR           0x0403          // socket 0 status                      -- see below
-#define S0_PORT0        0x0404          // socket 0 Port                        -- FSC might get port number 0x1F5C = 8028, since we have only one FSC in cam
-#define S0_PORT1        0x0405          // socket 0 Port                        -- 0xF5C1= 62913 is okay as well ... 
+#define S0_PORT0        0x0404          // socket 0 Port MSB                    -- FSC might get port number 0x1F5C = 8028, since we have only one FSC in cam
+#define S0_PORT1        0x0405          // socket 0 Port LSB                    -- 0xF5C1= 62913 is okay as well ... 
 #define S0_MSSR0        0x0412          // max segment size                     --
 #define S0_MSSR1        0x0413          // max segment size                     -- reset value is 0xFFFF; is set to other party value, if in TCP passive mode
@@ -143 +143 @@
 // NETWORK SETTING:
 // set GAR to FSC_GATEWAY_ADDRESS
-#define FSC_GATEWAY_ADDRESS0 0xC0               // 192.33.96.1
+//#define FSC_GATEWAY_ADDRESS0 0xC0             // 192.33.96.1
+//#define FSC_GATEWAY_ADDRESS1 0x21
+//#define FSC_GATEWAY_ADDRESS2 0x60
+//#define FSC_GATEWAY_ADDRESS3 0x01
+
+#define FSC_GATEWAY_ADDRESS0 0xC0               // 192.168.0.1
 #define FSC_GATEWAY_ADDRESS1 0x21
 #define FSC_GATEWAY_ADDRESS2 0x60
 #define FSC_GATEWAY_ADDRESS3 0x01
+
+
 // set SHAR to FSC_MAC_ADDRESS
 #define FSC_MAC_ADDRESS0 0xFA   //FA:C7:0F:AD:22:01
@@ -155 +162 @@
 #define FSC_MAC_ADDRESS5 0x01
 // set SUBR to FSC_SUBNET_MASK
-#define FSC_SUBNET_MASK0 0xFF   //255.255.248.0
-#define FSC_SUBNET_MASK1 0xFF
-#define FSC_SUBNET_MASK2 0xF8
-#define FSC_SUBNET_MASK3 0x00
+#define FSC_SUBNET_MASK0 255    //255.255.248.0
+#define FSC_SUBNET_MASK1 255
+#define FSC_SUBNET_MASK2 255
+#define FSC_SUBNET_MASK3 0
 // set SIPR to FSC_IP_ADDRESS
-#define FSC_IP_ADDRESS0 0xC0    // 192.33.99.247
-#define FSC_IP_ADDRESS1 0x21
-#define FSC_IP_ADDRESS2 0x63
-#define FSC_IP_ADDRESS3 0xF7
+//#define FSC_IP_ADDRESS0 0xC0  // 192.33.99.247
+//#define FSC_IP_ADDRESS1 0x21
+//#define FSC_IP_ADDRESS2 0x63
+//#define FSC_IP_ADDRESS3 0xF7
+#define FSC_IP_ADDRESS0 192     // 192.168.0.2
+#define FSC_IP_ADDRESS1 168
+#define FSC_IP_ADDRESS2 0
+#define FSC_IP_ADDRESS3 2
 //------------------------------------------------------------------------------
 // MEM SETTINGS:
@@ -196 +207 @@
 //-----------------------------------------------------------------------------
 #endif //__W5100_SPI_INTERFACE_H
+
+U16 get_S0_TX_FSR();
+U16 get_S0_TX_RD();
+U16 get_S0_TX_WR();
+U16 get_S0_RX_RSR();
+U16 get_S0_RX_RD();
+U08 w5100_get_RX(U08 NumBytes, BOOL send_ACK);
+void w5100_TX(U08 NumBytes, U08 *str);
+U08 w5100_set_TX(U08 NumBytes);