Index: firmware/FSC/src/FSC_eth_with_user_interface.c =================================================================== --- firmware/FSC/src/FSC_eth_with_user_interface.c (revision 10677) +++ firmware/FSC/src/FSC_eth_with_user_interface.c (revision 10697) @@ -21,11 +21,5 @@ bool heartbeat_enable; -// AD7719 global variables - U32 ad7719_values[RESISTANCE_CHANNELS]; - U08 ad7719_enables[RESISTANCE_CHANNELS/8]; - U08 ad7719_channels_ready[RESISTANCE_CHANNELS/8]; - U08 ad7719_readings_since_last_muxing = 0; - U08 ad7719_current_channel = 0; - U32 ad7719_current_reading = 0; + bool ad7719_measured_all = false; bool ad7719_values_printed = true; @@ -33,11 +27,5 @@ // ATMEGA ADC global variables - U08 adc_readings_until_mean=250; - U32 adc_values[VOLTAGE_CHANNELS]; // stores measured voltage in steps of 16mV - U08 adc_enables[VOLTAGE_CHANNELS/8]; - U08 adc_channels_ready[VOLTAGE_CHANNELS/8]; - U08 adc_readings_since_last_muxing = 0; - U08 adc_current_channel = 0; - U16 adc_current_reading = 0; + bool adc_measured_all = false; bool adc_values_printed = true; @@ -53,68 +41,4 @@ // M A I N --- M A I N --- M A I N --- M A I N --- M A I N //----------------------------------------------------------------------------- -/* -int main(void) -{ - - - U16 received_bytes; - U08 really_downloaded_bytes; - while(!usart_rx_ready){ - received_bytes = get_S0_RX_RSR(); - - - - - if (get_S0_RX_RSR() != 0) { // we have something to read - usart_write_str((pU08)"\nReading "); - usart_write_U16(get_S0_RX_RSR(), 6); - usart_write_str((pU08)" b from W5100\n"); - - while (received_bytes != 0) { - really_downloaded_bytes = w5100_get_RX(16, true); - usart_write_char('!'); - usart_write_U08(really_downloaded_bytes,4); - usart_write_char('\n'); - for (U08 i=0; i= ADC_READINGS_UNTIL_SETTLED-1) { - adc_values[adc_current_channel] += adc_current_reading; - ++adc_readings_since_last_muxing; + adc_values[*adc_current_channel] += *adc_current_reading; + ++(*adc_readings_since_last_muxing); } else { - ++adc_readings_since_last_muxing; + ++(*adc_readings_since_last_muxing); } @@ -285,11 +208,11 @@ if (AD7719_IS_READY() && !ad7719_measured_all) { - ad7719_current_reading = read_adc(); // --takes at 4MHz SCLK speed about 6us + *ad7719_current_reading = read_adc(); // --takes at 4MHz SCLK speed about 6us // AD7719 is only read out if settled. saves time. - if (ad7719_readings_since_last_muxing == AD7719_READINGS_UNTIL_SETTLED-1) { - ad7719_values[ad7719_current_channel] = ad7719_current_reading; - ad7719_readings_since_last_muxing=0; + if (*ad7719_readings_since_last_muxing == AD7719_READINGS_UNTIL_SETTLED-1) { + ad7719_values[*ad7719_current_channel] = *ad7719_current_reading; + *ad7719_readings_since_last_muxing=0; if (debug_mode) { - usart_write_U32_hex(ad7719_current_reading); + usart_write_U32_hex(*ad7719_current_reading); usart_write_char('\n'); usart_write_char('\n'); @@ -299,11 +222,11 @@ // note that this channel is ready, now and // proceed to the next enabled channel. - ad7719_channels_ready[ad7719_current_channel/8] |= (1<<(ad7719_current_channel%8)); - ad7719_current_channel = increase_ad7719 (ad7719_current_channel); - Set_T_Muxer(ad7719_current_channel); + ad7719_channels_ready[*ad7719_current_channel/8] |= (1<<(*ad7719_current_channel%8)); + *ad7719_current_channel = increase_ad7719 (*ad7719_current_channel); + Set_T_Muxer(*ad7719_current_channel); } else { // the AD7719 did not settle yet, we discard the reading - ++ad7719_readings_since_last_muxing; + ++(*ad7719_readings_since_last_muxing); if (debug_mode) { - usart_write_U32_hex(ad7719_current_reading); + usart_write_U32_hex(*ad7719_current_reading); usart_write_char('\n'); } Index: firmware/FSC/src/ad7719_adc.c =================================================================== --- firmware/FSC/src/ad7719_adc.c (revision 10677) +++ firmware/FSC/src/ad7719_adc.c (revision 10697) @@ -8,4 +8,8 @@ void ad7719_init(void) { + // setup the SPI interface according to AD7710 specs. + // This is needed, because W5100 has different SPI specs. + spi_setup_ad7719(); + // ADC communiaction works like this: @@ -26,95 +30,125 @@ - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(FILTER_RD); // Next Operation is write to IOCON - SET_BIT(PORTD,SPI_AD_CS); - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(0); // Next Operation is write to IOCON - SET_BIT(PORTD,SPI_AD_CS); - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(IOCON_WR); // Next Operation is write to IOCON - SET_BIT(PORTD,SPI_AD_CS); - - _delay_us(50); + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(FILTER_RD); // Next operation is a read from filter register + SET_BIT(PORTD,SPI_AD_CS); +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(0); // now this read takes place + SET_BIT(PORTD,SPI_AD_CS); +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(IOCON_WR); // Next Operation is write to IOCON -- this is a 2byte register + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif CLR_BIT(PORTD,SPI_AD_CS); spi_transfer_byte(IOCON_INIT_HIGH); // Write to IOCON1 SET_BIT(PORTD,SPI_AD_CS); -_delay_us(50); +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif CLR_BIT(PORTD,SPI_AD_CS); spi_transfer_byte(IOCON_INIT_LOWBYTE); // Write to IOCON2 - SET_BIT(PORTD,SPI_AD_CS); // Set CS high - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(FILTER_WR); // Next Operation is write to FILTER Start SPI - SET_BIT(PORTD,SPI_AD_CS); - -_delay_us(50); - CLR_BIT(PORTD,SPI_AD_CS); - - spi_transfer_byte(FILTER_INIT); // Write to FILTER - SET_BIT(PORTD,SPI_AD_CS); // Set CS high -_delay_us(50); - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(AD1CON_WR); // Next Operation is write to AD1CON Start SPI - SET_BIT(PORTD,SPI_AD_CS); - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); - spi_transfer_byte(AD1CON_INIT); // Write to AD1CON - SET_BIT(PORTD,SPI_AD_CS); // Set CS high - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(FILTER_WR); // Next Operation is write to FILTER + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(FILTER_INIT); // Set Filter register to 0x52 --> good for 50Hz noise rejection. + SET_BIT(PORTD,SPI_AD_CS); +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(AD1CON_WR); // Next Operation is write to AD1CON + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(AD1CON_INIT); // auxilliary ADC is not used in this application --> AD7719 data sheet for more info about aux. ADC + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); spi_transfer_byte(AD0CON_WR); // Next Operation is write to AD0CON Start SPI SET_BIT(PORTD,SPI_AD_CS); -_delay_us(50); +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif CLR_BIT(PORTD,SPI_AD_CS); spi_transfer_byte(AD0CON_INIT); // Write to AD0CON - SET_BIT(PORTD,SPI_AD_CS); // Set CS high - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(MODE_WR); // Next Operation is write to MODE Start SPI - SET_BIT(PORTD,SPI_AD_CS); - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); - spi_transfer_byte(MODE_CONT); // Write to MODE - SET_BIT(PORTD,SPI_AD_CS); // Set CS high - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(FILTER_RD); // Next Operation is write to IOCON - SET_BIT(PORTD,SPI_AD_CS); - -_delay_us(50); - - CLR_BIT(PORTD,SPI_AD_CS); // Set CS low - spi_transfer_byte(0); // Next Operation is write to IOCON - SET_BIT(PORTD,SPI_AD_CS); - -_delay_us(50); - - + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(MODE_WR); // Next Operation is write to MODE + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(MODE_CONT); // Set mode to: continuous sampling. + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + +// these + CLR_BIT(PORTD,SPI_AD_CS); + spi_transfer_byte(FILTER_RD); // Next Operation is read from Filter register... + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif + + CLR_BIT(PORTD,SPI_AD_CS); // the reading takes place here + spi_transfer_byte(0); + SET_BIT(PORTD,SPI_AD_CS); + +#ifdef AD7719_COM_DELAY_NEEDED +_delay_us(50); +#endif } void startconv(U08 continuous) { + // setup the SPI interface according to AD7710 specs. + // This is needed, because W5100 has different SPI specs. + spi_setup_ad7719(); + CLR_BIT(PORTD,SPI_AD_CS); // Set CS low spi_transfer_byte(MODE_WR); // Next Operation is write to Mode Register @@ -128,4 +162,8 @@ void stopconv(void) { + // setup the SPI interface according to AD7710 specs. + // This is needed, because W5100 has different SPI specs. + spi_setup_ad7719(); + CLR_BIT(PORTD,SPI_AD_CS); // Set CS low spi_transfer_byte(MODE_WR); // Next Operation is write to Mode Register @@ -138,9 +176,16 @@ U32 read_adc(void) -{ +{ + // setup the SPI interface according to AD7710 specs. + // This is needed, because W5100 has different SPI specs. + spi_setup_ad7719(); + CLR_BIT(PORTD,SPI_AD_CS); // Set CS low spi_transfer_byte(AD0DAT_RD); // Next Operation is read from Main ADC Data Register SET_BIT(PORTD,SPI_AD_CS); + + #ifdef AD7719_COM_DELAY_NEEDED _delay_us(50); + #endif CLR_BIT(PORTD,SPI_AD_CS); Index: firmware/FSC/src/ad7719_adc.h =================================================================== --- firmware/FSC/src/ad7719_adc.h (revision 10677) +++ firmware/FSC/src/ad7719_adc.h (revision 10697) @@ -7,4 +7,18 @@ #include "num_conversion.h" //----------------------------------------------------------------------------- +// SPI INTERFACE of AD7719 +// SCLK: +// SCLK HIGH & LOW cycle min 100ns --> 5MHz maximum SCLK frequency +// FSC runs at 8MHz CPU clock ... so 4MHz SPI clock is the theoretocal maximum anyway. +// SCLK should idle high --> mode 3 +// +// CS falling edge & SCLK falling edge, may be at the same time ... +// + +// There is a delay in all communications between AD7719 and ATmega. +// I guess this is not needed at all. +// This switch is able to get them in again +#define AD7719_COM_DELAY_NEEDED + // Bit Definitions #define ADC_RDY PD6 @@ -71,5 +85,5 @@ #define AD0CON_INIT 0x8E // 1000.1110 - // AD0EN is set + // AD0EN is set --> main ADC is swtiched on // WL is cleared --> 24bit // CH = 00 --> AIN1 , AIN2 used Index: firmware/FSC/src/application.c =================================================================== --- firmware/FSC/src/application.c (revision 10677) +++ firmware/FSC/src/application.c (revision 10697) @@ -5,4 +5,42 @@ #include +// in order to implement the "registers" I work with a quite long +// char-array like this: + +U08 FSCregister[FSC_REGISTER_LENGTH]; +// but this register is not only accessible by +// FSCregister[i], but as well by special pointers like this: +U32 *status = (U32*)&FSCregister[0]; +U32 *time_sec = (U32*)&(FSCregister[4]); +U16 *time_ms = (U16*)&(FSCregister[6]); +U16 *FR_period = (U16*)&(FSCregister[8]); +U16 *ref_resistor = (U16*)&(FSCregister[10]); + + +U32 *ad7719_values = (U32*)&FSCregister[68]; +U08 *ad7719_enables = &FSCregister[32]; +U08 *ad7719_channels_ready = &FSCregister[50]; +U08 *ad7719_readings_since_last_muxing = &FSCregister[14]; +U08 *ad7719_current_channel = &FSCregister[15]; +U32 *ad7719_current_reading = (U32*)&FSCregister[16]; + +U16 *adc_values = (U16*) &FSCregister[324]; +U08 *adc_enables = &FSCregister[40]; +U08 *adc_channels_ready = &FSCregister[58]; +U08 *adc_readings_since_last_muxing = &FSCregister[20]; +U08 *adc_current_channel = &FSCregister[21]; +U16 *adc_current_reading = (U16*) &FSCregister[22]; + + + +// using these pointers one can manipulate measurement values like this: +// res_value[3] = 453212; +// and then readout the most significant byte of this same value by accessing: +// FSCregister[92]; +// I like this very much for asking the boards status ... this is just a copy of the registers, +// into the W5100 TX FIFO. +// submitting the measurement values is just a partial copy... + +//----------------------------------------------------------------------------- //----------------------------------------------------------------------------- Index: firmware/FSC/src/application.h =================================================================== --- firmware/FSC/src/application.h (revision 10677) +++ firmware/FSC/src/application.h (revision 10697) @@ -5,5 +5,38 @@ #include "typedefs.h" //----------------------------------------------------------------------------- +// in order to implement the "registers" I work with a quite long +// char-array like this: +# define FSC_REGISTER_LENGTH 500 +extern U08 FSCregister[FSC_REGISTER_LENGTH]; +// but this register is not only accessible by +// FSCregister[i], but as well by special pointers like this: +extern U32 *status ; +extern U32 *time_sec ; +extern U16 *time_ms ; +extern U16 *FR_period ; +extern U16 *ref_resistor ; +extern U32 *ad7719_values ; +#define AD7719_VALUES_LEN_BYTE 512 +extern U08 *ad7719_enables ; +extern U08 *ad7719_channels_ready ; +extern U08 *ad7719_readings_since_last_muxing ; +extern U08 *ad7719_current_channel ; +extern U32 *ad7719_current_reading ; + +extern U16 *adc_values ; +#define ADC_VALUES_LEN_BYTE 152 +extern U08 *adc_enables ; +extern U08 *adc_channels_ready ; +extern U08 *adc_readings_since_last_muxing ; +extern U08 *adc_current_channel ; +extern U16 *adc_current_reading ; +// using these pointers one can manipulate measurement values like this: +// res_value[3] = 453212; +// and then readout the most significant byte of this same value by accessing: +// FSCregister[92]; +// I like this very much for asking the boards status ... this is just a copy of the registers, +// into the W5100 TX FIFO. +// submitting the measurement values is just a partial copy... //----------------------------------------------------------------------------- @@ -52,10 +85,4 @@ // AD7719 global variables - extern U32 ad7719_values[]; - extern U08 ad7719_enables[]; - extern U08 ad7719_channels_ready[]; - extern U08 ad7719_readings_since_last_muxing; - extern U08 ad7719_current_channel; - extern U32 ad7719_current_reading; extern bool ad7719_measured_all; extern bool ad7719_values_printed; @@ -63,10 +90,5 @@ // ATMEGA ADC global variables - extern U32 adc_values[]; // stores measured voltage in steps of 16mV - extern U08 adc_enables[]; - extern U08 adc_channels_ready[]; - extern U08 adc_readings_since_last_muxing; - extern U08 adc_current_channel; - extern U16 adc_current_reading; + #define adc_readings_until_mean 250 extern bool adc_measured_all; extern bool adc_values_printed; Index: firmware/FSC/src/macros.h =================================================================== --- firmware/FSC/src/macros.h (revision 10677) +++ firmware/FSC/src/macros.h (revision 10697) @@ -13,4 +13,5 @@ #define HI(x) ((x) >> 8) // Highbyte of 16-bit value + #define ABS(x) ((x >= 0) ? x : -x) // Absolute value of x Index: firmware/FSC/src/output.c =================================================================== --- firmware/FSC/src/output.c (revision 10677) +++ firmware/FSC/src/output.c (revision 10697) @@ -3,4 +3,5 @@ #include "application.h" #include "timer.h" +#include "w5100_spi_interface.h" void print_status() { @@ -46,9 +47,9 @@ usart_write_str((pU08)"adc current channel:"); - usart_write_U08(adc_current_channel,2); + usart_write_U08(*adc_current_channel,2); usart_write_char('\n'); usart_write_str((pU08)"ad7719 current channel:"); - usart_write_U08(ad7719_current_channel,2); + usart_write_U08(*ad7719_current_channel,2); usart_write_char('\n'); @@ -174,2 +175,9 @@ print_ad7719_nicely(); } + + +void telegram_start(){ + eth_write_buffer[0]='@'; + eth_write_buffer[1]='@'; + w5100_set_TX(eth_write_buffer, 2); +} Index: firmware/FSC/src/output.h =================================================================== --- firmware/FSC/src/output.h (revision 10677) +++ firmware/FSC/src/output.h (revision 10697) @@ -11,3 +11,6 @@ void print_status() ; + +void telegram_start(); + #endif Index: firmware/FSC/src/parser.c =================================================================== --- firmware/FSC/src/parser.c (revision 10677) +++ firmware/FSC/src/parser.c (revision 10697) @@ -3,4 +3,5 @@ #include "application.h" #include "usart.h" +#include "w5100_spi_interface.h" // this method parses the data, // which came in via USART @@ -306,2 +307,82 @@ */ + +/////////////////////////////////////////////////////////////////////////////////////// +// W5300 incoming commands parser +void parse_w5300_incoming( U08 bytes_in_w5100_rx_buffer ) { + + if (bytes_in_w5100_rx_buffer == 0) // it was stupid to call this parser without having any bytes downloaded + return; + + switch (eth_read_buffer[0]) { + case 'w': // *w*rite to register command + write_FSC_register(); + read_FSC_register(); + break; + + case 'r': // *r*ead from register command + read_FSC_register(); + break; + + case 't': // measure *t*emperature (resistance) channels only + reset_resistance_done(); + simple_acknowledge(); + break; + + case 'v': // measure *v*oltage channels only + reset_voltage_done(); + simple_acknowledge(); + break; + + case 'm': // *m*easure active channels commands + reset_done(); + simple_acknowledge(); + break; + + case 's': // return *s*tatus information + // this might take a lot of time... about... 25us per byte .. --> less than 25ms + w5100_set_TX(FSCregister, FSC_REGISTER_LENGTH); + break; + + case 'z': // re*z*et ATmega32 and peripherals + eth_write_buffer[0]='!'; + eth_write_buffer[1]='!'; + w5100_set_TX(eth_write_buffer, 2); + // let watchdog occur! + // gotta read, how this works... + break; + } +} + +void write_FSC_register() { + FSCregister[eth_read_buffer[2]]=eth_read_buffer[3]; +} + +void read_FSC_register() { + eth_write_buffer[0]=eth_read_buffer[0]; + eth_write_buffer[1]=eth_read_buffer[1]; + eth_write_buffer[2]=eth_read_buffer[2]; + eth_write_buffer[3]=FSCregister[eth_read_buffer[2]]; + w5100_set_TX(eth_write_buffer, 4); +} + +void reset_resistance_done(){ + for (U08 i=0; i < (RESISTANCE_CHANNELS/8); i++){ + ad7719_channels_ready[i] = 0; + } +} +void reset_voltage_done(){ + for (U08 i=0; i < (VOLTAGE_CHANNELS/8); i++){ + adc_channels_ready[i] = 0; + } +} +void reset_done(){ + reset_resistance_done(); + reset_voltage_done(); +} + +void simple_acknowledge(){ + eth_write_buffer[0]=eth_read_buffer[0]; + eth_write_buffer[1]=eth_read_buffer[1]; + w5100_set_TX(eth_write_buffer, 2); +} Index: firmware/FSC/src/parser.h =================================================================== --- firmware/FSC/src/parser.h (revision 10677) +++ firmware/FSC/src/parser.h (revision 10697) @@ -2,10 +2,20 @@ #define __PARSER_H +#include "typedefs.h" void parse_ascii(); void MSR_parser() ; // all allowed non readable commands are listed here +// this is not used at all right? #define SET_ENABLES 0x01 // sets all enables -- needs 8 + 11 bytes of data #define SW_TO_HUMAN 0xFF // SWITCH_TO_HUMAN_READABLE_INTERFACE +void parse_w5300_incoming( U08 bytes_in_w5100_rx_buffer ); +void write_FSC_register(); +void read_FSC_register(); +void reset_resistance_done(); +void reset_voltage_done(); +void reset_done(); +void simple_acknowledge(); + #endif Index: firmware/FSC/src/spi_master.c =================================================================== --- firmware/FSC/src/spi_master.c (revision 10677) +++ firmware/FSC/src/spi_master.c (revision 10697) @@ -15,4 +15,23 @@ //----------------------------------------------------------------------------- +void spi_setup_w5100() { + spi_clock_index = 4; // 1Mbps + // this is reasonable for W5100 because of slow level shifters on the FSC. + // in case the slow level shifters, are improved. this value may go up to 6! + + spi_dord = 0; // Data Order MSB first dord = 0 --> good for all devices + spi_cpol = 0; spi_cpha = 0; // SPI mode=0 good for ethernet. + spi_setup(); // Setup SPI bits and clock speed +} + +void spi_setup_ad7719() { + spi_clock_index = 6; // since AD7719 is not connected via level shifters .. we can go up to 4Mbps + + spi_dord = 0; // Data Order MSB first dord = 0 --> good for all devices + spi_cpol = 1; spi_cpha = 1; // SPI mode=3 good for AD7719. + spi_setup(); // Setup SPI bits and clock speed +} + + @@ -23,5 +42,5 @@ // 1.) Ethernet Modul WIZ812MJ // 2.) AD7719 24bit ADC - // 3.) LIS3LV accelerometer + // 3.) LIS3LV accelerometer <---- not used yet. // 4.) MAX6662 temp sensor <---- not assembled! @@ -241,10 +260,9 @@ // Wait for transfer completed - PORTB |= 1<>8); @@ -70,4 +74,8 @@ U08 w5100_read( U16 addr) { + // setup the SPI interface according to W5100 specs. + // This is needed, because AD7719 has different SPI specs. + spi_setup_w5100(); + spi_write_buffer[0]=0x0F; spi_write_buffer[1]=(U08)(addr>>8); @@ -244,12 +252,4 @@ U16 offset = last_RX_read_pointer & S0_RX_MASK; U16 start_address = S0_RX_BASE + offset; - - usart_write_str("last_read_pointer:"); - usart_write_U16_hex(last_RX_read_pointer); - usart_write_str("\noffset:"); - usart_write_U16_hex(offset); - usart_write_str("\nstart_address:"); - usart_write_U16_hex(start_address); - usart_write_char('\n'); if ((offset + NumBytes) > (S0_RX_MASK + 1) ) // if data is turned over in RX-mem @@ -299,5 +299,5 @@ // returns number of words, transmitted into TX - buffer. -U08 w5100_set_TX(U08 NumBytes) { +U16 w5100_set_TX(U08* string, U16 NumBytes) { U16 freesize = get_S0_TX_FSR(); if (freesize == 0) @@ -334,9 +334,9 @@ for (U08 i = 0; i < upper_size; ++i) { - w5100_write(start_address + i, eth_write_buffer[i]); + w5100_write(start_address + i, string[i]); } for (U08 i = 0; i < lower_size; ++i) { - w5100_write(S0_RX_BASE + i, eth_write_buffer[upper_size+i]); + w5100_write(S0_RX_BASE + i, string[upper_size+i]); } } @@ -345,5 +345,5 @@ for (U08 i = 0; i < NumBytes; ++i) { - w5100_write(start_address + i, eth_write_buffer[i]); + w5100_write(start_address + i, string[i]); } } Index: firmware/FSC/src/w5100_spi_interface.h =================================================================== --- firmware/FSC/src/w5100_spi_interface.h (revision 10677) +++ firmware/FSC/src/w5100_spi_interface.h (revision 10697) @@ -10,6 +10,6 @@ -#define ETH_READ_BUFFER_SIZE 32 -#define ETH_WRITE_BUFFER_SIZE 32 +#define ETH_READ_BUFFER_SIZE 4 +#define ETH_WRITE_BUFFER_SIZE 4 extern volatile U08 eth_read_buffer[ETH_READ_BUFFER_SIZE]; extern volatile U08 eth_write_buffer[ETH_WRITE_BUFFER_SIZE]; @@ -215,5 +215,5 @@ U08 w5100_get_RX(U08 NumBytes, BOOL send_ACK); void w5100_TX(U08 NumBytes, U08 *str); -U08 w5100_set_TX(U08 NumBytes); +U16 w5100_set_TX(U08* string, U16 NumBytes); extern bool w5100_needs_reset; Index: firmware/FSC/test_projects/test_ethernet/test_ethernet.aps =================================================================== --- firmware/FSC/test_projects/test_ethernet/test_ethernet.aps (revision 10677) +++ firmware/FSC/test_projects/test_ethernet/test_ethernet.aps (revision 10697) @@ -1,1 +1,1 @@ -test_ethernet11-May-2011 09:47:3311-May-2011 13:10:54241011-May-2011 09:47:3344, 18, 0, 670AVR GCCdefault\test_ethernet.elfC:\fact.isdc.unige.ch_svn_firmware\FSC\test_projects\test_ethernet\AVR SimulatorATmega32.xmlfalseR00R01R02R03R04R05R06R07R08R09R10R11R12R13R14R15R16R17R18R19R20R21R22R23R24R25R26R27R28R29R30R31Auto000C:\fact.isdc.unige.ch_svn_firmware\FSC\src\w5100_spi_interface.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\ad7719_adc.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\application.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\atmega_adc.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\interpol.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\muxer_fsc.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\output.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\parser.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\spi_master.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\usart.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\num_conversion.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\FSC_test.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\typedefs.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\w5100_spi_interface.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\ad7719_adc.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\application.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\atmega_adc.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\interpol.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\macros.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\muxer_fsc.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\output.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\parser.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\spi_master.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\usart.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\num_conversion.hdefault\test_ethernet.lssdefault\test_ethernet.mapdefaultNOatmega32111test_ethernet.elfdefault\1-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enumsdefault1C:\WinAVR-20100110\bin\avr-gcc.exeC:\WinAVR-20100110\utils\bin\make.exeC:\fact.isdc.unige.ch_svn_firmware\FSC\src\typedefs.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\w5100_spi_interface.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\ad7719_adc.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\application.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\atmega_adc.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\interpol.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\macros.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\muxer_fsc.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\output.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\parser.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\spi_master.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\usart.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\num_conversion.hC:\fact.isdc.unige.ch_svn_firmware\FSC\src\FSC_test_electrical_connection.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\w5100_spi_interface.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\ad7719_adc.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\application.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\atmega_adc.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\interpol.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\muxer_fsc.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\output.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\parser.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\spi_master.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\usart.cC:\fact.isdc.unige.ch_svn_firmware\FSC\src\num_conversion.c +test_ethernet11-May-2011 20:01:0211-May-2011 20:03:45241011-May-2011 20:01:0244, 18, 0, 685AVR GCCdefault\test_ethernet.elfE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\test_projects\test_ethernet\AVR SimulatorATmega32.xmlfalseR00R01R02R03R04R05R06R07R08R09R10R11R12R13R14R15R16R17R18R19R20R21R22R23R24R25R26R27R28R29R30R31Auto000E:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\FSC_test.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\ad7719_adc.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\application.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\atmega_adc.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\muxer_fsc.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\num_conversion.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\output.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\parser.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\spi_master.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\usart.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\w5100_spi_interface.cE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\ad7719_adc.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\application.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\atmega_adc.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\macros.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\muxer_fsc.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\num_conversion.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\output.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\parser.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\spi_master.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\typedefs.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\usart.hE:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\w5100_spi_interface.hdefault\test_ethernet.lssdefault\test_ethernet.mapdefaultNOatmega32111test_ethernet.elfdefault\0-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enumsdefault1C:\WinAVR-20100110\bin\avr-gcc.exeC:\WinAVR-20100110\utils\bin\make.exe00000E:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\FSC_test.c1 Index: firmware/FSC/test_projects/test_ethernet/test_ethernet.aws =================================================================== --- firmware/FSC/test_projects/test_ethernet/test_ethernet.aws (revision 10677) +++ firmware/FSC/test_projects/test_ethernet/test_ethernet.aws (revision 10697) @@ -1,1 +1,1 @@ - +