Index: /trunk/FACT++/src/HeadersFTM.h =================================================================== --- /trunk/FACT++/src/HeadersFTM.h (revision 10718) +++ /trunk/FACT++/src/HeadersFTM.h (revision 10719) @@ -22,7 +22,7 @@ // FTM internal states - kFtmIdle = 1, - kFtmConfig = 2, - kFtmRunning = 3, + kFtmIdle = 1, ///< Trigger output disabled, configuration possible + kFtmConfig = 2, ///< FTM and FTUs are being reconfigured + kFtmRunning = 3, ///< Trigger output enabled, configuration ignored kFtmCalib = 4, }; @@ -34,8 +34,8 @@ kCmdRead = 0x0001, ///< Request data kCmdWrite = 0x0002, ///< Send data - kCmdStartRun = 0x0004, ///< Start the trigger - kCmdStopRun = 0x0008, ///< Stop the trigger + kCmdStartRun = 0x0004, ///< Enable the trigger output + kCmdStopRun = 0x0008, ///< Disable the trigger output kCmdPing = 0x0010, ///< Ping all FTUs (get FTU list) - kCmdCrateReset = 0x0020, + kCmdCrateReset = 0x0020, ///< Reboot (no power cycle) all FTUs and FADs of one crate kCmdDisableReports = 0x0040, ///< Disable transmission of rate-reports (dynamic data) kCmdToggleLed = 0xc000, @@ -47,6 +47,6 @@ // second word for StartRun - kStartRun = 0x0001, - kTakeNevents = 0x0002, + kStartRun = 0x0001, ///< ...until kCmdStopRun + kTakeNevents = 0x0002, ///< ...fixed number of events }; @@ -73,12 +73,12 @@ struct Header { - uint16_t fDelimiter; /// Start delimiter - uint16_t fType; /// Type of the data to be received after the header - uint16_t fDataSize; /// Size in words to be received after the header - uint16_t fState; /// State of the FTM state machine - uint64_t fBoardId; - uint16_t fFirmwareId; - uint32_t fTriggerCounter; - uint64_t fTimeStamp; + uint16_t fDelimiter; ///< Start delimiter + uint16_t fType; ///< Type of the data to be received after the header + uint16_t fDataSize; ///< Size in words to be received after the header (incl end delim.) + uint16_t fState; ///< State of the FTM central state machine + uint64_t fBoardId; ///< FPGA device DNA (unique chip id) + uint16_t fFirmwareId; ///< Version number + uint32_t fTriggerCounter; ///< FTM internal counter of all trigger decision independant of trigger-line enable/disable (reset: start/stop run) + uint64_t fTimeStamp; ///< Internal counter (micro-seconds, reset: start/stop run) Header() { init(*this); } @@ -135,7 +135,7 @@ struct StaticDataBoard { - uint16_t fEnable[4]; // 4x9bits - uint16_t fDAC[5]; // 4x12bit + 1xN/40 - uint16_t fPrescaling; + uint16_t fEnable[4]; /// enable of 4x9 pixels coded as 4x9bits + uint16_t fDAC[5]; /// 0-3 (A-D) Threshold of patches, 4 (H) Threshold for N out of 4 (12 bit each) + uint16_t fPrescaling; /// Internal readout time of FTUs for trigger counter StaticDataBoard() { init(*this); } @@ -149,11 +149,12 @@ enum Limits { - kMaxMultiplicity = 40, ///< Maximum for required trigger multiplicity - kMaxWindow = 0xf, - kMaxDeadTime = 0xffff, - kMaxDelayTimeMarker = 0x3ff, - kMaxDelayTrigger = 0x3ff, - kMaxTriggerInterval = 0x3ff, + kMaxMultiplicity = 40, ///< Minimum required trigger multiplicity + kMaxWindow = 0xf, ///< (4ns * x + 8ns) At least N (multiplicity) rising edges (trigger signal) within this window + kMaxDeadTime = 0xffff, ///< (4ns * x + 8ns) + kMaxDelayTimeMarker = 0x3ff, ///< (4ns * x + 8ns) + kMaxDelayTrigger = 0x3ff, ///< (4ns * x + 8ns) + kMaxTriggerInterval = 0x3ff, ///< kMaxSequence = 0x1f, + kMaxDAC = 0xfff, kMaskSettings = 0xf, kMaskLEDs = 0xf, @@ -162,32 +163,33 @@ enum GeneralSettings { - kTrigger = 0x80, - kPedestal = 0x40, - kLPext = 0x20, - kLPint = 0x10, - kExt2 = 0x08, - kExt1 = 0x04, - kVeto = 0x02, - kTimeMarker = 0x01, + kTrigger = 0x80, ///< Physics trigger decision (PhysicTrigger) + kPedestal = 0x40, ///< Pedestal trigger (artifical) + kLPext = 0x20, ///< Enable trigger decision after light pulse (CalibrationTrigger, LP1) + kLPint = 0x10, ///< Enable artificial trigger after light pulse (LP2) + kExt2 = 0x08, ///< External trigger signal 2 + kExt1 = 0x04, ///< External trigger signal 1 + kVeto = 0x02, ///< Veto trigger decision / artifical triggers + // -===> ClockCond + kTimeMarker = 0x01, ///< Select clock conditioner frequency (1) / time marker (0) as output }; - uint16_t fGeneralSettings; // only 8 bit used + uint16_t fGeneralSettings; // Enable for different trigger types / select for TIM/ClockConditioner output (only 8 bit used) uint16_t fStatusLEDs; // only 8 bit used - uint16_t fTriggerInterval; // only 10 bit used - uint16_t fTriggerSequence; // 3x5bit + uint16_t fTriggerInterval; // [ms] Interval between two artificial triggers (no matter which type) minimum 1ms, 10 bit + uint16_t fTriggerSequence; // Ratio between trigger types send as artificial trigger (in this order) 3x5bit uint64_t fDummy0; - uint16_t fMultiplicityPhysics; - uint16_t fMultiplicityCalib; - uint16_t fDelayTrigger; - uint16_t fDelayTimeMarker; - uint16_t fDeadTime; - uint32_t fClockConditioner[8]; // R0, R1, R8, R9, R11, R13, R14, R15 - uint16_t fWindowPhysics; - uint16_t fWindowCalib; + uint16_t fMultiplicityPhysics; /// Required trigger multiplicity for physcis triggers (0-40) + uint16_t fMultiplicityCalib; /// Required trigger multiplicity calibration (LPext) triggers (0-40) + uint16_t fDelayTrigger; /// (4ns * x + 8ns) FTM internal programmable delay between trigger decision and output + uint16_t fDelayTimeMarker; /// (4ns * x + 8ns) FTM internal programmable delay between trigger descision and time marker output + uint16_t fDeadTime; /// (4ns * x + 8ns) FTM internal programmable dead time after trigger decision + uint32_t fClockConditioner[8]; // R0, R1, R8, R9, R11, R13, R14, R15 + uint16_t fWindowPhysics; /// (4ns * x + 8ns) At least N (multiplicity) rising edges (trigger signal) within this window + uint16_t fWindowCalib; /// (4ns * x + 8ns) At least N (multiplicity) rising edges (trigger signal) within this window uint16_t fDummy1; - StaticDataBoard fBoard[4][10]; // 4 crates * 10 boards - - uint16_t fActiveFTU[4]; // 4 crates * 10 bits + StaticDataBoard fBoard[4][10]; // 4 crates * 10 boards (Crate0/FTU0 == readout time of FTUs) + + uint16_t fActiveFTU[4]; // 4 crates * 10 bits (FTU enable) StaticData() { init(*this); }