Changeset 10766


Ignore:
Timestamp:
May 23, 2011, 8:46:13 AM (9 years ago)
Author:
tbretz
Message:
Some improvement and name changes.
Location:
trunk/FACT++/src
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/FACT++/src/HeadersFAD.cc

    r10755 r10766  
    1111void FAD::EventHeader::print(std::ostream &out) const
    1212{
    13     out << hex << "Delimiter: ";
     13    out << "Delimiter: ";
    1414    if (fStartDelimiter==kDelimiterStart)
    1515        out << "ok";
    1616    else
    17         out << fStartDelimiter;
    18     out << " (Crate=" << dec << (fBoardId>>8) << ", Board=" << (fBoardId&0xff) << ", Version=" << (fVersion>>8) << "." << (fVersion&0xff) << ", DNA=" << fDNA <<")" << endl;
     17        out << hex << fStartDelimiter;
     18    out << " (Crate=" << dec << (fBoardId>>8) << ", Board=" << (fBoardId&0xff) << ", Version=" << (fVersion>>8) << "." << (fVersion&0xff) << ", DNA=" << hex << fDNA <<")" << endl;
    1919
    2020    out << dec;
    2121    out << "PkgLength:  " << fPackageLength << endl;
    2222
    23     out << "RunNumber:  " << dec<< fRunNumber << endl;
     23    out << "RunNumber:  " << fRunNumber << endl;
    2424    out << "Time:       " << fTimeStamp/10000. << "s" << endl;
    25     out << "EvtCounter: " << dec << fEventCounter << " of " << fNumTriggersToGenerate << endl;
    26     out << "Trigger:    Type=" << dec << fTriggerType << " Id=" << fTriggerId << " Crc=0x" << hex << fTriggerCrc << endl;
     25    out << "EvtCounter: " << fEventCounter << " of " << fNumTriggersToGenerate << endl;
     26    out << "Trigger:    Type=" << fTriggerType << " Id=" << fTriggerId << " Crc=0x" << hex << fTriggerCrc << endl;
    2727
    2828    out << "RefClock:   " << dec << fFreqRefClock << endl;
     
    4040    out << endl;
    4141
    42     out << "PLL_LCK=" << hex << fPLLLCK << endl;
    43     out << "  PLL-Lock:         " << hex << PllLock() << endl;
    44     out << "  Denable:          " << HasDenable() << endl;
    45     out << "  Dwrite:           " << HasDwrite() << endl;
    46     out << "  RefClk too high:  " << IsRefClockTooHigh() << endl;
    47     out << "  RefClk too low:   " << IsRefClockTooLow() << endl;
    48     out << "  DCM locked:       " << IsDcmLocked() << endl;
    49     out << "  DCM ready:        " << IsDcmReady() << endl;
    50     out << "  SPI_SCLK enabled: " << HasSpiSclk() << endl;
     42    out << "Status=" << hex << fStatus << endl;
     43    // PllLock -> 1111
     44    out << "  RefClk locked (PLLLCK):  " << hex << (int)PLLLCK();
     45    if (IsRefClockTooHigh())
     46        out << " (too high)";
     47    if (IsRefClockTooLow())
     48        out << " (too low)";
     49    out << endl;
     50    out << "  Domino wave (Denable):   " << (HasDenable()?"enabled":"disabled") << endl;
     51    out << "  DRS sampling (Dwrite):   " << (HasDwrite()?"enabled":"disabled") << endl;
     52    out << "  Dig.clock manager (DCM): " << (IsDcmLocked()?"locked":"unlocked");
     53    out << " / " << (IsDcmReady()?"ready":"not ready") << endl;
     54    out << "  SPI Serial Clock (SCLK): " << (HasSpiSclk()?"enabled":"disabled") << endl;
    5155}
    5256
  • trunk/FACT++/src/HeadersFAD.h

    r10756 r10766  
    112112        uint16_t fPackageLength;
    113113        uint16_t fVersion;
    114         uint16_t fPLLLCK;
     114        uint16_t fStatus;
    115115        //
    116116        uint16_t fTriggerCrc;
     
    182182                     : (fTempDrs[i]&0x007fff))>>3)/16.; }
    183183
    184         uint8_t PllLock() const        { return  fPLLLCK>>12; }
    185 
    186         bool HasDenable() const        { return fPLLLCK&kDenable; }
    187         bool HasDwrite() const         { return fPLLLCK&kDwrite; }
    188         bool IsRefClockTooHigh() const { return fPLLLCK&kRefClkTooHigh; }
    189         bool IsRefClockTooLow() const  { return fPLLLCK&kRefClkTooLow; }
    190         bool IsDcmLocked() const       { return fPLLLCK&kDcmLocked; }
    191         bool IsDcmReady() const        { return fPLLLCK&kDcmReady; }
    192         bool HasSpiSclk() const        { return fPLLLCK&kSpiSclk; }
     184        uint8_t PLLLCK() const         { return  fStatus>>12; }
     185
     186        bool HasDenable() const        { return fStatus&kDenable; }
     187        bool HasDwrite() const         { return fStatus&kDwrite; }
     188        bool IsRefClockTooHigh() const { return fStatus&kRefClkTooHigh; }
     189        bool IsRefClockTooLow() const  { return fStatus&kRefClkTooLow; }
     190        bool IsDcmLocked() const       { return fStatus&kDcmLocked; }
     191        bool IsDcmReady() const        { return fStatus&kDcmReady; }
     192        bool HasSpiSclk() const        { return fStatus&kSpiSclk; }
    193193
    194194        void clear() { reset(*this); }
     
    244244
    245245        uint32_t fFreqRefClock;
    246         uint16_t fPLLLCK;
     246        uint16_t fStatus;
    247247        uint16_t fAdcClockPhaseShift;
    248248        uint16_t fNumTriggersToGenerate;
     
    253253            fTimeStamp(h.fTimeStamp),
    254254            fFreqRefClock(h.fFreqRefClock),
    255             fPLLLCK(h.fPLLLCK),
     255            fStatus(h.fStatus),
    256256            fAdcClockPhaseShift(h.fAdcClockPhaseShift),
    257257            fNumTriggersToGenerate(h.fNumTriggersToGenerate),
     
    261261        }
    262262
    263         uint8_t PllLock() const        { return fPLLLCK>>12; }
    264 
    265         bool HasDenable() const        { return fPLLLCK&EventHeader::kDenable; }
    266         bool HasDwrite() const         { return fPLLLCK&EventHeader::kDwrite; }
    267         bool IsRefClockTooHigh() const { return fPLLLCK&EventHeader::kRefClkTooHigh; }
    268         bool IsRefClockTooLow() const  { return fPLLLCK&EventHeader::kRefClkTooLow; }
    269         bool IsDcmLocked() const       { return fPLLLCK&EventHeader::kDcmLocked; }
    270         bool IsDcmReady() const        { return fPLLLCK&EventHeader::kDcmReady; }
    271         bool HasSpiSclk() const        { return fPLLLCK&EventHeader::kSpiSclk; }
     263        uint8_t PLLLCK() const         { return fStatus>>12; }
     264
     265        bool HasDenable() const        { return fStatus&EventHeader::kDenable; }
     266        bool HasDwrite() const         { return fStatus&EventHeader::kDwrite; }
     267        bool IsRefClockTooHigh() const { return fStatus&EventHeader::kRefClkTooHigh; }
     268        bool IsRefClockTooLow() const  { return fStatus&EventHeader::kRefClkTooLow; }
     269        bool IsDcmLocked() const       { return fStatus&EventHeader::kDcmLocked; }
     270        bool IsDcmReady() const        { return fStatus&EventHeader::kDcmReady; }
     271        bool HasSpiSclk() const        { return fStatus&EventHeader::kSpiSclk; }
    272272
    273273    }  __attribute__((__packed__));
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